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ETS is a configuration option for TMC (Trace Macrocell). It's a bit like an ETR in that it's an ATB sink that writes to a bus, but it has a limited, "streaming AXI" output interface that is assumed to connect directly to another device such as a high-speed output port.
CSAL should, at a minimum, recognize an ETS. General trace-sink functions (e.g. disable trace sink) should work on an ETS similar to an ETR or TPIU. It's unclear what, if any, ETS-specific API is needed.
Right now, I don't have actual silicon with ETS, so if anyone else who has, wants to take an interest I'd be grateful.
The text was updated successfully, but these errors were encountered:
ETS is a configuration option for TMC (Trace Macrocell). It's a bit like an ETR in that it's an ATB sink that writes to a bus, but it has a limited, "streaming AXI" output interface that is assumed to connect directly to another device such as a high-speed output port.
CSAL should, at a minimum, recognize an ETS. General trace-sink functions (e.g. disable trace sink) should work on an ETS similar to an ETR or TPIU. It's unclear what, if any, ETS-specific API is needed.
Right now, I don't have actual silicon with ETS, so if anyone else who has, wants to take an interest I'd be grateful.
The text was updated successfully, but these errors were encountered: