vivado_pid16564.str

/*

Xilinx Vivado v2018.2 (64-bit) [Major: 2018, Minor: 2]
SW Build: 2258646 on Thu Jun 14 20:03:12 MDT 2018
IP Build: 2256618 on Thu Jun 14 22:10:49 MDT 2018

Process ID: 16564
License: Customer

Current time: 	Sun Jun 11 20:06:41 IST 2023
Time zone: 	India Standard Time (Asia/Colombo)

OS: Windows 10
OS Version: 10.0
OS Architecture: amd64
Available processors (cores): 8

Screen size: 1536x864
Screen resolution (DPI): 96
Available screens: 1
Available disk space: 68 GB
Default font: family=Dialog,name=Dialog,style=plain,size=12

Java version: 	1.8.0_112 64-bit
Java home: 	E:/Xilinx/Vivado/2018.2/tps/win64/jre
Java executable location: 	E:/Xilinx/Vivado/2018.2/tps/win64/jre/bin/java.exe
Java initial memory (-Xms): 	128 MB
Java maximum memory (-Xmx):	 2 GB


User name: 	Akind
User home directory: C:/Users/Akind
User working directory: E:/Xilinx/Projects/Nano Processor Final
User country: 	US
User language: 	en
User locale: 	en_US

RDI_BASEROOT: E:/Xilinx/Vivado
HDI_APPROOT: E:/Xilinx/Vivado/2018.2
RDI_DATADIR: E:/Xilinx/Vivado/2018.2/data
RDI_BINDIR: E:/Xilinx/Vivado/2018.2/bin

Vivado preferences file location: C:/Users/Akind/AppData/Roaming/Xilinx/Vivado/2018.2/vivado.xml
Vivado preferences directory: C:/Users/Akind/AppData/Roaming/Xilinx/Vivado/2018.2/
Vivado layouts directory: C:/Users/Akind/AppData/Roaming/Xilinx/Vivado/2018.2/layouts
PlanAhead jar file location: 	E:/Xilinx/Vivado/2018.2/lib/classes/planAhead.jar
Vivado log file location: 	E:/Xilinx/Projects/Nano Processor Final/vivado.log
Vivado journal file location: 	E:/Xilinx/Projects/Nano Processor Final/vivado.jou
Engine tmp dir: 	E:/Xilinx/Projects/Nano Processor Final/.Xil/Vivado-16564-DESKTOP-S74UNKU

Xilinx Environment Variables
----------------------------
XILINX: E:/Xilinx/Vivado/2018.2/ids_lite/ISE
XILINX_DSP: E:/Xilinx/Vivado/2018.2/ids_lite/ISE
XILINX_PLANAHEAD: E:/Xilinx/Vivado/2018.2
XILINX_SDK: E:/Xilinx/SDK/2018.2
XILINX_VIVADO: E:/Xilinx/Vivado/2018.2
XILINX_VIVADO_HLS: E:/Xilinx/Vivado/2018.2


GUI allocated memory:	203 MB
GUI max memory:		3,052 MB
Engine allocated memory: 519 MB

Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.

*/

// TclEventType: START_GUI
// [GUI Memory]: 61 MB (+61477kb) [00:00:17]
// [Engine Memory]: 495 MB (+367589kb) [00:00:17]
// Tcl Message: start_gui 
// TclEventType: PROJECT_OPEN_DIALOG
// bx (ck):  Open Project : addNotify
// Opening Vivado Project: E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.xpr. Version: Vivado v2018.2 
// TclEventType: DEBUG_PROBE_SET_CHANGE
// Tcl Message: open_project {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.xpr} 
// TclEventType: MSGMGR_MOVEMSG
// TclEventType: FILE_SET_NEW
// TclEventType: RUN_COMPLETED
// TclEventType: RUN_CURRENT
// TclEventType: PROJECT_NEW
// [Engine Memory]: 520 MB (+42kb) [00:00:20]
// Tcl Message: open_project {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.xpr} 
// Tcl Message: Scanning sources... Finished scanning sources 
// Tcl Message: INFO: [IP_Flow 19-234] Refreshing IP repositories INFO: [IP_Flow 19-1704] No user IP repositories specified 
// HMemoryUtils.trashcanNow. Engine heap size: 520 MB. GUI used memory: 34 MB. Current time: 6/11/23 8:06:43 PM IST
// Tcl Message: INFO: [IP_Flow 19-2313] Loaded Vivado IP repository 'E:/Xilinx/Vivado/2018.2/data/ip'. 
// TclEventType: PROJECT_NEW
// [Engine Memory]: 565 MB (+20572kb) [00:00:29]
// [Engine Memory]: 596 MB (+2595kb) [00:00:34]
// HMemoryUtils.trashcanNow. Engine heap size: 627 MB. GUI used memory: 40 MB. Current time: 6/11/23 8:06:58 PM IST
// Tcl Message: open_project: Time (s): cpu = 00:00:12 ; elapsed = 00:00:19 . Memory (MB): peak = 840.477 ; gain = 102.605 
// Project name: Nano Processor Final; location: E:/Xilinx/Projects/Nano Processor Final; part: xc7a35tcpg236-1
// [Engine Memory]: 630 MB (+4463kb) [00:00:38]
dismissDialog("Open Project"); // bx (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Tcl Message: update_compile_order -fileset sources_1 
// Elapsed time: 19 seconds
expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd)]", 1); // B (D, ck)
// PAPropertyPanels.initPanels (Nano_Processor.vhd) elapsed time: 0.2s
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd)]", 4, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Program_ROM_0 : Program_ROM(Behavioral) (Program_ROM.vhd)]", 8, false, false, false, false, false, true); // B (D, ck) - Double Click
// [GUI Memory]: 65 MB (+1310kb) [00:01:01]
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Program_ROM_0 : Program_ROM(Behavioral) (Program_ROM.vhd)]", 8, false); // B (D, ck)
selectButton(PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV, (String) null); // B (E, ck)
// Run Command: PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV
// Elapsed time: 21 seconds
selectCodeEditor("Nano_Processor.vhd", 148, 108); // ce (w, ck)
// [GUI Memory]: 72 MB (+3634kb) [00:01:31]
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
selectCodeEditor("Nano_Processor.vhd", 148, 113); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 98, 114); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 98, 114, false, false, false, false, true); // ce (w, ck) - Double Click
// [GUI Memory]: 79 MB (+2945kb) [00:01:49]
// Elapsed time: 12 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_REG_EN"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 216, 233, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 174, 231); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 253, 197); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 147, 147); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 146, 148, false, false, false, false, true); // ce (w, ck) - Double Click
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 139, 42); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_MUX_A"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 138, 42); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 141, 45); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 140, 40); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_MUX_B"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 140, 45); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 138, 42); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 125, 47); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 109, 64); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 124, 45); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_SUB"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 160, 234); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 183, 230); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 218, 221); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 181, 231); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 186, 99); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 175, 61); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 181, 62); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 215, 60); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
// [GUI Memory]: 84 MB (+1921kb) [00:03:34]
// Elapsed time: 265 seconds
selectCodeEditor("Nano_Processor.vhd", 125, 60); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_JMP"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 87, 28); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 125, 26); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 161, 27); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
// Elapsed time: 14 seconds
selectCodeEditor("Nano_Processor.vhd", 117, 178); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_LD"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 91, 27); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 119, 27); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 183, 25); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// [GUI Memory]: 89 MB (+186kb) [00:09:03]
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 126, 146); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 58 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "ASU_RES"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 109, 22); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 126, 25); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 125, 26); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
// Elapsed time: 46 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "ASU_out"); // l (aQ, ck)
// [GUI Memory]: 94 MB (+874kb) [00:19:27]
// WARNING: HTimer (ExpRunMonitor Open Timer) is taking 1612ms to process. Increasing delay to 6000 ms.
// WARNING: HSwingWorker (Refresh Filesets Swing Worker) is taking 1177 ms. Increasing delay to 3000 ms.
// Elapsed time: 1069 seconds
selectCodeEditor("Nano_Processor.vhd", 295, 94); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "REG_BANK_INPUT"); // l (aQ, ck)
// Elapsed time: 44 seconds
selectCodeEditor("Nano_Processor.vhd", 334, 177); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 292, 226); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 141, 29); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 175, 24); // ce (w, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 44 MB. Current time: 6/11/23 8:37:01 PM IST
// Elapsed time: 38 seconds
selectCodeEditor("Nano_Processor.vhd", 266, 230, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 148, 25, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_COPY, "Copy"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 250, 232, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 228, 227, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 17 seconds
selectCodeEditor("Nano_Processor.vhd", 154, 45); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "REG_BANK_R0"); // l (aQ, ck)
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 288ms to process. Increasing delay to 2000 ms.
// Elapsed time: 443 seconds
selectCodeEditor("Nano_Processor.vhd", 171, 56); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 59 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "CLK"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 76, 64); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 76, 76); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 77, 93); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 78, 109); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 27, 96); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 29, 128); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 27, 158); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 28, 177); // ce (w, ck)
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd)]", 1, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd)]", 1, true, false, false, false, false, true); // B (D, ck) - Double Click - Node
// Elapsed time: 10 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 1); // k (j, ck)
// Elapsed time: 37 seconds
selectCodeEditor("Nano_Processor.vhd", 26, 142); // ce (w, ck)
// Elapsed time: 74 seconds
selectCodeEditor("Nano_Processor.vhd", 139, 23); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 110 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "curr"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 141, 69); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "CURR_INST"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 102, 83); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 139, 75); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 190, 78); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "crnt_instruction"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 123, 24, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_COPY, "Copy"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 21 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "curr_inst"); // l (aQ, ck)
typeControlKey(null, null, 'z');
selectCodeEditor("Nano_Processor.vhd", 260, 27, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 248, 75, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 12 seconds
selectCodeEditor("Nano_Processor.vhd", 245, 183); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 320, 198); // ce (w, ck)
// Elapsed time: 95 seconds
selectCodeEditor("Nano_Processor.vhd", 156, 76); // ce (w, ck)
// Elapsed time: 16 seconds
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
// Elapsed time: 45 seconds
selectCodeEditor("Nano_Processor.vhd", 129, 74); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 10 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "DEC_LSB"); // l (aQ, ck)
// [GUI Memory]: 99 MB (+742kb) [00:48:45]
// Elapsed time: 154 seconds
selectCodeEditor("Nano_Processor.vhd", 166, 124); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 34 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "MUX_A_REG_VAL"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 122, 23); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 165, 25); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 141, 26); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 255, 228, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 259, 228, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 167, 228, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 21 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "MUX_B_REG_VAL"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 138, 34); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 168, 26); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 138, 25); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 137, 23); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 237, 225, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 178, 232, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 134 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "MUX_a_out"); // l (aQ, ck)
// Elapsed time: 40 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "MUX_b_out"); // l (aQ, ck)
// Elapsed time: 69 seconds
selectCodeEditor("Nano_Processor.vhd", 154, 62); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 48 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "REG_BANK_R0"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 136, 19); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 151, 27); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 148, 27); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 25 seconds
selectCodeEditor("Nano_Processor.vhd", 166, 29, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 202, 230, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 206, 225, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 112, 225, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 19 seconds
selectCodeEditor("Nano_Processor.vhd", 147, 93); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 153, 112); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 105, 111); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "REG_BANK_R1"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 187, 225, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 175, 229); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 210, 229); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 214, 227, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 203, 229, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 113, 230, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 11 seconds
selectCodeEditor("Nano_Processor.vhd", 146, 60); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 154, 79); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 111, 75); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 147, 76); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 153, 95); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 111, 96); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 154, 109); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 114, 110); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 151, 127); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 111, 130); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 153, 145); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 108, 148); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 153, 158); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 109, 164); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "REG_BANK_R2"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 238, 193); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 238, 159); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 190, 163); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 238, 181); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 193, 179); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 239, 195); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 199, 197); // ce (w, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 42 MB. Current time: 6/11/23 9:07:01 PM IST
selectCodeEditor("Nano_Processor.vhd", 240, 210); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 194, 212); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 238, 182); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 193, 182); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 232, 25); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 189, 31); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 230, 44); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 187, 44); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 230, 58); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 187, 59); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 230, 75); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 187, 83); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 230, 89); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 189, 92); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 233, 107); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 185, 111); // ce (w, ck)
// Elapsed time: 10 seconds
selectCodeEditor("Nano_Processor.vhd", 149, 177); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 148, 159); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 102, 164); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 148, 145); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 104, 140); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 146, 127); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 102, 128); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 145, 111); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 104, 112); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 147, 92); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 103, 96); // ce (w, ck)
// Elapsed time: 36 seconds
selectCodeEditor("Nano_Processor.vhd", 216, 28); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 216, 42); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 174, 43); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 217, 60); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 172, 60); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 220, 77); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 173, 76); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 217, 90); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 169, 93); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 215, 110); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 170, 110); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 311, 197); // ce (w, ck)
// Elapsed time: 23 seconds
selectCodeEditor("Nano_Processor.vhd", 255, 177); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 185, 209); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 158, 179); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "ZeroFlag0"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 267, 181); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 326, 180); // ce (w, ck)
// Elapsed time: 20 seconds
selectCodeEditor("Nano_Processor.vhd", 480, 82); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// WARNING: HTimer (FileMgr Design Graph Update Timer) is taking 535ms to process. Increasing delay to 3000 ms.
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// A (ck): Synthesis is Out-of-date: addNotify
selectButton(RDIResource.BaseDialog_YES, "Yes"); // a (A)
// 'c' command handler elapsed time: 8 seconds
// bx (ck):  Resetting Runs : addNotify
dismissDialog("Synthesis is Out-of-date"); // A (ck)
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// Tcl Message: reset_run synth_1 
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 21:10:50 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log [Sun Jun 11 21:10:50 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
// WARNING: HSwingWorker (Update Runs Swing Worker) is taking 2673 ms. Increasing delay to 3000 ms.
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 445ms to process. Increasing delay to 2000 ms.
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ExpRunMgr Pending Runs Timer) is taking 801ms to process. Increasing delay to 3000 ms.
// ah (ck): Implementation Completed: addNotify
// Elapsed time: 316 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Implementation Completed"); // ah (ck)
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// Tcl Message: launch_simulation 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design 
// Tcl Message: INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:07 . Memory (MB): peak = 872.977 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '7' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: Built simulation snapshot System_TB_behav 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:08 . Memory (MB): peak = 872.977 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '8' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "System_TB_behav -key {Behavioral:sim_1:Functional:System_TB} -tclbatch {System_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// TclEventType: LOAD_FEATURE
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_OPEN_WCFG
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// Tcl Message: source System_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } 
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 50 MB. Current time: 6/11/23 9:16:40 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: # run 1000ns 
// Tcl Message: xsim: Time (s): cpu = 00:00:02 ; elapsed = 00:00:06 . Memory (MB): peak = 883.680 ; gain = 10.703 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'System_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:02 ; elapsed = 00:00:24 . Memory (MB): peak = 883.680 ; gain = 10.703 
// 'd' command handler elapsed time: 24 seconds
// Elapsed time: 24 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 49 MB. Current time: 6/11/23 9:16:42 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 50 MB. Current time: 6/11/23 9:16:45 PM IST
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectButton(PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV, (String) null); // B (E, ck)
// Run Command: PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// Elapsed time: 318 seconds
selectCodeEditor("Nano_Processor.vhd", 531, 79); // ce (w, ck)
// Elapsed time: 33 seconds
selectCodeEditor("Nano_Processor.vhd", 125, 103); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 126, 25); // ce (w, ck)
// Elapsed time: 11 seconds
selectCodeEditor("Nano_Processor.vhd", 166, 23); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 157, 297, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 241, 295, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 229, 297, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 84 seconds
selectCodeEditor("Nano_Processor.vhd", 190, 141); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "Jmp_Address"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 250, 53); // ce (w, ck)
// Elapsed time: 534 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 1", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// Elapsed time: 44 seconds
unMinimizeFrame(PAResourceOtoP.PAViews_OBJECTS, "Objects"); // aw
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd)]", 1); // B (D, ck)
expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd)]", 4); // B (D, ck)
// PAPropertyPanels.initPanels (Program_ROM.vhd) elapsed time: 1.1s
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Program_ROM_0 : Program_ROM(Behavioral) (Program_ROM.vhd)]", 8, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Program_ROM_0 : Program_ROM(Behavioral) (Program_ROM.vhd)]", 8, false, false, false, false, false, true); // B (D, ck) - Double Click
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 1", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 3); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 3); // k (j, ck)
selectCodeEditor("Program_ROM.vhd", 160, 129); // ce (w, ck)
selectCodeEditor("Program_ROM.vhd", 76, 298); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectCodeEditor("Nano_Processor.vhd", 181, 233); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 174, 116); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 239, 113); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 425, 159); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 3); // k (j, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectCodeEditor("Nano_Processor.vhd", 245, 166); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 239, 115); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 113, 182); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// A (ck): Synthesis is Out-of-date: addNotify
selectButton(RDIResource.BaseDialog_YES, "Yes"); // a (A)
// bx (ck):  Resetting Runs : addNotify
dismissDialog("Synthesis is Out-of-date"); // A (ck)
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// Tcl Message: reset_run synth_1 
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// f (ck): Launch Runs: addNotify
// [GUI Memory]: 106 MB (+1591kb) [01:30:19]
// Elapsed time: 47 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 21:37:05 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log [Sun Jun 11 21:37:05 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 585ms to process. Increasing delay to 2000 ms.
// WARNING: HTimer (ExpRunMgr Pending Runs Timer) is taking 644ms to process. Increasing delay to 4000 ms.
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 547ms to process. Increasing delay to 3000 ms.
// ah (ck): Implementation Completed: addNotify
// Elapsed time: 283 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Implementation Completed"); // ah (ck)
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// TclEventType: WAVEFORM_CLOSE_WCFG
// TclEventType: SIMULATION_CLOSE_SIMULATION
// e (ck):  Run Simulation : addNotify
selectButton("PAResourceQtoS.SimulationRun_SIMULATION_ALREADY_RUNNING_DO_YOU_Yes", "Yes"); // JButton (A, G)
// Tcl Message: close_sim 
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
// TclEventType: LAUNCH_SIM
// Tcl Message: launch_simulation 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Nano_Processor.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Nano_Processor INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Program_ROM.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Program_ROM 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: Built simulation snapshot System_TB_behav 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:06 . Memory (MB): peak = 891.695 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '6' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "System_TB_behav -key {Behavioral:sim_1:Functional:System_TB} -tclbatch {System_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 53 MB. Current time: 6/11/23 9:42:15 PM IST
// Tcl Message: source System_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } 
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'System_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:01 ; elapsed = 00:00:15 . Memory (MB): peak = 892.238 ; gain = 0.543 
// 'd' command handler elapsed time: 19 seconds
// Elapsed time: 15 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 53 MB. Current time: 6/11/23 9:42:17 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// Elapsed time: 210 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 2", 3); // k (j, ck)
// TclEventType: WAVEFORM_CLOSE_WCFG
closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 2"); // w
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// TclEventType: SIMULATION_CLOSE_SIMULATION
// e (ck):  Run Simulation : addNotify
selectButton("PAResourceQtoS.SimulationRun_SIMULATION_ALREADY_RUNNING_DO_YOU_Yes", "Yes"); // JButton (A, G)
// Tcl Message: close_sim 
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '2' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: Vivado Simulator 2018.2 Copyright 1986-1999, 2001-2018 Xilinx, Inc. All Rights Reserved. Running: E:/Xilinx/Vivado/2018.2/bin/unwrapped/win64.o/xelab.exe -wto 67a5dd7157414ed9814149af3173682b --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip --snapshot System_TB_behav xil_defaultlib.System_TB -log elaborate.log  Using 2 slave threads. Starting static elaboration Completed static elaboration INFO: [XSIM 43-4323] No Change in HDL. Linking previously generated obj files to create kernel 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "System_TB_behav -key {Behavioral:sim_1:Functional:System_TB} -tclbatch {System_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 70 MB. Current time: 6/11/23 9:46:09 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: source System_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'System_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:07 . Memory (MB): peak = 893.402 ; gain = 0.000 
// 'd' command handler elapsed time: 9 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 55 MB. Current time: 6/11/23 9:46:19 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// Elapsed time: 11 seconds
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 55 MB. Current time: 6/11/23 9:46:21 PM IST
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// Elapsed time: 433 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// Elapsed time: 20 seconds
selectCodeEditor("Nano_Processor.vhd", 288, 162); // ce (w, ck)
// Elapsed time: 41 seconds
selectCodeEditor("Nano_Processor.vhd", 170, 177); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 20 seconds
selectCodeEditor("Nano_Processor.vhd", 286, 137); // ce (w, ck)
// Elapsed time: 13 seconds
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 287, 140); // ce (w, ck)
// Elapsed time: 12 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "dec_jmp_addrs"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 182, 299); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "Jmp_Address"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 310, 299); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 25 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "dec_jmp_addrs"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 294, 143); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
// Elapsed time: 29 seconds
selectCodeEditor("Nano_Processor.vhd", 190, 147); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 39 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "mem_"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 351, 242); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 26 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "PI_CURR_INST_ADDR"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 88, 128); // ce (w, ck)
typeControlKey(null, null, 'z');
selectCodeEditor("Nano_Processor.vhd", 195, 127); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 12 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "INST_ADDR"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 202, 14); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 197, 40); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// Elapsed time: 11 seconds
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "PI_NEXT_INST_ADDR"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 192, 27); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 195, 24); // ce (w, ck)
// Elapsed time: 14 seconds
selectCodeEditor("Nano_Processor.vhd", 189, 22); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 148, 294, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 194, 298, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenu(RDIResource.HCodeEditor_BLANK_OPERATIONS, "Blank Operations"); // V (aj, Popup.HeavyWeightWindow)
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 17 seconds
selectCodeEditor("Nano_Processor.vhd", 195, 57); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
setText(RDIResource.HCodeEditor_SEARCH_TEXT_COMBO_BOX, "PI_CURR_INST_ADDR"); // l (aQ, ck)
selectCodeEditor("Nano_Processor.vhd", 188, 25); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 198, 23); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 195, 22); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 180, 297, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 201, 301, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
selectCodeEditor("Nano_Processor.vhd", 303, 297, false, false, false, true, false); // ce (w, ck) - Popup Trigger
selectMenuItem(RDIResourceCommand.RDICommands_PASTE, "Paste"); // ad (aj, Popup.HeavyWeightWindow)
// Elapsed time: 44 seconds
selectCodeEditor("Nano_Processor.vhd", 89, 41); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 90, 61); // ce (w, ck)
// WARNING: HTimer (HSTRUtils Dump STR Log Timer) is taking 684ms to process. Increasing delay to 4000 ms.
selectCodeEditor("Nano_Processor.vhd", 192, 39); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 137, 167); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 101, 28); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 104, 26); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 102, 61); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 130, 300); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 246, 242); // ce (w, ck)
// Elapsed time: 139 seconds
selectCodeEditor("Nano_Processor.vhd", 218, 79); // ce (w, ck)
// Elapsed time: 13 seconds
selectCodeEditor("Nano_Processor.vhd", 99, 75); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 173, 79); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 266, 199); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 285, 242); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'v'); // ce (w, ck)
// Elapsed time: 66 seconds
selectCodeEditor("Nano_Processor.vhd", 152, 43); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 159, 58); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 523, 62); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 77, 164); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 237, 43); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 244, 60); // ce (w, ck)
// Elapsed time: 10 seconds
selectCodeEditor("Nano_Processor.vhd", 202, 143); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 207, 283); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 195, 215); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 315, 159); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 224, 100); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 213, 264); // ce (w, ck)
// Elapsed time: 48 seconds
selectCodeEditor("Nano_Processor.vhd", 173, 44); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 17 seconds
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// A (ck): Synthesis is Out-of-date: addNotify
selectButton(RDIResource.BaseDialog_YES, "Yes"); // a (A)
// bx (ck):  Resetting Runs : addNotify
dismissDialog("Synthesis is Out-of-date"); // A (ck)
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// Tcl Message: reset_run synth_1 
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 22:07:14 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log [Sun Jun 11 22:07:14 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 685ms to process. Increasing delay to 2000 ms.
// TclEventType: RUN_STEP_COMPLETED
// [GUI Memory]: 112 MB (+701kb) [02:02:37]
// TclEventType: RUN_COMPLETED
// ah (ck): Implementation Completed: addNotify
// Elapsed time: 186 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Implementation Completed"); // ah (ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// TclEventType: WAVEFORM_CLOSE_WCFG
// TclEventType: SIMULATION_CLOSE_SIMULATION
// e (ck):  Run Simulation : addNotify
selectButton("PAResourceQtoS.SimulationRun_SIMULATION_ALREADY_RUNNING_DO_YOU_Yes", "Yes"); // JButton (A, G)
// Tcl Message: close_sim 
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
// TclEventType: LAUNCH_SIM
// Tcl Message: launch_simulation 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Nano_Processor.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Nano_Processor 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: Vivado Simulator 2018.2 Copyright 1986-1999, 2001-2018 Xilinx, Inc. All Rights Reserved. Running: E:/Xilinx/Vivado/2018.2/bin/unwrapped/win64.o/xelab.exe -wto 67a5dd7157414ed9814149af3173682b --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip --snapshot System_TB_behav xil_defaultlib.System_TB -log elaborate.log  Using 2 slave threads. 
// TclEventType: LAUNCH_SIM
// Tcl Message: Built simulation snapshot System_TB_behav 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:06 . Memory (MB): peak = 896.953 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '6' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "System_TB_behav -key {Behavioral:sim_1:Functional:System_TB} -tclbatch {System_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 106 MB. Current time: 6/11/23 10:10:42 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: source System_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'System_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:14 . Memory (MB): peak = 896.953 ; gain = 0.000 
// 'd' command handler elapsed time: 20 seconds
// Elapsed time: 14 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 58 MB. Current time: 6/11/23 10:10:46 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 58 MB. Current time: 6/11/23 10:10:48 PM IST
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 4", 3); // k (j, ck)
// TclEventType: WAVEFORM_CLOSE_WCFG
closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 4"); // w
selectButton(PAResourceTtoZ.TaskBanner_CLOSE, (String) null); // k (ay, ck)
closeTask("Simulation", "Behavioral Simulation - Functional - sim_1 - System_TB", "DesignTask.SIMULATION");
// A (ck): Confirm Close: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (A)
// TclEventType: SIMULATION_CLOSE_SIMULATION
// Tcl Message: close_sim 
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
dismissDialog("Confirm Close"); // A (ck)
selectButton(PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV, (String) null); // B (E, ck)
// Run Command: PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV
// Elapsed time: 215 seconds
selectCodeEditor("Nano_Processor.vhd", 491, 24); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 310ms to process. Increasing delay to 2000 ms.
// Elapsed time: 586 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
// Elapsed time: 35 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Project Summary", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 1); // k (j, ck)
selectCodeEditor("Nano_Processor.vhd", 396, 218); // ce (w, ck)
selectCodeEditor("Nano_Processor.vhd", 6, 149); // ce (w, ck)
// Elapsed time: 31 seconds
selectCodeEditor("Nano_Processor.vhd", 352, 193); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectCodeEditor("System.vhd", 367, 175); // ce (w, ck)
selectCodeEditor("System.vhd", 47, 73); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 1); // k (j, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectCodeEditor("System.vhd", 66, 226); // ce (w, ck)
selectCodeEditor("System.vhd", 2, 44); // ce (w, ck)
selectCodeEditor("System.vhd", 221, 181); // ce (w, ck)
// Elapsed time: 16 seconds
selectCodeEditor("System.vhd", 251, 128); // ce (w, ck)
selectCodeEditor("System.vhd", 84, 92); // ce (w, ck)
// Elapsed time: 11 seconds
selectCodeEditor("System.vhd", 70, 130); // ce (w, ck)
selectCodeEditor("System.vhd", 71, 111); // ce (w, ck)
// Elapsed time: 22 seconds
selectCodeEditor("System.vhd", 140, 212); // ce (w, ck)
selectCodeEditor("System.vhd", 53, 214); // ce (w, ck)
selectCodeEditor("System.vhd", 54, 218); // ce (w, ck)
selectCodeEditor("System.vhd", 75, 216); // ce (w, ck)
selectCodeEditor("System.vhd", 70, 217); // ce (w, ck)
selectCodeEditor("System.vhd", 55, 229); // ce (w, ck)
selectCodeEditor("System.vhd", 96, 234); // ce (w, ck)
selectCodeEditor("System.vhd", 147, 214); // ce (w, ck)
selectCodeEditor("System.vhd", 111, 161); // ce (w, ck)
selectCodeEditor("System.vhd", 127, 164); // ce (w, ck)
selectCodeEditor("System.vhd", 203, 163); // ce (w, ck)
selectCodeEditor("System.vhd", 114, 179); // ce (w, ck)
selectCodeEditor("System.vhd", 117, 214); // ce (w, ck)
selectCodeEditor("System.vhd", 192, 214); // ce (w, ck)
selectCodeEditor("System.vhd", 203, 96); // ce (w, ck)
selectCodeEditor("System.vhd", 132, 97); // ce (w, ck)
selectCodeEditor("System.vhd", 172, 108); // ce (w, ck)
selectCodeEditor("System.vhd", 139, 165); // ce (w, ck)
selectCodeEditor("System.vhd", 126, 161); // ce (w, ck)
selectCodeEditor("System.vhd", 214, 165); // ce (w, ck)
selectCodeEditor("System.vhd", 56, 198); // ce (w, ck)
selectCodeEditor("System.vhd", 74, 194); // ce (w, ck)
selectCodeEditor("System.vhd", 69, 193); // ce (w, ck)
selectCodeEditor("System.vhd", 147, 196); // ce (w, ck)
selectCodeEditor("System.vhd", 233, 228); // ce (w, ck)
selectCodeEditor("System.vhd", 21, 197); // ce (w, ck)
// Elapsed time: 27 seconds
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
expandTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Constraints]", 15); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Constraints, constrs_1, Basys3Labs.xdc]", 17, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Constraints, constrs_1, Basys3Labs.xdc]", 17, false, false, false, false, false, true); // B (D, ck) - Double Click
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Slow_Clock_0 : Slow_Clock(Behavioral) (Slow_Clock.vhd)]", 3, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Slow_Clock_0 : Slow_Clock(Behavioral) (Slow_Clock.vhd)]", 3, false, false, false, false, false, true); // B (D, ck) - Double Click
selectCodeEditor("Slow_Clock.vhd", 97, 78); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 97, 99); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 56, 180); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 77, 143); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 155, 181); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 106, 247); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 84, 93); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 122, 231); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 167, 232); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 302, 227); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 266, 246); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 89, 164); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectCodeEditor("System.vhd", 70, 176); // ce (w, ck)
selectCodeEditor("System.vhd", 26, 196); // ce (w, ck)
selectCodeEditor("System.vhd", 99, 164); // ce (w, ck)
selectCodeEditor("System.vhd", 66, 182); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 5); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// A (ck): Synthesis is Out-of-date: addNotify
selectButton(RDIResource.BaseDialog_YES, "Yes"); // a (A)
// bx (ck):  Resetting Runs : addNotify
dismissDialog("Synthesis is Out-of-date"); // A (ck)
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// Tcl Message: reset_run synth_1 
// TclEventType: RUN_MODIFY
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 22:30:50 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log [Sun Jun 11 22:30:50 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
// Elapsed time: 20 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 3); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 5); // k (j, ck)
selectCodeEditor("Slow_Clock.vhd", 59, 196); // ce (w, ck)
// TclEventType: RUN_FAILED
// ah (ck): Synthesis Failed: addNotify
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Synthesis Failed"); // ah (ck)
selectCodeEditor("Slow_Clock.vhd", 120, 200); // ce (w, ck)
selectCodeEditor("Slow_Clock.vhd", 85, 212); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 19 seconds
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Synth 8-1031] r6 is not declared [E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Nano_Processor.vhd:238]. ]", 29, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.srcs\sources_1\new\Nano_Processor.vhd;-;;-;16;-;line;-;238;-;;-;16;-;"); // ah (O, ck)
selectCodeEditor("Nano_Processor.vhd", 169, 197); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 14 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 5); // k (j, ck)
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// 'c' command handler elapsed time: 5 seconds
selectButton("PAResourceQtoS.RunImplementation_THERE_NO_NETLIST_AVAILABLE_OK_Cancel", "Cancel"); // JButton (A, G)
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_SYNTHESIS
// bx (ck):  Resetting Runs : addNotify
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// Tcl Message: reset_run synth_1 
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: launch_runs synth_1 -jobs 4 
// Tcl Message: [Sun Jun 11 22:32:30 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log 
// 'k' command handler elapsed time: 3 seconds
dismissDialog("Starting Design Runs"); // bx (ck)
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 472ms to process. Increasing delay to 2000 ms.
// ah (ck): Synthesis Completed: addNotify
// Elapsed time: 49 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (ah)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: launch_runs impl_1 -jobs 4 
// Tcl Message: [Sun Jun 11 22:33:22 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
// Elapsed time: 15 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 3); // k (j, ck)
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_COMPLETED
// ah (ck): Implementation Completed: addNotify
// Elapsed time: 74 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Implementation Completed"); // ah (ck)
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Nano_Processor.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Nano_Processor INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Slow_Clock.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Slow_Clock INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/System.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity System 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '4' seconds INFO: [USF-XSim-99] Step results log file:'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' 
// Tcl Message: ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information. ERROR: [Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation. 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:09 . Memory (MB): peak = 903.648 ; gain = 4.715 
// Tcl Message: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors. 
// CommandFailedException: ERROR: [Common 17-69] Command failed: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  
// HOptionPane Error: 'ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  (Run Simulation)'
// 'd' command handler elapsed time: 15 seconds
// Elapsed time: 15 seconds
selectButton("RDIResource.ProgressDialog_ERROR_ENCOUNTERED_PLEASE_SEE_TCL_OK", "OK"); // JButton (A, G)
// a (ck): Critical Messages: addNotify
// Elapsed time: 14 seconds
selectButton(PAResourceAtoD.CmdMsgDialog_OPEN_MESSAGES_VIEW, "Open Messages View"); // a (a)
// Run Command: PAResourceCommand.PACommandNames_MESSAGE_WINDOW
dismissDialog("Critical Messages"); // a (ck)
// Elapsed time: 18 seconds
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '2' seconds INFO: [USF-XSim-99] Step results log file:'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' 
// Tcl Message: ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information. ERROR: [Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation. 
// Tcl Message: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors. 
// CommandFailedException: ERROR: [Common 17-69] Command failed: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  
// HOptionPane Error: 'ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  (Run Simulation)'
// 'd' command handler elapsed time: 8 seconds
selectButton("RDIResource.ProgressDialog_ERROR_ENCOUNTERED_PLEASE_SEE_TCL_OK", "OK"); // JButton (A, G)
// a (ck): Critical Messages: addNotify
selectButton(PAResourceAtoD.CmdMsgDialog_OPEN_MESSAGES_VIEW, "Open Messages View"); // a (a)
// Run Command: PAResourceCommand.PACommandNames_MESSAGE_WINDOW
dismissDialog("Critical Messages"); // a (ck)
expandTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Vivado Commands, General Messages, [Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation.. ]", 3); // ah (O, ck)
expandTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Vivado Commands, General Messages, [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information.. ]", 2); // ah (O, ck)
selectCheckBox(PAResourceItoN.MsgView_ERROR_MESSAGES, (String) null, false); // g (aQ, ck): FALSE
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. ]", 1, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;47;-;;-;16;-;"); // ah (O, ck)
selectCodeEditor("Basys3Labs.xdc", 307, 179); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 364, 197); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 306, 213); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 365, 232); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 309, 250); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 365, 267); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 308, 180); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 364, 198); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 301, 159); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 365, 180); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 363, 213); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 364, 249); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 298, 231); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 302, 198); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 301, 261); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 365, 211); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 300, 231); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 301, 198); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 303, 164); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 364, 150); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 365, 182); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 322, 200); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 374, 214); // ce (w, ck)
selectCodeEditor("Basys3Labs.xdc", 380, 215); // ce (w, ck)
// Elapsed time: 13 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Basys3Labs.xdc", 4); // k (j, ck)
// TclEventType: FILE_SET_CHANGE
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '2' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '3' seconds INFO: [USF-XSim-99] Step results log file:'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' 
// Tcl Message: ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information. ERROR: [Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation. 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:05 . Memory (MB): peak = 906.785 ; gain = 0.000 
// Tcl Message: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors. 
// CommandFailedException: ERROR: [Common 17-69] Command failed: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  
// HOptionPane Error: 'ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  (Run Simulation)'
// 'd' command handler elapsed time: 7 seconds
selectButton("RDIResource.ProgressDialog_ERROR_ENCOUNTERED_PLEASE_SEE_TCL_OK", "OK"); // JButton (A, G)
// a (ck): Critical Messages: addNotify
selectButton(PAResourceAtoD.CmdMsgDialog_OK, "OK"); // f (a)
dismissDialog("Critical Messages"); // a (ck)
selectCheckBox(PAResourceItoN.MsgView_CRITICAL_WARNINGS, (String) null, false); // g (aQ, ck): FALSE
selectCheckBox(PAResourceItoN.MsgView_CRITICAL_WARNINGS, (String) null, false); // g (aQ, ck): FALSE
selectCheckBox(PAResourceItoN.MsgView_CRITICAL_WARNINGS, (String) null, true); // g (aQ, ck): TRUE
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. ]", 1, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;47;-;;-;16;-;"); // ah (O, ck)
expandTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. ]", 1); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. , [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:94]. ]", 21, false); // ah (O, ck)
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;94;-;;-;16;-;"); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. , [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:95]. ]", 22, false); // ah (O, ck)
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;95;-;;-;16;-;"); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. , [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:93]. ]", 20, false); // ah (O, ck)
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;93;-;;-;16;-;"); // ah (O, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
// Elapsed time: 13 seconds
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Implementation, Design Initialization, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. ]", 27, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;47;-;;-;16;-;"); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. , [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:111]. ]", 23, false); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:47]. , [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:111]. ]", 23, false); // ah (O, ck)
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;111;-;;-;16;-;"); // ah (O, ck)
selectCheckBox(PAResourceItoN.MsgView_ERROR_MESSAGES, (String) null, true); // g (aQ, ck): TRUE
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Simulation, sim_1, [VRFC 10-718] formal port <ResetPush> does not exist in entity <System>.  Please compare the definition of block <System> to its component declaration and its instantion to detect the mismatch. [E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/System_TB.vhd:12]. ]", 11, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.srcs\sim_1\new\System_TB.vhd;-;;-;16;-;line;-;12;-;;-;16;-;"); // ah (O, ck)
selectCodeEditor("System_TB.vhd", 108, 26); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 110, 28); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 101, 42); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 100, 74); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 82, 110); // ce (w, ck)
// [GUI Memory]: 120 MB (+2186kb) [02:32:25]
selectCodeEditor("System_TB.vhd", 69, 129); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 68, 178); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 69, 141); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 168, 145); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 56, 161); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 77, 82); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 55, 79); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 57, 62); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 93, 62); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 53, 43); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 105, 92); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 78, 114); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 55, 126); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 90, 179); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 119, 217); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 177, 175); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 122, 183); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 111, 196); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 120, 161); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 105, 162); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 142, 146); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 182, 144); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 68, 130); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 131, 207); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 55, 264); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 35, 213); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 33, 245); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 35, 163); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 36, 200); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 8, 91); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 204, 25); // ce (w, ck)
typeControlKey((HResource) null, "System_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 69, 87); // ce (w, ck)
typeControlKey((HResource) null, "System_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 66, 128); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 66, 129); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 70, 127); // ce (w, ck)
typeControlKey((HResource) null, "System_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 72, 158); // ce (w, ck)
typeControlKey((HResource) null, "System_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 71, 199); // ce (w, ck)
typeControlKey((HResource) null, "System_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 89, 196); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 197, 241); // ce (w, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 59 MB. Current time: 6/11/23 10:40:50 PM IST
selectCodeEditor("System_TB.vhd", 36, 231); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 4, 92); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 77, 95); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 11 seconds
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// A (ck): Synthesis is Out-of-date: addNotify
selectButton(RDIResource.BaseDialog_YES, "Yes"); // a (A)
// bx (ck):  Resetting Runs : addNotify
dismissDialog("Synthesis is Out-of-date"); // A (ck)
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// Tcl Message: reset_run synth_1 
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 22:41:13 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log [Sun Jun 11 22:41:13 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
// TclEventType: RUN_COMPLETED
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_FAILED
// ah (ck): Implementation Failed: addNotify
// Elapsed time: 95 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (ah)
// Run Command: PAResourceCommand.PACommandNames_MESSAGE_WINDOW
dismissDialog("Implementation Failed"); // ah (ck)
selectCheckBox(PAResourceItoN.MsgView_CRITICAL_WARNINGS, (String) null, false); // g (aQ, ck): FALSE
expandTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Vivado Commands, General Messages, [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information.. ]", 2); // ah (O, ck)
collapseTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Vivado Commands, General Messages, [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information.. ]", 2); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Simulation, sim_1, [VRFC 10-718] formal port <ResetPush> does not exist in entity <System>.  Please compare the definition of block <System> to its component declaration and its instantion to detect the mismatch. [E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/System_TB.vhd:12]. ]", 13, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.srcs\sim_1\new\System_TB.vhd;-;;-;16;-;line;-;12;-;;-;16;-;"); // ah (O, ck)
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Simulation, sim_1, [VRFC 10-718] formal port <ResetPush> does not exist in entity <System>.  Please compare the definition of block <System> to its component declaration and its instantion to detect the mismatch. [E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/System_TB.vhd:12]. ]", 13, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.srcs\sim_1\new\System_TB.vhd;-;;-;16;-;line;-;12;-;;-;16;-;"); // ah (O, ck)
// Elapsed time: 19 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System_TB.vhd", 6); // k (j, ck)
// Elapsed time: 11 seconds
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Simulation, sim_1, [VRFC 10-718] formal port <ResetPush> does not exist in entity <System>.  Please compare the definition of block <System> to its component declaration and its instantion to detect the mismatch. [E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/System_TB.vhd:12]. ]", 13, true); // ah (O, ck) - Node
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.srcs\sim_1\new\System_TB.vhd;-;;-;16;-;line;-;12;-;;-;16;-;"); // ah (O, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Basys3Labs.xdc", 4); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System_TB.vhd", 6); // k (j, ck)
selectCheckBox(PAResourceItoN.MsgView_CRITICAL_WARNINGS, (String) null, true); // g (aQ, ck): TRUE
selectCheckBox(PAResourceItoN.MsgView_ERROR_MESSAGES, (String) null, false); // g (aQ, ck): FALSE
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Synthesis, [Common 17-55] 'set_property' expects at least one object. [E:/Xilinx/Projects/Lab 9 Final/Basys3Labs.xdc:89]. ]", 1, false); // ah (O, ck)
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Lab 9 Final\Basys3Labs.xdc;-;;-;16;-;line;-;89;-;;-;16;-;"); // ah (O, ck)
selectCodeEditor("Basys3Labs.xdc", 361, 182); // ce (w, ck)
// TclEventType: FILE_SET_CHANGE
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System_TB.vhd", 6); // k (j, ck)
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_SYNTHESIS
// bx (ck):  Resetting Runs : addNotify
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// Tcl Message: reset_run synth_1 
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: launch_runs synth_1 -jobs 4 
// Tcl Message: [Sun Jun 11 22:44:18 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log 
dismissDialog("Starting Design Runs"); // bx (ck)
selectCheckBox(PAResourceItoN.MsgView_CRITICAL_WARNINGS, (String) null, false); // g (aQ, ck): FALSE
selectCheckBox(PAResourceItoN.MsgView_WARNING_MESSAGES, (String) null, true); // g (aQ, ck): TRUE
selectCheckBox(PAResourceItoN.MsgView_WARNING_MESSAGES, (String) null, false); // g (aQ, ck): FALSE
selectCheckBox(PAResourceItoN.MsgView_ERROR_MESSAGES, (String) null, true); // g (aQ, ck): TRUE
selectCheckBox(PAResourceItoN.MsgView_ERROR_MESSAGES, (String) null, false); // g (aQ, ck): FALSE
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 238ms to process. Increasing delay to 2000 ms.
// ah (ck): Synthesis Completed: addNotify
// Elapsed time: 237 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (ah)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 22:48:32 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
// 'c' command handler elapsed time: 3 seconds
dismissDialog("Starting Design Runs"); // bx (ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 3); // k (j, ck)
selectCodeEditor("Program_ROM.vhd", 507, 193); // ce (w, ck)
selectCodeEditor("Program_ROM.vhd", 148, 214); // ce (w, ck)
selectCodeEditor("Program_ROM.vhd", 461, 177); // ce (w, ck)
typeControlKey((HResource) null, "Program_ROM.vhd", 'c'); // ce (w, ck)
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ExpRunMgr Pending Runs Timer) is taking 1624ms to process. Increasing delay to 5000 ms.
// ah (ck): Implementation Completed: addNotify
// Elapsed time: 191 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Implementation Completed"); // ah (ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// Tcl Message: launch_simulation 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/System_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity System_TB 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:05 . Memory (MB): peak = 912.555 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '5' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: Vivado Simulator 2018.2 Copyright 1986-1999, 2001-2018 Xilinx, Inc. All Rights Reserved. Running: E:/Xilinx/Vivado/2018.2/bin/unwrapped/win64.o/xelab.exe -wto 67a5dd7157414ed9814149af3173682b --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip --snapshot System_TB_behav xil_defaultlib.System_TB -log elaborate.log  Using 2 slave threads. Starting static elaboration 
// TclEventType: LAUNCH_SIM
// Tcl Message: Built simulation snapshot System_TB_behav 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:07 . Memory (MB): peak = 912.555 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '7' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "System_TB_behav -key {Behavioral:sim_1:Functional:System_TB} -tclbatch {System_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 64 MB. Current time: 6/11/23 10:52:20 PM IST
// Tcl Message: source System_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } 
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'System_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:02 ; elapsed = 00:00:18 . Memory (MB): peak = 917.219 ; gain = 4.664 
// 'd' command handler elapsed time: 18 seconds
// Elapsed time: 18 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 64 MB. Current time: 6/11/23 10:54:21 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// Elapsed time: 122 seconds
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 64 MB. Current time: 6/11/23 10:54:23 PM IST
// Elapsed time: 18 seconds
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, seg_7[6:0]]", 2); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, reg_7[3:0]]", 10); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 64 MB. Current time: 6/11/23 10:54:44 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // O (Q, ck)
// Waveform: addNotify
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 64 MB. Current time: 6/11/23 10:54:50 PM IST
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
unmaximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // O (Q, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // O (Q, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 65 MB. Current time: 6/11/23 10:54:51 PM IST
// Waveform: addNotify
// Waveform: addNotify
// Waveform: addNotify
floatView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5"); // aw (aE, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// RDIResource.RDIViews_WAVEFORM_VIEWER: Untitled 5: float view
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
maximizeFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5"); // aw (aE, aG)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 71 MB. Current time: 6/11/23 10:54:54 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// Waveform: addNotify
// Waveform: addNotify
// Elapsed time: 16 seconds
dockFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5"); // aw (aE, aG)
maximizeFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5"); // aw (aE, aG)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// RDIResource.RDIViews_WAVEFORM_VIEWER: Untitled 5: dock view
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 69 MB. Current time: 6/11/23 10:55:11 PM IST
// TclEventType: WAVEFORM_CLOSE_WCFG
// Elapsed time: 22 seconds
closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 5"); // w
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 1); // k (j, ck)
selectCodeEditor("System.vhd", 560, 213); // ce (w, ck)
typeControlKey((HResource) null, "System.vhd", 'c'); // ce (w, ck)
// Elapsed time: 58 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System_TB.vhd", 5); // k (j, ck)
selectCodeEditor("System_TB.vhd", 340, 139); // ce (w, ck)
selectCodeEditor("System_TB.vhd", 166, 334); // ce (w, ck)
typeControlKey((HResource) null, "System_TB.vhd", 'c'); // ce (w, ck)
// Elapsed time: 143 seconds
selectCodeEditor("System_TB.vhd", 596, 139); // ce (w, ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 4); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Basys3Labs.xdc", 3); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectCodeEditor("Nano_Processor.vhd", 334, 223); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
// WARNING: HTimer (FileMgr Design Graph Update Timer) is taking 1239ms to process. Increasing delay to 4000 ms.
// Elapsed time: 212 seconds
selectButton(PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV, (String) null); // B (E, ck)
// Run Command: PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV
selectButton(PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV, (String) null); // B (E, ck)
// Run Command: PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectRadioButton(PAResourceAtoD.AddSrcWizard_SPECIFY_SIMULATION_SPECIFIC_HDL_FILES, "Add or create simulation sources"); // a (o, c)
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
// Elapsed time: 17 seconds
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Nano_Processor_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 31 seconds
dismissDialog("Add Sources"); // c (ck)
// bx (ck):  Add Simulation Sources  : addNotify
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Nano_Processor_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Nano_Processor_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 47 seconds
selectCodeEditor("Nano_Processor.vhd", 403, 122); // ce (w, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Nano_Processor_TB(Behavioral) (Nano_Processor_TB.vhd)]", 21, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Nano_Processor_TB(Behavioral) (Nano_Processor_TB.vhd)]", 21, false, false, false, false, false, true); // B (D, ck) - Double Click
selectCodeEditor("Nano_Processor_TB.vhd", 335, 110, false, true, false, false, false); // ce (w, ck) - Control Key
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 607, 353); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 0, 27); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 97, 162); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 6); // k (j, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 142, 177); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 6); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 1); // k (j, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 102, 195); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 104, 196); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 254, 213); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 1); // k (j, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 137, 214); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 1); // k (j, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 390, 471); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 472, 377); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 366, 418); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 368, 264); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 475, 167); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 1); // k (j, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 396, 239); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 110, 217); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 103, 198); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 158, 263); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 150, 264); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 154, 260); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 270, 378); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 155, 298); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 114, 205); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 139, 266); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 143, 266); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 147, 263); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 241, 463); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 114, 181); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 147, 213); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 217, 213); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 147, 60); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 105, 78); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 136, 93); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 89, 149); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 84, 147); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 427, 184); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 221, 403); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 197, 390); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 111, 319); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 169, 313); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 141, 335); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 139, 335); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 227, 334); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 171, 331); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 237, 431); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 83, 339); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 49, 352); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 86, 402); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 7, 401); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 180, 210); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 58, 416); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 61, 415); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 63, 452); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 201, 479); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 395, 385); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 14 seconds
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'c'); // ce (w, ck)
// Elapsed time: 26 seconds
selectCodeEditor("Nano_Processor_TB.vhd", 156, 385); // ce (w, ck)
// Elapsed time: 13 seconds
selectCodeEditor("Nano_Processor_TB.vhd", 221, 129); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 218, 132); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 289, 126); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 317, 128); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 309, 133); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 159, 57); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 142, 96); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor_TB.vhd", 'v'); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// WARNING: HTimer (FileMgr Design Graph Update Timer) is taking 960ms to process. Increasing delay to 5000 ms.
// Elapsed time: 11 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Nano_Processor_TB(Behavioral) (Nano_Processor_TB.vhd)]", 21, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Nano_Processor_TB(Behavioral) (Nano_Processor_TB.vhd)]", 21, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top Nano_Processor_TB [get_filesets sim_1] 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// bx (ck):  Set as Top : addNotify
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1] 
// TclEventType: DG_GRAPH_STALE
dismissDialog("Set as Top"); // bx (ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd)]", 4, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// bx (ck):  Set as Top : addNotify
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top Nano_Processor [current_fileset] 
// TclEventType: DG_GRAPH_STALE
dismissDialog("Set as Top"); // bx (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// Tcl Message: update_compile_order -fileset sources_1 
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// aj (ck): Save Project: addNotify
selectButton(PAResourceQtoS.SaveProjectUtils_SAVE, "Save"); // a (aj)
// TclEventType: DG_ANALYSIS_MSG_RESET
// HOptionPane Warning: 'A background task is running. Please wait until it completes and try again. (Background Task)'
// TclEventType: DG_GRAPH_GENERATED
selectButton("OptionPane.button", "OK"); // JButton (A, H)
selectButton(PAResourceQtoS.SaveProjectUtils_SAVE, "Save"); // a (aj)
// bx (ck):  Save Constraints : addNotify
// TclEventType: DG_GRAPH_STALE
// e (ck):  Run Simulation : addNotify
// TclEventType: DG_ANALYSIS_MSG_RESET
dismissDialog("Save Project"); // aj (ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'Nano_Processor_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj Nano_Processor_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Nano_Processor_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Nano_Processor_TB 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: Built simulation snapshot Nano_Processor_TB_behav 
// TclEventType: LAUNCH_SIM
// Tcl Message:  ****** Webtalk v2018.2 (64-bit)   **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018   **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018     ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.  source E:/Xilinx/Projects/Nano -notrace couldn't read file "E:/Xilinx/Projects/Nano": permission denied INFO: [Common 17-206] Exiting Webtalk at Sun Jun 11 23:10:03 2023... 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:08 . Memory (MB): peak = 923.973 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '8' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "Nano_Processor_TB_behav -key {Behavioral:sim_1:Functional:Nano_Processor_TB} -tclbatch {Nano_Processor_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:10:05 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: source Nano_Processor_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'Nano_Processor_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:16 . Memory (MB): peak = 930.168 ; gain = 6.195 
// 'd' command handler elapsed time: 24 seconds
// Elapsed time: 17 seconds
dismissDialog("Run Simulation"); // e (ck)
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, Inst0[11:0]]", 5); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 74 MB. Current time: 6/11/23 11:10:11 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 74 MB. Current time: 6/11/23 11:10:12 PM IST
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 74 MB. Current time: 6/11/23 11:10:16 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 74 MB. Current time: 6/11/23 11:10:17 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
maximizeView(PAResourceOtoP.PAViews_BASE_WORKSPACE, "BaseWorkspace"); // O (Q, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 75 MB. Current time: 6/11/23 11:10:21 PM IST
// Elapsed time: 26 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 6); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Untitled 6", 7); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 6); // k (j, ck)
selectCodeEditor("Nano_Processor_TB.vhd", 375, 262); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: WAVEFORM_CLOSE_WCFG
closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 6"); // w
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
// TclEventType: DG_GRAPH_GENERATED
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// TclEventType: SIMULATION_CLOSE_SIMULATION
// e (ck):  Run Simulation : addNotify
selectButton("PAResourceQtoS.SimulationRun_SIMULATION_ALREADY_RUNNING_DO_YOU_Yes", "Yes"); // JButton (A, G)
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: close_sim 
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'Nano_Processor_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj Nano_Processor_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Nano_Processor_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Nano_Processor_TB 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '2' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: Built simulation snapshot Nano_Processor_TB_behav 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:07 . Memory (MB): peak = 933.984 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '8' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "Nano_Processor_TB_behav -key {Behavioral:sim_1:Functional:Nano_Processor_TB} -tclbatch {Nano_Processor_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 115 MB. Current time: 6/11/23 11:11:29 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: source Nano_Processor_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'Nano_Processor_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:13 . Memory (MB): peak = 933.984 ; gain = 0.000 
// 'd' command handler elapsed time: 20 seconds
// Elapsed time: 13 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 77 MB. Current time: 6/11/23 11:11:35 PM IST
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_CLOSE_WCFG
// Elapsed time: 23 seconds
closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 7"); // w
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Instruction_Decoder_0 : Instruction_Decoder(Behavioral) (Instruction_Decoder.vhd)]", 9, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Instruction_Decoder_0 : Instruction_Decoder(Behavioral) (Instruction_Decoder.vhd)]", 9, true, false, false, false, false, true); // B (D, ck) - Double Click - Node
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
// Elapsed time: 18 seconds
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Instruction_Decoder_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 24 seconds
// TclEventType: FILE_SET_CHANGE
dismissDialog("Add Sources"); // c (ck)
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// bx (ck):  Add Simulation Sources  : addNotify
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Instruction_Decoder_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Instruction_Decoder_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_CLOSE
// A (ck): Confirm Close: addNotify
// TclEventType: DG_GRAPH_GENERATED
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (A)
// TclEventType: SIMULATION_CLOSE_SIMULATION
// 'a' command handler elapsed time: 4 seconds
// Tcl Message: close_sim 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
dismissDialog("Confirm Close"); // A (ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Instruction_Decoder_TB(Behavioral) (Instruction_Decoder_TB.vhd)]", 23, false); // B (D, ck)
// TclEventType: DG_GRAPH_GENERATED
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Instruction_Decoder_TB(Behavioral) (Instruction_Decoder_TB.vhd)]", 23, false, false, false, false, false, true); // B (D, ck) - Double Click
selectCodeEditor("Instruction_Decoder_TB.vhd", 0, 245); // ce (w, ck)
// Elapsed time: 14 seconds
selectCodeEditor("Instruction_Decoder_TB.vhd", 236, 220); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 9, 352); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 234, 178); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 3, 78); // ce (w, ck)
selectButton(PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV, (String) null); // B (E, ck)
// Run Command: PAResourceCommand.PACommandNames_TOGGLE_VIEW_NAV
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Instruction_Decoder_0 : Instruction_Decoder(Behavioral) (Instruction_Decoder.vhd)]", 9, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Instruction_Decoder_0 : Instruction_Decoder(Behavioral) (Instruction_Decoder.vhd)]", 9, true, false, false, false, false, true); // B (D, ck) - Double Click - Node
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 154, 94); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 114, 160); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 64, 331); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 154, 112); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 140, 79); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 87, 350); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 86, 349); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 121, 146); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 114, 148); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
// [GUI Memory]: 126 MB (+45kb) [03:07:52]
selectCodeEditor("Instruction_Decoder_TB.vhd", 60, 267); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 602, 126); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 109, 299); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 169, 160); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 162, 115); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 112, 232); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 168, 182); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 173, 128); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 127, 301); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 115, 199); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 154, 194); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 112, 219); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 152, 216); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 104, 267); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 105, 281); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 121, 231); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 115, 230); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 132, 250); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 130, 250); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 430, 262); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
typeControlKey(null, null, 'z');
typeControlKey(null, null, 'z');
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 190, 264); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 160, 261); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 153, 284); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 148, 281); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectCodeEditor("Nano_Processor.vhd", 217, 419); // ce (w, ck)
typeControlKey((HResource) null, "Nano_Processor.vhd", 'c'); // ce (w, ck)
selectButton(RDIResource.HCodeEditor_CLOSE, (String) null); // k (aI, ck)
selectCodeEditor("Nano_Processor.vhd", 480, 414); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor_TB.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Basys3Labs.xdc", 4); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System_TB.vhd", 6); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 457, 266); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 354, 488); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 469, 263); // ce (w, ck)
selectCodeEditor("Instruction_Decoder.vhd", 226, 472); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Elapsed time: 10 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 162, 263); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 99, 420); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 155, 167); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 136, 149); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 80, 233); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 239, 251); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 120, 180); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 62, 112); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
// [GUI Memory]: 134 MB (+1715kb) [03:11:20]
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Nano_Processor.vhd", 0); // k (j, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 10 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System_TB.vhd", 6); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 5); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, InstructionDecoderNew_sim(Behavioral) (Instruction_Decoder_TB.vhd)]", 21, true); // B (D, ck) - Node
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 127, 61); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 184, 60); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 203, 57); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 130, 111); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 203, 96); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 364, 129); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 148, 145); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 232, 142); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 113, 215); // ce (w, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 201, 218); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, InstructionDecoderNew_sim(Behavioral) (Instruction_Decoder_TB.vhd)]", 21, true); // B (D, ck) - Node
// TclEventType: DG_GRAPH_GENERATED
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Instruction_Decoder_0 : Instruction_Decoder(Behavioral) (Instruction_Decoder.vhd)]", 9, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top Instruction_Decoder [current_fileset] 
// TclEventType: DG_GRAPH_STALE
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, InstructionDecoderNew_sim(Behavioral) (Instruction_Decoder_TB.vhd)]", 21, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top InstructionDecoderNew_sim [get_filesets sim_1] 
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1] 
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder.vhd", 7); // k (j, ck)
selectCodeEditor("Instruction_Decoder.vhd", 473, 265); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sources_1 
// Tcl Message: update_compile_order -fileset sim_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 16 seconds
selectCodeEditor("Instruction_Decoder.vhd", 51, 195); // ce (w, ck)
// D (ck): Invalid Top Module: addNotify
dismissDialog("Invalid Top Module"); // D (ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Instruction_Decoder_TB(Behavioral) (Instruction_Decoder_TB.vhd)]", 20, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Instruction_Decoder_TB(Behavioral) (Instruction_Decoder_TB.vhd)]", 20, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top Instruction_Decoder_TB [get_filesets sim_1] 
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// bx (ck):  Set as Top : addNotify
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1] 
// TclEventType: DG_GRAPH_STALE
dismissDialog("Set as Top"); // bx (ck)
selectCodeEditor("Instruction_Decoder.vhd", 48, 177); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
selectCodeEditor("Instruction_Decoder.vhd", 310, 282); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
typeControlKey((HResource) null, "Instruction_Decoder.vhd", 'c'); // ce (w, ck)
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 95 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Instruction_Decoder_TB.vhd", 8); // k (j, ck)
selectCodeEditor("Instruction_Decoder_TB.vhd", 489, 145); // ce (w, ck)
typeControlKey((HResource) null, "Instruction_Decoder_TB.vhd", 'c'); // ce (w, ck)
// Elapsed time: 52 seconds
selectCodeEditor("Instruction_Decoder_TB.vhd", 423, 60); // ce (w, ck)
selectButton(PAResourceOtoP.PlanAheadTab_SHOW_FLOW_NAVIGATOR, "Flow Navigator"); // z (L, ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'Instruction_Decoder_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj Instruction_Decoder_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sources_1/new/Instruction_Decoder.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Instruction_Decoder INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Instruction_Decoder_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Instruction_Decoder_TB 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: Vivado Simulator 2018.2 Copyright 1986-1999, 2001-2018 Xilinx, Inc. All Rights Reserved. Running: E:/Xilinx/Vivado/2018.2/bin/unwrapped/win64.o/xelab.exe -wto 67a5dd7157414ed9814149af3173682b --incr --debug typical --relax --mt 2 -L xil_defaultlib -L secureip --snapshot Instruction_Decoder_TB_behav xil_defaultlib.Instruction_Decoder_TB -log elaborate.log  Using 2 slave threads. 
// Tcl Message: Starting static elaboration Completed static elaboration Starting simulation data flow analysis Completed simulation data flow analysis Time Resolution for simulation is 1ps Compiling package std.standard Compiling package std.textio Compiling package ieee.std_logic_1164 Compiling architecture behavioral of entity xil_defaultlib.Decoder_2_to_4 [decoder_2_to_4_default] Compiling architecture behavioral of entity xil_defaultlib.Instruction_Decoder [instruction_decoder_default] Compiling architecture behavioral of entity xil_defaultlib.instruction_decoder_tb 
// Tcl Message: Built simulation snapshot Instruction_Decoder_TB_behav 
// TclEventType: LAUNCH_SIM
// Tcl Message:  ****** Webtalk v2018.2 (64-bit)   **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018   **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018     ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.  source E:/Xilinx/Projects/Nano -notrace couldn't read file "E:/Xilinx/Projects/Nano": permission denied INFO: [Common 17-206] Exiting Webtalk at Sun Jun 11 23:22:27 2023... 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:10 . Memory (MB): peak = 933.984 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '10' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "Instruction_Decoder_TB_behav -key {Behavioral:sim_1:Functional:Instruction_Decoder_TB} -tclbatch {Instruction_Decoder_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:30 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// Tcl Message: source Instruction_Decoder_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } 
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'Instruction_Decoder_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:01 ; elapsed = 00:00:17 . Memory (MB): peak = 933.984 ; gain = 0.000 
// 'd' command handler elapsed time: 16 seconds
// Elapsed time: 17 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 81 MB. Current time: 6/11/23 11:22:32 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectButton(RDIResource.GraphicalView_ZOOM_FIT, "Waveform Viewer_zoom_fit"); // B (f, ck)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:34 PM IST
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, RegEN[2:0]]", 2); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, JMPRegVal[3:0]]", 1); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, InBus[11:0]]", 0); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:37 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:38 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:38 PM IST
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, MUXBAddress[2:0]]", 7); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, MUXAAddress[2:0]]", 6); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, ImmediateValue[3:0]]", 5); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:40 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// Waveform: addNotify
// Waveform: addNotify
// Waveform: addNotify
floatView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 8"); // aw (aE, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// RDIResource.RDIViews_WAVEFORM_VIEWER: Untitled 8: float view
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
maximizeFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 8"); // aw (aE, aG)
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 93 MB. Current time: 6/11/23 11:22:43 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, JMPAddress[2:0]]", 17); // a (s, aG)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 125 MB. Current time: 6/11/23 11:22:47 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:47 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:49 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 89 MB. Current time: 6/11/23 11:22:50 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:50 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:50 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:51 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:52 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 84 MB. Current time: 6/11/23 11:22:54 PM IST
// Waveform: addNotify
// Waveform: addNotify
// Elapsed time: 11 seconds
dockFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 8"); // aw (aE, aG)
maximizeFrame(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 8"); // aw (aE, aG)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// RDIResource.RDIViews_WAVEFORM_VIEWER: Untitled 8: dock view
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, InBus[11:0]]", 0); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:22:58 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, JMPRegVal[3:0]]", 1); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, RegEN[2:0]]", 2); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, ImmediateValue[3:0]]", 4); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:23:02 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, MUXBAddress[2:0]]", 9); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, MUXAAddress[2:0]]", 5); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
collapseTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, JMPAddress[2:0]]", 9); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 82 MB. Current time: 6/11/23 11:23:05 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// Elapsed time: 21 seconds
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
// Elapsed time: 11 seconds
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Program_ROM_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 16 seconds
// TclEventType: FILE_SET_CHANGE
dismissDialog("Add Sources"); // c (ck)
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// bx (ck):  Add Simulation Sources  : addNotify
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Program_ROM_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Program_ROM_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Program_ROM_TB(Behavioral) (Program_ROM_TB.vhd)]", 23, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Program_ROM_TB(Behavioral) (Program_ROM_TB.vhd)]", 23, false, false, false, false, false, true); // B (D, ck) - Double Click
// TclEventType: DG_ANALYSIS_MSG_RESET
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Program_ROM_0 : Program_ROM(Behavioral) (Program_ROM.vhd)]", 8, false); // B (D, ck)
// TclEventType: DG_GRAPH_GENERATED
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Program_ROM_0 : Program_ROM(Behavioral) (Program_ROM.vhd)]", 8, false, false, false, false, false, true); // B (D, ck) - Double Click
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
// TclEventType: WAVEFORM_CLOSE_WCFG
closeView(RDIResource.RDIViews_WAVEFORM_VIEWER, "Untitled 8"); // w
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_CLOSE
// A (ck): Confirm Close: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (A)
// TclEventType: SIMULATION_CURRENT_SIMULATION
// TclEventType: SIMULATION_CLOSE_SIMULATION
// Tcl Message: current_sim simulation_5 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: close_sim 
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "System.vhd", 1); // k (j, ck)
// Tcl Message: INFO: [Simtcl 6-16] Simulation closed 
dismissDialog("Confirm Close"); // A (ck)
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
selectCodeEditor("Program_ROM.vhd", 203, 64); // ce (w, ck)
typeControlKey((HResource) null, "Program_ROM.vhd", 'c'); // ce (w, ck)
// Elapsed time: 100 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Program_ROM_TB(Behavioral) (Program_ROM_TB.vhd)]", 23, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Program_ROM_TB(Behavioral) (Program_ROM_TB.vhd)]", 23, false, false, false, false, true, false); // B (D, ck) - Popup Trigger
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(RDIResourceCommand.RDICommands_DELETE, "Remove File from Project..."); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: RDIResourceCommand.RDICommands_DELETE
// aE (ck): Remove Sources: addNotify
selectCheckBox(PAResourceQtoS.RemoveSourcesDialog_ALSO_DELETE, "Also delete the project local file/directory from disk", true); // g (Q, aE): TRUE
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (aE)
dismissDialog("Remove Sources"); // aE (ck)
// Tcl Message: export_ip_user_files -of_objects  [get_files {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Program_ROM_TB.vhd}}] -no_script -reset -force -quiet 
// TclEventType: DG_GRAPH_STALE
// aE (ck): Remove Sources: addNotify
// bx (aE):  Remove Sources : addNotify
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: remove_files  -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Program_ROM_TB.vhd}} 
// TclEventType: FILE_SET_CHANGE
// Tcl Message: file delete -force {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Program_ROM_TB.vhd} 
dismissDialog("Remove Sources"); // bx (aE)
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
// TclEventType: DG_ANALYSIS_MSG_RESET
selectButton("NEXT", "Next >"); // JButton (j, c)
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Register_Bank_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 15 seconds
// TclEventType: FILE_SET_CHANGE
dismissDialog("Add Sources"); // c (ck)
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// bx (ck):  Add Simulation Sources  : addNotify
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Register_Bank_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Register_Bank_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 13 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Reg_Bank_0 : Register_Bank(Behavioral) (Register_Bank.vhd)]", 11, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Reg_Bank_0 : Register_Bank(Behavioral) (Register_Bank.vhd), Reg_4 : Reg_4bit(Behavioral) (Reg_4bit.vhd)]", 15, false, false, false, false, false, true); // B (D, ck) - Double Click
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Register_Bank_TB(Behavioral) (Register_Bank_TB.vhd)]", 31, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Register_Bank_TB(Behavioral) (Register_Bank_TB.vhd)]", 31, false, false, false, false, false, true); // B (D, ck) - Double Click
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
typeControlKey((HResource) null, "Register_Bank.vhd", 'c'); // ce (w, ck)
// Elapsed time: 98 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 231, 105); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 276, 78); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 221, 321); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 1, 50); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 486, 10); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 351, 9); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 257, 185); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 15, 63); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 60, 180); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 57, 230); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 121, 59); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 125, 58); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 165, 61); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 124, 164); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 400, 298); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 104, 13); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 169, 29); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 83, 60); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 148, 61); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 434, 169); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 248, 131); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 139, 95); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 294, 126); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 257, 306); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Program_ROM.vhd", 0); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectCodeEditor("Register_Bank.vhd", 103, 204); // ce (w, ck)
selectCodeEditor("Register_Bank.vhd", 103, 198); // ce (w, ck)
selectCodeEditor("Register_Bank.vhd", 119, 133); // ce (w, ck)
selectCodeEditor("Register_Bank.vhd", 115, 131); // ce (w, ck)
selectCodeEditor("Register_Bank.vhd", 119, 131); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 83, 150); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 65, 263); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectCodeEditor("Register_Bank.vhd", 143, 285); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank.vhd", 'c'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 91, 200); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 99, 199); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 79, 177); // ce (w, ck)
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'v'); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 35, 150); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 107, 151); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 57, 96); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 188, 295); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 189, 227); // ce (w, ck)
// Elapsed time: 12 seconds
selectCodeEditor("Register_Bank_TB.vhd", 409, 229); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 375, 177); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 48, 64); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
// Elapsed time: 17 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
// Elapsed time: 13 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// WARNING: HTimer (FileMgr Design Graph Update Timer) is taking 1345ms to process. Increasing delay to 6000 ms.
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 645, 166); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 691, 166); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 246, 93); // ce (w, ck)
// Elapsed time: 10 seconds
typeControlKey((HResource) null, "Register_Bank_TB.vhd", 'c'); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Elapsed time: 69 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Register_Bank_TB(Behavioral) (Register_Bank_TB.vhd)]", 30, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// bx (ck):  Set as Top : addNotify
// Tcl Message: set_property top Register_Bank_TB [get_filesets sim_1] 
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1] 
dismissDialog("Set as Top"); // bx (ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Reg_Bank_0 : Register_Bank(Behavioral) (Register_Bank.vhd)]", 11, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
// Elapsed time: 11 seconds
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top Register_Bank [current_fileset] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// [GUI Memory]: 140 MB (+105kb) [03:28:19]
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sources_1 
// Tcl Message: update_compile_order -fileset sim_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 19 seconds
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'Register_Bank_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj Register_Bank_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Register_Bank_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Register_Bank_TB 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '4' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '3' seconds INFO: [USF-XSim-99] Step results log file:'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' 
// Tcl Message: ERROR: [USF-XSim-62] 'elaborate' step failed with error(s). Please check the Tcl console output or 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim/elaborate.log' file for more information. ERROR: [Vivado 12-4473] Detected error while running simulation. Please correct the issue and retry this operation. 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:00 ; elapsed = 00:00:07 . Memory (MB): peak = 935.578 ; gain = 0.000 
// Tcl Message: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors. 
// CommandFailedException: ERROR: [Common 17-69] Command failed: ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  
// HOptionPane Error: 'ERROR: [Common 17-39] 'launch_simulation' failed due to earlier errors.  (Run Simulation)'
// 'd' command handler elapsed time: 13 seconds
// Elapsed time: 13 seconds
selectButton("RDIResource.ProgressDialog_ERROR_ENCOUNTERED_PLEASE_SEE_TCL_OK", "OK"); // JButton (A, G)
// a (ck): Critical Messages: addNotify
selectButton(PAResourceAtoD.CmdMsgDialog_OK, "OK"); // f (a)
dismissDialog("Critical Messages"); // a (ck)
selectCheckBox(PAResourceItoN.MsgView_ERROR_MESSAGES, (String) null, true); // g (aQ, ck): TRUE
selectTree(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "[, Simulation, sim_1, [VRFC 10-718] formal port <Output> does not exist in entity <Register_Bank>.  Please compare the definition of block <Register_Bank> to its component declaration and its instantion to detect the mismatch. [E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Register_Bank_TB.vhd:14]. ]", 6, false); // ah (O, ck)
messagesViewCrossProbe(PAResourceItoN.MsgTreePanel_MESSAGE_VIEW_TREE, "src;-;E:\Xilinx\Projects\Nano Processor Final\Nano Processor Final.srcs\sim_1\new\Register_Bank_TB.vhd;-;;-;16;-;line;-;14;-;;-;16;-;"); // ah (O, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Register_Bank_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Register_Bank_TB.vhd", 378, 178); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 153, 233); // ce (w, ck)
selectCodeEditor("Register_Bank_TB.vhd", 346, 246); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'Register_Bank_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj Register_Bank_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Register_Bank_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Register_Bank_TB 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '1' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: Built simulation snapshot Register_Bank_TB_behav 
// TclEventType: LAUNCH_SIM
// Tcl Message:  ****** Webtalk v2018.2 (64-bit)   **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018   **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018     ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.  source E:/Xilinx/Projects/Nano -notrace couldn't read file "E:/Xilinx/Projects/Nano": permission denied INFO: [Common 17-206] Exiting Webtalk at Sun Jun 11 23:36:05 2023... 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:06 . Memory (MB): peak = 935.578 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '6' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "Register_Bank_TB_behav -key {Behavioral:sim_1:Functional:Register_Bank_TB} -tclbatch {Register_Bank_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 87 MB. Current time: 6/11/23 11:36:08 PM IST
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: source Register_Bank_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'Register_Bank_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:01 ; elapsed = 00:00:12 . Memory (MB): peak = 939.852 ; gain = 4.273 
// 'd' command handler elapsed time: 12 seconds
// Elapsed time: 12 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 87 MB. Current time: 6/11/23 11:36:09 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, RegData[3:0]]", 4); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 88 MB. Current time: 6/11/23 11:36:12 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
expandTree(RDIResource.WaveformNameTree_WAVEFORM_NAME_TREE, "[true, RegEN[2:0]]", 3); // a (s, ck)
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// WARNING: updateGUI() is taking  1692 ms.
// Elapsed time: 65 seconds
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
closeView(PAResourceOtoP.PAViews_CODE, "Code"); // B
unMinimizeFrame(PAResourceOtoP.PAViews_SOURCES, "Sources"); // aw
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 87 MB. Current time: 6/11/23 11:37:22 PM IST
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Slow_Clock_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 12 seconds
// TclEventType: FILE_SET_CHANGE
dismissDialog("Add Sources"); // c (ck)
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// bx (ck):  Add Simulation Sources  : addNotify
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Slow_Clock_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Slow_Clock_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// Elapsed time: 10 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Slow_Clock_TB(Behavioral) (Slow_Clock_TB.vhd)]", 32, false); // B (D, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Slow_Clock_0 : Slow_Clock(Behavioral) (Slow_Clock.vhd)]", 3, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Slow_Clock_0 : Slow_Clock(Behavioral) (Slow_Clock.vhd)]", 3, false, false, false, false, false, true); // B (D, ck) - Double Click
selectCodeEditor("Slow_Clock.vhd", 245, 43); // ce (w, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Slow_Clock_TB(Behavioral) (Slow_Clock_TB.vhd)]", 32, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Slow_Clock_TB(Behavioral) (Slow_Clock_TB.vhd)]", 32, false, false, false, false, false, true); // B (D, ck) - Double Click
selectCodeEditor("Slow_Clock_TB.vhd", 233, 71); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 624, 319); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 3, 60); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 230, 182); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 74, 62); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 148, 62); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 140, 57); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 119, 95); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 280, 129); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 265, 174); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 281, 128); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 96, 164); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 303, 255); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 59, 322); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 65, 318); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 71, 180); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 70, 197); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 1); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 379, 269); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
selectCodeEditor("Slow_Clock_TB.vhd", 53, 161); // ce (w, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 50, 179); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 1); // k (j, ck)
selectCodeEditor("Slow_Clock.vhd", 169, 143); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
typeControlKey((HResource) null, "Slow_Clock.vhd", 'c'); // ce (w, ck)
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 20 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock_TB.vhd", 2); // k (j, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 242, 105); // ce (w, ck)
typeControlKey((HResource) null, "Slow_Clock_TB.vhd", 'c'); // ce (w, ck)
// Elapsed time: 10 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Slow_Clock_TB(Behavioral) (Slow_Clock_TB.vhd)]", 31, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top Slow_Clock_TB [get_filesets sim_1] 
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// bx (ck):  Set as Top : addNotify
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1] 
// TclEventType: DG_GRAPH_STALE
dismissDialog("Set as Top"); // bx (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Slow_Clock_0 : Slow_Clock(Behavioral) (Slow_Clock.vhd)]", 3, false, false, false, false, true, false); // B (D, ck) - Popup Trigger
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top Slow_Clock [current_fileset] 
// TclEventType: DG_GRAPH_STALE
// bx (ck):  Set as Top : addNotify
dismissDialog("Set as Top"); // bx (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// Tcl Message: update_compile_order -fileset sources_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 31 seconds
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: launch_simulation 
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'Slow_Clock_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj Slow_Clock_TB_vhdl.prj" 
// TclEventType: LAUNCH_SIM_LOG
// Tcl Message: INFO: [VRFC 10-163] Analyzing VHDL file "E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Slow_Clock_TB.vhd" into library xil_defaultlib INFO: [VRFC 10-307] analyzing entity Slow_Clock_TB 
// Tcl Message: INFO: [USF-XSim-69] 'compile' step finished in '3' seconds INFO: [USF-XSim-3] XSim::Elaborate design INFO: [USF-XSim-61] Executing 'ELABORATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// TclEventType: LAUNCH_SIM
// Tcl Message: Built simulation snapshot Slow_Clock_TB_behav  ****** Webtalk v2018.2 (64-bit)   **** SW Build 2258646 on Thu Jun 14 20:03:12 MDT 2018   **** IP Build 2256618 on Thu Jun 14 22:10:49 MDT 2018     ** Copyright 1986-2018 Xilinx, Inc. All Rights Reserved.  source E:/Xilinx/Projects/Nano -notrace couldn't read file "E:/Xilinx/Projects/Nano": permission denied INFO: [Common 17-206] Exiting Webtalk at Sun Jun 11 23:40:25 2023... 
// Tcl Message: run_program: Time (s): cpu = 00:00:00 ; elapsed = 00:00:05 . Memory (MB): peak = 941.789 ; gain = 0.000 
// Tcl Message: INFO: [USF-XSim-69] 'elaborate' step finished in '5' seconds INFO: [USF-XSim-4] XSim::Simulate design INFO: [USF-XSim-61] Executing 'SIMULATE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [USF-XSim-98] *** Running xsim 
// Tcl Message:    with args "Slow_Clock_TB_behav -key {Behavioral:sim_1:Functional:Slow_Clock_TB} -tclbatch {Slow_Clock_TB.tcl} -log {simulate.log}" 
// Tcl Message: INFO: [USF-XSim-8] Loading simulator feature 
// Tcl Message: Vivado Simulator 2018.2 
// TclEventType: SIMULATION_CREATE_SIMULATION_OBJECT
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// Tcl Message: Time resolution is 1 ps 
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: WAVEFORM_OPEN_WCFG
// Waveform: addNotify
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: WAVEFORM_UPDATE_TITLE
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 92 MB. Current time: 6/11/23 11:40:28 PM IST
// TclEventType: WAVEFORM_UPDATE_TITLE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// TclEventType: SIMULATION_CLEAR_CURRENT_LINE
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: WAVEFORM_UPDATE_COMMANDS
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: SIMULATION_OBJECT_TREE_RESTORED
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: SIMULATION_UPDATE_LATEST_TIME
// TclEventType: WAVEFORM_MODEL_EVENT
// TclEventType: SIMULATION_CURRENT_SCOPE_CHANGED
// TclEventType: SIMULATION_CURRENT_STACK_CHANGED
// TclEventType: SIMULATION_UPDATE_STACK_FRAMES
// TclEventType: SIMULATION_CURRENT_STACK_FRAME_CHANGED
// TclEventType: SIMULATION_UPDATE_LOCALS
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
// TclEventType: SIMULATION_UPDATE_SIMULATION_STATE
// Tcl Message: source Slow_Clock_TB.tcl 
// Tcl Message: # set curr_wave [current_wave_config] # if { [string length $curr_wave] == 0 } { #   if { [llength [get_objects]] > 0} { #     add_wave / #     set_property needs_save false [current_wave_config] #   } else { #      send_msg_id Add_Wave-1 WARNING "No top level signals found. Simulator will start without a wave window. If you want to open a wave window go to 'File->New Waveform Configuration' or type 'create_wave_config' in the TCL console." #   } # } # run 1000ns 
// Tcl Message: INFO: [USF-XSim-96] XSim completed. Design snapshot 'Slow_Clock_TB_behav' loaded. INFO: [USF-XSim-97] XSim simulation ran for 1000ns 
// Tcl Message: launch_simulation: Time (s): cpu = 00:00:01 ; elapsed = 00:00:11 . Memory (MB): peak = 950.477 ; gain = 8.719 
// 'd' command handler elapsed time: 11 seconds
// Elapsed time: 11 seconds
dismissDialog("Run Simulation"); // e (ck)
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// HMemoryUtils.trashcanNow. Engine heap size: 630 MB. GUI used memory: 92 MB. Current time: 6/11/23 11:40:31 PM IST
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock_TB.vhd", 1); // k (j, ck)
selectCodeEditor("Slow_Clock_TB.vhd", 244, 229); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Slow_Clock.vhd", 0); // k (j, ck)
unMinimizeFrame(PAResourceOtoP.PAViews_OBJECTS, "Objects"); // aw
// TclEventType: SIMULATION_UPDATE_OBJECT_TREE
unMinimizeFrame(PAResourceOtoP.PAViews_SCOPE, "Scopes"); // aw
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Adder"); // X (Q, F)
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (F)
dismissDialog("Create Source File"); // F (c)
// Elapsed time: 112 seconds
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "AS"); // X (Q, F)
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("CANCEL", "Cancel"); // JButton (j, c)
// 'h' command handler elapsed time: 128 seconds
dismissDialog("Add Sources"); // c (ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Adder_3bit_0 : Adder_3bit(Behavioral) (Adder_3bit.vhd)]", 6, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), Adder_3bit_0 : Adder_3bit(Behavioral) (Adder_3bit.vhd)]", 6, true, false, false, false, false, true); // B (D, ck) - Double Click - Node
selectCodeEditor("Adder_3bit.vhd", 152, 242); // ce (w, ck)
typeControlKey((HResource) null, "Adder_3bit.vhd", 'c'); // ce (w, ck)
// Elapsed time: 80 seconds
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
// Elapsed time: 17 seconds
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "Adder_3bit_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 20 seconds
dismissDialog("Add Sources"); // c (ck)
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Adder_3bit_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// bx (ck):  Add Simulation Sources  : addNotify
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/Adder_3bit_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// Elapsed time: 16 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Adder_3bit_TB(Behavioral) (Adder_3bit_TB.vhd)]", 36, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, Adder_3bit_TB(Behavioral) (Adder_3bit_TB.vhd)]", 36, false, false, false, false, false, true); // B (D, ck) - Double Click
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: WAVEFORM_UPDATE_WAVEFORM
// TclEventType: DG_GRAPH_GENERATED
selectCodeEditor("Adder_3bit_TB.vhd", 435, 129); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 435, 129, false, false, false, false, true); // ce (w, ck) - Double Click
typeControlKey((HResource) null, "Adder_3bit_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 66, 190); // ce (w, ck)
typeControlKey(null, null, 'z');
selectCodeEditor("Adder_3bit_TB.vhd", 1, 26); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 238, 183); // ce (w, ck)
// Elapsed time: 12 seconds
selectCodeEditor("Adder_3bit_TB.vhd", 433, 99); // ce (w, ck)
typeControlKey((HResource) null, "Adder_3bit_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 197, 313); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 25, 47); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 1, 24); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 221, 182); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 134, 80); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 104, 81); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 147, 79); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 51, 79); // ce (w, ck)
typeControlKey((HResource) null, "Adder_3bit_TB.vhd", 'c'); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 133, 109); // ce (w, ck)
typeControlKey((HResource) null, "Adder_3bit_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 290, 145); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 293, 147); // ce (w, ck)
typeControlKey((HResource) null, "Adder_3bit_TB.vhd", 'v'); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 126, 181); // ce (w, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Adder_3bit.vhd", 3); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Adder_3bit_TB.vhd", 4); // k (j, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 66, 220); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 56, 212); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 67, 216); // ce (w, ck)
typeControlKey(null, null, 'z');
selectCodeEditor("Adder_3bit_TB.vhd", 58, 227); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 54, 300); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 43, 214); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 36, 235); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 287, 246); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 92, 166); // ce (w, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 315, 88); // ce (w, ck)
typeControlKey((HResource) null, "Adder_3bit_TB.vhd", 'c'); // ce (w, ck)
// Elapsed time: 75 seconds
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), ASU_4bit_0 : ASU_4bit(Behavioral) (AS_4bit.vhd)]", 25, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd), Processor : Nano_Processor(Behavioral) (Nano_Processor.vhd), ASU_4bit_0 : ASU_4bit(Behavioral) (AS_4bit.vhd)]", 25, true, false, false, false, false, true); // B (D, ck) - Double Click - Node
selectCodeEditor("AS_4bit.vhd", 221, 190); // ce (w, ck)
typeControlKey((HResource) null, "AS_4bit.vhd", 'c'); // ce (w, ck)
// WARNING: HSwingWorker (Update Runs Swing Worker) is taking 1657 ms. Increasing delay to 4000 ms.
// Elapsed time: 490 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Adder_3bit_TB.vhd", 4); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "AS_4bit.vhd", 5); // k (j, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, System_TB(Behavioral) (System_TB.vhd)]", 39, true); // B (D, ck) - Node
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, System_TB(Behavioral) (System_TB.vhd)]", 39, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenu(PAResourceCommand.PACommandNames_AUTO_UPDATE_HIER, "Hierarchy Update"); // aa (aj, Popup.HeavyWeightWindow)
selectMenu(PAResourceQtoS.SrcMenu_IP_HIERARCHY, "IP Hierarchy"); // aa (aj, Popup.HeavyWeightWindow)
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, Popup.HeavyWeightWindow)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property top System_TB [get_filesets sim_1] 
// bx (ck):  Set as Top : addNotify
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top_lib xil_defaultlib [get_filesets sim_1] 
// TclEventType: DG_GRAPH_STALE
dismissDialog("Set as Top"); // bx (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// [GUI Memory]: 151 MB (+3165kb) [03:50:11]
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd)]", 1, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Design Sources, System(Behavioral) (System.vhd)]", 1, true, false, false, false, true, false); // B (D, ck) - Popup Trigger - Node
selectMenuItem(PAResourceCommand.PACommandNames_SET_AS_TOP, "Set as Top"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SET_AS_TOP
// TclEventType: FILE_SET_CHANGE
// TclEventType: FILE_SET_OPTIONS_CHANGE
// TclEventType: DG_GRAPH_STALE
// Tcl Message: set_property top System [current_fileset] 
// TclEventType: DG_GRAPH_STALE
// bx (ck):  Set as Top : addNotify
// WARNING: updateGUI() is taking  1445 ms.
dismissDialog("Set as Top"); // bx (ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Adder_3bit.vhd", 3); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Adder_3bit_TB.vhd", 4); // k (j, ck)
selectCodeEditor("Adder_3bit_TB.vhd", 505, 39); // ce (w, ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: FILE_SET_CHANGE
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "AS_4bit.vhd", 5); // k (j, ck)
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceCommand.PACommandNames_ADD_SOURCES, "Sources_add_sources"); // B (f, ck)
// Run Command: PAResourceCommand.PACommandNames_ADD_SOURCES
// c (ck): Add Sources: addNotify
selectButton("NEXT", "Next >"); // JButton (j, c)
selectButton(PAResourceQtoS.SrcChooserPanel_CREATE_FILE, "Create File"); // a (C, c)
// F (c): Create Source File: addNotify
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sources_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
setText(PAResourceAtoD.CreateSrcFileDialog_FILE_NAME, "AS_4bit_TB"); // X (Q, F)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (F)
dismissDialog("Create Source File"); // F (c)
selectButton("FINISH", "Finish"); // JButton (j, c)
// 'h' command handler elapsed time: 13 seconds
// TclEventType: FILE_SET_CHANGE
dismissDialog("Add Sources"); // c (ck)
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: set_property SOURCE_SET sources_1 [get_filesets sim_1] 
// bx (ck):  Add Simulation Sources  : addNotify
// Tcl Message: close [ open {E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/AS_4bit_TB.vhd} w ] 
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: add_files -fileset sim_1 {{E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.srcs/sim_1/new/AS_4bit_TB.vhd}} 
// I (ck): Define Module: addNotify
dismissDialog("Add Simulation Sources"); // bx (ck)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_No", "No"); // JButton (A, H)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (I)
// TclEventType: FILE_SET_CHANGE
selectButton("PAResourceAtoD.DefineModulesDialog_YOU_HAVE_MADE_CHANGES_TO_MODULE_Yes", "Yes"); // JButton (A, H)
dismissDialog("Define Module"); // I (ck)
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// Tcl Message: update_compile_order -fileset sim_1 
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
// Elapsed time: 19 seconds
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "Adder_3bit_TB.vhd", 4); // k (j, ck)
selectTab("PlanAheadTabBaseWorkspace_JideTabbedPane", (HResource) null, "AS_4bit.vhd", 5); // k (j, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, AS_4bit_TB(Behavioral) (AS_4bit_TB.vhd)]", 41, false); // B (D, ck)
selectTree(PAResourceEtoH.FileSetPanel_FILE_SET_PANEL_TREE, "[root, Simulation Sources, sim_1, AS_4bit_TB(Behavioral) (AS_4bit_TB.vhd)]", 41, false, false, false, false, false, true); // B (D, ck) - Double Click
selectCodeEditor("AS_4bit_TB.vhd", 309, 146); // ce (w, ck)
typeControlKey((HResource) null, "AS_4bit_TB.vhd", 'v'); // ce (w, ck)
// TclEventType: DG_GRAPH_STALE
// TclEventType: FILE_SET_CHANGE
// TclEventType: DG_ANALYSIS_MSG_RESET
// TclEventType: DG_GRAPH_GENERATED
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_SYNTHESIS
// A (ck): Run Synthesis: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (A)
// bx (ck):  Resetting Runs : addNotify
dismissDialog("Run Synthesis"); // A (ck)
// TclEventType: RUN_MODIFY
// TclEventType: RUN_RESET
// Tcl Message: reset_run synth_1 
// TclEventType: RUN_RESET
// TclEventType: RUN_MODIFY
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// Tcl Message: launch_runs synth_1 -jobs 4 
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: [Sun Jun 11 23:58:00 2023] Launched synth_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/synth_1/runme.log 
// 'k' command handler elapsed time: 7 seconds
dismissDialog("Starting Design Runs"); // bx (ck)
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 324ms to process. Increasing delay to 2000 ms.
// WARNING: HTimer (ExpRunMgr Pending Runs Timer) is taking 1334ms to process. Increasing delay to 6000 ms.
// ah (ck): Synthesis Completed: addNotify
// Elapsed time: 144 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Synthesis Completed"); // ah (ck)
selectButton(PAResourceItoN.MainToolbarMgr_RUN, (String) null); // ax (f, ck)
// Run Command: PAResourceCommand.PACommandNames_RUN_IMPLEMENTATION
// f (ck): Launch Runs: addNotify
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// bx (ck):  Starting Design Runs : addNotify
dismissDialog("Launch Runs"); // f (ck)
// Tcl Message: launch_runs impl_1 -jobs 4 
// TclEventType: RUN_LAUNCH
// TclEventType: RUN_MODIFY
// Tcl Message: [Mon Jun 12 00:00:30 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
// 'c' command handler elapsed time: 3 seconds
dismissDialog("Starting Design Runs"); // bx (ck)
// TclEventType: RUN_STEP_COMPLETED
// TclEventType: RUN_COMPLETED
// WARNING: HTimer (ActiveMsgMonitor Process Messages Timer) is taking 549ms to process. Increasing delay to 3000 ms.
// ah (ck): Implementation Completed: addNotify
// [GUI Memory]: 160 MB (+1906kb) [03:56:11]
// Elapsed time: 128 seconds
selectRadioButton(PAResourceCommand.PACommandNames_RUN_BITGEN, "Generate Bitstream"); // a (Q, ah)
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (ah)
// Run Command: PAResourceCommand.PACommandNames_RUN_BITGEN
// f (ck): Launch Runs: addNotify
// Elapsed time: 34 seconds
selectButton(RDIResource.BaseDialog_OK, "OK"); // a (f)
// 'cv' command handler elapsed time: 34 seconds
dismissDialog("Launch Runs"); // f (ck)
// TclEventType: RUN_LAUNCH
// bx (ck):  Generate Bitstream : addNotify
// TclEventType: RUN_LAUNCH
// Tcl Message: launch_runs impl_1 -to_step write_bitstream -jobs 4 
// TclEventType: RUN_MODIFY
// Tcl Message: [Mon Jun 12 00:03:15 2023] Launched impl_1... Run output will be captured here: E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.runs/impl_1/runme.log 
dismissDialog("Generate Bitstream"); // bx (ck)
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Program and Debug, Generate Bitstream]", 20, false); // u (O, ck)
// TclEventType: RUN_COMPLETED
// ah (ck): Bitstream Generation Completed: addNotify
// Elapsed time: 95 seconds
selectButton(RDIResource.BaseDialog_CANCEL, "Cancel"); // a (ah)
dismissDialog("Bitstream Generation Completed"); // ah (ck)
// Elapsed time: 127 seconds
selectTree(PAResourceEtoH.FlowNavigatorTreePanel_FLOW_NAVIGATOR_TREE, "[, Simulation, Run Simulation]", 10, false); // u (O, ck)
selectMenuItem(PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL, "Run Behavioral Simulation"); // ad (aj, ck)
// Run Command: PAResourceCommand.PACommandNames_SIMULATION_RUN_BEHAVIORAL
// e (ck):  Run Simulation : addNotify
// TclEventType: LAUNCH_SIM
// Tcl Message: launch_simulation 
// TclEventType: FILE_SET_OPTIONS_CHANGE
// Tcl Message: INFO: [Vivado 12-5682] Launching behavioral simulation in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' INFO: [SIM-utils-51] Simulation object is 'sim_1' INFO: [SIM-utils-54] Inspecting design source files for 'System_TB' in fileset 'sim_1'... INFO: [USF-XSim-97] Finding global include files... INFO: [USF-XSim-98] Fetching design files from 'sim_1'... INFO: [USF-XSim-2] XSim::Compile design INFO: [USF-XSim-61] Executing 'COMPILE and ANALYZE' step in 'E:/Xilinx/Projects/Nano Processor Final/Nano Processor Final.sim/sim_1/behav/xsim' 
// Tcl Message: "xvhdl --incr --relax -prj System_TB_vhdl.prj"