From 4f0511ad7fa5fb1b61a08756bc7b4a3d22c6cb4f Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sat, 4 May 2024 15:23:44 +0200 Subject: [PATCH 01/11] KakuteF4: Add BRD_ALT_CONFIG for serial RC_INPUT On Kakute F4 V2.4 there are pads R3, T3 intended for rc input of ELRS, CRSF etc. This is not possible with default configuration. Therefore add it as alternative board config. Signed-off-by: Patrick Menschel --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index eea0b4785433c..ffbae8be3c591 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -70,9 +70,12 @@ define HAL_BATT_CURR_SCALE 17.0 # order of UARTs (and USB) SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 -# rcinput is PB11 +# RC input defaults to timer capture PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW -PB10 USART3_TX USART3 + +# alternative RC input using USART3 serial port. +PB10 USART3_TX USART3 NODMA +PB11 USART3_RX USART3 NODMA ALT(1) # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) From b81a72c9f96d59e66b19f431ecc7c802e962dc59 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sat, 4 May 2024 17:38:26 +0200 Subject: [PATCH 02/11] Set S-Bus Pin to ALT(0) by try and error method. Signed-off-by: Patrick Menschel --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index ffbae8be3c591..bddb5f7e7d936 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -78,7 +78,7 @@ PB10 USART3_TX USART3 NODMA PB11 USART3_RX USART3 NODMA ALT(1) # SBUS inversion control pin, active high -PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) +PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) ALT(0) # for FrSky S.PORT. Has builtin inverters and diode to combine # RX and TX onto the one pin From 5368d9d6e257ee1c743b09c12bfd06f9ada970f4 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sat, 4 May 2024 19:02:04 +0200 Subject: [PATCH 03/11] Remove NODMA prop from USART3 Signed-off-by: Patrick Menschel --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index bddb5f7e7d936..fb9291ef6c1f2 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -74,8 +74,8 @@ SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW # alternative RC input using USART3 serial port. -PB10 USART3_TX USART3 NODMA -PB11 USART3_RX USART3 NODMA ALT(1) +PB10 USART3_TX USART3 +PB11 USART3_RX USART3 ALT(1) # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) ALT(0) From 5a86f39164cbe75bd75d6eb3af59542fd10b9fe8 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sat, 4 May 2024 19:58:20 +0200 Subject: [PATCH 04/11] Revert "Set S-Bus Pin to ALT(0)" This reverts commit b81a72c9f96d59e66b19f431ecc7c802e962dc59. --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index fb9291ef6c1f2..8f1ff966b869d 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -78,7 +78,7 @@ PB10 USART3_TX USART3 PB11 USART3_RX USART3 ALT(1) # SBUS inversion control pin, active high -PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) ALT(0) +PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) # for FrSky S.PORT. Has builtin inverters and diode to combine # RX and TX onto the one pin From a1e7303f92eb329c6657313a44909ca37c68e0b6 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sat, 4 May 2024 19:58:43 +0200 Subject: [PATCH 05/11] Revert "Remove NODMA prop from USART3" This reverts commit 5368d9d6e257ee1c743b09c12bfd06f9ada970f4. --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index 8f1ff966b869d..ffbae8be3c591 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -74,8 +74,8 @@ SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW # alternative RC input using USART3 serial port. -PB10 USART3_TX USART3 -PB11 USART3_RX USART3 ALT(1) +PB10 USART3_TX USART3 NODMA +PB11 USART3_RX USART3 NODMA ALT(1) # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) From 0d9eaf98e8fe1c49cfeed88eeb734e25aac8c07e Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sat, 4 May 2024 20:01:25 +0200 Subject: [PATCH 06/11] Add description about Inverter on PB11. Signed-off-by: Patrick Menschel --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index ffbae8be3c591..ed8b732e13cbc 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -73,7 +73,9 @@ SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 # RC input defaults to timer capture PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW -# alternative RC input using USART3 serial port. +# alternative RC input using USART3 serial port, +# according to https://github.com/betaflight/betaflight/pull/4427/ +# PB11 has an Inverter built-in, so invert-rx option must be used. PB10 USART3_TX USART3 NODMA PB11 USART3_RX USART3 NODMA ALT(1) From 41f2035d638230efee93ef146adb8889efa4205f Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sun, 5 May 2024 12:39:39 +0200 Subject: [PATCH 07/11] Change Inversion Control Pin on ALT(1) Signed-off-by: Patrick Menschel --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index ed8b732e13cbc..2c82e7500b963 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -74,13 +74,13 @@ SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW # alternative RC input using USART3 serial port, -# according to https://github.com/betaflight/betaflight/pull/4427/ -# PB11 has an Inverter built-in, so invert-rx option must be used. PB10 USART3_TX USART3 NODMA PB11 USART3_RX USART3 NODMA ALT(1) # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) +# or active low +PB15 USART3_RXINV OUTPUT HIGH GPIO(78) POL(1) ALT(1) # for FrSky S.PORT. Has builtin inverters and diode to combine # RX and TX onto the one pin From e89b6c8fc26c132b34ed6b83d57c0a64da64fd24 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Tue, 7 May 2024 18:04:17 +0200 Subject: [PATCH 08/11] Revert "Change Inversion Control Pin on ALT(1)" This reverts commit 41f2035d638230efee93ef146adb8889efa4205f. --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index 2c82e7500b963..ed8b732e13cbc 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -74,13 +74,13 @@ SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW # alternative RC input using USART3 serial port, +# according to https://github.com/betaflight/betaflight/pull/4427/ +# PB11 has an Inverter built-in, so invert-rx option must be used. PB10 USART3_TX USART3 NODMA PB11 USART3_RX USART3 NODMA ALT(1) # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) -# or active low -PB15 USART3_RXINV OUTPUT HIGH GPIO(78) POL(1) ALT(1) # for FrSky S.PORT. Has builtin inverters and diode to combine # RX and TX onto the one pin From a142cf0bd097a6fc006c53e4b3570f1479576603 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Tue, 7 May 2024 18:07:22 +0200 Subject: [PATCH 09/11] Revert "KakuteF4: Add BRD_ALT_CONFIG for serial RC_INPUT" This reverts commit 4f0511ad7fa5fb1b61a08756bc7b4a3d22c6cb4f. --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index ed8b732e13cbc..eea0b4785433c 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -70,14 +70,9 @@ define HAL_BATT_CURR_SCALE 17.0 # order of UARTs (and USB) SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 -# RC input defaults to timer capture +# rcinput is PB11 PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW - -# alternative RC input using USART3 serial port, -# according to https://github.com/betaflight/betaflight/pull/4427/ -# PB11 has an Inverter built-in, so invert-rx option must be used. -PB10 USART3_TX USART3 NODMA -PB11 USART3_RX USART3 NODMA ALT(1) +PB10 USART3_TX USART3 # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) From 51b94d764a898e7d0c1b197d8428872a241e76c0 Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Sun, 12 May 2024 19:54:39 +0200 Subject: [PATCH 10/11] working test config for CRSF --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index eea0b4785433c..8e5ee112f6eb6 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -71,11 +71,14 @@ define HAL_BATT_CURR_SCALE 17.0 SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 # rcinput is PB11 -PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW +#PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW + +# Testing UART3 for CRSF PB10 USART3_TX USART3 +PB11 USART3_RX USART3 # SBUS inversion control pin, active high -PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(1) +PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(0) # for FrSky S.PORT. Has builtin inverters and diode to combine # RX and TX onto the one pin From 2b5f4388f42ceaefc0b2fe19224f4d2a0d204fae Mon Sep 17 00:00:00 2001 From: Patrick Menschel Date: Tue, 14 May 2024 19:00:40 +0200 Subject: [PATCH 11/11] working config as ALT(1) --- libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat index 8e5ee112f6eb6..4a9e82c69a9b4 100644 --- a/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat +++ b/libraries/AP_HAL_ChibiOS/hwdef/KakuteF4/hwdef.dat @@ -71,11 +71,11 @@ define HAL_BATT_CURR_SCALE 17.0 SERIAL_ORDER OTG1 USART6 USART1 UART4 UART5 USART3 # rcinput is PB11 -#PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW - -# Testing UART3 for CRSF +PB11 TIM2_CH4 TIM2 RCININT PULLDOWN LOW PB10 USART3_TX USART3 -PB11 USART3_RX USART3 + +# alternative +PB11 USART3_RX USART3 ALT(1) # SBUS inversion control pin, active high PB15 USART3_RXINV OUTPUT LOW GPIO(78) POL(0)