Investigate why an asynchronous signal is delivered mid-block

[ivankyluk]

While investigating the Missing read/write records invariant error #7050, we found that asynchronous signal, i.e. SIGPROF, was delivered mid-block instead of at the end of a block.

Expected behavior
Signals which are marked as true in the can_always_delay array should be delivered at the end of a block instead of mid-block.

Versions

• What version of DynamoRIO are you using? The latest.
• Does the latest build from https://github.com/DynamoRIO/dynamorio/releases solve the problem? No.
• What operating system version are you running on? ("Windows 10" is not sufficient: give the release number.) Linux Debian 6.9.10
• Is your application 32-bit or 64-bit? 64 bit

Additional context
Xref #5063. There is drmemtrace discussion there: #5063 (comment). However, as that issue says, a regular asynch signal would be delayed and would be delivered in between the two blocks.

If this were a real interruption of a block: it would hit #5790 or #5063.