This repository has been archived by the owner on Nov 20, 2024. It is now read-only.
forked from bminor/binutils-gdb
-
Notifications
You must be signed in to change notification settings - Fork 0
/
ppc-linux-tdep.c
2368 lines (2037 loc) · 75 KB
/
ppc-linux-tdep.c
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
/* Target-dependent code for GDB, the GNU debugger.
Copyright (C) 1986-2024 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "frame.h"
#include "inferior.h"
#include "symtab.h"
#include "target.h"
#include "gdbcore.h"
#include "gdbcmd.h"
#include "symfile.h"
#include "objfiles.h"
#include "regcache.h"
#include "value.h"
#include "osabi.h"
#include "regset.h"
#include "solib-svr4.h"
#include "solib.h"
#include "solist.h"
#include "ppc-tdep.h"
#include "ppc64-tdep.h"
#include "ppc-linux-tdep.h"
#include "arch/ppc-linux-common.h"
#include "arch/ppc-linux-tdesc.h"
#include "glibc-tdep.h"
#include "trad-frame.h"
#include "frame-unwind.h"
#include "tramp-frame.h"
#include "observable.h"
#include "auxv.h"
#include "elf/common.h"
#include "elf/ppc64.h"
#include "arch-utils.h"
#include "xml-syscall.h"
#include "linux-tdep.h"
#include "linux-record.h"
#include "record-full.h"
#include "infrun.h"
#include "expop.h"
#include "stap-probe.h"
#include "ax.h"
#include "ax-gdb.h"
#include "cli/cli-utils.h"
#include "parser-defs.h"
#include "user-regs.h"
#include <ctype.h>
#include "elf-bfd.h"
#include "producer.h"
#include "target-float.h"
#include "features/rs6000/powerpc-32l.c"
#include "features/rs6000/powerpc-altivec32l.c"
#include "features/rs6000/powerpc-vsx32l.c"
#include "features/rs6000/powerpc-isa205-32l.c"
#include "features/rs6000/powerpc-isa205-altivec32l.c"
#include "features/rs6000/powerpc-isa205-vsx32l.c"
#include "features/rs6000/powerpc-isa205-ppr-dscr-vsx32l.c"
#include "features/rs6000/powerpc-isa207-vsx32l.c"
#include "features/rs6000/powerpc-isa207-htm-vsx32l.c"
#include "features/rs6000/powerpc-64l.c"
#include "features/rs6000/powerpc-altivec64l.c"
#include "features/rs6000/powerpc-vsx64l.c"
#include "features/rs6000/powerpc-isa205-64l.c"
#include "features/rs6000/powerpc-isa205-altivec64l.c"
#include "features/rs6000/powerpc-isa205-vsx64l.c"
#include "features/rs6000/powerpc-isa205-ppr-dscr-vsx64l.c"
#include "features/rs6000/powerpc-isa207-vsx64l.c"
#include "features/rs6000/powerpc-isa207-htm-vsx64l.c"
#include "features/rs6000/powerpc-e500l.c"
#include "dwarf2/frame.h"
/* Shared library operations for PowerPC-Linux. */
static solib_ops powerpc_so_ops;
/* The syscall's XML filename for PPC and PPC64. */
#define XML_SYSCALL_FILENAME_PPC "syscalls/ppc-linux.xml"
#define XML_SYSCALL_FILENAME_PPC64 "syscalls/ppc64-linux.xml"
/* ppc_linux_memory_remove_breakpoints attempts to remove a breakpoint
in much the same fashion as memory_remove_breakpoint in mem-break.c,
but is careful not to write back the previous contents if the code
in question has changed in between inserting the breakpoint and
removing it.
Here is the problem that we're trying to solve...
Once upon a time, before introducing this function to remove
breakpoints from the inferior, setting a breakpoint on a shared
library function prior to running the program would not work
properly. In order to understand the problem, it is first
necessary to understand a little bit about dynamic linking on
this platform.
A call to a shared library function is accomplished via a bl
(branch-and-link) instruction whose branch target is an entry
in the procedure linkage table (PLT). The PLT in the object
file is uninitialized. To gdb, prior to running the program, the
entries in the PLT are all zeros.
Once the program starts running, the shared libraries are loaded
and the procedure linkage table is initialized, but the entries in
the table are not (necessarily) resolved. Once a function is
actually called, the code in the PLT is hit and the function is
resolved. In order to better illustrate this, an example is in
order; the following example is from the gdb testsuite.
We start the program shmain.
[kev@arroyo testsuite]$ ../gdb gdb.base/shmain
[...]
We place two breakpoints, one on shr1 and the other on main.
(gdb) b shr1
Breakpoint 1 at 0x100409d4
(gdb) b main
Breakpoint 2 at 0x100006a0: file gdb.base/shmain.c, line 44.
Examine the instruction (and the immediatly following instruction)
upon which the breakpoint was placed. Note that the PLT entry
for shr1 contains zeros.
(gdb) x/2i 0x100409d4
0x100409d4 <shr1>: .long 0x0
0x100409d8 <shr1+4>: .long 0x0
Now run 'til main.
(gdb) r
Starting program: gdb.base/shmain
Breakpoint 1 at 0xffaf790: file gdb.base/shr1.c, line 19.
Breakpoint 2, main ()
at gdb.base/shmain.c:44
44 g = 1;
Examine the PLT again. Note that the loading of the shared
library has initialized the PLT to code which loads a constant
(which I think is an index into the GOT) into r11 and then
branches a short distance to the code which actually does the
resolving.
(gdb) x/2i 0x100409d4
0x100409d4 <shr1>: li r11,4
0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
(gdb) c
Continuing.
Breakpoint 1, shr1 (x=1)
at gdb.base/shr1.c:19
19 l = 1;
Now we've hit the breakpoint at shr1. (The breakpoint was
reset from the PLT entry to the actual shr1 function after the
shared library was loaded.) Note that the PLT entry has been
resolved to contain a branch that takes us directly to shr1.
(The real one, not the PLT entry.)
(gdb) x/2i 0x100409d4
0x100409d4 <shr1>: b 0xffaf76c <shr1>
0x100409d8 <shr1+4>: b 0x10040984 <sg+4>
The thing to note here is that the PLT entry for shr1 has been
changed twice.
Now the problem should be obvious. GDB places a breakpoint (a
trap instruction) on the zero value of the PLT entry for shr1.
Later on, after the shared library had been loaded and the PLT
initialized, GDB gets a signal indicating this fact and attempts
(as it always does when it stops) to remove all the breakpoints.
The breakpoint removal was causing the former contents (a zero
word) to be written back to the now initialized PLT entry thus
destroying a portion of the initialization that had occurred only a
short time ago. When execution continued, the zero word would be
executed as an instruction an illegal instruction trap was
generated instead. (0 is not a legal instruction.)
The fix for this problem was fairly straightforward. The function
memory_remove_breakpoint from mem-break.c was copied to this file,
modified slightly, and renamed to ppc_linux_memory_remove_breakpoint.
In tm-linux.h, MEMORY_REMOVE_BREAKPOINT is defined to call this new
function.
The differences between ppc_linux_memory_remove_breakpoint () and
memory_remove_breakpoint () are minor. All that the former does
that the latter does not is check to make sure that the breakpoint
location actually contains a breakpoint (trap instruction) prior
to attempting to write back the old contents. If it does contain
a trap instruction, we allow the old contents to be written back.
Otherwise, we silently do nothing.
The big question is whether memory_remove_breakpoint () should be
changed to have the same functionality. The downside is that more
traffic is generated for remote targets since we'll have an extra
fetch of a memory word each time a breakpoint is removed.
For the time being, we'll leave this self-modifying-code-friendly
version in ppc-linux-tdep.c, but it ought to be migrated somewhere
else in the event that some other platform has similar needs with
regard to removing breakpoints in some potentially self modifying
code. */
static int
ppc_linux_memory_remove_breakpoint (struct gdbarch *gdbarch,
struct bp_target_info *bp_tgt)
{
CORE_ADDR addr = bp_tgt->reqstd_address;
const unsigned char *bp;
int val;
int bplen;
gdb_byte old_contents[BREAKPOINT_MAX];
/* Determine appropriate breakpoint contents and size for this address. */
bp = gdbarch_breakpoint_from_pc (gdbarch, &addr, &bplen);
/* Make sure we see the memory breakpoints. */
scoped_restore restore_memory
= make_scoped_restore_show_memory_breakpoints (1);
val = target_read_memory (addr, old_contents, bplen);
/* If our breakpoint is no longer at the address, this means that the
program modified the code on us, so it is wrong to put back the
old value. */
if (val == 0 && memcmp (bp, old_contents, bplen) == 0)
val = target_write_raw_memory (addr, bp_tgt->shadow_contents, bplen);
return val;
}
/* For historic reasons, PPC 32 GNU/Linux follows PowerOpen rather
than the 32 bit SYSV R4 ABI structure return convention - all
structures, no matter their size, are put in memory. Vectors,
which were added later, do get returned in a register though. */
static enum return_value_convention
ppc_linux_return_value (struct gdbarch *gdbarch, struct value *function,
struct type *valtype, struct regcache *regcache,
struct value **read_value, const gdb_byte *writebuf)
{
gdb_byte *readbuf = nullptr;
if (read_value != nullptr)
{
*read_value = value::allocate (valtype);
readbuf = (*read_value)->contents_raw ().data ();
}
if ((valtype->code () == TYPE_CODE_STRUCT
|| valtype->code () == TYPE_CODE_UNION)
&& !((valtype->length () == 16 || valtype->length () == 8)
&& valtype->is_vector ()))
return RETURN_VALUE_STRUCT_CONVENTION;
else
return ppc_sysv_abi_return_value (gdbarch, function, valtype, regcache,
readbuf, writebuf);
}
/* PLT stub in an executable. */
static const struct ppc_insn_pattern powerpc32_plt_stub[] =
{
{ 0xffff0000, 0x3d600000, 0 }, /* lis r11, xxxx */
{ 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */
{ 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
{ 0xffffffff, 0x4e800420, 0 }, /* bctr */
{ 0, 0, 0 }
};
/* PLT stubs in a shared library or PIE.
The first variant is used when the PLT entry is within +/-32k of
the GOT pointer (r30). */
static const struct ppc_insn_pattern powerpc32_plt_stub_so_1[] =
{
{ 0xffff0000, 0x817e0000, 0 }, /* lwz r11, xxxx(r30) */
{ 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
{ 0xffffffff, 0x4e800420, 0 }, /* bctr */
{ 0, 0, 0 }
};
/* The second variant is used when the PLT entry is more than +/-32k
from the GOT pointer (r30). */
static const struct ppc_insn_pattern powerpc32_plt_stub_so_2[] =
{
{ 0xffff0000, 0x3d7e0000, 0 }, /* addis r11, r30, xxxx */
{ 0xffff0000, 0x816b0000, 0 }, /* lwz r11, xxxx(r11) */
{ 0xffffffff, 0x7d6903a6, 0 }, /* mtctr r11 */
{ 0xffffffff, 0x4e800420, 0 }, /* bctr */
{ 0, 0, 0 }
};
/* The max number of insns we check using ppc_insns_match_pattern. */
#define POWERPC32_PLT_CHECK_LEN (ARRAY_SIZE (powerpc32_plt_stub) - 1)
/* Check if PC is in PLT stub. For non-secure PLT, stub is in .plt
section. For secure PLT, stub is in .text and we need to check
instruction patterns. */
static int
powerpc_linux_in_dynsym_resolve_code (CORE_ADDR pc)
{
struct bound_minimal_symbol sym;
/* Check whether PC is in the dynamic linker. This also checks
whether it is in the .plt section, used by non-PIC executables. */
if (svr4_in_dynsym_resolve_code (pc))
return 1;
/* Check if we are in the resolver. */
sym = lookup_minimal_symbol_by_pc (pc);
if (sym.minsym != NULL
&& (strcmp (sym.minsym->linkage_name (), "__glink") == 0
|| strcmp (sym.minsym->linkage_name (), "__glink_PLTresolve") == 0))
return 1;
return 0;
}
/* Follow PLT stub to actual routine.
When the execution direction is EXEC_REVERSE, scan backward to
check whether we are in the middle of a PLT stub. Currently,
we only look-behind at most 4 instructions (the max length of a PLT
stub sequence. */
static CORE_ADDR
ppc_skip_trampoline_code (frame_info_ptr frame, CORE_ADDR pc)
{
unsigned int insnbuf[POWERPC32_PLT_CHECK_LEN];
struct gdbarch *gdbarch = get_frame_arch (frame);
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
CORE_ADDR target = 0;
int scan_limit, i;
scan_limit = 1;
/* When reverse-debugging, scan backward to check whether we are
in the middle of trampoline code. */
if (execution_direction == EXEC_REVERSE)
scan_limit = 4; /* At most 4 instructions. */
for (i = 0; i < scan_limit; i++)
{
if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub, insnbuf))
{
/* Calculate PLT entry address from
lis r11, xxxx
lwz r11, xxxx(r11). */
target = ((ppc_insn_d_field (insnbuf[0]) << 16)
+ ppc_insn_d_field (insnbuf[1]));
}
else if (i < ARRAY_SIZE (powerpc32_plt_stub_so_1) - 1
&& ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_1,
insnbuf))
{
/* Calculate PLT entry address from
lwz r11, xxxx(r30). */
target = (ppc_insn_d_field (insnbuf[0])
+ get_frame_register_unsigned (frame,
tdep->ppc_gp0_regnum + 30));
}
else if (ppc_insns_match_pattern (frame, pc, powerpc32_plt_stub_so_2,
insnbuf))
{
/* Calculate PLT entry address from
addis r11, r30, xxxx
lwz r11, xxxx(r11). */
target = ((ppc_insn_d_field (insnbuf[0]) << 16)
+ ppc_insn_d_field (insnbuf[1])
+ get_frame_register_unsigned (frame,
tdep->ppc_gp0_regnum + 30));
}
else
{
/* Scan backward one more instruction if it doesn't match. */
pc -= 4;
continue;
}
target = read_memory_unsigned_integer (target, 4, byte_order);
return target;
}
return 0;
}
/* Wrappers to handle Linux-only registers. */
static void
ppc_linux_supply_gregset (const struct regset *regset,
struct regcache *regcache,
int regnum, const void *gregs, size_t len)
{
const struct ppc_reg_offsets *offsets
= (const struct ppc_reg_offsets *) regset->regmap;
ppc_supply_gregset (regset, regcache, regnum, gregs, len);
if (ppc_linux_trap_reg_p (regcache->arch ()))
{
/* "orig_r3" is stored 2 slots after "pc". */
if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
ppc_supply_reg (regcache, PPC_ORIG_R3_REGNUM, (const gdb_byte *) gregs,
offsets->pc_offset + 2 * offsets->gpr_size,
offsets->gpr_size);
/* "trap" is stored 8 slots after "pc". */
if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
ppc_supply_reg (regcache, PPC_TRAP_REGNUM, (const gdb_byte *) gregs,
offsets->pc_offset + 8 * offsets->gpr_size,
offsets->gpr_size);
}
}
static void
ppc_linux_collect_gregset (const struct regset *regset,
const struct regcache *regcache,
int regnum, void *gregs, size_t len)
{
const struct ppc_reg_offsets *offsets
= (const struct ppc_reg_offsets *) regset->regmap;
/* Clear areas in the linux gregset not written elsewhere. */
if (regnum == -1)
memset (gregs, 0, len);
ppc_collect_gregset (regset, regcache, regnum, gregs, len);
if (ppc_linux_trap_reg_p (regcache->arch ()))
{
/* "orig_r3" is stored 2 slots after "pc". */
if (regnum == -1 || regnum == PPC_ORIG_R3_REGNUM)
ppc_collect_reg (regcache, PPC_ORIG_R3_REGNUM, (gdb_byte *) gregs,
offsets->pc_offset + 2 * offsets->gpr_size,
offsets->gpr_size);
/* "trap" is stored 8 slots after "pc". */
if (regnum == -1 || regnum == PPC_TRAP_REGNUM)
ppc_collect_reg (regcache, PPC_TRAP_REGNUM, (gdb_byte *) gregs,
offsets->pc_offset + 8 * offsets->gpr_size,
offsets->gpr_size);
}
}
/* Regset descriptions. */
static const struct ppc_reg_offsets ppc32_linux_reg_offsets =
{
/* General-purpose registers. */
/* .r0_offset = */ 0,
/* .gpr_size = */ 4,
/* .xr_size = */ 4,
/* .pc_offset = */ 128,
/* .ps_offset = */ 132,
/* .cr_offset = */ 152,
/* .lr_offset = */ 144,
/* .ctr_offset = */ 140,
/* .xer_offset = */ 148,
/* .mq_offset = */ 156,
/* Floating-point registers. */
/* .f0_offset = */ 0,
/* .fpscr_offset = */ 256,
/* .fpscr_size = */ 8
};
static const struct ppc_reg_offsets ppc64_linux_reg_offsets =
{
/* General-purpose registers. */
/* .r0_offset = */ 0,
/* .gpr_size = */ 8,
/* .xr_size = */ 8,
/* .pc_offset = */ 256,
/* .ps_offset = */ 264,
/* .cr_offset = */ 304,
/* .lr_offset = */ 288,
/* .ctr_offset = */ 280,
/* .xer_offset = */ 296,
/* .mq_offset = */ 312,
/* Floating-point registers. */
/* .f0_offset = */ 0,
/* .fpscr_offset = */ 256,
/* .fpscr_size = */ 8
};
static const struct regset ppc32_linux_gregset = {
&ppc32_linux_reg_offsets,
ppc_linux_supply_gregset,
ppc_linux_collect_gregset
};
static const struct regset ppc64_linux_gregset = {
&ppc64_linux_reg_offsets,
ppc_linux_supply_gregset,
ppc_linux_collect_gregset
};
static const struct regset ppc32_linux_fpregset = {
&ppc32_linux_reg_offsets,
ppc_supply_fpregset,
ppc_collect_fpregset
};
static const struct regcache_map_entry ppc32_le_linux_vrregmap[] =
{
{ 32, PPC_VR0_REGNUM, 16 },
{ 1, PPC_VSCR_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 12 },
{ 1, PPC_VRSAVE_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 12 },
{ 0 }
};
static const struct regcache_map_entry ppc32_be_linux_vrregmap[] =
{
{ 32, PPC_VR0_REGNUM, 16 },
{ 1, REGCACHE_MAP_SKIP, 12},
{ 1, PPC_VSCR_REGNUM, 4 },
{ 1, PPC_VRSAVE_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 12 },
{ 0 }
};
static const struct regset ppc32_le_linux_vrregset = {
ppc32_le_linux_vrregmap,
regcache_supply_regset,
regcache_collect_regset
};
static const struct regset ppc32_be_linux_vrregset = {
ppc32_be_linux_vrregmap,
regcache_supply_regset,
regcache_collect_regset
};
static const struct regcache_map_entry ppc32_linux_vsxregmap[] =
{
{ 32, PPC_VSR0_UPPER_REGNUM, 8 },
{ 0 }
};
static const struct regset ppc32_linux_vsxregset = {
ppc32_linux_vsxregmap,
regcache_supply_regset,
regcache_collect_regset
};
/* Program Priorty Register regmap. */
static const struct regcache_map_entry ppc32_regmap_ppr[] =
{
{ 1, PPC_PPR_REGNUM, 8 },
{ 0 }
};
/* Program Priorty Register regset. */
const struct regset ppc32_linux_pprregset = {
ppc32_regmap_ppr,
regcache_supply_regset,
regcache_collect_regset
};
/* Data Stream Control Register regmap. */
static const struct regcache_map_entry ppc32_regmap_dscr[] =
{
{ 1, PPC_DSCR_REGNUM, 8 },
{ 0 }
};
/* Data Stream Control Register regset. */
const struct regset ppc32_linux_dscrregset = {
ppc32_regmap_dscr,
regcache_supply_regset,
regcache_collect_regset
};
/* Target Address Register regmap. */
static const struct regcache_map_entry ppc32_regmap_tar[] =
{
{ 1, PPC_TAR_REGNUM, 8 },
{ 0 }
};
/* Target Address Register regset. */
const struct regset ppc32_linux_tarregset = {
ppc32_regmap_tar,
regcache_supply_regset,
regcache_collect_regset
};
/* Event-Based Branching regmap. */
static const struct regcache_map_entry ppc32_regmap_ebb[] =
{
{ 1, PPC_EBBRR_REGNUM, 8 },
{ 1, PPC_EBBHR_REGNUM, 8 },
{ 1, PPC_BESCR_REGNUM, 8 },
{ 0 }
};
/* Event-Based Branching regset. */
const struct regset ppc32_linux_ebbregset = {
ppc32_regmap_ebb,
regcache_supply_regset,
regcache_collect_regset
};
/* Performance Monitoring Unit regmap. */
static const struct regcache_map_entry ppc32_regmap_pmu[] =
{
{ 1, PPC_SIAR_REGNUM, 8 },
{ 1, PPC_SDAR_REGNUM, 8 },
{ 1, PPC_SIER_REGNUM, 8 },
{ 1, PPC_MMCR2_REGNUM, 8 },
{ 1, PPC_MMCR0_REGNUM, 8 },
{ 0 }
};
/* Performance Monitoring Unit regset. */
const struct regset ppc32_linux_pmuregset = {
ppc32_regmap_pmu,
regcache_supply_regset,
regcache_collect_regset
};
/* Hardware Transactional Memory special-purpose register regmap. */
static const struct regcache_map_entry ppc32_regmap_tm_spr[] =
{
{ 1, PPC_TFHAR_REGNUM, 8 },
{ 1, PPC_TEXASR_REGNUM, 8 },
{ 1, PPC_TFIAR_REGNUM, 8 },
{ 0 }
};
/* Hardware Transactional Memory special-purpose register regset. */
const struct regset ppc32_linux_tm_sprregset = {
ppc32_regmap_tm_spr,
regcache_supply_regset,
regcache_collect_regset
};
/* Regmaps for the Hardware Transactional Memory checkpointed
general-purpose regsets for 32-bit, 64-bit big-endian, and 64-bit
little endian targets. The ptrace and core file buffers for 64-bit
targets use 8-byte fields for the 4-byte registers, and the
position of the register in the fields depends on the endianness.
The 32-bit regmap is the same for both endian types because the
fields are all 4-byte long.
The layout of checkpointed GPR regset is the same as a regular
struct pt_regs, but we skip all registers that are not actually
checkpointed by the processor (e.g. msr, nip), except when
generating a core file. The 64-bit regset is 48 * 8 bytes long.
In some 64-bit kernels, the regset for a 32-bit inferior has the
same length, but all the registers are squeezed in the first half
(48 * 4 bytes). The pt_regs struct calls the regular cr ccr, but
we use ccr for "checkpointed condition register". Note that CR
(condition register) field 0 is not checkpointed, but the kernel
returns all 4 bytes. The skipped registers should not be touched
when writing the regset to the inferior (with
PTRACE_SETREGSET). */
static const struct regcache_map_entry ppc32_regmap_cgpr[] =
{
{ 32, PPC_CR0_REGNUM, 4 },
{ 3, REGCACHE_MAP_SKIP, 4 }, /* nip, msr, orig_gpr3. */
{ 1, PPC_CCTR_REGNUM, 4 },
{ 1, PPC_CLR_REGNUM, 4 },
{ 1, PPC_CXER_REGNUM, 4 },
{ 1, PPC_CCR_REGNUM, 4 },
{ 9, REGCACHE_MAP_SKIP, 4 }, /* All the rest. */
{ 0 }
};
static const struct regcache_map_entry ppc64_le_regmap_cgpr[] =
{
{ 32, PPC_CR0_REGNUM, 8 },
{ 3, REGCACHE_MAP_SKIP, 8 },
{ 1, PPC_CCTR_REGNUM, 8 },
{ 1, PPC_CLR_REGNUM, 8 },
{ 1, PPC_CXER_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 4 }, /* CXER padding. */
{ 1, PPC_CCR_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */
{ 9, REGCACHE_MAP_SKIP, 8},
{ 0 }
};
static const struct regcache_map_entry ppc64_be_regmap_cgpr[] =
{
{ 32, PPC_CR0_REGNUM, 8 },
{ 3, REGCACHE_MAP_SKIP, 8 },
{ 1, PPC_CCTR_REGNUM, 8 },
{ 1, PPC_CLR_REGNUM, 8 },
{ 1, REGCACHE_MAP_SKIP, 4}, /* CXER padding. */
{ 1, PPC_CXER_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 4}, /* CCR padding. */
{ 1, PPC_CCR_REGNUM, 4 },
{ 9, REGCACHE_MAP_SKIP, 8},
{ 0 }
};
/* Regsets for the Hardware Transactional Memory checkpointed
general-purpose registers for 32-bit, 64-bit big-endian, and 64-bit
little endian targets.
Some 64-bit kernels generate a checkpointed gpr note section with
48*8 bytes for a 32-bit thread, of which only 48*4 are actually
used, so we set the variable size flag in the corresponding regset
to accept this case. */
static const struct regset ppc32_linux_cgprregset = {
ppc32_regmap_cgpr,
regcache_supply_regset,
regcache_collect_regset,
REGSET_VARIABLE_SIZE
};
static const struct regset ppc64_be_linux_cgprregset = {
ppc64_be_regmap_cgpr,
regcache_supply_regset,
regcache_collect_regset
};
static const struct regset ppc64_le_linux_cgprregset = {
ppc64_le_regmap_cgpr,
regcache_supply_regset,
regcache_collect_regset
};
/* Hardware Transactional Memory checkpointed floating-point regmap. */
static const struct regcache_map_entry ppc32_regmap_cfpr[] =
{
{ 32, PPC_CF0_REGNUM, 8 },
{ 1, PPC_CFPSCR_REGNUM, 8 },
{ 0 }
};
/* Hardware Transactional Memory checkpointed floating-point regset. */
const struct regset ppc32_linux_cfprregset = {
ppc32_regmap_cfpr,
regcache_supply_regset,
regcache_collect_regset
};
/* Regmaps for the Hardware Transactional Memory checkpointed vector
regsets, for big and little endian targets. The position of the
4-byte VSCR in its 16-byte field depends on the endianness. */
static const struct regcache_map_entry ppc32_le_regmap_cvmx[] =
{
{ 32, PPC_CVR0_REGNUM, 16 },
{ 1, PPC_CVSCR_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 12 },
{ 1, PPC_CVRSAVE_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 12 },
{ 0 }
};
static const struct regcache_map_entry ppc32_be_regmap_cvmx[] =
{
{ 32, PPC_CVR0_REGNUM, 16 },
{ 1, REGCACHE_MAP_SKIP, 12 },
{ 1, PPC_CVSCR_REGNUM, 4 },
{ 1, PPC_CVRSAVE_REGNUM, 4 },
{ 1, REGCACHE_MAP_SKIP, 12},
{ 0 }
};
/* Hardware Transactional Memory checkpointed vector regsets, for little
and big endian targets. */
static const struct regset ppc32_le_linux_cvmxregset = {
ppc32_le_regmap_cvmx,
regcache_supply_regset,
regcache_collect_regset
};
static const struct regset ppc32_be_linux_cvmxregset = {
ppc32_be_regmap_cvmx,
regcache_supply_regset,
regcache_collect_regset
};
/* Hardware Transactional Memory checkpointed vector-scalar regmap. */
static const struct regcache_map_entry ppc32_regmap_cvsx[] =
{
{ 32, PPC_CVSR0_UPPER_REGNUM, 8 },
{ 0 }
};
/* Hardware Transactional Memory checkpointed vector-scalar regset. */
const struct regset ppc32_linux_cvsxregset = {
ppc32_regmap_cvsx,
regcache_supply_regset,
regcache_collect_regset
};
/* Hardware Transactional Memory checkpointed Program Priority Register
regmap. */
static const struct regcache_map_entry ppc32_regmap_cppr[] =
{
{ 1, PPC_CPPR_REGNUM, 8 },
{ 0 }
};
/* Hardware Transactional Memory checkpointed Program Priority Register
regset. */
const struct regset ppc32_linux_cpprregset = {
ppc32_regmap_cppr,
regcache_supply_regset,
regcache_collect_regset
};
/* Hardware Transactional Memory checkpointed Data Stream Control
Register regmap. */
static const struct regcache_map_entry ppc32_regmap_cdscr[] =
{
{ 1, PPC_CDSCR_REGNUM, 8 },
{ 0 }
};
/* Hardware Transactional Memory checkpointed Data Stream Control
Register regset. */
const struct regset ppc32_linux_cdscrregset = {
ppc32_regmap_cdscr,
regcache_supply_regset,
regcache_collect_regset
};
/* Hardware Transactional Memory checkpointed Target Address Register
regmap. */
static const struct regcache_map_entry ppc32_regmap_ctar[] =
{
{ 1, PPC_CTAR_REGNUM, 8 },
{ 0 }
};
/* Hardware Transactional Memory checkpointed Target Address Register
regset. */
const struct regset ppc32_linux_ctarregset = {
ppc32_regmap_ctar,
regcache_supply_regset,
regcache_collect_regset
};
const struct regset *
ppc_linux_gregset (int wordsize)
{
return wordsize == 8 ? &ppc64_linux_gregset : &ppc32_linux_gregset;
}
const struct regset *
ppc_linux_fpregset (void)
{
return &ppc32_linux_fpregset;
}
const struct regset *
ppc_linux_vrregset (struct gdbarch *gdbarch)
{
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
return &ppc32_be_linux_vrregset;
else
return &ppc32_le_linux_vrregset;
}
const struct regset *
ppc_linux_vsxregset (void)
{
return &ppc32_linux_vsxregset;
}
const struct regset *
ppc_linux_cgprregset (struct gdbarch *gdbarch)
{
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
if (tdep->wordsize == 4)
{
return &ppc32_linux_cgprregset;
}
else
{
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
return &ppc64_be_linux_cgprregset;
else
return &ppc64_le_linux_cgprregset;
}
}
const struct regset *
ppc_linux_cvmxregset (struct gdbarch *gdbarch)
{
if (gdbarch_byte_order (gdbarch) == BFD_ENDIAN_BIG)
return &ppc32_be_linux_cvmxregset;
else
return &ppc32_le_linux_cvmxregset;
}
/* Collect function used to generate the core note for the
checkpointed GPR regset. Here, we don't want to skip the
"checkpointed" NIP and MSR, so that the note section we generate is
similar to the one generated by the kernel. To avoid having to
define additional registers in GDB which are not actually
checkpointed in the architecture, we copy TFHAR to the checkpointed
NIP slot, which is what the kernel does, and copy the regular MSR
to the checkpointed MSR slot, which will have a similar value in
most cases. */
static void
ppc_linux_collect_core_cpgrregset (const struct regset *regset,
const struct regcache *regcache,
int regnum, void *buf, size_t len)
{
struct gdbarch *gdbarch = regcache->arch ();
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
const struct regset *cgprregset = ppc_linux_cgprregset (gdbarch);
/* We collect the checkpointed GPRs already defined in the regular
regmap, then overlay TFHAR/MSR on the checkpointed NIP/MSR
slots. */
cgprregset->collect_regset (cgprregset, regcache, regnum, buf, len);
/* Check that we are collecting all the registers, which should be
the case when generating a core file. */
if (regnum != -1)
return;
/* PT_NIP and PT_MSR are 32 and 33 for powerpc. Don't redefine
these symbols since this file can run on clients in other
architectures where they can already be defined to other
values. */
int pt_offset = 32;
/* Check that our buffer is long enough to hold two slots at
pt_offset * wordsize, one for NIP and one for MSR. */
gdb_assert ((pt_offset + 2) * tdep->wordsize <= len);
/* TFHAR is 8 bytes wide, but the NIP slot for a 32-bit thread is
4-bytes long. We use raw_collect_integer which handles
differences in the sizes for the source and destination buffers
for both endian modes. */
(regcache->raw_collect_integer
(PPC_TFHAR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize,
tdep->wordsize, false));
pt_offset = 33;
(regcache->raw_collect_integer
(PPC_MSR_REGNUM, ((gdb_byte *) buf) + pt_offset * tdep->wordsize,
tdep->wordsize, false));
}
/* Iterate over supported core file register note sections. */
static void
ppc_linux_iterate_over_regset_sections (struct gdbarch *gdbarch,
iterate_over_regset_sections_cb *cb,
void *cb_data,
const struct regcache *regcache)
{
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
int have_altivec = tdep->ppc_vr0_regnum != -1;
int have_vsx = tdep->ppc_vsr0_upper_regnum != -1;