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ppc-sysv-tdep.c
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ppc-sysv-tdep.c
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/* Target-dependent code for PowerPC systems using the SVR4 ABI
for GDB, the GNU debugger.
Copyright (C) 2000-2024 Free Software Foundation, Inc.
This file is part of GDB.
This program is free software; you can redistribute it and/or modify
it under the terms of the GNU General Public License as published by
the Free Software Foundation; either version 3 of the License, or
(at your option) any later version.
This program is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
GNU General Public License for more details.
You should have received a copy of the GNU General Public License
along with this program. If not, see <http://www.gnu.org/licenses/>. */
#include "defs.h"
#include "language.h"
#include "gdbcore.h"
#include "inferior.h"
#include "regcache.h"
#include "value.h"
#include "ppc-tdep.h"
#include "target.h"
#include "objfiles.h"
#include "infcall.h"
#include "dwarf2.h"
#include "dwarf2/loc.h"
#include "target-float.h"
#include <algorithm>
/* Check whether FTPYE is a (pointer to) function type that should use
the OpenCL vector ABI. */
static int
ppc_sysv_use_opencl_abi (struct type *ftype)
{
ftype = check_typedef (ftype);
if (ftype->code () == TYPE_CODE_PTR)
ftype = check_typedef (ftype->target_type ());
return (ftype->code () == TYPE_CODE_FUNC
&& TYPE_CALLING_CONVENTION (ftype) == DW_CC_GDB_IBM_OpenCL);
}
/* Pass the arguments in either registers, or in the stack. Using the
ppc sysv ABI, the first eight words of the argument list (that might
be less than eight parameters if some parameters occupy more than one
word) are passed in r3..r10 registers. float and double parameters are
passed in fpr's, in addition to that. Rest of the parameters if any
are passed in user stack.
If the function is returning a structure, then the return address is passed
in r3, then the first 7 words of the parameters can be passed in registers,
starting from r4. */
CORE_ADDR
ppc_sysv_abi_push_dummy_call (struct gdbarch *gdbarch, struct value *function,
struct regcache *regcache, CORE_ADDR bp_addr,
int nargs, struct value **args, CORE_ADDR sp,
function_call_return_method return_method,
CORE_ADDR struct_addr)
{
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int opencl_abi = ppc_sysv_use_opencl_abi (function->type ());
ULONGEST saved_sp;
int argspace = 0; /* 0 is an initial wrong guess. */
int write_pass;
gdb_assert (tdep->wordsize == 4);
regcache_cooked_read_unsigned (regcache, gdbarch_sp_regnum (gdbarch),
&saved_sp);
/* Go through the argument list twice.
Pass 1: Figure out how much new stack space is required for
arguments and pushed values. Unlike the PowerOpen ABI, the SysV
ABI doesn't reserve any extra space for parameters which are put
in registers, but does always push structures and then pass their
address.
Pass 2: Replay the same computation but this time also write the
values out to the target. */
for (write_pass = 0; write_pass < 2; write_pass++)
{
int argno;
/* Next available floating point register for float and double
arguments. */
int freg = 1;
/* Next available general register for non-float, non-vector
arguments. */
int greg = 3;
/* Next available vector register for vector arguments. */
int vreg = 2;
/* Arguments start above the "LR save word" and "Back chain". */
int argoffset = 2 * tdep->wordsize;
/* Structures start after the arguments. */
int structoffset = argoffset + argspace;
/* If the function is returning a `struct', then the first word
(which will be passed in r3) is used for struct return
address. In that case we should advance one word and start
from r4 register to copy parameters. */
if (return_method == return_method_struct)
{
if (write_pass)
regcache_cooked_write_signed (regcache,
tdep->ppc_gp0_regnum + greg,
struct_addr);
greg++;
}
for (argno = 0; argno < nargs; argno++)
{
struct value *arg = args[argno];
struct type *type = check_typedef (arg->type ());
int len = type->length ();
const bfd_byte *val = arg->contents ().data ();
if (type->code () == TYPE_CODE_FLT && len <= 8
&& !tdep->soft_float)
{
/* Floating point value converted to "double" then
passed in an FP register, when the registers run out,
8 byte aligned stack is used. */
if (freg <= 8)
{
if (write_pass)
{
/* Always store the floating point value using
the register's floating-point format. */
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
struct type *regtype
= register_type (gdbarch, tdep->ppc_fp0_regnum + freg);
target_float_convert (val, type, regval, regtype);
regcache->cooked_write (tdep->ppc_fp0_regnum + freg,
regval);
}
freg++;
}
else
{
/* The SysV ABI tells us to convert floats to
doubles before writing them to an 8 byte aligned
stack location. Unfortunately GCC does not do
that, and stores floats into 4 byte aligned
locations without converting them to doubles.
Since there is no know compiler that actually
follows the ABI here, we implement the GCC
convention. */
/* Align to 4 bytes or 8 bytes depending on the type of
the argument (float or double). */
argoffset = align_up (argoffset, len);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += len;
}
}
else if (type->code () == TYPE_CODE_FLT
&& len == 16
&& !tdep->soft_float
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
{
/* IBM long double passed in two FP registers if
available, otherwise 8-byte aligned stack. */
if (freg <= 7)
{
if (write_pass)
{
regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
val + 8);
}
freg += 2;
}
else
{
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += 16;
}
}
else if (len == 8
&& (type->code () == TYPE_CODE_INT /* long long */
|| type->code () == TYPE_CODE_FLT /* double */
|| (type->code () == TYPE_CODE_DECFLOAT
&& tdep->soft_float)))
{
/* "long long" or soft-float "double" or "_Decimal64"
passed in an odd/even register pair with the low
addressed word in the odd register and the high
addressed word in the even register, or when the
registers run out an 8 byte aligned stack
location. */
if (greg > 9)
{
/* Just in case GREG was 10. */
greg = 11;
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += 8;
}
else
{
/* Must start on an odd register - r3/r4 etc. */
if ((greg & 1) == 0)
greg++;
if (write_pass)
{
regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
val + 0);
regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
val + 4);
}
greg += 2;
}
}
else if (len == 16
&& ((type->code () == TYPE_CODE_FLT
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
|| (type->code () == TYPE_CODE_DECFLOAT
&& tdep->soft_float)))
{
/* Soft-float IBM long double or _Decimal128 passed in
four consecutive registers, or on the stack. The
registers are not necessarily odd/even pairs. */
if (greg > 7)
{
greg = 11;
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += 16;
}
else
{
if (write_pass)
{
regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 0,
val + 0);
regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 1,
val + 4);
regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 2,
val + 8);
regcache->cooked_write (tdep->ppc_gp0_regnum + greg + 3,
val + 12);
}
greg += 4;
}
}
else if (type->code () == TYPE_CODE_DECFLOAT && len <= 8
&& !tdep->soft_float)
{
/* 32-bit and 64-bit decimal floats go in f1 .. f8. They can
end up in memory. */
if (freg <= 8)
{
if (write_pass)
{
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
const gdb_byte *p;
/* 32-bit decimal floats are right aligned in the
doubleword. */
if (type->length () == 4)
{
memcpy (regval + 4, val, 4);
p = regval;
}
else
p = val;
regcache->cooked_write (tdep->ppc_fp0_regnum + freg, p);
}
freg++;
}
else
{
argoffset = align_up (argoffset, len);
if (write_pass)
/* Write value in the stack's parameter save area. */
write_memory (sp + argoffset, val, len);
argoffset += len;
}
}
else if (type->code () == TYPE_CODE_DECFLOAT && len == 16
&& !tdep->soft_float)
{
/* 128-bit decimal floats go in f2 .. f7, always in even/odd
pairs. They can end up in memory, using two doublewords. */
if (freg <= 6)
{
/* Make sure freg is even. */
freg += freg & 1;
if (write_pass)
{
regcache->cooked_write (tdep->ppc_fp0_regnum + freg, val);
regcache->cooked_write (tdep->ppc_fp0_regnum + freg + 1,
val + 8);
}
}
else
{
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, 16);
argoffset += 16;
}
/* If a 128-bit decimal float goes to the stack because only f7
and f8 are free (thus there's no even/odd register pair
available), these registers should be marked as occupied.
Hence we increase freg even when writing to memory. */
freg += 2;
}
else if (len < 16
&& type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& opencl_abi)
{
/* OpenCL vectors shorter than 16 bytes are passed as if
a series of independent scalars. */
struct type *eltype = check_typedef (type->target_type ());
int i, nelt = type->length () / eltype->length ();
for (i = 0; i < nelt; i++)
{
const gdb_byte *elval = val + i * eltype->length ();
if (eltype->code () == TYPE_CODE_FLT && !tdep->soft_float)
{
if (freg <= 8)
{
if (write_pass)
{
int regnum = tdep->ppc_fp0_regnum + freg;
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
struct type *regtype
= register_type (gdbarch, regnum);
target_float_convert (elval, eltype,
regval, regtype);
regcache->cooked_write (regnum, regval);
}
freg++;
}
else
{
argoffset = align_up (argoffset, len);
if (write_pass)
write_memory (sp + argoffset, val, len);
argoffset += len;
}
}
else if (eltype->length () == 8)
{
if (greg > 9)
{
/* Just in case GREG was 10. */
greg = 11;
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, elval,
eltype->length ());
argoffset += 8;
}
else
{
/* Must start on an odd register - r3/r4 etc. */
if ((greg & 1) == 0)
greg++;
if (write_pass)
{
int regnum = tdep->ppc_gp0_regnum + greg;
regcache->cooked_write (regnum + 0, elval + 0);
regcache->cooked_write (regnum + 1, elval + 4);
}
greg += 2;
}
}
else
{
gdb_byte word[PPC_MAX_REGISTER_SIZE];
store_unsigned_integer (word, tdep->wordsize, byte_order,
unpack_long (eltype, elval));
if (greg <= 10)
{
if (write_pass)
regcache->cooked_write (tdep->ppc_gp0_regnum + greg,
word);
greg++;
}
else
{
argoffset = align_up (argoffset, tdep->wordsize);
if (write_pass)
write_memory (sp + argoffset, word, tdep->wordsize);
argoffset += tdep->wordsize;
}
}
}
}
else if (len >= 16
&& type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& opencl_abi)
{
/* OpenCL vectors 16 bytes or longer are passed as if
a series of AltiVec vectors. */
int i;
for (i = 0; i < len / 16; i++)
{
const gdb_byte *elval = val + i * 16;
if (vreg <= 13)
{
if (write_pass)
regcache->cooked_write (tdep->ppc_vr0_regnum + vreg,
elval);
vreg++;
}
else
{
argoffset = align_up (argoffset, 16);
if (write_pass)
write_memory (sp + argoffset, elval, 16);
argoffset += 16;
}
}
}
else if (len == 16
&& ((type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& tdep->vector_abi == POWERPC_VEC_ALTIVEC)
|| (type->code () == TYPE_CODE_FLT
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ieee_quad))))
{
/* Vector parameter passed in an Altivec register, or
when that runs out, 16 byte aligned stack location.
IEEE FLOAT 128-bit also passes parameters in vector
registers. */
if (vreg <= 13)
{
if (write_pass)
regcache->cooked_write (tdep->ppc_vr0_regnum + vreg, val);
vreg++;
}
else
{
argoffset = align_up (argoffset, 16);
if (write_pass)
write_memory (sp + argoffset, val, 16);
argoffset += 16;
}
}
else if (len == 8
&& type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& tdep->vector_abi == POWERPC_VEC_SPE)
{
/* Vector parameter passed in an e500 register, or when
that runs out, 8 byte aligned stack location. Note
that since e500 vector and general purpose registers
both map onto the same underlying register set, a
"greg" and not a "vreg" is consumed here. A cooked
write stores the value in the correct locations
within the raw register cache. */
if (greg <= 10)
{
if (write_pass)
regcache->cooked_write (tdep->ppc_ev0_regnum + greg, val);
greg++;
}
else
{
argoffset = align_up (argoffset, 8);
if (write_pass)
write_memory (sp + argoffset, val, 8);
argoffset += 8;
}
}
else
{
/* Reduce the parameter down to something that fits in a
"word". */
gdb_byte word[PPC_MAX_REGISTER_SIZE];
memset (word, 0, PPC_MAX_REGISTER_SIZE);
if (len > tdep->wordsize
|| type->code () == TYPE_CODE_STRUCT
|| type->code () == TYPE_CODE_UNION)
{
/* Structs and large values are put in an
aligned stack slot ... */
if (type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& len >= 16)
structoffset = align_up (structoffset, 16);
else
structoffset = align_up (structoffset, 8);
if (write_pass)
write_memory (sp + structoffset, val, len);
/* ... and then a "word" pointing to that address is
passed as the parameter. */
store_unsigned_integer (word, tdep->wordsize, byte_order,
sp + structoffset);
structoffset += len;
}
else if (type->code () == TYPE_CODE_INT)
/* Sign or zero extend the "int" into a "word". */
store_unsigned_integer (word, tdep->wordsize, byte_order,
unpack_long (type, val));
else
/* Always goes in the low address. */
memcpy (word, val, len);
/* Store that "word" in a register, or on the stack.
The words have "4" byte alignment. */
if (greg <= 10)
{
if (write_pass)
regcache->cooked_write (tdep->ppc_gp0_regnum + greg, word);
greg++;
}
else
{
argoffset = align_up (argoffset, tdep->wordsize);
if (write_pass)
write_memory (sp + argoffset, word, tdep->wordsize);
argoffset += tdep->wordsize;
}
}
}
/* Compute the actual stack space requirements. */
if (!write_pass)
{
/* Remember the amount of space needed by the arguments. */
argspace = argoffset;
/* Allocate space for both the arguments and the structures. */
sp -= (argoffset + structoffset);
/* Ensure that the stack is still 16 byte aligned. */
sp = align_down (sp, 16);
}
/* The psABI says that "A caller of a function that takes a
variable argument list shall set condition register bit 6 to
1 if it passes one or more arguments in the floating-point
registers. It is strongly recommended that the caller set the
bit to 0 otherwise..." Doing this for normal functions too
shouldn't hurt. */
if (write_pass)
{
ULONGEST cr;
regcache_cooked_read_unsigned (regcache, tdep->ppc_cr_regnum, &cr);
if (freg > 1)
cr |= 0x02000000;
else
cr &= ~0x02000000;
regcache_cooked_write_unsigned (regcache, tdep->ppc_cr_regnum, cr);
}
}
/* Update %sp. */
regcache_cooked_write_signed (regcache, gdbarch_sp_regnum (gdbarch), sp);
/* Write the backchain (it occupies WORDSIZED bytes). */
write_memory_signed_integer (sp, tdep->wordsize, byte_order, saved_sp);
/* Point the inferior function call's return address at the dummy's
breakpoint. */
regcache_cooked_write_signed (regcache, tdep->ppc_lr_regnum, bp_addr);
return sp;
}
/* Handle the return-value conventions for Decimal Floating Point values. */
static enum return_value_convention
get_decimal_float_return_value (struct gdbarch *gdbarch, struct type *valtype,
struct regcache *regcache, gdb_byte *readbuf,
const gdb_byte *writebuf)
{
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
gdb_assert (valtype->code () == TYPE_CODE_DECFLOAT);
/* 32-bit and 64-bit decimal floats in f1. */
if (valtype->length () <= 8)
{
if (writebuf != NULL)
{
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
const gdb_byte *p;
/* 32-bit decimal float is right aligned in the doubleword. */
if (valtype->length () == 4)
{
memcpy (regval + 4, writebuf, 4);
p = regval;
}
else
p = writebuf;
regcache->cooked_write (tdep->ppc_fp0_regnum + 1, p);
}
if (readbuf != NULL)
{
regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
/* Left align 32-bit decimal float. */
if (valtype->length () == 4)
memcpy (readbuf, readbuf + 4, 4);
}
}
/* 128-bit decimal floats in f2,f3. */
else if (valtype->length () == 16)
{
if (writebuf != NULL || readbuf != NULL)
{
int i;
for (i = 0; i < 2; i++)
{
if (writebuf != NULL)
regcache->cooked_write (tdep->ppc_fp0_regnum + 2 + i,
writebuf + i * 8);
if (readbuf != NULL)
regcache->cooked_read (tdep->ppc_fp0_regnum + 2 + i,
readbuf + i * 8);
}
}
}
else
/* Can't happen. */
internal_error (_("Unknown decimal float size."));
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* Handle the return-value conventions specified by the SysV 32-bit
PowerPC ABI (including all the supplements):
no floating-point: floating-point values returned using 32-bit
general-purpose registers.
Altivec: 128-bit vectors returned using vector registers.
e500: 64-bit vectors returned using the full full 64 bit EV
register, floating-point values returned using 32-bit
general-purpose registers.
GCC (broken): Small struct values right (instead of left) aligned
when returned in general-purpose registers. */
static enum return_value_convention
do_ppc_sysv_return_value (struct gdbarch *gdbarch, struct type *func_type,
struct type *type, struct regcache *regcache,
gdb_byte *readbuf, const gdb_byte *writebuf,
int broken_gcc)
{
ppc_gdbarch_tdep *tdep = gdbarch_tdep<ppc_gdbarch_tdep> (gdbarch);
enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
int opencl_abi = func_type? ppc_sysv_use_opencl_abi (func_type) : 0;
gdb_assert (tdep->wordsize == 4);
if (type->code () == TYPE_CODE_FLT
&& type->length () <= 8
&& !tdep->soft_float)
{
if (readbuf)
{
/* Floats and doubles stored in "f1". Convert the value to
the required type. */
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch,
tdep->ppc_fp0_regnum + 1);
regcache->cooked_read (tdep->ppc_fp0_regnum + 1, regval);
target_float_convert (regval, regtype, readbuf, type);
}
if (writebuf)
{
/* Floats and doubles stored in "f1". Convert the value to
the register's "double" type. */
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch, tdep->ppc_fp0_regnum);
target_float_convert (writebuf, type, regval, regtype);
regcache->cooked_write (tdep->ppc_fp0_regnum + 1, regval);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->code () == TYPE_CODE_FLT
&& type->length () == 16
&& !tdep->soft_float
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
{
/* IBM long double stored in f1 and f2. */
if (readbuf)
{
regcache->cooked_read (tdep->ppc_fp0_regnum + 1, readbuf);
regcache->cooked_read (tdep->ppc_fp0_regnum + 2, readbuf + 8);
}
if (writebuf)
{
regcache->cooked_write (tdep->ppc_fp0_regnum + 1, writebuf);
regcache->cooked_write (tdep->ppc_fp0_regnum + 2, writebuf + 8);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->length () == 16
&& ((type->code () == TYPE_CODE_FLT
&& (gdbarch_long_double_format (gdbarch)
== floatformats_ibm_long_double))
|| (type->code () == TYPE_CODE_DECFLOAT && tdep->soft_float)))
{
/* Soft-float IBM long double or _Decimal128 stored in r3, r4,
r5, r6. */
if (readbuf)
{
regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf);
regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
}
if (writebuf)
{
regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf);
regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if ((type->code () == TYPE_CODE_INT && type->length () == 8)
|| (type->code () == TYPE_CODE_FLT && type->length () == 8)
|| (type->code () == TYPE_CODE_DECFLOAT && type->length () == 8
&& tdep->soft_float))
{
if (readbuf)
{
/* A long long, double or _Decimal64 stored in the 32 bit
r3/r4. */
regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
}
if (writebuf)
{
/* A long long, double or _Decimal64 stored in the 32 bit
r3/r4. */
regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->code () == TYPE_CODE_DECFLOAT && !tdep->soft_float)
return get_decimal_float_return_value (gdbarch, type, regcache, readbuf,
writebuf);
else if ((type->code () == TYPE_CODE_INT
|| type->code () == TYPE_CODE_CHAR
|| type->code () == TYPE_CODE_BOOL
|| type->code () == TYPE_CODE_PTR
|| TYPE_IS_REFERENCE (type)
|| type->code () == TYPE_CODE_ENUM)
&& type->length () <= tdep->wordsize)
{
if (readbuf)
{
/* Some sort of integer stored in r3. Since TYPE isn't
bigger than the register, sign extension isn't a problem
- just do everything unsigned. */
ULONGEST regval;
regcache_cooked_read_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
®val);
store_unsigned_integer (readbuf, type->length (), byte_order,
regval);
}
if (writebuf)
{
/* Some sort of integer stored in r3. Use unpack_long since
that should handle any required sign extension. */
regcache_cooked_write_unsigned (regcache, tdep->ppc_gp0_regnum + 3,
unpack_long (type, writebuf));
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* OpenCL vectors < 16 bytes are returned as distinct
scalars in f1..f2 or r3..r10. */
if (type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& type->length () < 16
&& opencl_abi)
{
struct type *eltype = check_typedef (type->target_type ());
int i, nelt = type->length () / eltype->length ();
for (i = 0; i < nelt; i++)
{
int offset = i * eltype->length ();
if (eltype->code () == TYPE_CODE_FLT)
{
int regnum = tdep->ppc_fp0_regnum + 1 + i;
gdb_byte regval[PPC_MAX_REGISTER_SIZE];
struct type *regtype = register_type (gdbarch, regnum);
if (writebuf != NULL)
{
target_float_convert (writebuf + offset, eltype,
regval, regtype);
regcache->cooked_write (regnum, regval);
}
if (readbuf != NULL)
{
regcache->cooked_read (regnum, regval);
target_float_convert (regval, regtype,
readbuf + offset, eltype);
}
}
else
{
int regnum = tdep->ppc_gp0_regnum + 3 + i;
ULONGEST regval;
if (writebuf != NULL)
{
regval = unpack_long (eltype, writebuf + offset);
regcache_cooked_write_unsigned (regcache, regnum, regval);
}
if (readbuf != NULL)
{
regcache_cooked_read_unsigned (regcache, regnum, ®val);
store_unsigned_integer (readbuf + offset,
eltype->length (), byte_order,
regval);
}
}
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
/* OpenCL vectors >= 16 bytes are returned in v2..v9. */
if (type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& type->length () >= 16
&& opencl_abi)
{
int n_regs = type->length () / 16;
int i;
for (i = 0; i < n_regs; i++)
{
int offset = i * 16;
int regnum = tdep->ppc_vr0_regnum + 2 + i;
if (writebuf != NULL)
regcache->cooked_write (regnum, writebuf + offset);
if (readbuf != NULL)
regcache->cooked_read (regnum, readbuf + offset);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->length () == 16
&& type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& tdep->vector_abi == POWERPC_VEC_ALTIVEC)
{
if (readbuf)
{
/* Altivec places the return value in "v2". */
regcache->cooked_read (tdep->ppc_vr0_regnum + 2, readbuf);
}
if (writebuf)
{
/* Altivec places the return value in "v2". */
regcache->cooked_write (tdep->ppc_vr0_regnum + 2, writebuf);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->length () == 16
&& type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& tdep->vector_abi == POWERPC_VEC_GENERIC)
{
/* GCC -maltivec -mabi=no-altivec returns vectors in r3/r4/r5/r6.
GCC without AltiVec returns them in memory, but it warns about
ABI risks in that case; we don't try to support it. */
if (readbuf)
{
regcache->cooked_read (tdep->ppc_gp0_regnum + 3, readbuf + 0);
regcache->cooked_read (tdep->ppc_gp0_regnum + 4, readbuf + 4);
regcache->cooked_read (tdep->ppc_gp0_regnum + 5, readbuf + 8);
regcache->cooked_read (tdep->ppc_gp0_regnum + 6, readbuf + 12);
}
if (writebuf)
{
regcache->cooked_write (tdep->ppc_gp0_regnum + 3, writebuf + 0);
regcache->cooked_write (tdep->ppc_gp0_regnum + 4, writebuf + 4);
regcache->cooked_write (tdep->ppc_gp0_regnum + 5, writebuf + 8);
regcache->cooked_write (tdep->ppc_gp0_regnum + 6, writebuf + 12);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->length () == 8
&& type->code () == TYPE_CODE_ARRAY
&& type->is_vector ()
&& tdep->vector_abi == POWERPC_VEC_SPE)
{
/* The e500 ABI places return values for the 64-bit DSP types
(__ev64_opaque__) in r3. However, in GDB-speak, ev3
corresponds to the entire r3 value for e500, whereas GDB's r3
only corresponds to the least significant 32-bits. So place
the 64-bit DSP type's value in ev3. */
if (readbuf)
regcache->cooked_read (tdep->ppc_ev0_regnum + 3, readbuf);
if (writebuf)
regcache->cooked_write (tdep->ppc_ev0_regnum + 3, writebuf);
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (broken_gcc && type->length () <= 8)
{
/* GCC screwed up for structures or unions whose size is less
than or equal to 8 bytes.. Instead of left-aligning, it
right-aligns the data into the buffer formed by r3, r4. */
gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
int len = type->length ();
int offset = (2 * tdep->wordsize - len) % tdep->wordsize;
if (readbuf)
{
regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (len > tdep->wordsize)
regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
memcpy (readbuf, regvals + offset, len);
}
if (writebuf)
{
memset (regvals, 0, sizeof regvals);
memcpy (regvals + offset, writebuf, len);
regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (len > tdep->wordsize)
regcache->cooked_write (tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
}
return RETURN_VALUE_REGISTER_CONVENTION;
}
if (type->length () <= 8)
{
if (readbuf)
{
/* This matches SVr4 PPC, it does not match GCC. */
/* The value is right-padded to 8 bytes and then loaded, as
two "words", into r3/r4. */
gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
regcache->cooked_read (tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);
if (type->length () > tdep->wordsize)
regcache->cooked_read (tdep->ppc_gp0_regnum + 4,
regvals + 1 * tdep->wordsize);
memcpy (readbuf, regvals, type->length ());
}
if (writebuf)
{
/* This matches SVr4 PPC, it does not match GCC. */
/* The value is padded out to 8 bytes and then loaded, as
two "words" into r3/r4. */
gdb_byte regvals[PPC_MAX_REGISTER_SIZE * 2];
memset (regvals, 0, sizeof regvals);
memcpy (regvals, writebuf, type->length ());
regcache->cooked_write (tdep->ppc_gp0_regnum + 3,
regvals + 0 * tdep->wordsize);