From f1fb55f5fdc4bf43f4a83f15bc601d2ba9b06329 Mon Sep 17 00:00:00 2001 From: ZhenghuaMa Date: Thu, 25 Jul 2024 11:53:44 -0700 Subject: [PATCH] Minimize flushing cache --- deepsocflow/c/runtime.h | 6 +++--- run/work/config_tb.svh | 4 ++-- run/work/hardware.json | 4 ++-- 3 files changed, 7 insertions(+), 7 deletions(-) diff --git a/deepsocflow/c/runtime.h b/deepsocflow/c/runtime.h index bdb06a7..09d0b7d 100644 --- a/deepsocflow/c/runtime.h +++ b/deepsocflow/c/runtime.h @@ -122,8 +122,7 @@ static inline void print_output () { } static inline void write_flush_u8(u8*restrict addr, u8 val) { - *addr = val; - flush_cache(addr, 1); + *addr = val; // Leave flushing to the end of bundle } #define flatten_nhwc(in,ih,iw,ic, N,H,W,C, optional_debug_info,...)\ @@ -312,7 +311,7 @@ extern EXT_C u8 model_run() { while (!get_config(A_DONE_WRITE + ocm_bank)){ // in FPGA, wait for write done }; - flush_cache(&ocm[ocm_bank], PE_ROWS*PE_COLS*sizeof(Y_TYPE)) ; + flush_cache(&ocm[ocm_bank], o_bpt); usleep(0); #endif set_config(A_DONE_WRITE + ocm_bank, 0); @@ -538,6 +537,7 @@ extern EXT_C u8 model_run() { fclose(fp_packed); } #endif + flush_cache(p_out_buffer, pb->o_bytes); set_config(A_BUNDLE_DONE, 1); } // ib debug_printf("done all bundles!!\n"); diff --git a/run/work/config_tb.svh b/run/work/config_tb.svh index 641b9e5..d4cf904 100644 --- a/run/work/config_tb.svh +++ b/run/work/config_tb.svh @@ -1,6 +1,6 @@ -`define VALID_PROB 10 -`define READY_PROB 100 +`define VALID_PROB 1000 +`define READY_PROB 1000 `define CLK_PERIOD 4.0 `define INPUT_DELAY_NS 0.8ns `define OUTPUT_DELAY_NS 0.8ns diff --git a/run/work/hardware.json b/run/work/hardware.json index 8e1096c..0ee519a 100644 --- a/run/work/hardware.json +++ b/run/work/hardware.json @@ -21,7 +21,7 @@ "axi_max_burst_len": 16, "target_cpu_int_bits": 32, "async_resetn": true, - "valid_prob": 0.01, - "ready_prob": 0.1, + "valid_prob": 1, + "ready_prob": 1, "data_dir": "vectors" } \ No newline at end of file