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In order to route to the IO pins, the router is creating vias on all of the IO routes. These vias create a lot of vertical area in the cell because they don't stack up well horizontally.
Preferred Solution
Create constraints to force the vias to stack horizontally. This would greatly improve the final cell height.
The text was updated successfully, but these errors were encountered:
Related Problem
In order to route to the IO pins, the router is creating vias on all of the IO routes. These vias create a lot of vertical area in the cell because they don't stack up well horizontally.
Preferred Solution
Create constraints to force the vias to stack horizontally. This would greatly improve the final cell height.
The text was updated successfully, but these errors were encountered: