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I'm trying to compact the following instructions into a single instruction. However, the big problem is how to do this without directly using VHDL. There is an OpenAsip graphical tool that performs this process. I was trying to use Dag but I can't specify which record each addi result will contain ?
OSAL is used for describing operation semantics, which means that it does not really have visibility to the architectural state, such as the register file. Instead, you must define the operation semantics with operands but the operation description does not really have visibility where these operands come from, be it an immediate or a register file value.
I'm trying to compact the following instructions into a single instruction. However, the big problem is how to do this without directly using VHDL. There is an OpenAsip graphical tool that performs this process. I was trying to use Dag but I can't specify which record each addi result will contain ?
Addi x10, x0 , 0;
Addi x11,x10,0
Addi x26, x0, 0
Addi x8,x0, 0
Addi x8,x0, 0
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