ASSEMBLY_REMINDER.txt

****x86-64Bit ASSEMBLY LANGUAGE ****

[ASSEMBLY LANGUAGE]
* low level language. machine code.
* direct access to hardware.
* applications: debugging, operating system, device driver, memory protection, context switch, ...
* assembling: Source File >> Assembler >> Object File >> Linker >> Executable File
* source contents: Include, Section (Data, Text), Global (CMAIN), Label, Mnemonic, Operand, Comment
* operand: register, memory, value
* naming: {starts with letters, _ or ?}  {continues with letters, numbers, _ # ? ~}

[COMPUTER ARCHITECTURE]
Computer = CPU + Memory + I/O Devices + System Bus
CPU: Registers + Control Unit + Arihmetic Logic Unit
Memory: RAM + Harddisk + SSD + BIOS + ...
I/O Devices: Keyboard, Mouse, Monitor, Speaker, Microphone, ...
System Bus: Main Board

[MEMORY]
* Address + Content
* Content: BYTE (8-Bit, db, byte), WORD (16-Bit, dw, word), DWORD (32-Bit, dd, dword), QWORD (64-Bit, dq, qword)
* Allocation
   - section .data
   - name size value
   - size: db, dw, dd, dq
* Reference
   - section .text
   - size[name] 
   - size: byte, word, dword, qword

[IA-32e MODE]
* 64-Bit Mode
   - 64-Bit Programs
   - 16 General Purpose Registers 
   - 64-Bit Registers (RAX, RBX, RCX, RDX, RSI, RDI, R8, R9, R10, R11, R12, R13, R14, R15, RBP, RSP)
   - 32-Bit Segments (EAX, EBX, ECX, EDX, ESI, EDI, R8/15D, EBP, ESP)
   - 16-Bit Segments (AX, BX, CX, DX, SI, DI, R8/15W, BP, SP)
   - 8-Bit Segments (AH, AL, BH, BL, CH, CL, DH, DL, SIL, DIL, R8/15B, BPL, SPL)
   - Flag Register (RFLAG)
   - 64-Bit Instruction Pointer (RIP)
   - 48-Bit Virtual Address Support 
   - RAX >> EAX >> AX >> AH/AL (64-Bit >> 32-Bit >> 16-Bit >> 8-Bit)
* Compatibility Mode
   - 16-Bit/32-Bit Programs

[DECIMAL]
{0 1 2 3 4 5 6 7 8 9}
357 = 3x10^2 + 5x10^1 + 7x10^0

[BINARY]
{0 1}
1000 1001b >> 1x2^0 + 0x2^1 + 0x2^2 + 1x2^3 + 0x2^4 + 0x2^5 + 0x2^6 + 1x2^7 = 137 (Binary to Decimal)

[HEXADECIMAL]
{0 1 2 3 4 5 6 7 8 9 A B C D E F}
0x2AF >> 16^0 x F + 16^1 x A + 16^2 x 2 = 687 (Hexadecimal to Decimal)
0010 1000 1001b >> 0x289 (Binary to Hexadecimal)

[UNSIGNED NUMBERS]
N-bits represents 2^N - 1 numbers.

[SIGNED NUMBERS]
N-bits represents 2^(N-1) - 1 positive numbers and 2^(N-1) negative numbers. 
the most significant bit is sign bit. 1 negative, 0 positive.
two's complement: 1010 1000 >> 0101 0111 + 1 >> 0101 1000 >> -88 (-2^(N-1) to 2^(N-1)-1)

[INSTRUCTIONS]
* memory to memory transfer is not possible for any instruction.
* destination and source sizes must be same.
* no operand instruction: instruction
* one operand instruction: instruction operand (reg, mem)
* two operand instruction: instruction destination, source (reg-reg, reg-mem, reg-val, mem-reg, mem-val)
* Instructions: MOV, PUSH, POP, PUSHA, POPA, PUSHAD, POPAD, CALL, ADD, SUB, XCHG, XOR, CMP, INC, DEC, NEG, AND, OR, XOR, NOT, 
TEST, JMP, JZ, JNZ, JC, JNC, JO, JNO, JS, JNS, CMP, JE, JNE, JA, JAE, JB, JBE, JNA, JNAE, JNB, JNBE, JG, JGE, JL, JLE, JNG, 
JNGE, JNL, JNLE, MUL, IMUL, DIV, IDIV, CBW, CWD, CDQ, CQO, SHL, SAL, SHR, SAR, ROL, RCL, ROR, RCR, CLC, STC, MOVSB, MOVSW, 
MOVSD, MOVSQ, STOSB, STOSW, STOSD, STOSQ, LODSB, LODSW, LODSD, LODSQ, SCASB, SCASW, SCASD, SCASQ, CMPSB, CMPSW, CMPSD, CMPSQ, 
CLD, STD, LOOP, REP, REPNE, REPE
* Directives: DB (data byte), DW (data word), DD (data two word), DQ (data four word), SECTION (.DATA, .TEXT), %INCLUDE (library), 
EQU (equal to), TIMES (multiply), GLOBAL (program entry label), $-(length of array), .LABEL (local label), EXTERN (import standart function), 
%DEFINE (single-line macro), %MACRO/%ENDMACRO (multi-line macro), .NOLIST (no listing)
* Input-Output Macros: PRINT_DEC, PRINT_UDEC, PRINT_HEX, PRINT_STRING, NEWLINE, GET_DEC, GET_UDEC, GET_HEX, GET_STRING
* XCHG reg-reg, reg-mem, mem-reg (Exchange)

[BRANCHING]

[Unconditional Branching]
* JMP label, reg, mem

[Conditional Branching]
* TEST reg-reg, reg-mem, reg-val, mem-reg, mem-val (AND)
* JZ: jump if ZF set
* JNZ: jump if ZF is not set
* JC: jump if CF set
* JNC: jump if CF not set
* JO: jump if OF set
* JNO: jump if OF not set
* JS: jump if SF set
* JNS: jump if SF not set

[Comparision Branching]
*CMP reg-reg, reg-mem, reg-val, mem-reg, mem-val (SUBTRACT)
* JE (equal) (=) 
* JNE (not equal) (!=)

[Unsigned Number Comparision Branching]
* JA (above) = JNBE (not below or equal) ( > )
* JAE (above or equal) = JNB (not below) ( >= )
* JB (below) = JNAE (not above or equal) ( < )
* JBE (below or equal) = JNA (not above) ( <= )

[Signed Number Comparision Branching]
* JG (greater) = JNLE (not less or equal) ( > )
* JGE (greater or equal) = JNL (not less) ( >= )
* JL (less) = JNGE (not greater or equal) ( < )
* JLE (less or equal) = JNG (not greater) ( <= )

[ARRAY]
[base + index*scale + displacement]
base : base address
index: index number
scale: 1, 2, 4, 8 (byte, word, dword, qword)
displacement: offset from index (zero: direct addressing, non-zero: indirect addressing)

[Two-Dimensional Array]
* Row Major
* Column Major

[Addressing Modes]
* Immediate: mov rax, 20
* Register: mov rax, rbx
* Direct: mov rax, [0x100] / mov al, [array+4] / base+index*scale
* Indirect: [base+index*scale+displacement]
* Rip-Relative: default rel, [rel data]

[Endiannes]
* Little Endian Order: storing in memory starts with least significant byte of data. RAM.
* Big Endian Order: storing in memory starts with most significant byte of data. Network.

[MULTIPLICATION]
* Unsigned Multiplication: mul multiplier
* Multipliers: reg, mem
* Multiplicand: 8-bit: al, 16-bit: ax,  32-bit: eax, 64-bit: rax
* Product: 8-bit: ah al, 16-bit: dx ax,  32-bit: edx eax, 64-bit: rdx rax

* Signed Multiplication:
   - one-operand: imul reg, mem (rax)
   - two-operand: imul reg-val, reg-reg, reg-mem (rax)
   - three-operand: imul reg-reg-val, reg-mem-val (reg)

[DIVISION]
* Unsigned Division: div divisor
* Divisors: reg, mem
* Dividend: 8-bit: ax, 16-bit: dx ax,  32-bit: edx eax, 64-bit: rdx rax
* Quotient: 8-bit: al, 16-bit: ax,  32-bit: eax, 64-bit: rax
* Remainder: 8-bit: ah, 16-bit: dx,  32-bit: edx, 64-bit: rdx

* Signed Division: idiv
* Signed Extension Conversion
   - cbw: byte to word
   - cwd: word to double word
   - cdq: double word to quad word
   - cqo: quad word to octa word

[BITWISE]
* Logical Shift Left: shl reg-val, reg-cl, mem-val, mem-cl
   - CF is set if left-most bit is 1 before shift.
* Arithmetic Shift Left: sal
* Logical Shift Right: shr reg-val, reg-cl, mem-val, mem-cl 
   - CF is set if right-most bit is 1 before shift.
   - left-most bit will be 1 after shift if previous one is 1, otherwise 0.
* Arithmetic Shift Right: sar

[ROTATE]
* Rotate Left: rol reg-val, reg-cl, mem-val, mem-cl
   - left-most bit to right-most bit.
   - CF is set if left-most bit is 1.
* Rotate Carry Left: rcl reg-val, reg-cl, mem-val, mem-cl
   - left-most bit to CF, CF to right-most bit.
* Rotate Right: ror reg-val, reg-cl, mem-val, mem-cl
   - right-most bit to left-most bit.
   - CF is set if right-most bit is 1.
* Rotate Carry Right: rcr reg-val, reg-cl, mem-val, mem-cl
   - right-most bit to CF, CF to left-most bit.

[CARRY FLAG]
* Clear Carry: clc
* Set Carry: stc

[DIRECTION FLAG]
* Clear DF: cld (from beginning to end of array, increment rsi/rdi)
* Set DF: std (from end to beginning of array, decrement rsi/rdi)

[LOOP]
* loop label (jump to label if until rcx is zero)

[REPEAT]
* rep: repeat while rcx >= 0.
* repne: repeat while rcx > 0.
* repe: repeat while  rcx > 0 and ZF = 1

[STRINGS]
* MOVE: move elements in source array to destination array.
   - movsb, movsw, movsd, movsq
   - rsi: source
   - rdi: destination
   - rcx: length
   - DF 0: increment (cld)
   - DF 1: decrement (std)
* Store: store element in register to destination array.
   - stosb, stosw, stosd, stosq
   - rdi: destination
   - rax: value to store (al, ax, eax, rax)
   - rcx: length
* Load: load element in source array to register.
   - lodsb, lodsw, lodsd, lodsq
   - source: rsi
   - destination: rax (al, ax, eax, rax)
   - rcx: length
* Scan: search element stored in register in source array.
   - scasb, scasw, scasd, scasq
   - rdi: source
   - rax: value to search (al, ax, eax, rax)
   - rcx: length
   - ZF 1 if found, 0 if not found.
* Compare: compare element in source1 array with source2 array.
   - cmpsb, cmpsw, cmpsd, cmpsq
   - source1: rsi
   - source2. rdi
   - rcx: length
   - ZF 1 if equal, 0 if not equal.

[STACK]
* Last In First Out (LIFO)
* push: insert data on top of stack. decrement rsp. reg, mem, val.
* pop: fetch data from top of stack. increment rsp. reg, mem.
* rsp: register that holds current position in stack. stack pointer.
* stack frame: parameters, return address, saved registers, local variables

[PROCEDURE]
* call procedure: jump to procedure. label, reg, mem.
* ret: return from procedure where it is called. rsp holds the return address where procedure is lastly called.
* pop data pushed into stack in procedure before ret. rsp holds return address.
* local variables: save rsp in rbp temporarily for storing local variables on stack at the end of procedure pop rbp.

[CALLING CONVENTIONS]
* Microsoft x64 Calling Convention
   - first 4 parameters: rcx, rdx, r8, r9
   - others are on the stack
   - return value: rax
   - caller saved registers: rax, rcx, rdx, r8, r9, r10, r11. volatile. they can be altered by caller. so store them on stack before call.
   - caller: procedure which calls other procedure. 
   - callee saved registers: rbx, rbp, rdi, rsi, r12, r13, r14, r15. non volatile. must be preserved by procedures. 
   - callee: procedure which is called from other procedure.
   - rsp is aligned 16 byte boundary.
   - 32 bytes of shadow space for register parameters need to be allocated on the stack by caller before call.
   - caller must clean up stack. allocated parameters and shadow space.
Stack Frame
   - first 4 parameters: rcx, rdx, r8, r9
   - current function: local variables + saved registers + old rbp + ret address
   - calling function: bytes + 32 + space + shadow + 5th param + ...
* System V AMD64 ABI Calling Convention