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⚠️ This project has moved to a dedicated repository: https://github.com/open-ephys/onix-breakout This folder should be considered archived.

ONIX Breakout Board

This board allows bench access to the IO provided by the fmc-host board. It features:

  • 4x headstage ports, each with a power switch
  • 3x, passive, high-seed clock feed throughs
  • BNC, IDC (ribbon), or direct wire access to 12 analog inputs or outputs
  • IDC (ribbon) or direct wire access to 8 digital outputs and 8 digital inpouts
  • 6 buttons for marking experimental events
  • 41 state-indication LEDs
  • Full-speed, USB 2.0 access to the onboard TinyFPGA BX for communication, programming, and customization
  • HARP bus
  • Rugged M6 or 1/4-20 mounting options compliant with 19" racks and optical tables
  • Fully open-source gateware and use of fully open-source FPGA toolchain (yosys & nextpnr)

Documentation

Documentation can be found here