diff --git a/compiler/src/iree/compiler/Codegen/Common/BUILD.bazel b/compiler/src/iree/compiler/Codegen/Common/BUILD.bazel index 186cffbb02f0..aaa4ad3e4f99 100644 --- a/compiler/src/iree/compiler/Codegen/Common/BUILD.bazel +++ b/compiler/src/iree/compiler/Codegen/Common/BUILD.bazel @@ -100,6 +100,7 @@ iree_compiler_cc_library( "DecomposeLinalgGeneric.cpp", "DecomposePackUnPackOps.cpp", "DecomposeSoftmax.cpp", + "DropVectorUnitDims.cpp", "EmulateNarrowType.cpp", "EncodingUtils.cpp", "EraseDeadAllocAndStores.cpp", diff --git a/compiler/src/iree/compiler/Codegen/Common/CMakeLists.txt b/compiler/src/iree/compiler/Codegen/Common/CMakeLists.txt index 4f3bf1e2afed..d828e083cf5d 100644 --- a/compiler/src/iree/compiler/Codegen/Common/CMakeLists.txt +++ b/compiler/src/iree/compiler/Codegen/Common/CMakeLists.txt @@ -92,6 +92,7 @@ iree_cc_library( "DecomposeLinalgGeneric.cpp" "DecomposePackUnPackOps.cpp" "DecomposeSoftmax.cpp" + "DropVectorUnitDims.cpp" "EmulateNarrowType.cpp" "EncodingUtils.cpp" "EraseDeadAllocAndStores.cpp" diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUDropVectorUnitDims.cpp b/compiler/src/iree/compiler/Codegen/Common/DropVectorUnitDims.cpp similarity index 73% rename from compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUDropVectorUnitDims.cpp rename to compiler/src/iree/compiler/Codegen/Common/DropVectorUnitDims.cpp index b27d0f0d7afd..4cdcc3a9d4c0 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/LLVMCPUDropVectorUnitDims.cpp +++ b/compiler/src/iree/compiler/Codegen/Common/DropVectorUnitDims.cpp @@ -4,26 +4,25 @@ // See https://llvm.org/LICENSE.txt for license information. // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception -#include "iree/compiler/Codegen/LLVMCPU/Passes.h" +#include "iree/compiler/Codegen/Common/Passes.h" #include "mlir/Dialect/Vector/Transforms/LoweringPatterns.h" #include "mlir/Dialect/Vector/Transforms/VectorTransforms.h" #include "mlir/Pass/Pass.h" #include "mlir/Transforms/GreedyPatternRewriteDriver.h" -#define DEBUG_TYPE "iree-llvmcpu-drop-vector-unit-dims" +#define DEBUG_TYPE "iree-codegen-drop-vector-unit-dims" namespace mlir::iree_compiler { -#define GEN_PASS_DEF_LLVMCPUDROPVECTORUNITDIMSPASS -#include "iree/compiler/Codegen/LLVMCPU/Passes.h.inc" +#define GEN_PASS_DEF_DROPVECTORUNITDIMSPASS +#include "iree/compiler/Codegen/Common/Passes.h.inc" namespace { -class LLVMCPUDropVectorUnitDimsPass - : public impl::LLVMCPUDropVectorUnitDimsPassBase< - LLVMCPUDropVectorUnitDimsPass> { +class DropVectorUnitDimsPass + : public impl::DropVectorUnitDimsPassBase { public: - using impl::LLVMCPUDropVectorUnitDimsPassBase< - LLVMCPUDropVectorUnitDimsPass>::LLVMCPUDropVectorUnitDimsPassBase; + using impl::DropVectorUnitDimsPassBase< + DropVectorUnitDimsPass>::DropVectorUnitDimsPassBase; void getDependentDialects(DialectRegistry ®istry) const override { registry.insert(); @@ -31,7 +30,7 @@ class LLVMCPUDropVectorUnitDimsPass void runOnOperation() override; }; -void LLVMCPUDropVectorUnitDimsPass::runOnOperation() { +void DropVectorUnitDimsPass::runOnOperation() { MLIRContext *ctx = &getContext(); auto funcOp = getOperation(); diff --git a/compiler/src/iree/compiler/Codegen/Common/Passes.td b/compiler/src/iree/compiler/Codegen/Common/Passes.td index 7d912f8a445c..385a7eb89cc7 100644 --- a/compiler/src/iree/compiler/Codegen/Common/Passes.td +++ b/compiler/src/iree/compiler/Codegen/Common/Passes.td @@ -79,6 +79,12 @@ def ConvertToDestinationPassingStylePass : ]; } +def ConvolutionToIGEMMPass : + InterfacePass<"iree-codegen-convolution-to-igemm", "mlir::FunctionOpInterface"> { + let summary = + "Transforms convolution operations into an implicit GEMM format."; +} + def DecomposeAffineOpsPass: Pass<"iree-codegen-decompose-affine-ops"> { let summary = "Decompose `affine.apply` operations into sub `affine.apply`"; let description = [{ @@ -123,12 +129,6 @@ def DecomposeAffineOpsPass: Pass<"iree-codegen-decompose-affine-ops"> { ]; } -def ConvolutionToIGEMMPass : - InterfacePass<"iree-codegen-convolution-to-igemm", "mlir::FunctionOpInterface"> { - let summary = - "Transforms convolution operations into an implicit GEMM format."; -} - def DecomposeConvolutionToLowerDimOpsPass : Pass<"iree-codegen-decompose-convolution-to-lower-dim-ops", ""> { let summary = "Decomposes linalg convolution ops to lower dim ops"; @@ -170,6 +170,11 @@ def DecomposeSoftmaxPass : ]; } +def DropVectorUnitDimsPass : + InterfacePass<"iree-codegen-drop-vector-unit-dims", "mlir::FunctionOpInterface"> { + let summary = "Pass to drop vector unit dims."; +} + def ReconcileTranslationInfoPass : Pass<"iree-codegen-reconcile-translation-info", "IREE::HAL::ExecutableVariantOp"> { let summary = diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel b/compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel index b616bf0e426f..2a96c4beb54a 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel +++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/BUILD.bazel @@ -55,7 +55,6 @@ iree_compiler_cc_library( "LLVMCPUAssignConstantOrdinals.cpp", "LLVMCPUAssignImportOrdinals.cpp", "LLVMCPUCheckIRBeforeLLVMConversion.cpp", - "LLVMCPUDropVectorUnitDims.cpp", "LLVMCPUEmitVectorizationRemarks.cpp", "LLVMCPULinkExecutables.cpp", "LLVMCPULowerExecutableTarget.cpp", diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt b/compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt index cd3f00904121..8db7e3770149 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt +++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/CMakeLists.txt @@ -56,7 +56,6 @@ iree_cc_library( "LLVMCPUAssignConstantOrdinals.cpp" "LLVMCPUAssignImportOrdinals.cpp" "LLVMCPUCheckIRBeforeLLVMConversion.cpp" - "LLVMCPUDropVectorUnitDims.cpp" "LLVMCPUEmitVectorizationRemarks.cpp" "LLVMCPULinkExecutables.cpp" "LLVMCPULowerExecutableTarget.cpp" diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp b/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp index 27edf00e2b4d..91f81569863d 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp +++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.cpp @@ -297,7 +297,7 @@ LogicalResult verifyConvTileAndDecomposeExpertConfig( void buildLLVMCPUVectorLoweringPipeline( OpPassManager &funcPassManager, const LLVMCPUVectorLoweringPassOptions &options) { - funcPassManager.addPass(createLLVMCPUDropVectorUnitDimsPass()); + funcPassManager.addPass(createDropVectorUnitDimsPass()); funcPassManager.addPass(createLLVMCPUVirtualVectorLoweringPass( LLVMCPUVirtualVectorLoweringPassOptions{options.splitVectorTransfersTo, options.enableArmI8mm})); diff --git a/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.td b/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.td index dce56665e255..c9aec6740923 100644 --- a/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.td +++ b/compiler/src/iree/compiler/Codegen/LLVMCPU/Passes.td @@ -187,11 +187,6 @@ def LLVMCPUUnfuseFMAOpsPass : let summary = "Convert llvm.fma into unfused mulf and addf ops"; } -def LLVMCPUDropVectorUnitDimsPass : - InterfacePass<"iree-llvmcpu-drop-vector-unit-dims", "mlir::FunctionOpInterface"> { - let summary = "Pass to drop vector unit dims."; -} - def LLVMCPUVirtualVectorLoweringPass : InterfacePass<"iree-llvmcpu-virtual-vector-lowering", "mlir::FunctionOpInterface"> { let summary = "Pass to lower high level vector operations like contract or multidim reduce ops to lower level vector ops.";