diff --git a/README.md b/README.md
index 69e10c1..43fe142 100644
--- a/README.md
+++ b/README.md
@@ -7,7 +7,7 @@ PMC is an open project that aims to build the quality permanent magnet
 synchronous machine (PMSM) controller for use in a variety of scopes like RC or
 electric transport.
 
-## Brief
+## Brief description
 
 PMC is ready to use in most intended applications. You can flash any supported
 third-party hardware to work with PMC or use our original hardware.
@@ -111,7 +111,7 @@ There are a few videos about PMC on [youtube](https://www.youtube.com/@romblv).
 	- Battery energy (Wh) and charge (Ah) consumed.
 	- Fuel gauge percentage.
 
-## Hardware specification (`REV5A`)
+## Hardware specification (`REV5A`, `REV5B`)
 
 - Dimension: 82mm x 55mm x 35mm.
 - Weight: 40g (PCB) or about 400g (with wires and heatsink).
diff --git a/doc/InputStepDirection.md b/doc/InputStepDirection.md
index 56cead5..0565cd5 100644
--- a/doc/InputStepDirection.md
+++ b/doc/InputStepDirection.md
@@ -8,7 +8,7 @@ The step and direction signals are fed to STEP and DIR pins.
 
 ```
 	           +---------------< STEP (or CW)
-               |    +----------< DIR (or CCW)
+	           |    +----------< DIR (or CCW)
 	           |    |    +-----> GND
 	           |    |    |
 	+----------+----+----+-------------------------+
diff --git a/phobia/link.c b/phobia/link.c
index 880369d..0d66403 100644
--- a/phobia/link.c
+++ b/phobia/link.c
@@ -14,6 +14,9 @@
 #define LINK_SPACE			" \t"
 #define LINK_EXTRA			"])"
 
+#define LINK_ALLOC_MAX			92160U
+#define LINK_CACHE_MAX			4096U
+
 enum {
 	LINK_MODE_IDLE			= 0,
 	LINK_MODE_HWINFO,
@@ -40,8 +43,10 @@ struct link_priv {
 	char			hw_build[LINK_NAME_MAX];
 	char			hw_crc32[LINK_NAME_MAX];
 
-	char			mb[81920];
+	char			mb[LINK_ALLOC_MAX];
 	char			*mbflow;
+
+	int			cache[LINK_CACHE_MAX];
 };
 
 const char *lk_stoi(int *x, const char *s)
@@ -183,13 +188,32 @@ lk_token(char **sp)
 	return r;
 }
 
+static unsigned int
+lk_hash(const char *sym)
+{
+	unsigned long		hash = 0U;
+
+	while (*sym != 0) {
+
+		hash = (hash + *sym) * 1149773U;
+		hash ^= (hash << 1) + (hash >> 4);
+
+		++sym;
+	}
+
+	hash ^= (hash << 15);
+	hash = (hash >> 16) & (LINK_CACHE_MAX - 1U);
+
+	return hash;
+}
+
 static char *
 link_mballoc(struct link_pmc *lp, int len)
 {
 	struct link_priv	*priv = lp->priv;
 	char			*mb = NULL;
 
-	if ((int) (priv->mbflow - priv->mb) < sizeof(priv->mb) - len) {
+	if ((int) (priv->mbflow - priv->mb) < LINK_ALLOC_MAX - len) {
 
 		mb = priv->mbflow;
 		priv->mbflow += len;
@@ -203,7 +227,7 @@ link_fetch_network(struct link_pmc *lp)
 {
 	struct link_priv	*priv = lp->priv;
 	char			*lbuf = priv->lbuf;
-	int			n, rc = 0;
+	int			net_ID, rc = 0;
 
 	if (strstr(lbuf, "(pmc)") == lbuf) {
 
@@ -214,9 +238,9 @@ link_fetch_network(struct link_pmc *lp)
 
 	if (strstr(lbuf, "(net/") == lbuf) {
 
-		if (lk_stoi(&n, lbuf + 5) != NULL) {
+		if (lk_stoi(&net_ID, lbuf + 5) != NULL) {
 
-			sprintf(lp->network, "REMOTE/%i", n);
+			sprintf(lp->network, "REMOTE/%i", net_ID);
 		}
 		else {
 			lp->network[0] = 0;
@@ -894,17 +918,32 @@ int link_command(struct link_pmc *lp, const char *command)
 
 struct link_reg *link_reg_lookup(struct link_pmc *lp, const char *sym)
 {
-	struct link_reg			*reg = NULL;
-	int				reg_ID;
+	struct link_priv	*priv = lp->priv;
+	struct link_reg		*reg = NULL;
+	int			hash, reg_ID;
 
-	for (reg_ID = 0; reg_ID < lp->reg_MAX_N; ++reg_ID) {
+	if (lp->linked == 0)
+		return NULL;
 
-		if (lp->reg[reg_ID].sym[0] != 0) {
+	hash = lk_hash(sym);
+	reg_ID = priv->cache[hash];
 
-			if (strcmp(lp->reg[reg_ID].sym, sym) == 0) {
+	if (strcmp(lp->reg[reg_ID].sym, sym) == 0) {
 
-				reg = &lp->reg[reg_ID];
-				break;
+		reg = &lp->reg[reg_ID];
+	}
+	else {
+		for (reg_ID = 0; reg_ID < lp->reg_MAX_N; ++reg_ID) {
+
+			if (lp->reg[reg_ID].sym[0] != 0) {
+
+				if (strcmp(lp->reg[reg_ID].sym, sym) == 0) {
+
+					priv->cache[hash] = reg_ID;
+					reg = &lp->reg[reg_ID];
+
+					break;
+				}
 			}
 		}
 	}
@@ -914,31 +953,50 @@ struct link_reg *link_reg_lookup(struct link_pmc *lp, const char *sym)
 
 int link_reg_lookup_range(struct link_pmc *lp, const char *sym, int *min, int *max)
 {
-	int				n, rc, reg_ID;
+	struct link_priv	*priv = lp->priv;
+	int			len, hash, reg_ID, found = 0;
 
-	n = strlen(sym);
-	rc = 0;
+	if (lp->linked == 0)
+		return 0;
 
-	for (reg_ID = 0; reg_ID < lp->reg_MAX_N; ++reg_ID) {
+	len = strlen(sym);
+
+	hash = lk_hash(sym);
+	reg_ID = priv->cache[hash];
+
+	if (strncmp(lp->reg[reg_ID].sym, sym, len) == 0) {
+
+		*min = reg_ID;
+		*max = reg_ID++;
+
+		found = 1;
+	}
+	else {
+		reg_ID = 0;
+	}
+
+	for (; reg_ID < lp->reg_MAX_N; ++reg_ID) {
 
 		if (lp->reg[reg_ID].sym[0] != 0) {
 
-			if (strncmp(lp->reg[reg_ID].sym, sym, n) == 0) {
+			if (strncmp(lp->reg[reg_ID].sym, sym, len) == 0) {
 
-				if (rc == 0) {
+				if (found == 0) {
+
+					priv->cache[hash] = reg_ID;
 
 					*min = reg_ID;
-					rc = 1;
+					found = 1;
 				}
 
 				*max = reg_ID;
 			}
-			else if (rc != 0)
+			else if (found != 0)
 				break;
 		}
 	}
 
-	return rc;
+	return found;
 }
 
 void link_reg_fetch_all_shown(struct link_pmc *lp)
diff --git a/phobia/phobia.c b/phobia/phobia.c
index 318356a..9a3d016 100644
--- a/phobia/phobia.c
+++ b/phobia/phobia.c
@@ -3099,6 +3099,11 @@ page_hal(struct public *pub)
 	nk_layout_row_dynamic(ctx, 0, 1);
 	nk_spacer(ctx);
 
+	reg_enum_errno(pub, "hal.MCU_ID", "MCU ID", 0);
+
+	nk_layout_row_dynamic(ctx, 0, 1);
+	nk_spacer(ctx);
+
 	reg_float(pub, "hal.USART_baudrate", "USART baudrate");
 	reg_enum_combo(pub, "hal.USART_parity", "USART parity", 0);
 
@@ -5291,7 +5296,7 @@ page_flash(struct public *pub)
 	nk_spacer(ctx);
 	pub_drawing_flash_colored(nk, 'a');
 	nk_spacer(ctx);
-	nk_label(ctx, "Data block with correct CRC", NK_TEXT_LEFT);
+	nk_label(ctx, "Data block (with correct CRC)", NK_TEXT_LEFT);
 
 	nk_spacer(ctx);
 	pub_drawing_flash_colored(nk, 'x');
diff --git a/src/Makefile b/src/Makefile
index 631a933..985fd9a 100644
--- a/src/Makefile
+++ b/src/Makefile
@@ -148,7 +148,7 @@ $(TARGET): $(BUILD_OBJS)
 
 $(IMAGE): $(TARGET)
 	@ echo "  OC    " $(notdir $@)
-	@ $(OC) -j .text -j .data -O binary -S $< $@
+	@ $(OC) -O binary -S $< $@
 
 gdb: $(TARGET)
 	@ echo "  GDB   " $(notdir $<)
diff --git a/src/app/as5047.c b/src/app/as5047.c
index a4e7b45..21badf5 100644
--- a/src/app/as5047.c
+++ b/src/app/as5047.c
@@ -79,7 +79,7 @@ LD_TASK void app_AS5047(void *pData)
 {
 	volatile int		*knob = (volatile int *) pData;
 
-	SPI_startup(HW_SPI_EXT_ID, AS5047_FREQUENCY, SPI_LOW_FALLING | SPI_DMA);
+	SPI_startup(HW_SPI_EXT_ID, AS5047_FREQUENCY, SPI_LOW_FALLING | SPI_DMA | SPI_NSS_ON);
 
 	hal_memory_fence();
 
diff --git a/src/cherry/usbd_cdc.c b/src/cherry/usbd_cdc.c
index 7ad0e12..f7f04ab 100644
--- a/src/cherry/usbd_cdc.c
+++ b/src/cherry/usbd_cdc.c
@@ -6,9 +6,6 @@
 #include "usbd_core.h"
 #include "usbd_cdc.h"
 
-const char *stop_name[] = { "1", "1.5", "2" };
-const char *parity_name[] = { "N", "O", "E", "M", "S" };
-
 static int cdc_acm_class_interface_request_handler(struct usb_setup_packet *setup, uint8_t **data, uint32_t *len)
 {
     USB_LOG_DBG("CDC Class request: "
@@ -40,12 +37,12 @@ static int cdc_acm_class_interface_request_handler(struct usb_setup_packet *setu
             /* 6      | bDataBits  |   1   | Number Data bits (5, 6, 7, 8 or 16).          */
             /*******************************************************************************/
             memcpy(&line_coding, *data, setup->wLength);
-            USB_LOG_DBG("Set intf:%d linecoding <%d %d %s %s>\r\n",
+            USB_LOG_DBG("Set intf:%d linecoding <%d %d %d %d>\r\n",
                         intf_num,
                         line_coding.dwDTERate,
                         line_coding.bDataBits,
-                        parity_name[line_coding.bParityType],
-                        stop_name[line_coding.bCharFormat]);
+                        line_coding.bParityType,
+                        line_coding.bCharFormat);
 
             usbd_cdc_acm_set_line_coding(intf_num, &line_coding);
             break;
diff --git a/src/epcan.h b/src/epcan.h
index a464055..8a62fea 100644
--- a/src/epcan.h
+++ b/src/epcan.h
@@ -29,7 +29,7 @@ enum {
 	EPCAN_NODE_TX,				/* send to remote node */
 	EPCAN_NODE_GET,				/* request to GET register data */
 	EPCAN_NODE_SET,				/* request to SET register data */
-	EPCAN_NODE_DATA				/* reply to GET request */
+	EPCAN_NODE_DATA				/* reply to the GET request */
 };
 
 enum {
@@ -70,7 +70,7 @@ typedef struct {
 	int		ID;		/* CAN ID of the endpoint (EP) */
 	int		clock_ID;	/* CAN ID used as clock */
 
-	float		reg_DATA;	/* current DATA */
+	float		reg_DATA;	/* actual DATA */
 	int		reg_ID;		/* linked register ID */
 
 	int		PAYLOAD;	/* packet payload type */
diff --git a/src/flash.c b/src/flash.c
index 122304f..d2e4dd8 100644
--- a/src/flash.c
+++ b/src/flash.c
@@ -34,17 +34,17 @@ typedef struct {
 flash_prog_t;
 
 static int
-flash_prog_putc(flash_prog_t *pg, int c)
+flash_prog_u8(flash_prog_t *pg, uint8_t u)
 {
 	int			rc = 0;
 
 	if (pg->total >= 4) {
 
-		pg->packed.b[pg->index++] = (uint8_t) c;
+		pg->packed.b[pg->index++] = u;
 
 		if (pg->index >= 4) {
 
-			FLASH_prog(pg->flash, pg->packed.l);
+			FLASH_prog_u32(pg->flash, pg->packed.l);
 
 			pg->flash += 1;
 			pg->total -= 4;
@@ -59,7 +59,7 @@ flash_prog_putc(flash_prog_t *pg, int c)
 }
 
 static void
-flash_prog_long(flash_prog_t *pg, uint32_t l)
+flash_prog_u32(flash_prog_t *pg, uint32_t l)
 {
 	union {
 		uint32_t	l;
@@ -67,31 +67,31 @@ flash_prog_long(flash_prog_t *pg, uint32_t l)
 	}
 	packed = { l };
 
-	flash_prog_putc(pg, packed.b[0]);
-	flash_prog_putc(pg, packed.b[1]);
-	flash_prog_putc(pg, packed.b[2]);
-	flash_prog_putc(pg, packed.b[3]);
+	flash_prog_u8(pg, packed.b[0]);
+	flash_prog_u8(pg, packed.b[1]);
+	flash_prog_u8(pg, packed.b[2]);
+	flash_prog_u8(pg, packed.b[3]);
 }
 
 static const char *
-flash_strcpyn(char *d, const char *s, int n)
+flash_strcpyn(char *d, const char *s, int len)
 {
 	do {
-		if (n < 1) {
+		if (len < 1) {
 
 			*d = 0;
 			break;
 		}
 
-		if (*s == 0xFF || *s == 0xFE) {
+		if (		   *s == 0xFF
+				|| *s == 0xBF) {
 
 			*d = 0;
 			break;
 		}
 
 		*d++ = *s++;
-
-		--n;
+		--len;
 	}
 	while (1);
 
@@ -101,7 +101,7 @@ flash_strcpyn(char *d, const char *s, int n)
 static uint32_t
 flash_block_crc32(const flash_block_t *block)
 {
-	return crc32b(block, sizeof(flash_block_t) - sizeof(uint32_t));
+	return crc32u(block, sizeof(flash_block_t) - sizeof(uint32_t));
 }
 
 static flash_block_t *
@@ -141,7 +141,7 @@ int flash_block_regs_load()
 	const reg_t		*reg, *linked;
 	const char		*lsym;
 
-	char			*symbuf;
+	char			symbuf[REGS_SYM_MAX + 1];
 	int			rc = 0;
 
 	block = flash_block_scan();
@@ -153,18 +153,17 @@ int flash_block_regs_load()
 		return rc;
 	}
 
-	symbuf = pvPortMalloc(REGS_SYM_MAX + 1);
 	lsym = (const char *) block->content;
 
 	while (*lsym != 0xFF) {
 
 		lsym = flash_strcpyn(symbuf, lsym, REGS_SYM_MAX);
 
-		/* Search for an exact match of symbolic NAME.
+		/* Search for an exact match of symbolic name.
 		 * */
 		reg = reg_search(symbuf);
 
-		if (*lsym == 0xFE) {
+		if (*lsym == 0xBF) {
 
 			lsym = flash_strcpyn(symbuf, lsym + 1, REGS_SYM_MAX);
 
@@ -188,10 +187,6 @@ int flash_block_regs_load()
 
 			lsym += 5;
 		}
-		else {
-			rc = 1;
-			break;
-		}
 
 		if (*lsym != 0xFF) {
 
@@ -202,8 +197,6 @@ int flash_block_regs_load()
 		lsym++;
 	}
 
-	vPortFree(symbuf);
-
 	return rc;
 }
 
@@ -247,33 +240,36 @@ flash_prog_config_regs(flash_block_t *block)
 
 			lsym = reg->sym;
 
-			/* Store symbolic NAME of the register.
+			/* Store symbolic name of the register.
 			 * */
-			while (*lsym != 0) { flash_prog_putc(&pg, *lsym++); }
+			while (*lsym != 0) { flash_prog_u8(&pg, *lsym++); }
 
 			if (reg->mode & REG_LINKED) {
 
 				lsym = regfile[reg->link->i].sym;
 
-				flash_prog_putc(&pg, 0xFE);
+				flash_prog_u8(&pg, 0xBF);
 
-				while (*lsym != 0) { flash_prog_putc(&pg, *lsym++); }
+				while (*lsym != 0) { flash_prog_u8(&pg, *lsym++); }
 			}
 			else {
-				flash_prog_putc(&pg, 0xFF);
-				flash_prog_long(&pg, reg->link->i);
+				flash_prog_u8(&pg, 0xFF);
+				flash_prog_u32(&pg, reg->link->i);
 			}
 
-			if ((rc = flash_prog_putc(&pg, 0xFF)) == 0)
+			if ((rc = flash_prog_u8(&pg, 0xFF)) == 0)
 				break;
 		}
 	}
 
 	if (rc != 0) {
 
-		/* Fill the tail with 0xFF.
-		 * */
-		while (flash_prog_putc(&pg, 0xFF) != 0) ;
+		while (pg.index != 0) {
+
+			/* Flush the tail contents.
+			 * */
+			flash_prog_u8(&pg, 0xFF);
+		}
 	}
 
 	return rc;
@@ -314,18 +310,18 @@ flash_block_prog()
 
 			/* All flash storage is dirty.
 			 * */
-			block = FLASH_erase(block);
+			block = FLASH_erase((uint32_t *) block);
 			break;
 		}
 	}
 
-	FLASH_prog(&block->number, number);
+	FLASH_prog_u32(&block->number, number);
 
 	if ((rc = flash_prog_config_regs(block)) != 0) {
 
 		crc32 = flash_block_crc32(block);
 
-		FLASH_prog(&block->crc32, crc32);
+		FLASH_prog_u32(&block->crc32, crc32);
 
 		rc = (flash_block_crc32(block) == block->crc32) ? 1 : 0;
 	}
@@ -405,7 +401,7 @@ SH_DEF(flash_wipe)
 	do {
 		if (flash_block_crc32(block) == block->crc32) {
 
-			FLASH_prog(&block->crc32, lz);
+			FLASH_prog_u32(&block->crc32, lz);
 		}
 
 		block += 1;
diff --git a/src/hal/adc.c b/src/hal/adc.c
index 6d4578c..a2b330f 100644
--- a/src/hal/adc.c
+++ b/src/hal/adc.c
@@ -6,6 +6,8 @@
 typedef struct {
 
 	SemaphoreHandle_t	mutex_sem;
+
+	uint32_t		dmabuf[8] LD_DMA;
 }
 priv_ADC_t;
 
@@ -72,21 +74,21 @@ ADC_set_SMPR(ADC_TypeDef *pADC, int xCH, int xSMP)
 {
 	if (xCH < 10) {
 
-		pADC->SMPR2 |= xSMP << (xCH * 3);
+		MODIFY_REG(pADC->SMPR2, 7U << (xCH * 3), xSMP << (xCH * 3));
 	}
 	else {
-		pADC->SMPR1 |= xSMP << ((xCH - 10) * 3);
+		MODIFY_REG(pADC->SMPR1, 7U << ((xCH - 10) * 3), xSMP << ((xCH - 10) * 3));
 	}
 }
 
 void ADC_const_build()
 {
 #if defined(STM32F4)
-	uint16_t		*TEMP_30 = (void *) 0x1FFF7A2C;
-	uint16_t		*TEMP_110 = (void *) 0x1FFF7A2E;
+	const uint16_t		*TS_30 = (const uint16_t *) 0x1FFF7A2CU;
+	const uint16_t		*TS_110 = (const uint16_t *) 0x1FFF7A2EU;
 #elif defined(STM32F7)
-	uint16_t		*TEMP_30 = (void *) 0x1FF07A2C;
-	uint16_t		*TEMP_110 = (void *) 0x1FF07A2E;
+	const uint16_t		*TS_30 = (const uint16_t *) 0x1FF07A2CU;
+	const uint16_t		*TS_110 = (const uint16_t *) 0x1FF07A2EU;
 #endif /* STM32Fx */
 
 	float			U_reference, R_equivalent;
@@ -98,12 +100,21 @@ void ADC_const_build()
 	hal.const_ADC.GU = U_reference / hal.ADC_voltage_ratio;
 	hal.const_ADC.GT[1] = U_reference / hal.ADC_terminal_ratio;
 	hal.const_ADC.GT[0] = - hal.ADC_terminal_bias / hal.ADC_terminal_ratio;
-	hal.const_ADC.TS[1] = (30.f - 110.f) / (float) (*TEMP_30 - *TEMP_110);
-	hal.const_ADC.TS[0] = 110.f - hal.const_ADC.TS[1] * (float) (*TEMP_110);
-	hal.const_ADC.GS = 1.f / (float) ADC_RESOLUTION;
+	hal.const_ADC.GS = hal.ADC_reference_voltage / (float) ADC_RESOLUTION;
+	hal.const_ADC.TS[1] = 80.f / (float) (*TS_110 - *TS_30);
+	hal.const_ADC.TS[0] = 110.f - hal.const_ADC.TS[1] * (float) (*TS_110);
+
+#ifdef STM32F4
+	if (		hal.MCU_ID == MCU_ID_GD32F405
+			|| *TS_110 == *TS_30) {
+
+		hal.const_ADC.TS[1] = 0.323f;
+		hal.const_ADC.TS[0] = -279.f;
+	}
+#endif /* STM32F4 */
 
 #ifdef HW_HAVE_ANALOG_KNOB
-	hal.const_ADC.GK = hal.ADC_reference_voltage / hal.ADC_knob_ratio;
+	hal.const_ADC.GK = 1.f / hal.ADC_knob_ratio;
 #endif /* HW_HAVE_ANALOG_KNOB */
 
 	hal.const_CNT[0] = 1.f / (float) CLOCK_TIM1_HZ;
@@ -174,7 +185,7 @@ void ADC_startup()
 	/* Configure ADCs.
 	 * */
 	ADC1->CR1 = ADC_CR1_SCAN;
-	ADC1->CR2 = ADC_CR2_JEXTEN_0;
+	ADC1->CR2 = ADC_CR2_JEXTEN_0 | ADC_CR2_DDS | ADC_CR2_DMA;
 	ADC1->SMPR1 = 0;
 	ADC1->SMPR2 = 0;
 	ADC1->SQR1 = 0;
@@ -230,12 +241,43 @@ void ADC_startup()
 	 * */
 	priv_ADC.mutex_sem = xSemaphoreCreateMutex();
 
+	/* Enable DMA on ADC1.
+	 * */
+	DMA2_Stream0->CR = (0U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
+		| (2U << DMA_SxCR_MSIZE_Pos) | (2U << DMA_SxCR_PSIZE_Pos);
+	DMA2_Stream0->PAR = (uint32_t) &ADC1->DR;
+	DMA2_Stream0->M0AR = (uint32_t) &priv_ADC.dmabuf[0];
+	DMA2_Stream0->FCR = DMA_SxFCR_DMDIS;
+
 	/* Enable ADCs.
 	 * */
 	ADC1->CR2 |= ADC_CR2_ADON;
 	ADC2->CR2 |= ADC_CR2_ADON;
 	ADC3->CR2 |= ADC_CR2_ADON;
 
+#ifdef STM32F4
+	if (hal.MCU_ID == MCU_ID_GD32F405) {
+
+		TIM_wait_ns(800);
+
+		ADC1->CR2 |= (1U << 3);	/* RSTCLB */
+		ADC1->CR2 |= (1U << 2);	/* CLB */
+
+		ADC2->CR2 |= (1U << 3);
+		ADC2->CR2 |= (1U << 2);
+
+		ADC3->CR2 |= (1U << 3);
+		ADC3->CR2 |= (1U << 2);
+
+		while (		   (ADC1->CR2 & (1U << 2)) == 0U
+				&& (ADC2->CR2 & (1U << 2)) == 0U
+				&& (ADC3->CR2 & (1U << 2)) == 0U) {
+
+			__NOP();
+		}
+	}
+#endif /* STM32F4 */
+
 	/* Enable EXTI0.
 	 * */
 	EXTI->IMR = EXTI_IMR_MR0;
@@ -252,41 +294,54 @@ float ADC_get_sample(int xGPIO)
 {
 	int			xCH, xADC;
 
-	union {
-		uint32_t	l;
-		float		f;
-	}
-	um = { 0xFFF80000U };
+	float			um = 0.f;
 
 	if (xSemaphoreTake(priv_ADC.mutex_sem, (TickType_t) 10) == pdTRUE) {
 
+		DMA2_Stream0->CR &= ~DMA_SxCR_EN;
+
+		__DSB();
+
+#ifdef STM32F7
+		/* Invalidate D-Cache on DMABUF.
+		 * */
+		SCB->DCIMVAC = (uint32_t) &priv_ADC.dmabuf[0];
+
+		__DSB();
+		__ISB();
+#endif /* STM32F7 */
+
 		xCH = XGPIO_GET_CH(xGPIO);
 
 		ADC_set_SMPR(ADC1, xCH, ADC_SMP_480);
 
+		DMA2->LIFCR = DMA_LIFCR_CTCIF0 | DMA_LIFCR_CHTIF0
+			| DMA_LIFCR_CTEIF0 | DMA_LIFCR_CFEIF0;
+
+		DMA2_Stream0->NDTR = 1;
+		DMA2_Stream0->CR |= DMA_SxCR_EN;
+
 		ADC1->SQR3 = xCH;
 		ADC1->CR2 |= ADC_CR2_SWSTART;
 
-		while ((ADC1->SR & ADC_SR_EOC) == 0) {
+		while ((DMA2->LISR & (DMA_LISR_TCIF0 | DMA_LISR_TEIF0)) == 0U) {
 
 			taskYIELD();
 		}
 
-		ADC1->SR = ~ADC_SR_EOC;
-
-		xADC = ADC1->DR;
+		xADC = priv_ADC.dmabuf[0];
 
 		if (xCH == XGPIO_GET_CH(GPIO_ADC_TEMPINT)) {
 
-			um.f = (float) (xADC) * hal.const_ADC.TS[1] + hal.const_ADC.TS[0];
+			um = (float) (xADC) * hal.const_ADC.TS[1] + hal.const_ADC.TS[0];
 		}
 		else {
-			um.f = (float) (xADC) * hal.const_ADC.GS;
+			um = (float) (xADC) * hal.const_ADC.GS;
 		}
 
 		xSemaphoreGive(priv_ADC.mutex_sem);
 	}
 
-	return um.f;
+	return um;
 }
 
diff --git a/src/hal/entry.c b/src/hal/entry.c
index 1d8df9c..e184771 100644
--- a/src/hal/entry.c
+++ b/src/hal/entry.c
@@ -5,14 +5,18 @@
 #define LD_IRQ_WEAK		__attribute__ ((weak, alias("irq_Weak")))
 
 extern uint32_t ld_stack;
-extern uint32_t ld_begin_text;
-extern uint32_t ld_end_text;
-extern uint32_t ld_begin_data;
-extern uint32_t ld_end_data;
-extern uint32_t ld_begin_bss;
-extern uint32_t ld_end_bss;
-extern uint32_t ld_begin_ccm;
-extern uint32_t ld_end_ccm;
+extern uint32_t ld_text_begin;
+extern uint32_t ld_text_end;
+extern uint32_t ld_ramfunc_load;
+extern uint32_t ld_ramfunc_begin;
+extern uint32_t ld_ramfunc_end;
+extern uint32_t ld_data_load;
+extern uint32_t ld_data_begin;
+extern uint32_t ld_data_end;
+extern uint32_t ld_bss_begin;
+extern uint32_t ld_bss_end;
+extern uint32_t ld_ccm_begin;
+extern uint32_t ld_ccm_end;
 extern uint32_t ld_end;
 
 void irq_Reset();
@@ -40,15 +44,15 @@ void irq_USART3() LD_IRQ_WEAK;
 void irq_TIM7() LD_IRQ_WEAK;
 void irq_OTG_FS() LD_IRQ_WEAK;
 
-const FW_info_t		fw = {
+const fw_info_t		fw = {
 
-	(uint32_t) &ld_begin_text,
+	(uint32_t) &ld_text_begin,
 	(uint32_t) &ld_end,
 
 	_HW_REV, __DATE__
 };
 
-LD_VECTORS void *VECTORS[] = {
+LD_VECTORS void *vtab[] = {
 
 	(void *) &ld_stack,
 
@@ -168,9 +172,11 @@ void irq_Reset()
 {
 	hal_bootload();
 
-	init_data(&ld_end_text, &ld_begin_data, &ld_end_data);
-	init_bss(&ld_begin_bss, &ld_end_bss);
-	init_bss(&ld_begin_ccm, &ld_end_ccm);
+	init_data(&ld_ramfunc_load, &ld_ramfunc_begin, &ld_ramfunc_end);
+	init_data(&ld_data_load, &ld_data_begin, &ld_data_end);
+
+	init_bss(&ld_bss_begin, &ld_bss_end);
+	init_bss(&ld_ccm_begin, &ld_ccm_end);
 
 	hal_startup();
 	app_MAIN();
diff --git a/src/hal/flash.c b/src/hal/flash.c
index 8500df7..af12806 100644
--- a/src/hal/flash.c
+++ b/src/hal/flash.c
@@ -10,6 +10,8 @@ const FLASH_config_t	FLASH_config = {
 	.begin = 8,
 	.total = 4,
 
+	.flash = 0x08000000U,
+
 	.map = {
 
 		0x08080000U,
@@ -28,6 +30,8 @@ const FLASH_config_t	FLASH_config = {
 	.begin = 6,
 	.total = 2,
 
+	.flash = 0x08000000U,
+
 	.map = {
 
 		0x08040000U,
@@ -77,7 +81,7 @@ FLASH_erase_on_IWDG(int N)
 	__DSB();
 	__ISB();
 
-	FLASH->CR = FLASH_CR_PSIZE_1 | (N << 3)
+	FLASH->CR = FLASH_CR_PSIZE_1 | (N << FLASH_CR_SNB_Pos)
 		| FLASH_CR_SER | FLASH_CR_STRT;
 
 	__DSB();
@@ -98,9 +102,9 @@ FLASH_erase_on_IWDG(int N)
 	__enable_irq();
 }
 
-void *FLASH_erase(void *flash)
+void *FLASH_erase(uint32_t *flash)
 {
-	int		N, raw_N = 0;
+	int		N, native_N = 0;
 
 	for (N = 0; N < FLASH_config.total; ++N) {
 
@@ -108,20 +112,20 @@ void *FLASH_erase(void *flash)
 				&& (uint32_t) flash < FLASH_config.map[N + 1]) {
 
 			flash = (void *) FLASH_config.map[N];
-			raw_N = N + FLASH_config.begin;
+			native_N = N + FLASH_config.begin;
 
 			break;
 		}
 	}
 
-	if (raw_N != 0) {
+	if (native_N != 0) {
 
 		FLASH_unlock();
 		FLASH_wait_BSY();
 
 		/* Call the func from RAM because flash will busy.
 		 * */
-		FLASH_erase_on_IWDG(raw_N);
+		FLASH_erase_on_IWDG(native_N);
 
 		FLASH_lock();
 
@@ -144,12 +148,18 @@ void *FLASH_erase(void *flash)
 	return flash;
 }
 
-void FLASH_prog(void *flash, uint32_t value)
+void FLASH_prog_u32(uint32_t *flash, uint32_t val)
 {
-	uint32_t			*ld_flash = (uint32_t *) flash;
+#ifdef STM32F7
+	if (		(uint32_t) flash >= 0x00200000U
+			&& (uint32_t) flash < 0x00280000U) {
+
+		flash = (uint32_t *) ((uint32_t) flash + 0x07E00000U);
+	}
+#endif /* STM32F7 */
 
-	if (		(uint32_t) ld_flash >= fw.ld_end
-			&& (uint32_t) ld_flash < FLASH_config.map[FLASH_config.total]) {
+	if (		(uint32_t) flash >= FLASH_config.flash
+			&& (uint32_t) flash < FLASH_config.map[FLASH_config.total]) {
 
 		FLASH_unlock();
 		FLASH_wait_BSY();
@@ -158,14 +168,14 @@ void FLASH_prog(void *flash, uint32_t value)
 
 		/* Program flash memory.
 		 * */
-		*ld_flash = value;
+		*flash = val;
 
 		__DSB();
 
 #ifdef STM32F7
 		/* D-Cache Clean and Invalidate.
 		 * */
-		SCB->DCCIMVAC = (uint32_t) ld_flash;
+		SCB->DCCIMVAC = (uint32_t) flash;
 
 		__DSB();
 		__ISB();
diff --git a/src/hal/flash.h b/src/hal/flash.h
index 1ae39c1..2f5c90c 100644
--- a/src/hal/flash.h
+++ b/src/hal/flash.h
@@ -8,14 +8,15 @@ typedef struct {
 	int		begin;
 	int		total;
 
+	uint32_t	flash;
 	uint32_t	map[6];
 }
 FLASH_config_t;
 
 extern const FLASH_config_t	FLASH_config;
 
-void *FLASH_erase(void *flash);
-void FLASH_prog(void *flash, uint32_t value);
+void *FLASH_erase(uint32_t *flash);
+void FLASH_prog_u32(uint32_t *flash, uint32_t val);
 
 #endif /* _H_FLASH_ */
 
diff --git a/src/hal/hal.c b/src/hal/hal.c
index 5c35eb6..55e74c2 100644
--- a/src/hal/hal.c
+++ b/src/hal/hal.c
@@ -6,7 +6,7 @@
 #include "cmsis/stm32xx.h"
 
 #define HAL_FLAG_SIGNATURE	0x2A7CEA64U
-#define HAL_TEXT_INC(np)	(((np) < sizeof(log.text) - 1U) ? (np) + 1 : 0)
+#define HAL_LOG_INC(np)		(((np) < sizeof(log.text) - 1U) ? (np) + 1 : 0)
 
 uint32_t			clock_cpu_hz;
 
@@ -73,27 +73,46 @@ void irq_Default()
 	hal_system_reset();
 }
 
+static void
+mcu_identify()
+{
+	uint32_t		ID;
+
+	ID = DBGMCU->IDCODE & DBGMCU_IDCODE_DEV_ID_Msk;
+
+	if (ID == 0x413U) {
+
+		hal.MCU_ID = MCU_ID_STM32F405;
+
+		if (* (volatile const uint32_t *) 0x400238E8U == 0x88000000U) {
+
+			hal.MCU_ID = MCU_ID_GD32F405;
+		}
+	}
+	else if (ID == 0x452U) {
+
+		hal.MCU_ID = MCU_ID_STM32F722;
+	}
+	else {
+		hal.MCU_ID = MCU_ID_UNKNOWN;
+
+		log_TRACE("Unknown MCU ID %4x" EOL, ID);
+	}
+}
+
 static void
 core_startup()
 {
 	uint32_t	CLOCK, PLLQ, PLLP, PLLN, PLLM;
 
-	/* Vector table offset.
-	 * */
-	SCB->VTOR = (uint32_t) &ld_begin_text;
+	SCB->VTOR = (uint32_t) &ld_text_begin;
 
-	/* Configure priority grouping.
-	 * */
 	NVIC_SetPriorityGrouping(0U);
 
-	/* Enable HSI.
-	 * */
-	RCC->CR |= RCC_CR_HSION;
-
 	/* Reset RCC.
 	 * */
-	RCC->CR &= ~(RCC_CR_PLLI2SON | RCC_CR_PLLON | RCC_CR_CSSON
-			| RCC_CR_HSEBYP | RCC_CR_HSEON);
+	MODIFY_REG(RCC->CR, RCC_CR_PLLI2SON | RCC_CR_PLLON | RCC_CR_CSSON
+			| RCC_CR_HSEBYP | RCC_CR_HSEON, RCC_CR_HSION);
 
 	RCC->PLLCFGR = 0;
 	RCC->CFGR = 0;
@@ -112,30 +131,19 @@ core_startup()
 		 * */
 		RCC->CR |= RCC_CR_HSEON;
 
-		/* Wait till HSE is ready.
+		/* Wait until HSE is ready.
 		 * */
 		do {
 			if ((RCC->CR & RCC_CR_HSERDY) == RCC_CR_HSERDY)
 				break;
 
 			__NOP();
-			__NOP();
 
 			if (N > 70000U) {
 
 				log_TRACE("HSE not ready" EOL);
 
 				noinit_HAL.crystal_disabled = HAL_FLAG_SIGNATURE;
-
-#ifdef STM32F7
-				/* D-Cache Clean and Invalidate.
-				 * */
-				SCB->DCCIMVAC = (uint32_t) &noinit_HAL.crystal_disabled;
-
-				__DSB();
-				__ISB();
-
-#endif /* STM32F7 */
 				break;
 			}
 
@@ -148,10 +156,17 @@ core_startup()
 	 * */
 	RCC->APB1ENR |= RCC_APB1ENR_PWREN;
 
-	/* Regulator voltage scale 1 mode.
+	/* Select voltage regulator scale 1 mode.
 	 * */
 #if defined(STM32F4)
-	PWR->CR |= PWR_CR_VOS;
+	if (hal.MCU_ID == MCU_ID_STM32F405) {
+
+		PWR->CR |= PWR_CR_VOS;
+	}
+	else if (hal.MCU_ID == MCU_ID_GD32F405) {
+
+		PWR->CR |= (1U << 15) | (1U << 14);	/* LDOVS */
+	}
 #elif defined(STM32F7)
 	PWR->CR1 |= PWR_CR1_VOS_1 | PWR_CR1_VOS_0;
 #endif /* STM32Fx */
@@ -205,16 +220,11 @@ core_startup()
 	 * */
 	clock_cpu_hz = CLOCK / PLLP;
 
-	/* Enable PLL.
+	/* Enable PLL and wait until it is ready.
 	 * */
 	RCC->CR |= RCC_CR_PLLON;
 
-	/* Wait till the main PLL is ready.
-	 * */
-	while ((RCC->CR & RCC_CR_PLLRDY) != RCC_CR_PLLRDY) {
-
-		__NOP();
-	}
+	while ((RCC->CR & RCC_CR_PLLRDY) != RCC_CR_PLLRDY) { __NOP(); }
 
 	/* Configure Flash.
 	 * */
@@ -225,16 +235,26 @@ core_startup()
 	FLASH->ACR = FLASH_ACR_PRFTEN | FLASH_ACR_LATENCY_5WS;
 #endif /* STM32Fx */
 
-	/* Select PLL.
+	/* Enable high frequency mode on GD32F405.
 	 * */
-	RCC->CFGR |= RCC_CFGR_SW_PLL;
+#ifdef STM32F4
+	if (hal.MCU_ID == MCU_ID_GD32F405) {
 
-	/* Wait till PLL is used.
-	 * */
-	while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) {
+		PWR->CR |= (1U << 16);		/* HDEN */
 
-		__NOP();
+		while ((PWR->CSR & (1U << 16)) == 0U) { __NOP(); }
+
+		PWR->CR |= (1U << 17);		/* HDS */
+
+		while ((PWR->CSR & (1U << 17)) == 0U) { __NOP(); }
 	}
+#endif /* STM32F4 */
+
+	/* Select PLL clock and wait until it is used.
+	 * */
+	RCC->CFGR |= RCC_CFGR_SW_PLL;
+
+	while ((RCC->CFGR & RCC_CFGR_SWS) != RCC_CFGR_SWS_PLL) { __NOP(); }
 
 	/* Enable caching on Cortex-M7.
 	 * */
@@ -276,23 +296,22 @@ periph_startup()
 static void
 flash_verify()
 {
-	uint32_t	flash_sizeof, *flash_crc32, crc32;
-
-	flash_sizeof = fw.ld_end - fw.ld_begin;
-	flash_crc32 = (uint32_t *) fw.ld_end;
+	uint32_t		crc32;
 
-	if (*flash_crc32 == 0xFFFFFFFFU) {
+	if (* (const uint32_t *) fw.ld_crc32 == 0xFFFFFFFFU) {
 
-		crc32 = crc32b((const void *) fw.ld_begin, flash_sizeof);
+		crc32 = crc32u((const void *) fw.ld_begin, fw.ld_crc32 - fw.ld_begin);
 
 		/* Update flash CRC32.
 		 * */
-		FLASH_prog(flash_crc32, crc32);
+		FLASH_prog_u32((uint32_t *) fw.ld_crc32, crc32);
 	}
 
-	if (crc32b((const void *) fw.ld_begin, flash_sizeof) != *flash_crc32) {
+	crc32 = crc32u((const void *) fw.ld_begin, fw.ld_crc32 - fw.ld_begin);
 
-		log_TRACE("FLASH CRC32 invalid" EOL);
+	if (* (const uint32_t *) fw.ld_crc32 != crc32) {
+
+		log_TRACE("Flash CRC32 does not match" EOL);
 	}
 }
 
@@ -304,12 +323,21 @@ void hal_bootload()
 
 		noinit_HAL.bootload_flag = 0U;
 
+#ifdef STM32F7
+		SCB_CleanDCache();
+#endif /* STM32F7 */
+
 #if defined(STM32F4)
 		sysmem = (const uint32_t *) 0x1FFF0000U;
 #elif defined(STM32F7)
 		sysmem = (const uint32_t *) 0x1FF00000U;
 #endif /* STM32Fx */
 
+		SCB->VTOR = (uint32_t) sysmem;
+
+		__DSB();
+		__ISB();
+
 		/* Load MSP.
 		 * */
 		__set_MSP(sysmem[0]);
@@ -329,6 +357,7 @@ void hal_bootload()
 
 void hal_startup()
 {
+	mcu_identify();
 	core_startup();
 	periph_startup();
 	flash_verify();
@@ -361,7 +390,7 @@ void hal_system_reset()
 	NVIC_SystemReset();
 }
 
-void hal_bootload_jump()
+void hal_bootload_reset()
 {
 	noinit_HAL.bootload_flag = HAL_FLAG_SIGNATURE;
 
@@ -405,6 +434,7 @@ void log_putc(int c)
 	if (unlikely(log.boot_FLAG != HAL_FLAG_SIGNATURE)) {
 
 		log.boot_FLAG = HAL_FLAG_SIGNATURE;
+		log.boot_COUNT = 0U;
 
 		log.text_wp = 0;
 		log.text_rp = 0;
@@ -412,9 +442,9 @@ void log_putc(int c)
 
 	log.text[log.text_wp] = (char) c;
 
-	log.text_wp = HAL_TEXT_INC(log.text_wp);
+	log.text_wp = HAL_LOG_INC(log.text_wp);
 	log.text_rp = (log.text_rp == log.text_wp)
-		? HAL_TEXT_INC(log.text_rp) : log.text_rp;
+		? HAL_LOG_INC(log.text_rp) : log.text_rp;
 }
 
 void log_flush()
@@ -430,7 +460,7 @@ void log_flush()
 
 			putc(log.text[rp]);
 
-			rp = HAL_TEXT_INC(rp);
+			rp = HAL_LOG_INC(rp);
 		}
 
 		puts(EOL);
@@ -439,13 +469,11 @@ void log_flush()
 
 void log_clean()
 {
-	if (unlikely(log.boot_FLAG != HAL_FLAG_SIGNATURE)) {
+	if (log.boot_FLAG == HAL_FLAG_SIGNATURE) {
 
-		log.boot_FLAG = HAL_FLAG_SIGNATURE;
+		log.text_wp = 0;
+		log.text_rp = 0;
 	}
-
-	log.text_wp = 0;
-	log.text_rp = 0;
 }
 
 void DBGMCU_mode_stop()
diff --git a/src/hal/hal.h b/src/hal/hal.h
index 7697ff1..0eb7ac6 100644
--- a/src/hal/hal.h
+++ b/src/hal/hal.h
@@ -52,6 +52,13 @@
 
 #define ADC_SAMPLE_ADVANCE		110
 
+enum {
+	MCU_ID_UNKNOWN			= 0,
+	MCU_ID_STM32F405,
+	MCU_ID_STM32F722,
+	MCU_ID_GD32F405
+};
+
 enum {
 	LEG_A				= 1U,
 	LEG_B				= 2U,
@@ -93,15 +100,17 @@ enum {
 typedef struct {
 
 	uint32_t	ld_begin;
-	uint32_t	ld_end;
+	uint32_t	ld_crc32;
 
-	const char	hwrevision[16];
+	const char	hwrevision[32];
 	const char	build[16];
 }
-FW_info_t;
+fw_info_t;
 
 typedef struct {
 
+	int		MCU_ID;
+
 	int		USART_baudrate;
 	int		USART_parity;
 
@@ -181,9 +190,9 @@ typedef struct {
 }
 LOG_t;
 
-extern const FW_info_t		fw;
+extern const fw_info_t		fw;
 
-extern uint32_t			ld_begin_text;
+extern uint32_t			ld_text_begin;
 extern uint32_t			clock_cpu_hz;
 
 extern HAL_t			hal;
@@ -196,7 +205,7 @@ int hal_lock_irq();
 void hal_unlock_irq(int irq);
 
 void hal_system_reset();
-void hal_bootload_jump();
+void hal_bootload_reset();
 
 void hal_cpu_sleep();
 void hal_memory_fence();
diff --git a/src/hal/link_f405.ld b/src/hal/link_f405.ld
index 57e47be..3ba5a6c 100644
--- a/src/hal/link_f405.ld
+++ b/src/hal/link_f405.ld
@@ -14,7 +14,7 @@ SECTIONS
 {
 	.text : ALIGN(8)
 	{
-		ld_begin_text = . ;
+		ld_text_begin = . ;
 
 		KEEP(*(.vectors))
 		. = ALIGN(8);
@@ -26,60 +26,76 @@ SECTIONS
 		*(.rodata.*)
 
 		. = ALIGN(8);
-		ld_end_text = . ;
-		ld_end = ld_end_text + SIZEOF(.data) ;
+		ld_text_end = . ;
 
 	} > FLASH
 
-	.data : AT (ld_end_text) ALIGN(8)
+	.ramfunc : ALIGN(8)
 	{
-		ld_begin_data = . ;
+		ld_ramfunc_load = LOADADDR(.ramfunc) ;
+		ld_ramfunc_begin = . ;
 
 		*(.ramfunc)
 		*(.ramfunc.*)
 
+		. = ALIGN(8);
+		ld_ramfunc_end = . ;
+
+	} > RAM1 AT > FLASH
+
+	.data : ALIGN(8)
+	{
+		ld_data_load = LOADADDR(.data) ;
+		ld_data_begin = . ;
+
 		*(.data)
 		*(.data.*)
 
 		. = ALIGN(8);
-		ld_end_data = . ;
+		ld_data_end = . ;
 
-	} > RAM1
+	} > RAM1 AT > FLASH
+
+	.endstub (NOLOAD) : ALIGN(8)
+	{
+		ld_end = . ;
+
+	} > FLASH
 
 	.bss (NOLOAD) : ALIGN(8)
 	{
-		ld_begin_bss = . ;
+		ld_bss_begin = . ;
 
 		*(.bss)
 		*(.bss.*)
 		*(COMMON)
 
 		. = ALIGN(8);
-		ld_end_bss = . ;
+		ld_bss_end = . ;
 
 	} > RAM1
 
 	.noinit (NOLOAD) : ALIGN(8)
 	{
-		ld_begin_noinit = . ;
+		ld_noinit_begin = . ;
 
 		*(.noinit)
 		*(.noinit.*)
 
 		. = ALIGN(8);
-		ld_end_noinit = . ;
+		ld_noinit_end = . ;
 
 	} > RAM2
 
 	.ccram (NOLOAD) : ALIGN(8)
 	{
-		ld_begin_ccm = . ;
+		ld_ccm_begin = . ;
 
 		*(.ccram)
 		*(.ccram.*)
 
 		. = ALIGN(8);
-		ld_end_ccm = . ;
+		ld_ccm_end = . ;
 
 	} > CCM
 
diff --git a/src/hal/link_f722.ld b/src/hal/link_f722.ld
index 2a4b4ea..89f50f7 100644
--- a/src/hal/link_f722.ld
+++ b/src/hal/link_f722.ld
@@ -1,10 +1,9 @@
 MEMORY
 {
-	FLASH (rx)	: ORIGIN = 0x08000000, LENGTH = 512K
+	ITCM_FLASH (rx)	: ORIGIN = 0x00200000, LENGTH = 512K
+	ITCM_RAM1 (rwx)	: ORIGIN = 0x00000000, LENGTH = 16K
 	RAM1 (rwx)	: ORIGIN = 0x20010000, LENGTH = 176K
 	RAM2 (rwx)	: ORIGIN = 0x2003C000, LENGTH = 16K
-	ITCM_RAM1 (rwx)	: ORIGIN = 0x00000000, LENGTH = 16K
-	ITCM_FLASH (rx)	: ORIGIN = 0x00200000, LENGTH = 512K
 	DTCM_RAM1 (rw)	: ORIGIN = 0x20000000, LENGTH = 64K
 }
 
@@ -16,7 +15,7 @@ SECTIONS
 {
 	.text : ALIGN(8)
 	{
-		ld_begin_text = . ;
+		ld_text_begin = . ;
 
 		KEEP(*(.vectors))
 		. = ALIGN(8);
@@ -28,60 +27,76 @@ SECTIONS
 		*(.rodata.*)
 
 		. = ALIGN(8);
-		ld_end_text = . ;
-		ld_end = ld_end_text + SIZEOF(.data) ;
+		ld_text_end = . ;
 
 	} > ITCM_FLASH
 
-	.data : AT (ld_end_text) ALIGN(8)
+	.ramfunc : ALIGN(8)
 	{
-		ld_begin_data = . ;
+		ld_ramfunc_load = LOADADDR(.ramfunc) ;
+		ld_ramfunc_begin = . ;
 
 		*(.ramfunc)
 		*(.ramfunc.*)
 
+		. = ALIGN(8);
+		ld_ramfunc_end = . ;
+
+	} > ITCM_RAM1 AT > ITCM_FLASH
+
+	.data : ALIGN(8)
+	{
+		ld_data_load = LOADADDR(.data) ;
+		ld_data_begin = . ;
+
 		*(.data)
 		*(.data.*)
 
 		. = ALIGN(8);
-		ld_end_data = . ;
+		ld_data_end = . ;
 
-	} > RAM1
+	} > RAM1 AT > ITCM_FLASH
+
+	.endstub (NOLOAD) : ALIGN(8)
+	{
+		ld_end = . ;
+
+	} > ITCM_FLASH
 
 	.bss (NOLOAD) : ALIGN(8)
 	{
-		ld_begin_bss = . ;
+		ld_bss_begin = . ;
 
 		*(.bss)
 		*(.bss.*)
 		*(COMMON)
 
 		. = ALIGN(8);
-		ld_end_bss = . ;
+		ld_bss_end = . ;
 
 	} > RAM1
 
 	.noinit (NOLOAD) : ALIGN(8)
 	{
-		ld_begin_noinit = . ;
+		ld_noinit_begin = . ;
 
 		*(.noinit)
 		*(.noinit.*)
 
 		. = ALIGN(8);
-		ld_end_noinit = . ;
+		ld_noinit_end = . ;
 
 	} > RAM2
 
 	.ccram (NOLOAD) : ALIGN(8)
 	{
-		ld_begin_ccm = . ;
+		ld_ccm_begin = . ;
 
 		*(.ccram)
 		*(.ccram.*)
 
 		. = ALIGN(8);
-		ld_end_ccm = . ;
+		ld_ccm_end = . ;
 
 	} > DTCM_RAM1
 
diff --git a/src/hal/rng.c b/src/hal/rng.c
index b1e219e..4443e92 100644
--- a/src/hal/rng.c
+++ b/src/hal/rng.c
@@ -36,7 +36,9 @@ uint32_t RNG_urand()
 			break;
 		}
 
-		N++; __NOP();
+		__NOP();
+
+		N++;
 	}
 	while (N < 700000U);
 
@@ -48,9 +50,9 @@ uint32_t RNG_make_UID()
 	uint32_t		UID;
 
 #if defined(STM32F4)
-	UID = crc32b((const void *) 0x1FFF7A10U, 12);
+	UID = crc32u((const void *) 0x1FFF7A10U, 12);
 #elif defined(STM32F7)
-	UID = crc32b((const void *) 0x1FF07A10U, 12);
+	UID = crc32u((const void *) 0x1FF07A10U, 12);
 #endif /* STM32Fx */
 
 	return UID;
diff --git a/src/hal/spi.c b/src/hal/spi.c
index 269a5d3..cb9bec6 100644
--- a/src/hal/spi.c
+++ b/src/hal/spi.c
@@ -97,7 +97,7 @@ void SPI_startup(int bus, int freq, int mode)
 	}
 
 #if defined(STM32F4)
-	dsize = (mode & SPI_SIZE_8) ? 0U : 1U;
+	dsize = (mode & SPI_DATA_8) ? 0U : 1U;
 
 	/* Configure SPI.
 	 * */
@@ -106,7 +106,7 @@ void SPI_startup(int bus, int freq, int mode)
 	priv_SPI[bus].SPI->CR2 = 0;
 
 #elif defined(STM32F7)
-	dsize = (mode & SPI_SIZE_8) ? 7U : 15U;
+	dsize = (mode & SPI_DATA_8) ? 7U : 15U;
 
 	/* Configure SPI.
 	 * */
@@ -173,7 +173,7 @@ void SPI_startup(int bus, int freq, int mode)
 		TIM8->CR1 = TIM_CR1_OPM;
 		TIM8->CR2 = 0;
 		TIM8->SMCR = 0;
-		TIM8->DIER = TIM_DIER_CC4DE | TIM_DIER_CC3DE | TIM_DIER_CC2DE | TIM_DIER_CC1DE;
+		TIM8->DIER = TIM_DIER_CC3DE | TIM_DIER_CC2DE;
 		TIM8->CCMR1 = 0;
 		TIM8->CCMR2 = 0;
 		TIM8->CCER = 0;
@@ -184,9 +184,9 @@ void SPI_startup(int bus, int freq, int mode)
 		TIM8->CCR3 = 42;	/* rxbuf = DR */
 		TIM8->CCR4 = 42;	/* NSS = 1 */
 
-		dsize = (mode & SPI_SIZE_8) ? 0U : 1U;
+		dsize = (mode & SPI_DATA_8) ? 0U : 1U;
 
-		/* DMA on TIM8_CH3.
+		/* Enable DMA on TIM8_CH3.
 		 * */
 		DMA2_Stream4->CR = (7U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
 			| (dsize << DMA_SxCR_MSIZE_Pos) | (dsize << DMA_SxCR_PSIZE_Pos)
@@ -194,7 +194,7 @@ void SPI_startup(int bus, int freq, int mode)
 		DMA2_Stream4->PAR = (uint32_t) &priv_SPI[bus].SPI->DR;
 		DMA2_Stream4->FCR = DMA_SxFCR_DMDIS;
 
-		/* DMA on TIM8_CH2.
+		/* Enable DMA on TIM8_CH2.
 		 * */
 		DMA2_Stream3->CR = (7U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
 			| (dsize << DMA_SxCR_MSIZE_Pos) | (dsize << DMA_SxCR_PSIZE_Pos)
@@ -202,48 +202,53 @@ void SPI_startup(int bus, int freq, int mode)
 		DMA2_Stream3->PAR = (uint32_t) &priv_SPI[bus].SPI->DR;
 		DMA2_Stream3->FCR = DMA_SxFCR_DMDIS;
 
-#define XGPIO_GET_BSRR(xGPIO)	(GPIOA_BASE + 0x0400U * XGPIO_GET_PORT(xGPIO) + 0x18U)
-
-		/* DMA on TIM8_CH1.
-		 * */
-		DMA2_Stream2->CR = (7U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
-			| (2U << DMA_SxCR_MSIZE_Pos) | (2U << DMA_SxCR_PSIZE_Pos)
-			| DMA_SxCR_DIR_0 | DMA_SxCR_CIRC;
-		DMA2_Stream2->NDTR = 1;
-		DMA2_Stream2->PAR = (uint32_t) XGPIO_GET_BSRR(priv_SPI[bus].gpio_NSS);
-		DMA2_Stream2->M0AR = (uint32_t) &priv_SPI[bus].dmabuf[0];
-		DMA2_Stream2->FCR = DMA_SxFCR_DMDIS;
-
-		/* DMA on TIM8_CH4.
-		 * */
-		DMA2_Stream7->CR = (7U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
-			| (2U << DMA_SxCR_MSIZE_Pos) | (2U << DMA_SxCR_PSIZE_Pos)
-			| DMA_SxCR_DIR_0 | DMA_SxCR_CIRC;
-		DMA2_Stream7->NDTR = 1;
-		DMA2_Stream7->PAR = (uint32_t) XGPIO_GET_BSRR(priv_SPI[bus].gpio_NSS);
-		DMA2_Stream7->M0AR = (uint32_t) &priv_SPI[bus].dmabuf[1];
-		DMA2_Stream7->FCR = DMA_SxFCR_DMDIS;
+		if (mode & SPI_NSS_ON) {
 
-		N = XGPIO_GET_N(priv_SPI[bus].gpio_NSS);
+			TIM8->DIER |= TIM_DIER_CC4DE | TIM_DIER_CC1DE;
 
-		priv_SPI[bus].dmabuf[0] = (1U << (N + 16));
-		priv_SPI[bus].dmabuf[1] = (1U << N);
+#define XGPIO_GET_BSRR(xGPIO)	(GPIOA_BASE + 0x0400U * XGPIO_GET_PORT(xGPIO) + 0x18U)
 
-		__DSB();
+			/* Enable DMA on TIM8_CH1.
+			 * */
+			DMA2_Stream2->CR = (7U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
+				| (2U << DMA_SxCR_MSIZE_Pos) | (2U << DMA_SxCR_PSIZE_Pos)
+				| DMA_SxCR_DIR_0 | DMA_SxCR_CIRC;
+			DMA2_Stream2->NDTR = 1;
+			DMA2_Stream2->PAR = (uint32_t) XGPIO_GET_BSRR(priv_SPI[bus].gpio_NSS);
+			DMA2_Stream2->M0AR = (uint32_t) &priv_SPI[bus].dmabuf[0];
+			DMA2_Stream2->FCR = DMA_SxFCR_DMDIS;
+
+			/* Enable DMA on TIM8_CH4.
+			 * */
+			DMA2_Stream7->CR = (7U << DMA_SxCR_CHSEL_Pos) | DMA_SxCR_PL_1
+				| (2U << DMA_SxCR_MSIZE_Pos) | (2U << DMA_SxCR_PSIZE_Pos)
+				| DMA_SxCR_DIR_0 | DMA_SxCR_CIRC;
+			DMA2_Stream7->NDTR = 1;
+			DMA2_Stream7->PAR = (uint32_t) XGPIO_GET_BSRR(priv_SPI[bus].gpio_NSS);
+			DMA2_Stream7->M0AR = (uint32_t) &priv_SPI[bus].dmabuf[1];
+			DMA2_Stream7->FCR = DMA_SxFCR_DMDIS;
+
+			N = XGPIO_GET_N(priv_SPI[bus].gpio_NSS);
+
+			priv_SPI[bus].dmabuf[0] = (1U << (N + 16));
+			priv_SPI[bus].dmabuf[1] = (1U << N);
+
+			__DSB();
 
 #ifdef STM32F7
-		/* D-Cache Clean.
-		 * */
-		SCB->DCCMVAC = (uint32_t) &priv_SPI[bus].dmabuf[0];
+			/* D-Cache Clean.
+			 * */
+			SCB->DCCMVAC = (uint32_t) &priv_SPI[bus].dmabuf[0];
 
-		__DSB();
-		__ISB();
+			__DSB();
+			__ISB();
 #endif /* STM32F7 */
 
-		/* Enable DMA2.
-		 * */
-		DMA2_Stream2->CR |= DMA_SxCR_EN;
-		DMA2_Stream7->CR |= DMA_SxCR_EN;
+			/* Enable DMA2.
+			 * */
+			DMA2_Stream2->CR |= DMA_SxCR_EN;
+			DMA2_Stream7->CR |= DMA_SxCR_EN;
+		}
 	}
 
 	/* Enable SPI.
@@ -306,7 +311,6 @@ void SPI_halt(int bus)
 				|| (DMA2_Stream7->CR & DMA_SxCR_EN)) {
 
 			__NOP();
-			__NOP();
 
 			if (N > 70000U)
 				break;
@@ -353,10 +357,9 @@ uint16_t SPI_transfer(int bus, uint16_t txbuf)
 	if (priv_SPI[bus].SPI == 0)
 		return 0U;
 
-	while ((priv_SPI[bus].SPI->SR & SPI_SR_TXE) == 0) {
+	while ((priv_SPI[bus].SPI->SR & SPI_SR_TXE) != SPI_SR_TXE) {
 
 		__NOP();
-		__NOP();
 
 		if (N > 70000U)
 			return 0U;
@@ -369,18 +372,16 @@ uint16_t SPI_transfer(int bus, uint16_t txbuf)
 
 	priv_SPI[bus].SPI->DR = txbuf;
 
-	while ((priv_SPI[bus].SPI->SR & SPI_SR_RXNE) == 0) {
+	while ((priv_SPI[bus].SPI->SR & SPI_SR_RXNE) != SPI_SR_RXNE) {
 
 		__NOP();
-		__NOP();
 	}
 
 	txbuf = priv_SPI[bus].SPI->DR;
 
-	while (priv_SPI[bus].SPI->SR & SPI_SR_BSY) {
+	while ((priv_SPI[bus].SPI->SR & SPI_SR_BSY) == SPI_SR_BSY) {
 
 		__NOP();
-		__NOP();
 	}
 
 	TIM_wait_ns(priv_SPI[bus].hold);
@@ -417,8 +418,10 @@ void SPI_transfer_dma(int bus, const uint16_t *txbuf, uint16_t *rxbuf, int len)
 	DMA2_Stream4->M0AR = (uint32_t) rxbuf;
 	DMA2_Stream3->M0AR = (uint32_t) txbuf;
 
-	DMA2->LIFCR = DMA_LIFCR_CTCIF3 | DMA_LIFCR_CHTIF3 | DMA_LIFCR_CTEIF3 | DMA_LIFCR_CFEIF3;
-	DMA2->HIFCR = DMA_HIFCR_CTCIF4 | DMA_HIFCR_CHTIF4 | DMA_HIFCR_CTEIF4 | DMA_HIFCR_CFEIF4;
+	DMA2->LIFCR = DMA_LIFCR_CTCIF3 | DMA_LIFCR_CHTIF3
+		| DMA_LIFCR_CTEIF3 | DMA_LIFCR_CFEIF3;
+	DMA2->HIFCR = DMA_HIFCR_CTCIF4 | DMA_HIFCR_CHTIF4
+		| DMA_HIFCR_CTEIF4 | DMA_HIFCR_CFEIF4;
 
 	/* Enable DMA2.
 	 * */
diff --git a/src/hal/spi.h b/src/hal/spi.h
index b70ea3f..7bb2609 100644
--- a/src/hal/spi.h
+++ b/src/hal/spi.h
@@ -44,7 +44,8 @@ enum {
 	SPI_HIGH_RISING,
 
 	SPI_DMA			= 4,
-	SPI_SIZE_8		= 8
+	SPI_DATA_8		= 8,
+	SPI_NSS_ON		= 32
 };
 
 enum {
diff --git a/src/hal/step.c b/src/hal/step.c
index aec39ea..2d1c463 100644
--- a/src/hal/step.c
+++ b/src/hal/step.c
@@ -113,7 +113,6 @@ STEP_halt()
 	while (DMA2_Stream1->CR & DMA_SxCR_EN) {
 
 		__NOP();
-		__NOP();
 
 		if (N > 70000U)
 			break;
diff --git a/src/hal/tim.c b/src/hal/tim.c
index 1b0013b..a065b81 100644
--- a/src/hal/tim.c
+++ b/src/hal/tim.c
@@ -27,7 +27,7 @@ void TIM_startup()
 	TIM7->DIER = TIM_DIER_UIE;
 	TIM7->CNT = 0;
 	TIM7->PSC = 0;
-	TIM7->ARR = 65535;
+	TIM7->ARR = 65535U;
 
 	/* Enable IRQ.
 	 * */
@@ -41,20 +41,21 @@ void TIM_startup()
 
 void TIM_wait_ns(int ns)
 {
-	int			CNT, timeout, elapsed;
+	uint32_t		END, CNT;
 
-	CNT = TIM7->CNT;
-
-	timeout = ns * (CLOCK_TIM7_HZ / 1000000UL) / 1000UL;
+	END = TIM7->CNT + (uint32_t) (ns)
+		* (CLOCK_TIM7_HZ / 1000000UL) / 1000UL;
 
 	do {
-		elapsed = (int) (TIM7->CNT - CNT) & 0xFFFFU;
+		CNT = TIM7->CNT;
+
+		if (CNT < END)
+			CNT += 65535U;
 
-		if (elapsed >= timeout)
+		if (CNT >= END)
 			break;
 
 		__NOP();
-		__NOP();
 	}
 	while (1);
 }
diff --git a/src/hal/usb.c b/src/hal/usb.c
index 7179c1c..199a7f8 100644
--- a/src/hal/usb.c
+++ b/src/hal/usb.c
@@ -65,7 +65,14 @@ static const uint8_t		cdc_acm_descriptor[] = {
 void usb_dc_low_level_init(void)
 {
 #if defined(STM32F4)
-	USB_OTG_FS->GCCFG = USB_OTG_GCCFG_NOVBUSSENS | USB_OTG_GCCFG_PWRDWN;
+	if (hal.MCU_ID == MCU_ID_STM32F405) {
+
+		USB_OTG_FS->GCCFG = USB_OTG_GCCFG_NOVBUSSENS | USB_OTG_GCCFG_PWRDWN;
+	}
+	else if (hal.MCU_ID == MCU_ID_GD32F405) {
+
+		USB_OTG_FS->GCCFG = (0x000DU << 16);	/* PWRON | VBUSACEN | VBUSBCEN */
+	}
 #elif defined(STM32F7)
 	USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL | USB_OTG_GOTGCTL_BVALOEN;
 	USB_OTG_FS->GCCFG = USB_OTG_GCCFG_PWRDWN;
diff --git a/src/libc.c b/src/libc.c
index b31464c..7209837 100644
--- a/src/libc.c
+++ b/src/libc.c
@@ -12,7 +12,7 @@ io_ops_t		*iodef;
 
 uint32_t		rseed;
 
-void *memset(void *d, int c, size_t n)
+void *memset(void *d, int c, size_t len)
 {
 	uint32_t	fill, *ld = (uint32_t *) d;
 
@@ -22,37 +22,37 @@ void *memset(void *d, int c, size_t n)
 		fill |= (fill << 8);
 		fill |= (fill << 16);
 
-		while (n >= 4U) {
+		while (len >= 4U) {
 
 			*ld++ = fill;
-			n -= 4U;
+			len -= 4U;
 		}
 	}
 
 	{
 		uint8_t		*xd = (uint8_t *) ld;
 
-		while (n >= 1U) {
+		while (len >= 1U) {
 
 			*xd++ = (uint8_t) c;
-			n -= 1U;
+			len -= 1U;
 		}
 	}
 
 	return d;
 }
 
-void *memcpy(void *restrict d, const void *restrict s, size_t n)
+void *memcpy(void *restrict d, const void *restrict s, size_t len)
 {
 	uint32_t	*restrict ld = (uint32_t * restrict) d;
 	const uint32_t	*restrict ls = (const uint32_t * restrict) s;
 
 	if (likely(((uint32_t) ld & 3U) == 0 && ((uint32_t) ls & 3U) == 0)) {
 
-		while (n >= 4U) {
+		while (len >= 4U) {
 
 			*ld++ = *ls++;
-			n -= 4U;
+			len -= 4U;
 		}
 	}
 
@@ -60,10 +60,10 @@ void *memcpy(void *restrict d, const void *restrict s, size_t n)
 		uint8_t		*restrict xd = (uint8_t * restrict) ld;
 		const uint8_t	*restrict xs = (const uint8_t * restrict) ls;
 
-		while (n >= 1U) {
+		while (len >= 1U) {
 
 			*xd++ = *xs++;
-			n -= 1U;
+			len -= 1U;
 		}
 	}
 
@@ -98,7 +98,7 @@ int strcmpe(const char *s, const char *p)
 
 		c = *s - *p;
 
-		if (c)
+		if (c != 0)
 			break;
 
 		++s;
@@ -120,7 +120,7 @@ int strcmpn(const char *s, const char *p, int n)
 
 		c = *s - *p;
 
-		if (c || *s == 0)
+		if (c != 0 || *s == 0)
 			break;
 
 		++s;
@@ -175,10 +175,10 @@ char *strcpy(char *restrict d, const char *restrict s)
 	return d;
 }
 
-char *strcpyn(char *restrict d, const char *restrict s, int n)
+char *strcpyn(char *restrict d, const char *restrict s, int len)
 {
 	do {
-		if (n < 1) {
+		if (len < 1) {
 
 			*d = 0;
 			break;
@@ -189,7 +189,7 @@ char *strcpyn(char *restrict d, const char *restrict s, int n)
 
 		++d;
 		++s;
-		--n;
+		--len;
 	}
 	while (1);
 
@@ -233,18 +233,18 @@ void xputs(io_ops_t *io, const char *s)
 	while (*s) io->putc(*s++);
 }
 
-void xputs_aligned(io_ops_t *io, const char *s, int nleft)
+void xputs_aligned(io_ops_t *io, const char *s, int left)
 {
 	while (*s) {
 
 		io->putc(*s++);
-		nleft--;
+		left--;
 	}
 
-	while (nleft > 0) {
+	while (left > 0) {
 
 		io->putc(' ');
-		nleft--;
+		left--;
 	}
 }
 
@@ -293,7 +293,7 @@ fmt_hex_long(io_ops_t *io, uint32_t x)
 }
 
 static void
-fmt_int_aligned(io_ops_t *io, int x, int nleft)
+fmt_int_aligned(io_ops_t *io, int x, int left)
 {
 	char		s[16], *p;
 	int		n;
@@ -303,7 +303,7 @@ fmt_int_aligned(io_ops_t *io, int x, int nleft)
 		io->putc('-');
 
 		x = - x;
-		nleft--;
+		left--;
 	}
 
 	p = s + 16;
@@ -319,13 +319,13 @@ fmt_int_aligned(io_ops_t *io, int x, int nleft)
 	while (*p) {
 
 		io->putc(*p++);
-		nleft--;
+		left--;
 	}
 
-	while (nleft > 0) {
+	while (left > 0) {
 
 		io->putc(' ');
-		nleft--;
+		left--;
 	}
 }
 
@@ -417,7 +417,7 @@ fmt_fp_normal(io_ops_t *io, float x, int n)
 	int		i, v;
 	float		h;
 
-	if (x < 0) {
+	if (x < 0.f) {
 
 		io->putc('-');
 
@@ -502,7 +502,7 @@ fmt_fp_pretty(io_ops_t *io, float x, int n)
 	int		i, v;
 	float		h;
 
-	if (x < 0) {
+	if (x < 0.f) {
 
 		io->putc('-');
 
@@ -820,12 +820,12 @@ const char *stof(float *x, const char *s)
 	return s;
 }
 
-uint32_t crc32b(const void *s, size_t n)
+uint32_t crc32u(const void *raw, size_t len)
 {
-	const uint32_t		*ls = (const uint32_t *) s;
-	uint32_t		crc, buf;
+	const uint32_t		*ip = (const uint32_t *) raw;
+	uint32_t		crcsum, seq;
 
-	static const uint32_t	mask[16] = {
+	static const uint32_t	lt[16] = {
 
 		0x00000000U, 0x1DB71064U, 0x3B6E20C8U, 0x26D930ACU,
 		0x76DC4190U, 0x6B6B51F4U, 0x4DB26158U, 0x5005713CU,
@@ -833,26 +833,26 @@ uint32_t crc32b(const void *s, size_t n)
 		0x9B64C2B0U, 0x86D3D2D4U, 0xA00AE278U, 0xBDBDF21CU
 	};
 
-	crc = 0xFFFFFFFFU;
+	crcsum = 0xFFFFFFFFU;
 
-	while (n >= 4U) {
+	while (len >= 4U) {
 
-		buf = *ls++;
-		n += - 4U;
+		seq = *ip++;
+		len += - 4U;
 
-		crc = crc ^ buf;
+		crcsum = crcsum ^ seq;
 
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
-		crc = (crc >> 4) ^ mask[crc & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
+		crcsum = (crcsum >> 4) ^ lt[crcsum & 0x0FU];
 	}
 
-	return crc ^ 0xFFFFFFFFU;
+	return crcsum ^ 0xFFFFFFFFU;
 }
 
 uint32_t urand()
diff --git a/src/libc.h b/src/libc.h
index bc1fd0b..f268c94 100644
--- a/src/libc.h
+++ b/src/libc.h
@@ -37,7 +37,7 @@ extern io_ops_t		io_USART;
 extern io_ops_t		io_USB;
 extern io_ops_t		io_CAN;
 
-/* Currently used.
+/* Currently used serial.
  * */
 extern io_ops_t		*iodef;
 
@@ -45,15 +45,15 @@ extern io_ops_t		*iodef;
  * */
 extern uint32_t		rseed;
 
-void *memset(void *d, int c, size_t n) LD_LIBC;
-void *memcpy(void *restrict d, const void *restrict s, size_t n) LD_LIBC;
+void *memset(void *d, int c, size_t len) LD_LIBC;
+void *memcpy(void *restrict d, const void *restrict s, size_t len) LD_LIBC;
 
 int strcmp(const char *s, const char *p);
 int strcmpe(const char *s, const char *p);
-int strcmpn(const char *s, const char *p, int x);
+int strcmpn(const char *s, const char *p, int n);
 const char *strstr(const char *s, const char *p);
 char *strcpy(char *restrict d, const char *restrict s);
-char *strcpyn(char *restrict d, const char *restrict s, int n);
+char *strcpyn(char *restrict d, const char *restrict s, int len);
 int strlen(const char *s);
 const char *strchr(const char *s, int c);
 
@@ -71,7 +71,7 @@ const char *stoi(int *x, const char *s);
 const char *htoi(int *x, const char *s);
 const char *stof(float *x, const char *s);
 
-uint32_t crc32b(const void *s, size_t n);
+uint32_t crc32u(const void *raw, size_t len);
 uint32_t urand();
 
 #endif /* _H_LIBC_ */
diff --git a/src/main.c b/src/main.c
index ab5100c..e1c55cf 100644
--- a/src/main.c
+++ b/src/main.c
@@ -183,7 +183,7 @@ LD_TASK void task_TEMP(void *pData)
 	TickType_t		xWake;
 
 	float			maximal_PCB, maximal_EXT, lock_PCB;
-	int			fsm_errno_last;
+	int			last_errno;
 
 	if (ap.ntc_PCB.type != NTC_NONE) {
 
@@ -202,7 +202,7 @@ LD_TASK void task_TEMP(void *pData)
 
 	lock_PCB = 0.f;
 
-	fsm_errno_last = PM_OK;
+	last_errno = PM_OK;
 
 	do {
 		/* 10 Hz.
@@ -310,7 +310,7 @@ LD_TASK void task_TEMP(void *pData)
 
 		if (pm.fsm_errno != PM_OK) {
 
-			if (pm.fsm_errno != fsm_errno_last) {
+			if (pm.fsm_errno != last_errno) {
 
 				log_TRACE("FSM errno %s" EOL, pm_strerror(pm.fsm_errno));
 			}
@@ -324,7 +324,7 @@ LD_TASK void task_TEMP(void *pData)
 			}
 		}
 
-		fsm_errno_last = pm.fsm_errno;
+		last_errno = pm.fsm_errno;
 	}
 	while (1);
 }
@@ -1131,18 +1131,18 @@ void app_halt()
 
 SH_DEF(ap_version)
 {
-	uint32_t	flash_sizeof, flash_crc32;
+	uint32_t	ld_sizeof, ld_crc32;
 	int		rc;
 
 	printf("Revision \"%s\"" EOL, fw.hwrevision);
 	printf("Build \"%s\"" EOL, fw.build);
 
-	flash_sizeof = fw.ld_end - fw.ld_begin;
-	flash_crc32 = * (uint32_t *) fw.ld_end;
+	ld_sizeof = fw.ld_crc32 - fw.ld_begin;
+	ld_crc32 = * (uint32_t *) fw.ld_crc32;
 
-	rc = (crc32b((const void *) fw.ld_begin, flash_sizeof) == flash_crc32) ? 1 : 0;
+	rc = (crc32u((const void *) fw.ld_begin, ld_sizeof) == ld_crc32) ? 1 : 0;
 
-	printf("CRC32 %8x (%s)" EOL, flash_crc32, (rc != 0) ? "OK" : "does NOT match");
+	printf("CRC32 %8x (%s)" EOL, ld_crc32, (rc != 0) ? "OK" : "does NOT match");
 }
 
 SH_DEF(ap_clock)
@@ -1309,6 +1309,6 @@ SH_DEF(ap_bootload)
 	vTaskDelay((TickType_t) 10);
 
 	app_halt();
-	hal_bootload_jump();
+	hal_bootload_reset();
 }
 
diff --git a/src/ntc.c b/src/ntc.c
index 0ab3700..18f5981 100644
--- a/src/ntc.c
+++ b/src/ntc.c
@@ -9,7 +9,7 @@ float ntc_read_temperature(ntc_t *ntc)
 {
 	float			um, ohm, temp;
 
-	um = ADC_get_sample(ntc->gpio);
+	um = ADC_get_sample(ntc->gpio) / hal.ADC_reference_voltage;
 
 	switch (ntc->type) {
 
diff --git a/src/ntc.h b/src/ntc.h
index 46acf43..86580c0 100644
--- a/src/ntc.h
+++ b/src/ntc.h
@@ -30,6 +30,7 @@ enum {
 	NTC_NONE		= 0,
 	NTC_GND,
 	NTC_VCC,
+
 	NTC_LMT87,
 	NTC_KTY83,
 	NTC_KTY84
diff --git a/src/phobia/libm.c b/src/phobia/libm.c
index 4485ef2..3296877 100644
--- a/src/phobia/libm.c
+++ b/src/phobia/libm.c
@@ -13,7 +13,7 @@ int m_isfinitef(float x)
 	return ((0xFFU & (u.i >> 23)) != 0xFFU) ? 1 : 0;
 }
 
-float m_fast_reciprocalf(float x)
+float m_fast_recipf(float x)
 {
 	union {
 		float		f;
diff --git a/src/phobia/libm.h b/src/phobia/libm.h
index 0d96b85..6395881 100644
--- a/src/phobia/libm.h
+++ b/src/phobia/libm.h
@@ -20,7 +20,7 @@ static inline float m_sqrtf(float x) { return __builtin_sqrtf(x); }
 
 int m_isfinitef(float x);
 
-float m_fast_reciprocalf(float x);
+float m_fast_recipf(float x);
 float m_fast_rsqrtf(float x);
 
 void m_rotatef(float x[2], float r);
diff --git a/src/phobia/lse.h b/src/phobia/lse.h
index f23083c..d96bf2b 100644
--- a/src/phobia/lse.h
+++ b/src/phobia/lse.h
@@ -14,7 +14,7 @@
 /* Define whether to use fast Givens transformation in QR update. Typical this
  * is useful for fairly large matrix sizes. Also consumes a few of memory.
  * */
-#define LSE_FAST_TRANSFORM		1
+#define LSE_FAST_TRANSFORM		0
 
 /* Define native floating-point type to use inside of LSE.
  * */
diff --git a/src/phobia/pm.c b/src/phobia/pm.c
index e5dc417..951029d 100644
--- a/src/phobia/pm.c
+++ b/src/phobia/pm.c
@@ -391,7 +391,7 @@ pm_auto_probe_speed_hold(pmc_t *pm)
 	if (pm->const_lambda > M_EPSILON) {
 
 		probe_MAX = 0.7f * pm->k_EMAX * pm->const_fb_U
-			* m_fast_reciprocalf(pm->const_lambda);
+			* m_fast_recipf(pm->const_lambda);
 
 		if (pm->probe_speed_hold > probe_MAX) {
 
@@ -419,7 +419,7 @@ pm_auto_zone_threshold(pmc_t *pm)
 
 		if (pm->const_lambda > M_EPSILON) {
 
-			thld_MAX = 10.f * m_fast_reciprocalf(pm->const_lambda);
+			thld_MAX = 10.f * m_fast_recipf(pm->const_lambda);
 
 			if (pm->zone_noise > thld_MAX) {
 
@@ -455,7 +455,7 @@ pm_auto_zone_threshold(pmc_t *pm)
 			/* Total zone threshold.
 			 * */
 			pm->zone_threshold = thld_IRU
-				* m_fast_reciprocalf(pm->const_lambda);
+				* m_fast_recipf(pm->const_lambda);
 		}
 
 		thld_MAX = 0.8f * pm->forced_maximal - pm->zone_noise;
@@ -488,7 +488,7 @@ pm_auto_forced_maximal(pmc_t *pm)
 	if (pm->const_lambda > M_EPSILON) {
 
 		forced_MAX = 0.7f * pm->k_EMAX * pm->const_fb_U
-			* m_fast_reciprocalf(pm->const_lambda);
+			* m_fast_recipf(pm->const_lambda);
 
 		if (pm->forced_maximal > forced_MAX) {
 
@@ -509,7 +509,7 @@ pm_auto_forced_accel(pmc_t *pm)
 
 		/* Tune forced control based on the motor constants.
 		 * */
-		pm->forced_accel = 0.1f * mQ * m_fast_reciprocalf(pm->const_Ja);
+		pm->forced_accel = 0.1f * mQ * m_fast_recipf(pm->const_Ja);
 	}
 }
 
@@ -540,7 +540,7 @@ pm_auto_loop_current(pmc_t *pm)
 		pm->i_gain_A = 1.f;
 
 		pm->i_slew_rate = 0.2f * pm->const_fb_U
-			* Df * m_fast_reciprocalf(Lmin);
+			* Df * m_fast_recipf(Lmin);
 	}
 }
 
@@ -551,7 +551,7 @@ pm_auto_loop_speed(pmc_t *pm)
 
 	if (pm->zone_noise > M_EPSILON) {
 
-		Df = pm->s_damping * m_fast_reciprocalf(pm->zone_noise);
+		Df = pm->s_damping * m_fast_recipf(pm->zone_noise);
 
 		if (pm->const_Ja > 0.f) {
 
@@ -560,11 +560,11 @@ pm_auto_loop_speed(pmc_t *pm)
 				relu = (pm->const_im_L1 - pm->const_im_L2) * pm->i_maximal;
 
 				pm->lu_gain_mq_LP = 4.f * Df * (pm->const_lambda + relu)
-					* pm->m_dT * m_fast_reciprocalf(pm->const_Ja);
+					* pm->m_dT * m_fast_recipf(pm->const_Ja);
 			}
 			else {
 				pm->lu_gain_mq_LP = 4.f * Df * pm->const_lambda
-					* pm->m_dT * m_fast_reciprocalf(pm->const_Ja);
+					* pm->m_dT * m_fast_recipf(pm->const_Ja);
 			}
 		}
 
@@ -724,7 +724,7 @@ pm_torque_get_accel(pmc_t *pm)
 	if (pm->const_Ja > 0.f) {
 
 		tA = (pm->lu_mq_produce - pm->lu_mq_load)
-			* m_fast_reciprocalf(pm->const_Ja);
+			* m_fast_recipf(pm->const_Ja);
 	}
 
 	return tA;
@@ -744,7 +744,7 @@ pm_forced(pmc_t *pm)
 
 	/* Reduce the acceleration in case of current lack.
 	 * */
-	xRF = m_fabsf(pm->forced_track_D * m_fast_reciprocalf(pm->forced_hold_D));
+	xRF = m_fabsf(pm->forced_track_D * m_fast_recipf(pm->forced_hold_D));
 	dSA = pm->forced_accel * xRF * pm->m_dT;
 
 	if (		pm->vsi_lpf_DC < pm->forced_stop_DC
@@ -814,7 +814,7 @@ pm_flux_detached(pmc_t *pm)
 
 			if (A > M_EPSILON) {
 
-				blend = U * m_fast_reciprocalf(pm->detach_trip_tol);
+				blend = U * m_fast_recipf(pm->detach_trip_tol);
 				blend = (blend > 1.f) ? 1.f : blend;
 
 				A = pm->detach_gain_SF * blend;
@@ -822,7 +822,7 @@ pm_flux_detached(pmc_t *pm)
 				pm->flux_wS += B * pm->m_freq * A;
 			}
 
-			pm->flux_lambda = U * m_fast_reciprocalf(m_fabsf(pm->flux_wS));
+			pm->flux_lambda = U * m_fast_recipf(m_fabsf(pm->flux_wS));
 
 			A = (pm->flux_wS < 0.f) ? - 1.f : 1.f;
 
@@ -875,7 +875,7 @@ pm_flux_ortega(pmc_t *pm)
 		EY = pm->flux_X[1] - lY;
 
 		blend = m_fabsf(pm->flux_wS * pm->const_lambda)
-			* m_fast_reciprocalf(pm->flux_trip_tol);
+			* m_fast_recipf(pm->flux_trip_tol);
 		blend = (blend > 1.f) ? 1.f : blend;
 
 		/* Get the flux RESIDUE.
@@ -1129,7 +1129,7 @@ pm_kalman_update(pmc_t *pm, const float X[2])
 	CP[4] = P[10] - X[1] * P[12];
 
 	S = CP[0] - CP[2] * X[1] + pm->kalman_gain_R;
-	u = m_fast_reciprocalf(S);
+	u = m_fast_recipf(S);
 
 	K[0] = CP[0] * u;
 	K[2] = CP[1] * u;
@@ -1160,7 +1160,7 @@ pm_kalman_update(pmc_t *pm, const float X[2])
 	CP[4] = P[11] + X[0] * P[12];
 
 	S = CP[1] + CP[2] * X[0] + pm->kalman_gain_R;
-	u = m_fast_reciprocalf(S);
+	u = m_fast_recipf(S);
 
 	K[1] = CP[0] * u;
 	K[3] = CP[1] * u;
@@ -1499,7 +1499,7 @@ pm_sensor_hall(pmc_t *pm)
 			m_rotatef(pm->hall_F, rel);
 
 			blend = m_fabsf(pm->hall_wS)
-				* m_fast_reciprocalf(pm->hall_trip_tol);
+				* m_fast_recipf(pm->hall_trip_tol);
 			blend = (blend > 1.f) ? 1.f : blend;
 
 			A =	  pm->hall_gain_SF * blend
@@ -1612,7 +1612,7 @@ pm_sensor_eabi(pmc_t *pm)
 
 	pm->eabi_interp += rel;
 
-	blend = m_fabsf(pm->eabi_wS) * m_fast_reciprocalf(pm->eabi_trip_tol);
+	blend = m_fabsf(pm->eabi_wS) * m_fast_recipf(pm->eabi_trip_tol);
 	blend = (blend > 1.f) ? 1.f : blend;
 
 	A =	  pm->eabi_gain_SF * blend
@@ -2816,7 +2816,7 @@ pm_loop_current(pmc_t *pm)
 				 * */
 				eSP = pm->l_track - pm->lu_wS;
 
-				blend = m_fabsf(eSP) * m_fast_reciprocalf(pm->l_track_tol);
+				blend = m_fabsf(eSP) * m_fast_recipf(pm->l_track_tol);
 				blend = (blend > 1.f) ? 1.f : blend;
 
 				/* Blend current setpoint with speed regulation.
@@ -2860,7 +2860,7 @@ pm_loop_current(pmc_t *pm)
 				eDC = pm->k_EMAX * pm->const_fb_U;
 				wLS = pm->lu_wS * pm->const_im_L2;
 
-				iMAX = eDC * m_fast_reciprocalf(m_fabsf(wLS));
+				iMAX = eDC * m_fast_recipf(m_fabsf(wLS));
 
 				track_Q = (track_Q > iMAX) ? iMAX
 					: (track_Q < - iMAX) ? - iMAX : track_Q;
@@ -3200,7 +3200,7 @@ pm_loop_location(pmc_t *pm)
 
 	/* Damping inside NEAR zone.
 	 * */
-	blend = (eABS < pm->x_boost_tol) ? eABS * m_fast_reciprocalf(pm->x_boost_tol) : 1.f;
+	blend = (eABS < pm->x_boost_tol) ? eABS * m_fast_recipf(pm->x_boost_tol) : 1.f;
 	gain = pm->x_gain_P * blend + pm->x_gain_D * (1.f - blend);
 
 	wSP += gain * eLOC;
diff --git a/src/phobia/pm_fsm.c b/src/phobia/pm_fsm.c
index 662728a..42baab3 100644
--- a/src/phobia/pm_fsm.c
+++ b/src/phobia/pm_fsm.c
@@ -2047,7 +2047,7 @@ pm_fsm_state_adjust_sensor_hall(pmc_t *pm)
 
 					float		l;
 
-					l = m_fast_reciprocalf((float) dnum[HS]);
+					l = m_fast_recipf((float) dnum[HS]);
 
 					pm->hall_ST[HS].X *= l;
 					pm->hall_ST[HS].Y *= l;
diff --git a/src/pmtest.c b/src/pmtest.c
index d56d9ab..692172a 100644
--- a/src/pmtest.c
+++ b/src/pmtest.c
@@ -31,8 +31,11 @@ SH_DEF(pm_self_test)
 		reg_OUTP(ID_PM_SCALE_IC0);
 		reg_OUTP(ID_PM_SELF_STDI);
 
-		if (pm.fsm_errno != PM_OK)
+		if (pm.fsm_errno != PM_OK) {
+
+			reg_OUTP(ID_PM_FSM_ERRNO);
 			break;
+		}
 
 		if (PM_CONFIG_TVM(&pm) == PM_ENABLED) {
 
@@ -292,7 +295,6 @@ SH_DEF(pm_self_impedance)
 SH_DEF(hal_ADC_scan)
 {
 	int			xCH, xGPIO;
-	float			fvoltage;
 
 	const int gpios_stm32f405_lqfp64[16] = {
 
@@ -317,14 +319,16 @@ SH_DEF(hal_ADC_scan)
 	if (		stoi(&xCH, s) != NULL
 			&& xCH >= 0 && xCH < 16) {
 
+		float		um;
+
 		xGPIO = gpios_stm32f405_lqfp64[xCH];
 
 		GPIO_set_mode_ANALOG(xGPIO);
 
-		fvoltage = ADC_get_sample(xGPIO) * hal.ADC_reference_voltage;
+		um = ADC_get_sample(xGPIO);
 
 		printf("P%c%i %4f (V)" EOL, 'A' + XGPIO_GET_PORT(xGPIO),
-				XGPIO_GET_N(xGPIO), &fvoltage);
+				XGPIO_GET_N(xGPIO), &um);
 	}
 }
 
diff --git a/src/regdefs.h b/src/regdefs.h
index 4baee69..9d5602b 100644
--- a/src/regdefs.h
+++ b/src/regdefs.h
@@ -1,4 +1,5 @@
 ID_NULL,
+ID_HAL_MCU_ID,
 ID_HAL_USART_BAUDRATE,
 ID_HAL_USART_PARITY,
 ID_HAL_PWM_FREQUENCY,
diff --git a/src/regfile.c b/src/regfile.c
index b26a518..dcb8e90 100644
--- a/src/regfile.c
+++ b/src/regfile.c
@@ -1028,6 +1028,19 @@ reg_format_enum(const reg_t *reg)
 
 	switch (reg_ID) {
 
+		case ID_HAL_MCU_ID:
+
+			switch (val) {
+
+				PM_SFI_CASE(MCU_ID_UNKNOWN);
+				PM_SFI_CASE(MCU_ID_STM32F405);
+				PM_SFI_CASE(MCU_ID_STM32F722);
+				PM_SFI_CASE(MCU_ID_GD32F405);
+
+				default: break;
+			}
+			break;
+
 		case ID_HAL_USART_PARITY:
 
 			switch (val) {
@@ -1495,6 +1508,8 @@ const reg_t		regfile[] = {
 
 	REG_DEF(null,,,				"",	"%0i",	REG_READ_ONLY, NULL, NULL),
 
+	REG_DEF(hal.MCU_ID,,,			"",	"%0i",	REG_READ_ONLY, NULL, &reg_format_enum),
+
 	REG_DEF(hal.USART_baudrate,,,		"",	"%0i",	REG_CONFIG, NULL, NULL),
 	REG_DEF(hal.USART_parity,,,		"",	"%0i",	REG_CONFIG, NULL, &reg_format_enum),
 
diff --git a/src/shell.c b/src/shell.c
index 656a6f3..95f6b72 100644
--- a/src/shell.c
+++ b/src/shell.c
@@ -151,7 +151,7 @@ sh_common_match(priv_sh_t *sh)
 {
 	const sh_cmd_t		*cmd;
 	const char		*id, *sp;
-	int			n;
+	int			len;
 
 	sp = NULL;
 	cmd = cmLIST;
@@ -166,7 +166,7 @@ sh_common_match(priv_sh_t *sh)
 
 		if (strcmpe(sh->cline, id) == 0) {
 
-			n = (sp != NULL) ? strcmpn(sp, id, n) : strlen(id);
+			len = (sp != NULL) ? strcmpn(sp, id, len) : strlen(id);
 			sp = id;
 
 			sh->cnum++;
@@ -178,10 +178,10 @@ sh_common_match(priv_sh_t *sh)
 
 	if (sp != NULL) {
 
-		n = (n > SH_CLINE_MAX - 2) ? SH_CLINE_MAX - 2 : n;
+		len = (len > SH_CLINE_MAX - 2) ? SH_CLINE_MAX - 2 : len;
 
-		strcpyn(sh->cline, sp, n);
-		sh->ceon = n;
+		strcpyn(sh->cline, sp, len);
+		sh->ceon = len;
 	}
 	else {
 		sh->ceon = 0;
@@ -532,10 +532,10 @@ sh_line_null(priv_sh_t *sh)
 
 const char *sh_next_arg(const char *s)
 {
-	int			n;
+	int			len;
 
-	n = strlen(s);
-	s += (n != 0) ? n + 1 : 0;
+	len = strlen(s);
+	s += (len != 0) ? len + 1 : 0;
 
 	return s;
 }