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@riscv-steel

RISC-V Steel

riscv-steel
Netherlands

Hello! I’m Rafa (github.com/rafaelcalcada), a computer engineer from Brazil currently working at Siemens EDA in the Netherlands. For the past five years, I have dedicated myself to developing RISC-V Steel, a project that began as my final thesis in computer engineering.

RISC-V Steel was launched in 2020 with the vision of creating a simple yet powerful RISC-V processor core. The positive response on GitHub, with daily visits and downloads, inspired me to expand the project into a versatile microcontroller IP core. It now includes essential features such as memory, timers, UART, GPIO, and SPI modules. Today, RISC-V Steel stands as a robust microcontroller unit, perfectly suited for embedded applications, system-on-chip (SoC) designs, and FPGA implementations.

As an open-source project, RISC-V Steel thrives on community support. Your contributions, whether through feedback, collaboration, or financial backing, are crucial in driving the development forward. By supporting this project, you are not only encouraging my efforts but also becoming a part of an exciting journey toward advancing open-source digital electronics and RISC-V technology.

Thank you for considering a contribution to RISC-V Steel! Your support means the world to me and will help unlock even more potential for this project.

@riscv-steel

Motivate me to work even harder. Buy equipament to test RISC-V Steel in new FPGA development boards.

Featured work

  1. riscv-steel/riscv-steel

    RISC-V 32-bit microcontroller developed in Verilog

    Verilog 158

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