diff --git a/android-project/app/src/main/AndroidManifest.xml b/android-project/app/src/main/AndroidManifest.xml index 8d076b0e13843..4d7e9e07a8dad 100644 --- a/android-project/app/src/main/AndroidManifest.xml +++ b/android-project/app/src/main/AndroidManifest.xml @@ -4,8 +4,8 @@ --> diff --git a/docs/source/techspecs/layout_files.rst b/docs/source/techspecs/layout_files.rst index 4cc3bbf3edd89..d9976faf00d54 100644 --- a/docs/source/techspecs/layout_files.rst +++ b/docs/source/techspecs/layout_files.rst @@ -1461,33 +1461,36 @@ Example layout files These layout files demonstrate various artwork system features. They are all internal layouts included in MAME. -`sstrangr.lay `_ +`sstrangr.lay `_ A simple case of using translucent colour overlays to visually separate and highlight elements on a black and white screen. -`seawolf.lay `_ +`seawolf.lay `_ This system uses lamps for key gameplay elements. Blending modes are used for the translucent colour overlay placed over the monitor, and the lamps reflected in front of the monitor. Also uses collections to allow parts of the layout to be disabled selectively. -`armora.lay `_ +`armora.lay `_ This game’s monitor is viewed directly through a translucent colour overlay rather than being reflected from inside the cabinet. This means the overlay reflects ambient light as well as affecting the colour of the video image. The shapes on the overlay are drawn using embedded SVG images. -`tranz330.lay `_ +`tranz330.lay `_ A multi-segment alphanumeric display and keypad. The keys are clickable, and provide visual feedback when pressed. -`esq2by16.lay `_ +`esq2by16.lay `_ Builds up a multi-line dot matrix character display. Repeats are used to avoid repetition for the rows in a character, characters in a line, and lines in a page. Group colors allow a single element to be used for all four display colours. -`cgang.lay `_ +`cgang.lay `_ Animates the position of element items to simulate an electromechanical shooting gallery game. Also demonstrates effective use of components to build up complex graphics. -`unkeinv.lay `_ +`minspace.lay `_ Shows the position of a slider control with LEDs on it. -`md6802.lay `_ +`md6802.lay `_ Effectively using groups as a procedural programming language to build up an image of a trainer board. +`beena.lay `_ + Using event-based scripting to dynamically position elements and draw elemnt + content programmatically. diff --git a/hash/casio_rompack.xml b/hash/casio_rompack.xml index cd40772b03ac6..1a778743f5eda 100644 --- a/hash/casio_rompack.xml +++ b/hash/casio_rompack.xml @@ -420,7 +420,7 @@ license:CC0-1.0 3 I Left My Heart In San Francisco 4 Memories Of You The earlier (1984) edition of this pack is labelled "Jazz Standards" while the later (1986) edition is "Great Standards." - There are apparently no other differences between the editions. + There are apparently no other differences between the editions. --> Great Standards (RO-355) diff --git a/hash/cz1_cart.xml b/hash/cz1_cart.xml new file mode 100644 index 0000000000000..02394e9d73de3 --- /dev/null +++ b/hash/cz1_cart.xml @@ -0,0 +1,44 @@ + + + + + + + Orchestra (RC-10) + 1986 + Casio + + + + + + + + + + Piano / Guitar / Percussion (RC-20) + 1986 + Casio + + + + + + + + + + Organ / Synth. Sound / Sound Effect (RC-30) + 1986 + Casio + + + + + + + + + diff --git a/hash/ibm5170_cdrom.xml b/hash/ibm5170_cdrom.xml index 3ddefe961686d..4021264ab082d 100644 --- a/hash/ibm5170_cdrom.xml +++ b/hash/ibm5170_cdrom.xml @@ -3021,7 +3021,7 @@ Terminal Velocity: incompatible with Windows 95 (verify), has unsupported option Dune II - Battle for Arrakis (Netherlands) 1995 Hit Squad - + @@ -3041,7 +3041,7 @@ Terminal Velocity: incompatible with Windows 95 (verify), has unsupported option Dune II - Battle for Arrakis (Germany, PC Games Collection 2 release) 2001 Electronic Arts / Infogrames - + @@ -3060,7 +3060,7 @@ Terminal Velocity: incompatible with Windows 95 (verify), has unsupported option Dune II - The Building of a Dynasty (USA, Gold Medal 12 CD Pack) 1995 Virgin Games - + @@ -5403,6 +5403,26 @@ Warlords III: Darklords Rising + + + + + Primal Rage (USA, DOS) + 1994 + Time Warner Interactive + + + + + + + + + diff --git a/hash/spectrum_betadisc_flop.xml b/hash/spectrum_betadisc_flop.xml index e7dbe1f81875a..ab3172829028e 100644 --- a/hash/spectrum_betadisc_flop.xml +++ b/hash/spectrum_betadisc_flop.xml @@ -488,7 +488,7 @@ license:CC0-1.0 - Seto Taisho To Kazan + Seto Taisho to Kazan 2017 Monument Microgames diff --git a/hash/spectrum_cass.xml b/hash/spectrum_cass.xml index 574c178170692..7d923bda7f672 100644 --- a/hash/spectrum_cass.xml +++ b/hash/spectrum_cass.xml @@ -23910,7 +23910,7 @@ Side B: Laser Shoot (original release) - + @@ -35766,7 +35766,7 @@ Side B - 5 - Campagna Abbonamenti (original release) - Load'N'Run N. 4 (Italy) - Aprile 1984 + Load'N'Run (Italy) N. 4 - Aprile 1984 1984 MK Periodici Teodoro no Sabe Volar (Russian, TAP tape image) 2010 - Retroworks + Retroworks diff --git a/hash/zx81_cass.xml b/hash/zx81_cass.xml index 3dbae8af2fe19..21f71e6c2bec2 100644 --- a/hash/zx81_cass.xml +++ b/hash/zx81_cass.xml @@ -245,15 +245,15 @@ Known dumps not yet added (as of 2023-06-14): 8 Programmes by GM4IHJ 198? diff --git a/makefile b/makefile index dcd274bbef45e..26e9f652e7218 100644 --- a/makefile +++ b/makefile @@ -1564,7 +1564,7 @@ endif ifeq (posix,$(SHELLTYPE)) $(GENDIR)/version.cpp: makefile $(GENDIR)/git_desc | $(GEN_FOLDERS) - @echo '#define BARE_BUILD_VERSION "0.260"' > $@ + @echo '#define BARE_BUILD_VERSION "0.261"' > $@ @echo '#define BARE_VCS_REVISION "$(NEW_GIT_VERSION)"' >> $@ @echo 'extern const char bare_build_version[];' >> $@ @echo 'extern const char bare_vcs_revision[];' >> $@ @@ -1574,7 +1574,7 @@ $(GENDIR)/version.cpp: makefile $(GENDIR)/git_desc | $(GEN_FOLDERS) @echo 'const char build_version[] = BARE_BUILD_VERSION " (" BARE_VCS_REVISION ")";' >> $@ else $(GENDIR)/version.cpp: makefile $(GENDIR)/git_desc | $(GEN_FOLDERS) - @echo #define BARE_BUILD_VERSION "0.260" > $@ + @echo #define BARE_BUILD_VERSION "0.261" > $@ @echo #define BARE_VCS_REVISION "$(NEW_GIT_VERSION)" >> $@ @echo extern const char bare_build_version[]; >> $@ @echo extern const char bare_vcs_revision[]; >> $@ diff --git a/scripts/src/cpu.lua b/scripts/src/cpu.lua index d5012a8714ac3..52ba899263b1c 100644 --- a/scripts/src/cpu.lua +++ b/scripts/src/cpu.lua @@ -3911,10 +3911,17 @@ if opt_tool(CPUS, "EVOLUTION") then end -------------------------------------------------- --- Tensilica Xtensa, disassembler only +-- Tensilica Xtensa --@src/devices/cpu/xtensa/xtensa.h,CPUS["XTENSA"] = true -------------------------------------------------- +if CPUS["XTENSA"] then + files { + MAME_DIR .. "src/devices/cpu/xtensa/xtensa.cpp", + MAME_DIR .. "src/devices/cpu/xtensa/xtensa.h", + } +end + if opt_tool(CPUS, "XTENSA") then table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/xtensa/xtensad.cpp") table.insert(disasm_files , MAME_DIR .. "src/devices/cpu/xtensa/xtensad.h") diff --git a/scripts/src/machine.lua b/scripts/src/machine.lua index cae26f7e89fc1..28d3431abee47 100644 --- a/scripts/src/machine.lua +++ b/scripts/src/machine.lua @@ -2652,6 +2652,18 @@ if (MACHINES["MSM58321"]~=null) then } end +--------------------------------------------------- +-- +--@src/devices/machine/msm6200.h,MACHINES["MSM6200"] = true +--------------------------------------------------- + +if (MACHINES["MSM6200"]~=null) then + files { + MAME_DIR .. "src/devices/machine/msm6200.cpp", + MAME_DIR .. "src/devices/machine/msm6200.h", + } +end + --------------------------------------------------- -- --@src/devices/machine/msm6242.h,MACHINES["MSM6242"] = true @@ -2988,7 +3000,6 @@ if (MACHINES["PXA255"]~=null) then files { MAME_DIR .. "src/devices/machine/pxa255.cpp", MAME_DIR .. "src/devices/machine/pxa255.h", - MAME_DIR .. "src/devices/machine/pxa255defs.h", } end diff --git a/src/devices/bus/odyssey2/chess.h b/src/devices/bus/odyssey2/chess.h index 0b37c50684ce8..879b7cb933f08 100644 --- a/src/devices/bus/odyssey2/chess.h +++ b/src/devices/bus/odyssey2/chess.h @@ -44,12 +44,12 @@ class o2_chess_device : public device_t, required_device m_maincpu; required_device_array m_latch; + u8 m_control = 0; + u8 internal_rom_r(offs_t offset) { return m_exrom[offset]; } void chess_io(address_map &map); void chess_mem(address_map &map); - - u8 m_control = 0; }; // device type definition diff --git a/src/devices/bus/odyssey2/homecomp.h b/src/devices/bus/odyssey2/homecomp.h index 84b246ffc4763..e8dc0abab842d 100644 --- a/src/devices/bus/odyssey2/homecomp.h +++ b/src/devices/bus/odyssey2/homecomp.h @@ -49,16 +49,16 @@ class o2_homecomp_device : public device_t, required_device_array m_latch; required_device m_cass; + std::unique_ptr m_ram; + u8 m_control = 0; + bool m_installed = false; + void internal_io_w(offs_t offset, u8 data); u8 internal_io_r(offs_t offset); u8 internal_rom_r(offs_t offset) { return m_exrom[offset]; } void homecomp_io(address_map &map); void homecomp_mem(address_map &map); - - std::unique_ptr m_ram; - u8 m_control = 0; - bool m_installed = false; }; // device type definition diff --git a/src/devices/bus/saitek_osa/expansion.h b/src/devices/bus/saitek_osa/expansion.h index f915ed69ff177..34afb641a5373 100644 --- a/src/devices/bus/saitek_osa/expansion.h +++ b/src/devices/bus/saitek_osa/expansion.h @@ -88,8 +88,6 @@ class saitekosa_expansion_device : public device_t, public device_single_card_sl devcb_write_line m_stb_handler; devcb_write_line m_rts_handler; - u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - // input pins state u8 m_data = 0; int m_nmi = 0; @@ -97,6 +95,8 @@ class saitekosa_expansion_device : public device_t, public device_single_card_sl int m_pw = 0; device_saitekosa_expansion_interface *m_module; + + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); }; // ======================> device_saitekosa_expansion_interface diff --git a/src/devices/bus/saitek_osa/maestro.h b/src/devices/bus/saitek_osa/maestro.h index 6cf40935c3fbd..fb96539d34a73 100644 --- a/src/devices/bus/saitek_osa/maestro.h +++ b/src/devices/bus/saitek_osa/maestro.h @@ -48,6 +48,10 @@ class saitekosa_maestro_device : public device_t, public device_saitekosa_expans required_memory_bank m_rombank; required_device m_extrom; + u8 m_latch = 0xff; + bool m_latch_enable = false; + u8 m_extrom_bank = 0; + virtual void main_map(address_map &map); u8 extrom_r(offs_t offset); @@ -59,10 +63,6 @@ class saitekosa_maestro_device : public device_t, public device_saitekosa_expans void control_w(u8 data); void set_cpu_freq(); - - u8 m_latch = 0xff; - bool m_latch_enable = false; - u8 m_extrom_bank = 0; }; class saitekosa_analyst_device : public saitekosa_maestro_device diff --git a/src/devices/bus/saitek_osa/maestroa.h b/src/devices/bus/saitek_osa/maestroa.h index 18caa89dd813d..5e12703408ecd 100644 --- a/src/devices/bus/saitek_osa/maestroa.h +++ b/src/devices/bus/saitek_osa/maestroa.h @@ -39,6 +39,9 @@ class saitekosa_maestroa_device : public device_t, public device_saitekosa_expan private: required_device m_maincpu; + u8 m_latch = 0xff; + bool m_latch_enable = false; + void main_map(address_map &map); u8 rts_r(); @@ -48,9 +51,6 @@ class saitekosa_maestroa_device : public device_t, public device_saitekosa_expan void control_w(u8 data); void set_cpu_freq(); - - u8 m_latch = 0xff; - bool m_latch_enable = false; }; diff --git a/src/devices/bus/saitek_osa/sparc.h b/src/devices/bus/saitek_osa/sparc.h index bc8bd1181b87e..c4dbe89857d37 100644 --- a/src/devices/bus/saitek_osa/sparc.h +++ b/src/devices/bus/saitek_osa/sparc.h @@ -41,6 +41,11 @@ class saitekosa_sparc_device : public device_t, public device_saitekosa_expansio required_region_ptr m_rom; required_shared_ptr m_ram; + u32 m_data_out = 0; + u32 m_rom_mask = 0; + u32 m_ram_mask = 0; + bool m_installed = false; + void debugger_map(address_map &map); u32 rom_r(offs_t offset, u32 mem_mask) { return m_rom[offset & m_rom_mask]; } @@ -50,11 +55,6 @@ class saitekosa_sparc_device : public device_t, public device_saitekosa_expansio void host_io_w(offs_t offset, u32 data, u32 mem_mask = ~0U); void set_ram_mask(u8 n) { m_ram_mask = ((1 << n) / 4) - 1; } - - u32 m_data_out = 0; - u32 m_rom_mask = 0; - u32 m_ram_mask = 0; - bool m_installed = false; }; #endif // MAME_BUS_SAITEKOSA_SPARC_H diff --git a/src/devices/bus/vme/vme_cards.cpp b/src/devices/bus/vme/vme_cards.cpp index 59d1b94c4d859..e66cf8d322a11 100644 --- a/src/devices/bus/vme/vme_cards.cpp +++ b/src/devices/bus/vme/vme_cards.cpp @@ -40,6 +40,7 @@ void vme_cards(device_slot_interface &device) device.option_add("mvme181", VME_MVME181); device.option_add("mvme187", VME_MVME187); device.option_add("mvme327a", VME_MVME327A); + device.option_add("mvme350", VME_MVME350); device.option_add("mzr8105", VME_MZR8105); device.option_add("mzr8300", VME_MZR8300); device.option_add("smvme2000", VME_SMVME2000); diff --git a/src/devices/cpu/avr8/avr8.cpp b/src/devices/cpu/avr8/avr8.cpp index 4745e63c95a71..f949ed0ef03db 100644 --- a/src/devices/cpu/avr8/avr8.cpp +++ b/src/devices/cpu/avr8/avr8.cpp @@ -201,328 +201,328 @@ enum #define SPREG ((m_r[SPH] << 8) | m_r[SPL]) // I/O Defines -#define TCCR0B_CS_SHIFT 0 -#define TCCR0B_CS_MASK 0x07 -#define TCCR0B_WGM0_2_SHIFT 3 -#define TCCR0B_WGM0_2_MASK 0x08 -#define TCCR0B_FOC0B_SHIFT 6 -#define TCCR0B_FOC0B_MASK 0x40 -#define TCCR0B_FOC0A_SHIFT 7 -#define TCCR0B_FOC0A_MASK 0x80 -#define TIMER0_CLOCK_SELECT (m_r[TCCR0B] & TCCR0B_CS_MASK) - -#define TCCR0A_WGM0_10_SHIFT 0 -#define TCCR0A_WGM0_10_MASK 0x03 -#define TCCR0A_COM0B_SHIFT 4 -#define TCCR0A_COM0B_MASK 0x30 -#define TCCR0A_COM0A_SHIFT 6 -#define TCCR0A_COM0A_MASK 0xc0 -#define TCCR0A_COM0A ((m_r[TCCR0A] & TCCR0A_COM0A_MASK) >> TCCR0A_COM0A_SHIFT) -#define TCCR0A_COM0B ((m_r[TCCR0A] & TCCR0A_COM0B_MASK) >> TCCR0A_COM0B_SHIFT) -#define TCCR0A_WGM0_10 (m_r[TCCR0A] & TCCR0A_WGM0_10_MASK) - -#define TIMSK0_TOIE0_BIT 0 -#define TIMSK0_OCIE0A_BIT 1 -#define TIMSK0_OCIE0B_BIT 2 -#define TIMSK0_TOIE0_MASK (1 << TIMSK0_TOIE0_BIT) -#define TIMSK0_OCIE0A_MASK (1 << TIMSK0_OCIE0A_BIT) -#define TIMSK0_OCIE0B_MASK (1 << TIMSK0_OCIE0B_BIT) -#define TIMSK0_TOIE0 (BIT(m_r[TIMSK0], TIMSK0_TOIE0_BIT)) -#define TIMSK0_OCIE0A (BIT(m_r[TIMSK0], TIMSK0_OCIE0A_BIT)) -#define TIMSK0_OCIE0B (BIT(m_r[TIMSK0], TIMSK0_OCIE0B_BIT)) - -#define TIFR0_TOV0_SHIFT 0 -#define TIFR0_TOV0_MASK 0x01 -#define TIFR0_OCF0A_SHIFT 1 -#define TIFR0_OCF0A_MASK 0x02 -#define TIFR0_OCF0B_SHIFT 2 -#define TIFR0_OCF0B_MASK 0x04 -#define TIFR0_MASK (TIFR0_TOV0_MASK | TIFR0_OCF0B_MASK | TIFR0_OCF0A_MASK) - -#define TCCR1B_CS_SHIFT 0 -#define TCCR1B_CS_MASK 0x07 -#define TCCR1B_WGM1_32_SHIFT 3 -#define TCCR1B_WGM1_32_MASK 0x18 -#define TCCR1B_ICES1_SHIFT 6 -#define TCCR1B_ICES1_MASK 0x40 -#define TCCR1B_ICNC1_SHIFT 7 -#define TCCR1B_ICNC1_MASK 0x80 -#define TIMER1_CLOCK_SELECT (m_r[TCCR1B] & TCCR1B_CS_MASK) - -#define TCCR1A_WGM1_10_SHIFT 0 -#define TCCR1A_WGM1_10_MASK 0x03 -#define TCCR1A_COM1AB_SHIFT 4 -#define TCCR1A_COM1AB_MASK 0xf0 -#define TCCR1A_COM1B_SHIFT 4 -#define TCCR1A_COM1B_MASK 0x30 -#define TCCR1A_COM1A_SHIFT 6 -#define TCCR1A_COM1A_MASK 0xc0 -#define TCCR1A_COM1A ((m_r[TCCR1A] & TCCR1A_COM1A_MASK) >> TCCR1A_COM1A_SHIFT) -#define TCCR1A_COM1B ((m_r[TCCR1A] & TCCR1A_COM1B_MASK) >> TCCR1A_COM1B_SHIFT) -#define TCCR1A_WGM1_10 (m_r[TCCR1A] & TCCR1A_WGM1_10_MASK) - -#define TIMSK1_TOIE1_BIT 0 -#define TIMSK1_OCIE1A_BIT 1 -#define TIMSK1_OCIE1B_BIT 2 -#define TIMSK1_ICIE1_BIT 5 -#define TIMSK1_TOIE1_MASK (1 << TIMSK1_TOIE1_BIT) -#define TIMSK1_OCIE1A_MASK (1 << TIMSK1_OCIE1A_BIT) -#define TIMSK1_OCIE1B_MASK (1 << TIMSK1_OCIE1B_BIT) -#define TIMSK1_ICIE1_MASK (1 << TIMSK1_ICIE1_BIT) -#define TIMSK1_TOIE1 (BIT(m_r[TIMSK1], TIMSK1_TOIE1_BIT)) -#define TIMSK1_OCIE1A (BIT(m_r[TIMSK1], TIMSK1_OCIE1A_BIT)) -#define TIMSK1_OCIE1B (BIT(m_r[TIMSK1], TIMSK1_OCIE1B_BIT)) -#define TIMSK1_ICIE1 (BIT(m_r[TIMSK1], TIMSK1_ICIE1_BIT)) - -#define TIFR1_TOV1_SHIFT 0 -#define TIFR1_TOV1_MASK 0x01 -#define TIFR1_OCF1A_SHIFT 1 -#define TIFR1_OCF1A_MASK 0x02 -#define TIFR1_OCF1B_SHIFT 2 -#define TIFR1_OCF1B_MASK 0x04 -#define TIFR1_ICF1_SHIFT 5 -#define TIFR1_ICF1_MASK 0x20 -#define TIFR1_MASK (TIFR1_ICF1_MASK | TIFR1_TOV1_MASK | TIFR1_OCF1B_MASK | TIFR1_OCF1A_MASK) - -#define TCCR2B_CS_SHIFT 0 -#define TCCR2B_CS_MASK 0x07 -#define TCCR2B_WGM2_2_SHIFT 3 -#define TCCR2B_WGM2_2_MASK 0x08 -#define TCCR2B_FOC2B_SHIFT 6 -#define TCCR2B_FOC2B_MASK 0x40 -#define TCCR2B_FOC2A_SHIFT 7 -#define TCCR2B_FOC2A_MASK 0x80 -#define TIMER2_CLOCK_SELECT (m_r[TCCR2B] & TCCR2B_CS_MASK) - -#define TCCR2A_WGM2_10_SHIFT 0 -#define TCCR2A_WGM2_10_MASK 0x03 -#define TCCR2A_COM2B_SHIFT 4 -#define TCCR2A_COM2B_MASK 0x30 -#define TCCR2A_COM2A_SHIFT 6 -#define TCCR2A_COM2A_MASK 0xc0 -#define TCCR2A_COM2A ((m_r[TCCR2A] & TCCR2A_COM2A_MASK) >> TCCR2A_COM2A_SHIFT) -#define TCCR2A_COM2B ((m_r[TCCR2A] & TCCR2A_COM2B_MASK) >> TCCR2A_COM2B_SHIFT) -#define TCCR2A_WGM2_10 (m_r[TCCR2A] & TCCR2A_WGM2_10_MASK) - -#define TIMSK2_TOIE2_BIT 0 -#define TIMSK2_OCIE2A_BIT 1 -#define TIMSK2_OCIE2B_BIT 2 -#define TIMSK2_TOIE2_MASK (1 << TIMSK2_TOIE2_BIT) -#define TIMSK2_OCIE2A_MASK (1 << TIMSK2_OCIE2A_BIT) -#define TIMSK2_OCIE2B_MASK (1 << TIMSK2_OCIE2B_BIT) -#define TIMSK2_TOIE2 (BIT(m_r[TIMSK2], TIMSK2_TOIE2_BIT)) -#define TIMSK2_OCIE2A (BIT(m_r[TIMSK2], TIMSK2_OCIE2A_BIT)) -#define TIMSK2_OCIE2B (BIT(m_r[TIMSK2], TIMSK2_OCIE2B_BIT)) - -#define TIFR2_TOV2_SHIFT 0 -#define TIFR2_TOV2_MASK 0x01 -#define TIFR2_OCF2A_SHIFT 1 -#define TIFR2_OCF2A_MASK 0x02 -#define TIFR2_OCF2B_SHIFT 2 -#define TIFR2_OCF2B_MASK 0x04 -#define TIFR2_MASK (TIFR2_TOV2_MASK | TIFR2_OCF2B_MASK | TIFR2_OCF2A_MASK) - -#define TIMSK3_TOIE3_BIT 0 -#define TIMSK3_OCIE3A_BIT 1 -#define TIMSK3_OCIE3B_BIT 2 -#define TIMSK3_OCIE3C_BIT 3 -#define TIMSK3_TOIE3 (BIT(m_r[TIMSK3], TIMSK3_TOIE3_BIT)) -#define TIMSK3_OCIE3A (BIT(m_r[TIMSK3], TIMSK3_OCIE3A_BIT)) -#define TIMSK3_OCIE3B (BIT(m_r[TIMSK3], TIMSK3_OCIE3B_BIT)) -#define TIMSK3_OCIE3C (BIT(m_r[TIMSK3], TIMSK3_OCIE3C_BIT)) - -#define TCCR4B_CS_SHIFT 0 -#define TCCR4B_CS_MASK 0x07 -#define TCCR4B_WGM4_32_SHIFT 3 -#define TCCR4B_WGM4_32_MASK 0x18 -#define TCCR4B_FOC4C_SHIFT 5 -#define TCCR4B_FOC4C_MASK 0x20 -#define TCCR4B_FOC4B_SHIFT 6 -#define TCCR4B_FOC4B_MASK 0x40 -#define TCCR4B_FOC4A_SHIFT 7 -#define TCCR4B_FOC4A_MASK 0x80 -#define TIMER4_CLOCK_SELECT ((m_r[TCCR4B] & TCCR4B_CS_MASK) >> TCCR4B_CS_SHIFT) - -#define TCCR4A_WGM4_10_SHIFT 0 -#define TCCR4A_WGM4_10_MASK 0x03 -#define TCCR4A_COM4C_SHIFT 2 -#define TCCR4A_COM4C_MASK 0x0c -#define TCCR4A_COM4B_SHIFT 4 -#define TCCR4A_COM4B_MASK 0x30 -#define TCCR4A_COM4A_SHIFT 6 -#define TCCR4A_COM4A_MASK 0xc0 -#define TCCR4A_COM4A ((m_r[TCCR4A] & TCCR4A_COM4A_MASK) >> TCCR4A_COM4A_SHIFT) -#define TCCR4A_COM4B ((m_r[TCCR4A] & TCCR4A_COM4B_MASK) >> TCCR4A_COM4B_SHIFT) -#define TCCR4A_COM4C ((m_r[TCCR4A] & TCCR4A_COM4C_MASK) >> TCCR4A_COM4C_SHIFT) -#define TCCR4A_WGM2_10 (m_r[TCCR4A] & TCCR4A_WGM2_10_MASK) - -#define WGM4_32 ((m_r[TCCR4B] & TCCR4B_WGM4_32_MASK) >> TCCR4B_WGM4_32_SHIFT) -#define WGM4_10 ((m_r[TCCR4A] & TCCR4A_WGM4_10_MASK) >> TCCR4A_WGM4_10_SHIFT) -#define WGM4 ((WGM4_32 << 2) | WGM4_10) - -#define TIMSK4_TOIE4_BIT 0 -#define TIMSK4_OCIE4A_BIT 1 -#define TIMSK4_OCIE4B_BIT 2 -#define TIMSK4_TOIE4 (BIT(m_r[TIMSK4], TIMSK4_TOIE4_BIT)) -#define TIMSK4_OCIE4A (BIT(m_r[TIMSK4], TIMSK4_OCIE4A_BIT)) -#define TIMSK4_OCIE4B (BIT(m_r[TIMSK4], TIMSK4_OCIE4B_BIT)) - -#define TIFR4_TOV4_SHIFT 0 -#define TIFR4_TOV4_MASK 0x01 -#define TIFR4_OCF4A_SHIFT 1 -#define TIFR4_OCF4A_MASK 0x02 -#define TIFR4_OCF4B_SHIFT 2 -#define TIFR4_OCF4B_MASK 0x04 -#define TIFR4_MASK (TIFR4_TOV4_MASK | TIFR4_OCF4B_MASK | TIFR4_OCF4A_MASK) - -#define TCCR5C_FOC5C_SHIFT 5 -#define TCCR5C_FOC5C_MASK 0x20 -#define TCCR5C_FOC5B_SHIFT 6 -#define TCCR5C_FOC5B_MASK 0x40 -#define TCCR5C_FOC5A_SHIFT 7 -#define TCCR5C_FOC5A_MASK 0x80 - -#define TCCR5B_CS_SHIFT 0 -#define TCCR5B_CS_MASK 0x07 -#define TCCR5B_WGM5_32_SHIFT 3 -#define TCCR5B_WGM5_32_MASK 0x18 -#define TCCR5B_ICES5_SHIFT 6 -#define TCCR5B_ICES5_MASK 0x40 -#define TCCR5B_ICNC5_SHIFT 7 -#define TCCR5B_ICNC5_MASK 0x80 -#define TIMER5_CLOCK_SELECT ((m_r[TCCR5B] & TCCR5B_CS_MASK) >> TCCR5B_CS_SHIFT) - -#define TCCR5A_WGM5_10_SHIFT 0 -#define TCCR5A_WGM5_10_MASK 0x03 -#define TCCR5A_COM5C_SHIFT 2 -#define TCCR5A_COM5C_MASK 0x0c -#define TCCR5A_COM5B_SHIFT 4 -#define TCCR5A_COM5B_MASK 0x30 -#define TCCR5A_COM5A_SHIFT 6 -#define TCCR5A_COM5A_MASK 0xc0 -#define TCCR5A_COM5A ((m_r[TCCR5A] & TCCR5A_COM5A_MASK) >> TCCR5A_COM5A_SHIFT) -#define TCCR5A_COM5B ((m_r[TCCR5A] & TCCR5A_COM5B_MASK) >> TCCR5A_COM5B_SHIFT) -#define TCCR5A_COM5C ((m_r[TCCR5A] & TCCR5A_COM5C_MASK) >> TCCR5A_COM5C_SHIFT) -#define TCCR5A_WGM5_10 (m_r[TCCR5A] & TCCR5A_WGM5_10_MASK) - -#define WGM5_32 ((m_r[TCCR5B] & TCCR5B_WGM5_32_MASK) >> TCCR5B_WGM5_32_SHIFT) -#define WGM5_10 ((m_r[TCCR5A] & TCCR5A_WGM5_10_MASK) >> TCCR5A_WGM5_10_SHIFT) -#define WGM5 ((WGM5_32 << 2) | WGM5_10) - -#define TIMSK5_TOIE5_BIT 0 -#define TIMSK5_OCIE5A_BIT 1 -#define TIMSK5_OCIE5B_BIT 2 -#define TIMSK5_OCIE5C_BIT 3 -#define TIMSK5_ICIE5_BIT 5 -#define TIMSK5_TOIE5_MASK (1 << TIMSK5_TOIE5_BIT) -#define TIMSK5_OCIE5A_MASK (1 << TIMSK5_OCIE5A_BIT) -#define TIMSK5_OCIE5B_MASK (1 << TIMSK5_OCIE5B_BIT) -#define TIMSK5_OCIE5C_MASK (1 << TIMSK5_OCIE5C_BIT) -#define TIMSK5_ICIE5_MASK (1 << TIMSK5_ICIE5_BIT) -#define TIMSK5_TOIE5 (BIT(m_r[TIMSK5], TIMSK5_TOIE5_BIT)) -#define TIMSK5_OCIE5A (BIT(m_r[TIMSK5], TIMSK5_OCIE5A_BIT)) -#define TIMSK5_OCIE5B (BIT(m_r[TIMSK5], TIMSK5_OCIE5B_BIT)) -#define TIMSK5_OCIE5C (BIT(m_r[TIMSK5], TIMSK5_OCIE5C_BIT)) -#define TIMSK5_ICIE5C (BIT(m_r[TIMSK5], TIMSK5_ICIE5C_BIT)) - -#define TIFR5_ICF5_MASK 0x20 -#define TIFR5_ICF5_SHIFT 5 -#define TIFR5_OCF5C_MASK 0x08 -#define TIFR5_OCF5C_SHIFT 3 -#define TIFR5_OCF5B_MASK 0x04 -#define TIFR5_OCF5B_SHIFT 2 -#define TIFR5_OCF5A_MASK 0x02 -#define TIFR5_OCF5A_SHIFT 1 -#define TIFR5_TOV5_MASK 0x01 -#define TIFR5_TOV5_SHIFT 0 -#define TIFR5_MASK (TIFR5_ICF5_MASK | TIFR5_OCF5C_MASK | TIFR5_OCF5B_MASK | TIFR5_OCF5A_MASK | TIFR5_TOV5_MASK) -#define TIFR5_ICF5 ((m_r[TIFR5] & TIFR5_ICF5_MASK) >> TIFR5_ICF5_SHIFT) -#define TIFR5_OCF5C ((m_r[TIFR5] & TIFR5_OCF5C_MASK) >> TIFR5_OCF5C_SHIFT) -#define TIFR5_OCF5B ((m_r[TIFR5] & TIFR5_OCF5B_MASK) >> TIFR5_OCF5B_SHIFT) -#define TIFR5_OCF5A ((m_r[TIFR5] & TIFR5_OCF5A_MASK) >> TIFR5_OCF5A_SHIFT) -#define TIFR5_TOV5 ((m_r[TIFR5] & TIFR5_TOV5_MASK) >> TIFR5_TOV5_SHIFT) +#define TCCR0B_CS_SHIFT 0 +#define TCCR0B_CS_MASK 0x07 +#define TCCR0B_WGM0_2_SHIFT 3 +#define TCCR0B_WGM0_2_MASK 0x08 +#define TCCR0B_FOC0B_SHIFT 6 +#define TCCR0B_FOC0B_MASK 0x40 +#define TCCR0B_FOC0A_SHIFT 7 +#define TCCR0B_FOC0A_MASK 0x80 +#define TIMER0_CLOCK_SELECT (m_r[TCCR0B] & TCCR0B_CS_MASK) + +#define TCCR0A_WGM0_10_SHIFT 0 +#define TCCR0A_WGM0_10_MASK 0x03 +#define TCCR0A_COM0B_SHIFT 4 +#define TCCR0A_COM0B_MASK 0x30 +#define TCCR0A_COM0A_SHIFT 6 +#define TCCR0A_COM0A_MASK 0xc0 +#define TCCR0A_COM0A ((m_r[TCCR0A] & TCCR0A_COM0A_MASK) >> TCCR0A_COM0A_SHIFT) +#define TCCR0A_COM0B ((m_r[TCCR0A] & TCCR0A_COM0B_MASK) >> TCCR0A_COM0B_SHIFT) +#define TCCR0A_WGM0_10 (m_r[TCCR0A] & TCCR0A_WGM0_10_MASK) + +#define TIMSK0_TOIE0_BIT 0 +#define TIMSK0_OCIE0A_BIT 1 +#define TIMSK0_OCIE0B_BIT 2 +#define TIMSK0_TOIE0_MASK (1 << TIMSK0_TOIE0_BIT) +#define TIMSK0_OCIE0A_MASK (1 << TIMSK0_OCIE0A_BIT) +#define TIMSK0_OCIE0B_MASK (1 << TIMSK0_OCIE0B_BIT) +#define TIMSK0_TOIE0 (BIT(m_r[TIMSK0], TIMSK0_TOIE0_BIT)) +#define TIMSK0_OCIE0A (BIT(m_r[TIMSK0], TIMSK0_OCIE0A_BIT)) +#define TIMSK0_OCIE0B (BIT(m_r[TIMSK0], TIMSK0_OCIE0B_BIT)) + +#define TIFR0_TOV0_SHIFT 0 +#define TIFR0_TOV0_MASK 0x01 +#define TIFR0_OCF0A_SHIFT 1 +#define TIFR0_OCF0A_MASK 0x02 +#define TIFR0_OCF0B_SHIFT 2 +#define TIFR0_OCF0B_MASK 0x04 +#define TIFR0_MASK (TIFR0_TOV0_MASK | TIFR0_OCF0B_MASK | TIFR0_OCF0A_MASK) + +#define TCCR1B_CS_SHIFT 0 +#define TCCR1B_CS_MASK 0x07 +#define TCCR1B_WGM1_32_SHIFT 3 +#define TCCR1B_WGM1_32_MASK 0x18 +#define TCCR1B_ICES1_SHIFT 6 +#define TCCR1B_ICES1_MASK 0x40 +#define TCCR1B_ICNC1_SHIFT 7 +#define TCCR1B_ICNC1_MASK 0x80 +#define TIMER1_CLOCK_SELECT (m_r[TCCR1B] & TCCR1B_CS_MASK) + +#define TCCR1A_WGM1_10_SHIFT 0 +#define TCCR1A_WGM1_10_MASK 0x03 +#define TCCR1A_COM1AB_SHIFT 4 +#define TCCR1A_COM1AB_MASK 0xf0 +#define TCCR1A_COM1B_SHIFT 4 +#define TCCR1A_COM1B_MASK 0x30 +#define TCCR1A_COM1A_SHIFT 6 +#define TCCR1A_COM1A_MASK 0xc0 +#define TCCR1A_COM1A ((m_r[TCCR1A] & TCCR1A_COM1A_MASK) >> TCCR1A_COM1A_SHIFT) +#define TCCR1A_COM1B ((m_r[TCCR1A] & TCCR1A_COM1B_MASK) >> TCCR1A_COM1B_SHIFT) +#define TCCR1A_WGM1_10 (m_r[TCCR1A] & TCCR1A_WGM1_10_MASK) + +#define TIMSK1_TOIE1_BIT 0 +#define TIMSK1_OCIE1A_BIT 1 +#define TIMSK1_OCIE1B_BIT 2 +#define TIMSK1_ICIE1_BIT 5 +#define TIMSK1_TOIE1_MASK (1 << TIMSK1_TOIE1_BIT) +#define TIMSK1_OCIE1A_MASK (1 << TIMSK1_OCIE1A_BIT) +#define TIMSK1_OCIE1B_MASK (1 << TIMSK1_OCIE1B_BIT) +#define TIMSK1_ICIE1_MASK (1 << TIMSK1_ICIE1_BIT) +#define TIMSK1_TOIE1 (BIT(m_r[TIMSK1], TIMSK1_TOIE1_BIT)) +#define TIMSK1_OCIE1A (BIT(m_r[TIMSK1], TIMSK1_OCIE1A_BIT)) +#define TIMSK1_OCIE1B (BIT(m_r[TIMSK1], TIMSK1_OCIE1B_BIT)) +#define TIMSK1_ICIE1 (BIT(m_r[TIMSK1], TIMSK1_ICIE1_BIT)) + +#define TIFR1_TOV1_SHIFT 0 +#define TIFR1_TOV1_MASK 0x01 +#define TIFR1_OCF1A_SHIFT 1 +#define TIFR1_OCF1A_MASK 0x02 +#define TIFR1_OCF1B_SHIFT 2 +#define TIFR1_OCF1B_MASK 0x04 +#define TIFR1_ICF1_SHIFT 5 +#define TIFR1_ICF1_MASK 0x20 +#define TIFR1_MASK (TIFR1_ICF1_MASK | TIFR1_TOV1_MASK | TIFR1_OCF1B_MASK | TIFR1_OCF1A_MASK) + +#define TCCR2B_CS_SHIFT 0 +#define TCCR2B_CS_MASK 0x07 +#define TCCR2B_WGM2_2_SHIFT 3 +#define TCCR2B_WGM2_2_MASK 0x08 +#define TCCR2B_FOC2B_SHIFT 6 +#define TCCR2B_FOC2B_MASK 0x40 +#define TCCR2B_FOC2A_SHIFT 7 +#define TCCR2B_FOC2A_MASK 0x80 +#define TIMER2_CLOCK_SELECT (m_r[TCCR2B] & TCCR2B_CS_MASK) + +#define TCCR2A_WGM2_10_SHIFT 0 +#define TCCR2A_WGM2_10_MASK 0x03 +#define TCCR2A_COM2B_SHIFT 4 +#define TCCR2A_COM2B_MASK 0x30 +#define TCCR2A_COM2A_SHIFT 6 +#define TCCR2A_COM2A_MASK 0xc0 +#define TCCR2A_COM2A ((m_r[TCCR2A] & TCCR2A_COM2A_MASK) >> TCCR2A_COM2A_SHIFT) +#define TCCR2A_COM2B ((m_r[TCCR2A] & TCCR2A_COM2B_MASK) >> TCCR2A_COM2B_SHIFT) +#define TCCR2A_WGM2_10 (m_r[TCCR2A] & TCCR2A_WGM2_10_MASK) + +#define TIMSK2_TOIE2_BIT 0 +#define TIMSK2_OCIE2A_BIT 1 +#define TIMSK2_OCIE2B_BIT 2 +#define TIMSK2_TOIE2_MASK (1 << TIMSK2_TOIE2_BIT) +#define TIMSK2_OCIE2A_MASK (1 << TIMSK2_OCIE2A_BIT) +#define TIMSK2_OCIE2B_MASK (1 << TIMSK2_OCIE2B_BIT) +#define TIMSK2_TOIE2 (BIT(m_r[TIMSK2], TIMSK2_TOIE2_BIT)) +#define TIMSK2_OCIE2A (BIT(m_r[TIMSK2], TIMSK2_OCIE2A_BIT)) +#define TIMSK2_OCIE2B (BIT(m_r[TIMSK2], TIMSK2_OCIE2B_BIT)) + +#define TIFR2_TOV2_SHIFT 0 +#define TIFR2_TOV2_MASK 0x01 +#define TIFR2_OCF2A_SHIFT 1 +#define TIFR2_OCF2A_MASK 0x02 +#define TIFR2_OCF2B_SHIFT 2 +#define TIFR2_OCF2B_MASK 0x04 +#define TIFR2_MASK (TIFR2_TOV2_MASK | TIFR2_OCF2B_MASK | TIFR2_OCF2A_MASK) + +#define TIMSK3_TOIE3_BIT 0 +#define TIMSK3_OCIE3A_BIT 1 +#define TIMSK3_OCIE3B_BIT 2 +#define TIMSK3_OCIE3C_BIT 3 +#define TIMSK3_TOIE3 (BIT(m_r[TIMSK3], TIMSK3_TOIE3_BIT)) +#define TIMSK3_OCIE3A (BIT(m_r[TIMSK3], TIMSK3_OCIE3A_BIT)) +#define TIMSK3_OCIE3B (BIT(m_r[TIMSK3], TIMSK3_OCIE3B_BIT)) +#define TIMSK3_OCIE3C (BIT(m_r[TIMSK3], TIMSK3_OCIE3C_BIT)) + +#define TCCR4B_CS_SHIFT 0 +#define TCCR4B_CS_MASK 0x07 +#define TCCR4B_WGM4_32_SHIFT 3 +#define TCCR4B_WGM4_32_MASK 0x18 +#define TCCR4B_FOC4C_SHIFT 5 +#define TCCR4B_FOC4C_MASK 0x20 +#define TCCR4B_FOC4B_SHIFT 6 +#define TCCR4B_FOC4B_MASK 0x40 +#define TCCR4B_FOC4A_SHIFT 7 +#define TCCR4B_FOC4A_MASK 0x80 +#define TIMER4_CLOCK_SELECT ((m_r[TCCR4B] & TCCR4B_CS_MASK) >> TCCR4B_CS_SHIFT) + +#define TCCR4A_WGM4_10_SHIFT 0 +#define TCCR4A_WGM4_10_MASK 0x03 +#define TCCR4A_COM4C_SHIFT 2 +#define TCCR4A_COM4C_MASK 0x0c +#define TCCR4A_COM4B_SHIFT 4 +#define TCCR4A_COM4B_MASK 0x30 +#define TCCR4A_COM4A_SHIFT 6 +#define TCCR4A_COM4A_MASK 0xc0 +#define TCCR4A_COM4A ((m_r[TCCR4A] & TCCR4A_COM4A_MASK) >> TCCR4A_COM4A_SHIFT) +#define TCCR4A_COM4B ((m_r[TCCR4A] & TCCR4A_COM4B_MASK) >> TCCR4A_COM4B_SHIFT) +#define TCCR4A_COM4C ((m_r[TCCR4A] & TCCR4A_COM4C_MASK) >> TCCR4A_COM4C_SHIFT) +#define TCCR4A_WGM2_10 (m_r[TCCR4A] & TCCR4A_WGM2_10_MASK) + +#define WGM4_32 ((m_r[TCCR4B] & TCCR4B_WGM4_32_MASK) >> TCCR4B_WGM4_32_SHIFT) +#define WGM4_10 ((m_r[TCCR4A] & TCCR4A_WGM4_10_MASK) >> TCCR4A_WGM4_10_SHIFT) +#define WGM4 ((WGM4_32 << 2) | WGM4_10) + +#define TIMSK4_TOIE4_BIT 0 +#define TIMSK4_OCIE4A_BIT 1 +#define TIMSK4_OCIE4B_BIT 2 +#define TIMSK4_TOIE4 (BIT(m_r[TIMSK4], TIMSK4_TOIE4_BIT)) +#define TIMSK4_OCIE4A (BIT(m_r[TIMSK4], TIMSK4_OCIE4A_BIT)) +#define TIMSK4_OCIE4B (BIT(m_r[TIMSK4], TIMSK4_OCIE4B_BIT)) + +#define TIFR4_TOV4_SHIFT 0 +#define TIFR4_TOV4_MASK 0x01 +#define TIFR4_OCF4A_SHIFT 1 +#define TIFR4_OCF4A_MASK 0x02 +#define TIFR4_OCF4B_SHIFT 2 +#define TIFR4_OCF4B_MASK 0x04 +#define TIFR4_MASK (TIFR4_TOV4_MASK | TIFR4_OCF4B_MASK | TIFR4_OCF4A_MASK) + +#define TCCR5C_FOC5C_SHIFT 5 +#define TCCR5C_FOC5C_MASK 0x20 +#define TCCR5C_FOC5B_SHIFT 6 +#define TCCR5C_FOC5B_MASK 0x40 +#define TCCR5C_FOC5A_SHIFT 7 +#define TCCR5C_FOC5A_MASK 0x80 + +#define TCCR5B_CS_SHIFT 0 +#define TCCR5B_CS_MASK 0x07 +#define TCCR5B_WGM5_32_SHIFT 3 +#define TCCR5B_WGM5_32_MASK 0x18 +#define TCCR5B_ICES5_SHIFT 6 +#define TCCR5B_ICES5_MASK 0x40 +#define TCCR5B_ICNC5_SHIFT 7 +#define TCCR5B_ICNC5_MASK 0x80 +#define TIMER5_CLOCK_SELECT ((m_r[TCCR5B] & TCCR5B_CS_MASK) >> TCCR5B_CS_SHIFT) + +#define TCCR5A_WGM5_10_SHIFT 0 +#define TCCR5A_WGM5_10_MASK 0x03 +#define TCCR5A_COM5C_SHIFT 2 +#define TCCR5A_COM5C_MASK 0x0c +#define TCCR5A_COM5B_SHIFT 4 +#define TCCR5A_COM5B_MASK 0x30 +#define TCCR5A_COM5A_SHIFT 6 +#define TCCR5A_COM5A_MASK 0xc0 +#define TCCR5A_COM5A ((m_r[TCCR5A] & TCCR5A_COM5A_MASK) >> TCCR5A_COM5A_SHIFT) +#define TCCR5A_COM5B ((m_r[TCCR5A] & TCCR5A_COM5B_MASK) >> TCCR5A_COM5B_SHIFT) +#define TCCR5A_COM5C ((m_r[TCCR5A] & TCCR5A_COM5C_MASK) >> TCCR5A_COM5C_SHIFT) +#define TCCR5A_WGM5_10 (m_r[TCCR5A] & TCCR5A_WGM5_10_MASK) + +#define WGM5_32 ((m_r[TCCR5B] & TCCR5B_WGM5_32_MASK) >> TCCR5B_WGM5_32_SHIFT) +#define WGM5_10 ((m_r[TCCR5A] & TCCR5A_WGM5_10_MASK) >> TCCR5A_WGM5_10_SHIFT) +#define WGM5 ((WGM5_32 << 2) | WGM5_10) + +#define TIMSK5_TOIE5_BIT 0 +#define TIMSK5_OCIE5A_BIT 1 +#define TIMSK5_OCIE5B_BIT 2 +#define TIMSK5_OCIE5C_BIT 3 +#define TIMSK5_ICIE5_BIT 5 +#define TIMSK5_TOIE5_MASK (1 << TIMSK5_TOIE5_BIT) +#define TIMSK5_OCIE5A_MASK (1 << TIMSK5_OCIE5A_BIT) +#define TIMSK5_OCIE5B_MASK (1 << TIMSK5_OCIE5B_BIT) +#define TIMSK5_OCIE5C_MASK (1 << TIMSK5_OCIE5C_BIT) +#define TIMSK5_ICIE5_MASK (1 << TIMSK5_ICIE5_BIT) +#define TIMSK5_TOIE5 (BIT(m_r[TIMSK5], TIMSK5_TOIE5_BIT)) +#define TIMSK5_OCIE5A (BIT(m_r[TIMSK5], TIMSK5_OCIE5A_BIT)) +#define TIMSK5_OCIE5B (BIT(m_r[TIMSK5], TIMSK5_OCIE5B_BIT)) +#define TIMSK5_OCIE5C (BIT(m_r[TIMSK5], TIMSK5_OCIE5C_BIT)) +#define TIMSK5_ICIE5C (BIT(m_r[TIMSK5], TIMSK5_ICIE5C_BIT)) + +#define TIFR5_ICF5_MASK 0x20 +#define TIFR5_ICF5_SHIFT 5 +#define TIFR5_OCF5C_MASK 0x08 +#define TIFR5_OCF5C_SHIFT 3 +#define TIFR5_OCF5B_MASK 0x04 +#define TIFR5_OCF5B_SHIFT 2 +#define TIFR5_OCF5A_MASK 0x02 +#define TIFR5_OCF5A_SHIFT 1 +#define TIFR5_TOV5_MASK 0x01 +#define TIFR5_TOV5_SHIFT 0 +#define TIFR5_MASK (TIFR5_ICF5_MASK | TIFR5_OCF5C_MASK | TIFR5_OCF5B_MASK | TIFR5_OCF5A_MASK | TIFR5_TOV5_MASK) +#define TIFR5_ICF5 ((m_r[TIFR5] & TIFR5_ICF5_MASK) >> TIFR5_ICF5_SHIFT) +#define TIFR5_OCF5C ((m_r[TIFR5] & TIFR5_OCF5C_MASK) >> TIFR5_OCF5C_SHIFT) +#define TIFR5_OCF5B ((m_r[TIFR5] & TIFR5_OCF5B_MASK) >> TIFR5_OCF5B_SHIFT) +#define TIFR5_OCF5A ((m_r[TIFR5] & TIFR5_OCF5A_MASK) >> TIFR5_OCF5A_SHIFT) +#define TIFR5_TOV5 ((m_r[TIFR5] & TIFR5_TOV5_MASK) >> TIFR5_TOV5_SHIFT) //--------------------------------------------------------------- -#define WGM0 (((m_r[TCCR0B] & 0x08) >> 1) | (m_r[TCCR0A] & 0x03)) +#define WGM0 (((m_r[TCCR0B] & 0x08) >> 1) | (m_r[TCCR0A] & 0x03)) -#define OCR1A ((m_r[OCR1AH] << 8) | m_r[OCR1AL]) -#define OCR1B ((m_r[OCR1BH] << 8) | m_r[OCR1BL]) -#define OCR1C ((m_r[OCR1CH] << 8) | m_r[OCR1CL]) -#define ICR1 ((m_r[ICR1H] << 8) | m_r[ICR1L]) -#define WGM1 (((m_r[TCCR1B] & 0x18) >> 1) | (m_r[TCCR1A] & 0x03)) +#define OCR1A ((m_r[OCR1AH] << 8) | m_r[OCR1AL]) +#define OCR1B ((m_r[OCR1BH] << 8) | m_r[OCR1BL]) +#define OCR1C ((m_r[OCR1CH] << 8) | m_r[OCR1CL]) +#define ICR1 ((m_r[ICR1H] << 8) | m_r[ICR1L]) +#define WGM1 (((m_r[TCCR1B] & 0x18) >> 1) | (m_r[TCCR1A] & 0x03)) -#define WGM2 (((m_r[TCCR2B] & 0x08) >> 1) | (m_r[TCCR2A] & 0x03)) +#define WGM2 (((m_r[TCCR2B] & 0x08) >> 1) | (m_r[TCCR2A] & 0x03)) -#define ICR3 ((m_r[ICR3H] << 8) | m_r[ICR3L]) -#define OCR3A ((m_r[OCR3AH] << 8) | m_r[OCR3AL]) +#define ICR3 ((m_r[ICR3H] << 8) | m_r[ICR3L]) +#define OCR3A ((m_r[OCR3AH] << 8) | m_r[OCR3AL]) -#define ICR4 ((m_r[ICR4H] << 8) | m_r[ICR4L]) -#define OCR4A ((m_r[OCR4AH] << 8) | m_r[OCR4AL]) +#define ICR4 ((m_r[ICR4H] << 8) | m_r[ICR4L]) +#define OCR4A ((m_r[OCR4AH] << 8) | m_r[OCR4AL]) -#define ICR5 ((m_r[ICR5H] << 8) | m_r[ICR5L]) -#define OCR5A ((m_r[OCR5AH] << 8) | m_r[OCR5AL]) +#define ICR5 ((m_r[ICR5H] << 8) | m_r[ICR5L]) +#define OCR5A ((m_r[OCR5AH] << 8) | m_r[OCR5AL]) -#define GTCCR_PSRASY_MASK 0x02 -#define GTCCR_PSRASY_SHIFT 1 +#define GTCCR_PSRASY_MASK 0x02 +#define GTCCR_PSRASY_SHIFT 1 -#define SPSR_SPR2X (m_r[SPSR] & SPSR_SPR2X_MASK) +#define SPSR_SPR2X (m_r[SPSR] & SPSR_SPR2X_MASK) -#define SPCR_SPIE ((m_r[SPCR] & SPCR_SPIE_MASK) >> 7) -#define SPCR_SPE ((m_r[SPCR] & SPCR_SPE_MASK) >> 6) -#define SPCR_DORD ((m_r[SPCR] & SPCR_DORD_MASK) >> 5) -#define SPCR_MSTR ((m_r[SPCR] & SPCR_MSTR_MASK) >> 4) -#define SPCR_CPOL ((m_r[SPCR] & SPCR_CPOL_MASK) >> 3) -#define SPCR_CPHA ((m_r[SPCR] & SPCR_CPHA_MASK) >> 2) -#define SPCR_SPR (m_r[SPCR] & SPCR_SPR_MASK) +#define SPCR_SPIE ((m_r[SPCR] & SPCR_SPIE_MASK) >> 7) +#define SPCR_SPE ((m_r[SPCR] & SPCR_SPE_MASK) >> 6) +#define SPCR_DORD ((m_r[SPCR] & SPCR_DORD_MASK) >> 5) +#define SPCR_MSTR ((m_r[SPCR] & SPCR_MSTR_MASK) >> 4) +#define SPCR_CPOL ((m_r[SPCR] & SPCR_CPOL_MASK) >> 3) +#define SPCR_CPHA ((m_r[SPCR] & SPCR_CPHA_MASK) >> 2) +#define SPCR_SPR (m_r[SPCR] & SPCR_SPR_MASK) -#define SPI_RATE ((SPSR_SPR2X << 2) | SPCR_SPR) +#define SPI_RATE ((SPSR_SPR2X << 2) | SPCR_SPR) -#define PORTB_MOSI 0x08 +#define PORTB_MOSI 0x08 -#define EECR_MASK 0x3f -#define EECR_EERE_BIT 0 -#define EECR_EEPE_BIT 1 -#define EECR_EEMPE_BIT 2 -#define EECR_EERIE_BIT 3 -#define EECR_EEPM_BIT 4 -#define EECR_EERE_MASK (1 << EECR_EERE_BIT) -#define EECR_EEPE_MASK (1 << EECR_EEPE_BIT) -#define EECR_EEMPE_MASK (1 << EECR_EEMPE_BIT) -#define EECR_EERIE_MASK (1 << EECR_EERIE_BIT) -#define EECR_EEPM_MASK (3 << EECR_EEPM_BIT) -#define EECR_EERE (BIT(m_r[EECR], EECR_EERE_BIT)) -#define EECR_EEPE (BIT(m_r[EECR], EECR_EEPE_BIT)) -#define EECR_EEMPE (BIT(m_r[EECR], EECR_EEMPE_BIT)) -#define EECR_EERIE (BIT(m_r[EECR], EECR_EERIE_BIT)) -#define EECR_EEPM ((m_r[EECR] & EECR_EEPM_MASK) >> EECR_EEPM_BIT) +#define EECR_MASK 0x3f +#define EECR_EERE_BIT 0 +#define EECR_EEPE_BIT 1 +#define EECR_EEMPE_BIT 2 +#define EECR_EERIE_BIT 3 +#define EECR_EEPM_BIT 4 +#define EECR_EERE_MASK (1 << EECR_EERE_BIT) +#define EECR_EEPE_MASK (1 << EECR_EEPE_BIT) +#define EECR_EEMPE_MASK (1 << EECR_EEMPE_BIT) +#define EECR_EERIE_MASK (1 << EECR_EERIE_BIT) +#define EECR_EEPM_MASK (3 << EECR_EEPM_BIT) +#define EECR_EERE (BIT(m_r[EECR], EECR_EERE_BIT)) +#define EECR_EEPE (BIT(m_r[EECR], EECR_EEPE_BIT)) +#define EECR_EEMPE (BIT(m_r[EECR], EECR_EEMPE_BIT)) +#define EECR_EERIE (BIT(m_r[EECR], EECR_EERIE_BIT)) +#define EECR_EEPM ((m_r[EECR] & EECR_EEPM_MASK) >> EECR_EEPM_BIT) //--------------------------------------------------------------- -#define ADMUX_MUX_MASK 0x0f -#define ADMUX_ADLAR_MASK 0x20 -#define ADMUX_REFS_MASK 0xc0 -#define ADMUX_MUX ((m_r[ADMUX] & ADMUX_MUX_MASK) >> 0) -#define ADMUX_ADLAR ((m_r[ADMUX] & ADMUX_ADLAR_MASK) >> 5) -#define ADMUX_REFS ((m_r[ADMUX] & ADMUX_REFS_MASK) >> 6) - -#define ADCSRB_ACME_MASK 0x40 -#define ADCSRB_ADTS_MASK 0x07 -#define ADCSRB_ACME ((m_r[ADCSRB] & ADCSRB_ACME_MASK) >> 6) -#define ADCSRB_ADTS ((m_r[ADCSRB] & ADCSRB_ADTS_MASK) >> 0) - -#define ADCSRA_ADPS_MASK 0x07 -#define ADCSRA_ADIE_MASK 0x08 -#define ADCSRA_ADIF_MASK 0x10 -#define ADCSRA_ADATE_MASK 0x20 -#define ADCSRA_ADSC_MASK 0x40 -#define ADCSRA_ADEN_MASK 0x80 -#define ADCSRA_ADPS (m_r[ADCSRA] & ADCSRA_ADPS_MASK) -#define ADCSRA_ADIE ((m_r[ADCSRA] & ADCSRA_ADIE_MASK) >> 3) -#define ADCSRA_ADIF ((m_r[ADCSRA] & ADCSRA_ADIF_MASK) >> 4) -#define ADCSRA_ADATE ((m_r[ADCSRA] & ADCSRA_ADATE_MASK) >> 5) -#define ADCSRA_ADSC ((m_r[ADCSRA] & ADCSRA_ADSC_MASK) >> 6) -#define ADCSRA_ADEN ((m_r[ADCSRA] & ADCSRA_ADEN_MASK) >> 7) +#define ADMUX_MUX_MASK 0x0f +#define ADMUX_ADLAR_MASK 0x20 +#define ADMUX_REFS_MASK 0xc0 +#define ADMUX_MUX ((m_r[ADMUX] & ADMUX_MUX_MASK) >> 0) +#define ADMUX_ADLAR ((m_r[ADMUX] & ADMUX_ADLAR_MASK) >> 5) +#define ADMUX_REFS ((m_r[ADMUX] & ADMUX_REFS_MASK) >> 6) + +#define ADCSRB_ACME_MASK 0x40 +#define ADCSRB_ADTS_MASK 0x07 +#define ADCSRB_ACME ((m_r[ADCSRB] & ADCSRB_ACME_MASK) >> 6) +#define ADCSRB_ADTS ((m_r[ADCSRB] & ADCSRB_ADTS_MASK) >> 0) + +#define ADCSRA_ADPS_MASK 0x07 +#define ADCSRA_ADIE_MASK 0x08 +#define ADCSRA_ADIF_MASK 0x10 +#define ADCSRA_ADATE_MASK 0x20 +#define ADCSRA_ADSC_MASK 0x40 +#define ADCSRA_ADEN_MASK 0x80 +#define ADCSRA_ADPS (m_r[ADCSRA] & ADCSRA_ADPS_MASK) +#define ADCSRA_ADIE ((m_r[ADCSRA] & ADCSRA_ADIE_MASK) >> 3) +#define ADCSRA_ADIF ((m_r[ADCSRA] & ADCSRA_ADIF_MASK) >> 4) +#define ADCSRA_ADATE ((m_r[ADCSRA] & ADCSRA_ADATE_MASK) >> 5) +#define ADCSRA_ADSC ((m_r[ADCSRA] & ADCSRA_ADSC_MASK) >> 6) +#define ADCSRA_ADEN ((m_r[ADCSRA] & ADCSRA_ADEN_MASK) >> 7) //************************************************************************** diff --git a/src/devices/cpu/avr8/avr8.h b/src/devices/cpu/avr8/avr8.h index f6306b4838df4..0254775273d37 100644 --- a/src/devices/cpu/avr8/avr8.h +++ b/src/devices/cpu/avr8/avr8.h @@ -520,12 +520,12 @@ class avr8_base_device : public cpu_device // lock bit masks enum : uint8_t { - LB1 = (1 << 0), - LB2 = (1 << 1), - BLB01 = (1 << 2), - BLB02 = (1 << 3), - BLB11 = (1 << 4), - BLB12 = (1 << 5) + LB1 = (1 << 0), + LB2 = (1 << 1), + BLB01 = (1 << 2), + BLB02 = (1 << 3), + BLB11 = (1 << 4), + BLB12 = (1 << 5) }; // extended fuses bit masks @@ -539,27 +539,27 @@ class avr8_base_device : public cpu_device // high fuses bit masks enum : uint8_t { - BOOTRST = (1 << 0), + BOOTRST = (1 << 0), BOOTSZ0 = (1 << 1), BOOTSZ1 = (1 << 2), - EESAVE = (1 << 3), - WDTON = (1 << 4), - SPIEN = (1 << 5), - JTAGEN = (1 << 6), - OCDEN = (1 << 7) + EESAVE = (1 << 3), + WDTON = (1 << 4), + SPIEN = (1 << 5), + JTAGEN = (1 << 6), + OCDEN = (1 << 7) }; // low fuses bit masks enum : uint8_t { - CKSEL0 = (1 << 0), - CKSEL1 = (1 << 1), - CKSEL2 = (1 << 2), - CKSEL3 = (1 << 3), - SUT0 = (1 << 4), - SUT1 = (1 << 5), - CKOUT = (1 << 6), - CKDIV8 = (1 << 7) + CKSEL0 = (1 << 0), + CKSEL1 = (1 << 1), + CKSEL2 = (1 << 2), + CKSEL3 = (1 << 3), + SUT0 = (1 << 4), + SUT1 = (1 << 5), + CKOUT = (1 << 6), + CKDIV8 = (1 << 7) }; enum : uint8_t diff --git a/src/devices/cpu/xtensa/xtensa.cpp b/src/devices/cpu/xtensa/xtensa.cpp new file mode 100644 index 0000000000000..2559ebcfb0e6d --- /dev/null +++ b/src/devices/cpu/xtensa/xtensa.cpp @@ -0,0 +1,71 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/*************************************************************************** + + Tensilica Xtensa + + Currently this device is just a stub with no actual execution core. + +***************************************************************************/ + +#include "emu.h" +#include "xtensa.h" +#include "xtensad.h" + +// device type definitions +DEFINE_DEVICE_TYPE(XTENSA, xtensa_device, "xtensa", "Tensilica Xtensa core") + +xtensa_device::xtensa_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) + : cpu_device(mconfig, XTENSA, tag, owner, clock) + , m_space_config("program", ENDIANNESS_LITTLE, 32, 32, 0) + , m_pc(0) +{ +} + +std::unique_ptr xtensa_device::create_disassembler() +{ + return std::make_unique(); +} + +device_memory_interface::space_config_vector xtensa_device::memory_space_config() const +{ + return space_config_vector { + std::make_pair(AS_PROGRAM, &m_space_config), + }; +} + +void xtensa_device::device_start() +{ + space(AS_PROGRAM).cache(m_cache); + space(AS_PROGRAM).specific(m_space); + + std::fill(std::begin(m_a), std::end(m_a), 0); + + set_icountptr(m_icount); + + state_add(XTENSA_PC, "PC", m_pc); + state_add(STATE_GENPC, "GENPC", m_pc); + state_add(STATE_GENPCBASE, "CURPC", m_pc); + for (int i = 0; i < 16; i++) + state_add(XTENSA_A0 + i, string_format("a%d", i).c_str(), m_a[i]); + + save_item(NAME(m_pc)); + save_item(NAME(m_a)); +} + +void xtensa_device::device_reset() +{ + // TODO: Reset state +} + +void xtensa_device::execute_run() +{ + debugger_instruction_hook(m_pc); + + m_icount = 0; +} + +void xtensa_device::execute_set_input(int inputnum, int state) +{ + // TODO +} diff --git a/src/devices/cpu/xtensa/xtensa.h b/src/devices/cpu/xtensa/xtensa.h new file mode 100644 index 0000000000000..1c288a36aa7f6 --- /dev/null +++ b/src/devices/cpu/xtensa/xtensa.h @@ -0,0 +1,52 @@ +// license:BSD-3-Clause +// copyright-holders:AJR + +#ifndef MAME_CPU_XTENSA_XTENSA_H +#define MAME_CPU_XTENSA_XTENSA_H + +#pragma once + + +class xtensa_device : public cpu_device +{ +public: + xtensa_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + enum { + XTENSA_PC, + XTENSA_A0, XTENSA_A1, XTENSA_A2, XTENSA_A3, + XTENSA_A4, XTENSA_A5, XTENSA_A6, XTENSA_A7, + XTENSA_A8, XTENSA_A9, XTENSA_A10, XTENSA_A11, + XTENSA_A12, XTENSA_A13, XTENSA_A14, XTENSA_A15 + }; + +protected: + // device-level overrides + virtual void device_start() override; + virtual void device_reset() override; + + // device_execute_interface overrides + virtual void execute_run() override; + virtual void execute_set_input(int inputnum, int state) override; + + // device_disasm_interface overrides + virtual std::unique_ptr create_disassembler() override; + + // device_memory_interface overrides + virtual space_config_vector memory_space_config() const override; + +private: + // address space + address_space_config m_space_config; + memory_access<32, 2, 0, ENDIANNESS_LITTLE>::cache m_cache; + memory_access<32, 2, 0, ENDIANNESS_LITTLE>::specific m_space; + + // internal state + u32 m_a[16]; + u32 m_pc; + s32 m_icount; +}; + +DECLARE_DEVICE_TYPE(XTENSA, xtensa_device) + +#endif // MAME_CPU_XTENSA_XTENSA_H diff --git a/src/devices/cpu/xtensa/xtensad.cpp b/src/devices/cpu/xtensa/xtensad.cpp index d369159d5e423..50cf6da2e4fde 100644 --- a/src/devices/cpu/xtensa/xtensad.cpp +++ b/src/devices/cpu/xtensa/xtensad.cpp @@ -112,7 +112,7 @@ static const char *const s_st1_ops[16] = static const char *const s_tlb_ops[16] = { "", "", "", "ritlb0", - "iitlb", "pitlb", "witlb", "ritlb1" + "iitlb", "pitlb", "witlb", "ritlb1", "", "", "", "rdtlb0", "idtlb", "pdtlb", "wdtlb", "rdtlb1" }; @@ -709,12 +709,12 @@ offs_t xtensa_disassembler::disassemble(std::ostream &stream, offs_t pc, const x { case 0b0000: // L32E util::stream_format(stream, "%-8sa%d, a%d, ", "l32e", BIT(inst, 4, 4), BIT(inst, 8, 4)); - format_imm(stream, int(BIT(inst, 12, 4)) * -4); + format_imm(stream, int(BIT(inst, 12, 4)) * 4 - 64); break; case 0b0100: // S32E util::stream_format(stream, "%-8sa%d, a%d, ", "s32e", BIT(inst, 4, 4), BIT(inst, 8, 4)); - format_imm(stream, int(BIT(inst, 12, 4)) * -4); + format_imm(stream, int(BIT(inst, 12, 4)) * 4 - 64); break; default: diff --git a/src/devices/machine/chessmachine.h b/src/devices/machine/chessmachine.h index 481060aaa2979..345cbcafa3e9e 100644 --- a/src/devices/machine/chessmachine.h +++ b/src/devices/machine/chessmachine.h @@ -47,11 +47,12 @@ class chessmachine_device : public device_t devcb_write_line m_data_out; u8 m_latch[2]; + bool m_bootrom_enabled; + void data0_w_sync(int param); void data1_w_sync(int param); void reset_w_sync(int param); - bool m_bootrom_enabled; void install_bootrom(bool enable); TIMER_DEVICE_CALLBACK_MEMBER(disable_bootrom) { install_bootrom(false); } u32 disable_bootrom_r(); diff --git a/src/devices/machine/msm6200.cpp b/src/devices/machine/msm6200.cpp new file mode 100644 index 0000000000000..70e05aa1ddf26 --- /dev/null +++ b/src/devices/machine/msm6200.cpp @@ -0,0 +1,99 @@ +// license:BSD-3-Clause +// copyright-holders:Devin Acker +/*************************************************************************** + OKI MSM6200 keyboard controller (HLE) +***************************************************************************/ + +#include "emu.h" +#include "msm6200.h" + +DEFINE_DEVICE_TYPE(MSM6200, msm6200_device, "msm6200", "OKI MSM6200 keyboard controller") + +/**************************************************************************/ +msm6200_device::msm6200_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : + device_t(mconfig, MSM6200, tag, owner, clock), + m_keys(*this, "KI%u", 1u), + m_velocity(*this, "VELOCITY"), + m_irq_cb(*this) +{ +} + +/**************************************************************************/ +void msm6200_device::device_start() +{ + m_cmd = 0xf; + + save_item(NAME(m_cmd)); + save_item(NAME(m_row)); + save_item(NAME(m_key_data)); + save_item(NAME(m_key_state)); + save_item(NAME(m_last_state)); +} + +/**************************************************************************/ +void msm6200_device::device_reset() +{ + m_row = 0; + m_key_data = 0; + m_key_state = 0; + std::fill(std::begin(m_last_state), std::end(m_last_state), 0); +} + +/**************************************************************************/ +void msm6200_device::write(offs_t offset, u8 data) +{ + // 8-bit multiplexed address/data bus, upper 4 bits are output only + // on write, the lower 4 bits of the address are latched and the data is ignored + m_cmd = offset & 0xf; + m_key_data = 0xff; + + switch (m_cmd) + { + case 0: // read key number + for (int i = 0; i < 2; i++) + { + if (BIT(m_key_state ^ m_last_state[m_row], i)) + { + m_last_state[m_row] ^= (1 << i); + m_key_data = (BIT(m_key_state, i) << 7) | ((m_row + 1) << 1) | i; + break; + } + } + if (m_key_state == m_last_state[m_row]) + m_irq_cb(0); + break; + + case 1: // read velocity + m_key_data = m_velocity.read_safe(0x3f); + break; + + case 2: // next row? + (++m_row) %= m_keys.size(); + // TODO: what should this one actually be? + // the cz1/ht6000 key MCU code outputs the result to port 1 for debugging + m_key_data = m_row; + break; + + case 7: // capture current row? + m_key_state = m_keys[m_row].read_safe(0); + if (m_key_state != m_last_state[m_row]) + m_irq_cb(1); + break; + + case 8: // init all rows + for (int i = 0; i < m_keys.size(); i++) + m_last_state[i] = m_keys[i].read_safe(0); + m_irq_cb(0); + break; + + default: + logerror("%s: unknown cmd 0x%x\n", machine().describe_context(), m_cmd); + break; + } +} + +/**************************************************************************/ +u8 msm6200_device::read() +{ + return m_key_data; +} diff --git a/src/devices/machine/msm6200.h b/src/devices/machine/msm6200.h new file mode 100644 index 0000000000000..034950d10e7ea --- /dev/null +++ b/src/devices/machine/msm6200.h @@ -0,0 +1,40 @@ +// license:BSD-3-Clause +// copyright-holders: Devin Acker +/*************************************************************************** + OKI MSM6200 keyboard controller (HLE) +***************************************************************************/ + +#ifndef MAME_MACHINE_MSM6200_H +#define MAME_MACHINE_MSM6200_H + +#pragma once + +class msm6200_device : public device_t +{ +public: + msm6200_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); + + auto irq_cb() { return m_irq_cb.bind(); } + + void write(offs_t offset, u8 data); + u8 read(); + +protected: + virtual void device_start() override; + virtual void device_reset() override; + +private: + optional_ioport_array<38> m_keys; + optional_ioport m_velocity; + + devcb_write_line m_irq_cb; + + u8 m_cmd, m_row, m_key_data; + u8 m_key_state; + u8 m_last_state[38]; +}; + +// device type definition +DECLARE_DEVICE_TYPE(MSM6200, msm6200_device) + +#endif // MAME_MACHINE_MSM6200_H diff --git a/src/devices/machine/nandflash.h b/src/devices/machine/nandflash.h index 0c5a9be827794..dc1b3f0d134a5 100644 --- a/src/devices/machine/nandflash.h +++ b/src/devices/machine/nandflash.h @@ -157,6 +157,6 @@ DECLARE_DEVICE_TYPE(SAMSUNG_K9F2808U0B, samsung_k9f2808u0b_device) DECLARE_DEVICE_TYPE(SAMSUNG_K9F1G08U0B, samsung_k9f1g08u0b_device) DECLARE_DEVICE_TYPE(SAMSUNG_K9F1G08U0M, samsung_k9f1g08u0m_device) DECLARE_DEVICE_TYPE(SAMSUNG_K9LAG08U0M, samsung_k9lag08u0m_device) -DECLARE_DEVICE_TYPE(SAMSUNG_K9F2G08U0M, samsung_k9f2g08u0m_device) +DECLARE_DEVICE_TYPE(SAMSUNG_K9F2G08U0M, samsung_k9f2g08u0m_device) #endif // MAME_MACHINE_NANDFLASH_H diff --git a/src/devices/machine/pxa255.cpp b/src/devices/machine/pxa255.cpp index 482f1d3bf1500..1f1dff2e4522b 100644 --- a/src/devices/machine/pxa255.cpp +++ b/src/devices/machine/pxa255.cpp @@ -28,25 +28,247 @@ #define LOG_CLOCKS (1U << 11) #define LOG_ALL (LOG_UNKNOWN | LOG_I2S | LOG_DMA | LOG_OSTIMER | LOG_INTC | LOG_GPIO | LOG_LCD_DMA | LOG_LCD | LOG_POWER | LOG_RTC | LOG_CLOCKS) -#define VERBOSE (LOG_ALL) +#define VERBOSE (LOG_GPIO) #include "logmacro.h" DEFINE_DEVICE_TYPE(PXA255_PERIPHERALS, pxa255_periphs_device, "pxa255_periphs", "Intel XScale PXA255 Peripherals") -pxa255_periphs_device::pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) +pxa255_periphs_device::pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock) : device_t(mconfig, PXA255_PERIPHERALS, tag, owner, clock) - , m_gpio0_w(*this) - , m_gpio1_w(*this) - , m_gpio2_w(*this) - , m_gpio0_r(*this, 0xffffffff) - , m_gpio1_r(*this, 0xffffffff) - , m_gpio2_r(*this, 0xffffffff) + , m_gpio_w(*this) , m_maincpu(*this, finder_base::DUMMY_TAG) , m_dmadac(*this, "dac%u", 1U) , m_palette(*this, "palette") { } +void pxa255_periphs_device::map(address_map &map) +{ + map(0x00000000, 0x0000003f).rw(FUNC(pxa255_periphs_device::dma_dcsr_r), FUNC(pxa255_periphs_device::dma_dcsr_w)); + map(0x000000f0, 0x000000f3).rw(FUNC(pxa255_periphs_device::dma_dint_r), FUNC(pxa255_periphs_device::dma_dint_w)); + map(0x00000100, 0x0000019f).rw(FUNC(pxa255_periphs_device::dma_drcmr_r), FUNC(pxa255_periphs_device::dma_drcmr_w)); + map(0x00000200, 0x00000203).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<0>), FUNC(pxa255_periphs_device::dma_ddadr_w<0>)); + map(0x00000204, 0x00000207).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<0>), FUNC(pxa255_periphs_device::dma_dsadr_w<0>)); + map(0x00000208, 0x0000020b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<0>), FUNC(pxa255_periphs_device::dma_dtadr_w<0>)); + map(0x0000020c, 0x0000020f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<0>), FUNC(pxa255_periphs_device::dma_dcmd_w<0>)); + map(0x00000210, 0x00000213).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<1>), FUNC(pxa255_periphs_device::dma_ddadr_w<1>)); + map(0x00000214, 0x00000217).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<1>), FUNC(pxa255_periphs_device::dma_dsadr_w<1>)); + map(0x00000218, 0x0000021b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<1>), FUNC(pxa255_periphs_device::dma_dtadr_w<1>)); + map(0x0000021c, 0x0000021f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<1>), FUNC(pxa255_periphs_device::dma_dcmd_w<1>)); + map(0x00000220, 0x00000223).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<2>), FUNC(pxa255_periphs_device::dma_ddadr_w<2>)); + map(0x00000224, 0x00000227).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<2>), FUNC(pxa255_periphs_device::dma_dsadr_w<2>)); + map(0x00000228, 0x0000022b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<2>), FUNC(pxa255_periphs_device::dma_dtadr_w<2>)); + map(0x0000022c, 0x0000022f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<2>), FUNC(pxa255_periphs_device::dma_dcmd_w<2>)); + map(0x00000230, 0x00000233).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<3>), FUNC(pxa255_periphs_device::dma_ddadr_w<3>)); + map(0x00000234, 0x00000237).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<3>), FUNC(pxa255_periphs_device::dma_dsadr_w<3>)); + map(0x00000238, 0x0000023b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<3>), FUNC(pxa255_periphs_device::dma_dtadr_w<3>)); + map(0x0000023c, 0x0000023f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<3>), FUNC(pxa255_periphs_device::dma_dcmd_w<3>)); + map(0x00000240, 0x00000243).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<4>), FUNC(pxa255_periphs_device::dma_ddadr_w<4>)); + map(0x00000244, 0x00000247).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<4>), FUNC(pxa255_periphs_device::dma_dsadr_w<4>)); + map(0x00000248, 0x0000024b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<4>), FUNC(pxa255_periphs_device::dma_dtadr_w<4>)); + map(0x0000024c, 0x0000024f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<4>), FUNC(pxa255_periphs_device::dma_dcmd_w<4>)); + map(0x00000250, 0x00000253).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<5>), FUNC(pxa255_periphs_device::dma_ddadr_w<5>)); + map(0x00000254, 0x00000257).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<5>), FUNC(pxa255_periphs_device::dma_dsadr_w<5>)); + map(0x00000258, 0x0000025b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<5>), FUNC(pxa255_periphs_device::dma_dtadr_w<5>)); + map(0x0000025c, 0x0000025f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<5>), FUNC(pxa255_periphs_device::dma_dcmd_w<5>)); + map(0x00000260, 0x00000263).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<6>), FUNC(pxa255_periphs_device::dma_ddadr_w<6>)); + map(0x00000264, 0x00000267).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<6>), FUNC(pxa255_periphs_device::dma_dsadr_w<6>)); + map(0x00000268, 0x0000026b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<6>), FUNC(pxa255_periphs_device::dma_dtadr_w<6>)); + map(0x0000026c, 0x0000026f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<6>), FUNC(pxa255_periphs_device::dma_dcmd_w<6>)); + map(0x00000270, 0x00000273).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<7>), FUNC(pxa255_periphs_device::dma_ddadr_w<7>)); + map(0x00000274, 0x00000277).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<7>), FUNC(pxa255_periphs_device::dma_dsadr_w<7>)); + map(0x00000278, 0x0000027b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<7>), FUNC(pxa255_periphs_device::dma_dtadr_w<7>)); + map(0x0000027c, 0x0000027f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<7>), FUNC(pxa255_periphs_device::dma_dcmd_w<7>)); + map(0x00000280, 0x00000283).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<8>), FUNC(pxa255_periphs_device::dma_ddadr_w<8>)); + map(0x00000284, 0x00000287).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<8>), FUNC(pxa255_periphs_device::dma_dsadr_w<8>)); + map(0x00000288, 0x0000028b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<8>), FUNC(pxa255_periphs_device::dma_dtadr_w<8>)); + map(0x0000028c, 0x0000028f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<8>), FUNC(pxa255_periphs_device::dma_dcmd_w<8>)); + map(0x00000290, 0x00000293).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<9>), FUNC(pxa255_periphs_device::dma_ddadr_w<9>)); + map(0x00000294, 0x00000297).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<9>), FUNC(pxa255_periphs_device::dma_dsadr_w<9>)); + map(0x00000298, 0x0000029b).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<9>), FUNC(pxa255_periphs_device::dma_dtadr_w<9>)); + map(0x0000029c, 0x0000029f).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<9>), FUNC(pxa255_periphs_device::dma_dcmd_w<9>)); + map(0x000002a0, 0x000002a3).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<10>), FUNC(pxa255_periphs_device::dma_ddadr_w<10>)); + map(0x000002a4, 0x000002a7).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<10>), FUNC(pxa255_periphs_device::dma_dsadr_w<10>)); + map(0x000002a8, 0x000002ab).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<10>), FUNC(pxa255_periphs_device::dma_dtadr_w<10>)); + map(0x000002ac, 0x000002af).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<10>), FUNC(pxa255_periphs_device::dma_dcmd_w<10>)); + map(0x000002b0, 0x000002b3).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<11>), FUNC(pxa255_periphs_device::dma_ddadr_w<11>)); + map(0x000002b4, 0x000002b7).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<11>), FUNC(pxa255_periphs_device::dma_dsadr_w<11>)); + map(0x000002b8, 0x000002bb).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<11>), FUNC(pxa255_periphs_device::dma_dtadr_w<11>)); + map(0x000002bc, 0x000002bf).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<11>), FUNC(pxa255_periphs_device::dma_dcmd_w<11>)); + map(0x000002c0, 0x000002c3).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<12>), FUNC(pxa255_periphs_device::dma_ddadr_w<12>)); + map(0x000002c4, 0x000002c7).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<12>), FUNC(pxa255_periphs_device::dma_dsadr_w<12>)); + map(0x000002c8, 0x000002cb).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<12>), FUNC(pxa255_periphs_device::dma_dtadr_w<12>)); + map(0x000002cc, 0x000002cf).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<12>), FUNC(pxa255_periphs_device::dma_dcmd_w<12>)); + map(0x000002d0, 0x000002d3).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<13>), FUNC(pxa255_periphs_device::dma_ddadr_w<13>)); + map(0x000002d4, 0x000002d7).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<13>), FUNC(pxa255_periphs_device::dma_dsadr_w<13>)); + map(0x000002d8, 0x000002db).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<13>), FUNC(pxa255_periphs_device::dma_dtadr_w<13>)); + map(0x000002dc, 0x000002df).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<13>), FUNC(pxa255_periphs_device::dma_dcmd_w<13>)); + map(0x000002e0, 0x000002e3).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<14>), FUNC(pxa255_periphs_device::dma_ddadr_w<14>)); + map(0x000002e4, 0x000002e7).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<14>), FUNC(pxa255_periphs_device::dma_dsadr_w<14>)); + map(0x000002e8, 0x000002eb).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<14>), FUNC(pxa255_periphs_device::dma_dtadr_w<14>)); + map(0x000002ec, 0x000002ef).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<14>), FUNC(pxa255_periphs_device::dma_dcmd_w<14>)); + map(0x000002f0, 0x000002f3).rw(FUNC(pxa255_periphs_device::dma_ddadr_r<15>), FUNC(pxa255_periphs_device::dma_ddadr_w<15>)); + map(0x000002f4, 0x000002f7).rw(FUNC(pxa255_periphs_device::dma_dsadr_r<15>), FUNC(pxa255_periphs_device::dma_dsadr_w<15>)); + map(0x000002f8, 0x000002fb).rw(FUNC(pxa255_periphs_device::dma_dtadr_r<15>), FUNC(pxa255_periphs_device::dma_dtadr_w<15>)); + map(0x000002fc, 0x000002ff).rw(FUNC(pxa255_periphs_device::dma_dcmd_r<15>), FUNC(pxa255_periphs_device::dma_dcmd_w<15>)); + map(0x00900000, 0x00900003).rw(FUNC(pxa255_periphs_device::rtc_rcnr_r), FUNC(pxa255_periphs_device::rtc_rcnr_w)); + map(0x00900004, 0x00900007).rw(FUNC(pxa255_periphs_device::rtc_rtar_r), FUNC(pxa255_periphs_device::rtc_rtar_w)); + map(0x00900008, 0x0090000b).rw(FUNC(pxa255_periphs_device::rtc_rtsr_r), FUNC(pxa255_periphs_device::rtc_rtsr_w)); + map(0x0090000c, 0x0090000f).rw(FUNC(pxa255_periphs_device::rtc_rttr_r), FUNC(pxa255_periphs_device::rtc_rttr_w)); + map(0x00400000, 0x00400003).rw(FUNC(pxa255_periphs_device::i2s_sacr0_r), FUNC(pxa255_periphs_device::i2s_sacr0_w)); + map(0x00400004, 0x00400007).rw(FUNC(pxa255_periphs_device::i2s_sacr1_r), FUNC(pxa255_periphs_device::i2s_sacr1_w)); + map(0x0040000c, 0x0040000f).rw(FUNC(pxa255_periphs_device::i2s_sasr0_r), FUNC(pxa255_periphs_device::i2s_sasr0_w)); + map(0x00400014, 0x00400017).rw(FUNC(pxa255_periphs_device::i2s_saimr_r), FUNC(pxa255_periphs_device::i2s_saimr_w)); + map(0x00400018, 0x0040001b).rw(FUNC(pxa255_periphs_device::i2s_saicr_r), FUNC(pxa255_periphs_device::i2s_saicr_w)); + map(0x00400060, 0x00400063).rw(FUNC(pxa255_periphs_device::i2s_sadiv_r), FUNC(pxa255_periphs_device::i2s_sadiv_w)); + map(0x00400080, 0x00400083).rw(FUNC(pxa255_periphs_device::i2s_sadr_r), FUNC(pxa255_periphs_device::i2s_sadr_w)); + map(0x00a00000, 0x00a00003).rw(FUNC(pxa255_periphs_device::tmr_osmr_r<0>), FUNC(pxa255_periphs_device::tmr_osmr_w<0>)); + map(0x00a00004, 0x00a00007).rw(FUNC(pxa255_periphs_device::tmr_osmr_r<1>), FUNC(pxa255_periphs_device::tmr_osmr_w<1>)); + map(0x00a00008, 0x00a0000b).rw(FUNC(pxa255_periphs_device::tmr_osmr_r<2>), FUNC(pxa255_periphs_device::tmr_osmr_w<2>)); + map(0x00a0000c, 0x00a0000f).rw(FUNC(pxa255_periphs_device::tmr_osmr_r<3>), FUNC(pxa255_periphs_device::tmr_osmr_w<3>)); + map(0x00a00010, 0x00a00013).rw(FUNC(pxa255_periphs_device::tmr_oscr_r), FUNC(pxa255_periphs_device::tmr_oscr_w)); + map(0x00a00014, 0x00a00017).rw(FUNC(pxa255_periphs_device::tmr_ossr_r), FUNC(pxa255_periphs_device::tmr_ossr_w)); + map(0x00a00018, 0x00a0001b).rw(FUNC(pxa255_periphs_device::tmr_ower_r), FUNC(pxa255_periphs_device::tmr_ower_w)); + map(0x00a0001c, 0x00a0001f).rw(FUNC(pxa255_periphs_device::tmr_oier_r), FUNC(pxa255_periphs_device::tmr_oier_w)); + map(0x00d00000, 0x00d00003).rw(FUNC(pxa255_periphs_device::intc_icip_r), FUNC(pxa255_periphs_device::intc_icip_w)); + map(0x00d00004, 0x00d00007).rw(FUNC(pxa255_periphs_device::intc_icmr_r), FUNC(pxa255_periphs_device::intc_icmr_w)); + map(0x00d00008, 0x00d0000b).rw(FUNC(pxa255_periphs_device::intc_iclr_r), FUNC(pxa255_periphs_device::intc_iclr_w)); + map(0x00d0000c, 0x00d0000f).rw(FUNC(pxa255_periphs_device::intc_icfp_r), FUNC(pxa255_periphs_device::intc_icfp_w)); + map(0x00d00010, 0x00d00013).rw(FUNC(pxa255_periphs_device::intc_icpr_r), FUNC(pxa255_periphs_device::intc_icpr_w)); + map(0x00d00014, 0x00d00017).rw(FUNC(pxa255_periphs_device::intc_iccr_r), FUNC(pxa255_periphs_device::intc_iccr_w)); + map(0x00e00000, 0x00e00003).rw(FUNC(pxa255_periphs_device::gpio_gplr_r<0>), FUNC(pxa255_periphs_device::gpio_gplr_w<0>)); + map(0x00e00004, 0x00e00007).rw(FUNC(pxa255_periphs_device::gpio_gplr_r<1>), FUNC(pxa255_periphs_device::gpio_gplr_w<1>)); + map(0x00e00008, 0x00e0000b).rw(FUNC(pxa255_periphs_device::gpio_gplr_r<2>), FUNC(pxa255_periphs_device::gpio_gplr_w<2>)); + map(0x00e0000c, 0x00e0000f).rw(FUNC(pxa255_periphs_device::gpio_gpdr_r<0>), FUNC(pxa255_periphs_device::gpio_gpdr_w<0>)); + map(0x00e00010, 0x00e00013).rw(FUNC(pxa255_periphs_device::gpio_gpdr_r<1>), FUNC(pxa255_periphs_device::gpio_gpdr_w<1>)); + map(0x00e00014, 0x00e00017).rw(FUNC(pxa255_periphs_device::gpio_gpdr_r<2>), FUNC(pxa255_periphs_device::gpio_gpdr_w<2>)); + map(0x00e00018, 0x00e0001b).rw(FUNC(pxa255_periphs_device::gpio_gpsr_r<0>), FUNC(pxa255_periphs_device::gpio_gpsr_w<0>)); + map(0x00e0001c, 0x00e0001f).rw(FUNC(pxa255_periphs_device::gpio_gpsr_r<1>), FUNC(pxa255_periphs_device::gpio_gpsr_w<1>)); + map(0x00e00020, 0x00e00023).rw(FUNC(pxa255_periphs_device::gpio_gpsr_r<2>), FUNC(pxa255_periphs_device::gpio_gpsr_w<2>)); + map(0x00e00024, 0x00e00027).rw(FUNC(pxa255_periphs_device::gpio_gpcr_r<0>), FUNC(pxa255_periphs_device::gpio_gpcr_w<0>)); + map(0x00e00028, 0x00e0002b).rw(FUNC(pxa255_periphs_device::gpio_gpcr_r<1>), FUNC(pxa255_periphs_device::gpio_gpcr_w<1>)); + map(0x00e0002c, 0x00e0002f).rw(FUNC(pxa255_periphs_device::gpio_gpcr_r<2>), FUNC(pxa255_periphs_device::gpio_gpcr_w<2>)); + map(0x00e00030, 0x00e00033).rw(FUNC(pxa255_periphs_device::gpio_grer_r<0>), FUNC(pxa255_periphs_device::gpio_grer_w<0>)); + map(0x00e00034, 0x00e00037).rw(FUNC(pxa255_periphs_device::gpio_grer_r<1>), FUNC(pxa255_periphs_device::gpio_grer_w<1>)); + map(0x00e00038, 0x00e0003b).rw(FUNC(pxa255_periphs_device::gpio_grer_r<2>), FUNC(pxa255_periphs_device::gpio_grer_w<2>)); + map(0x00e0003c, 0x00e0003f).rw(FUNC(pxa255_periphs_device::gpio_gfer_r<0>), FUNC(pxa255_periphs_device::gpio_gfer_w<0>)); + map(0x00e00040, 0x00e00043).rw(FUNC(pxa255_periphs_device::gpio_gfer_r<1>), FUNC(pxa255_periphs_device::gpio_gfer_w<1>)); + map(0x00e00044, 0x00e00047).rw(FUNC(pxa255_periphs_device::gpio_gfer_r<2>), FUNC(pxa255_periphs_device::gpio_gfer_w<2>)); + map(0x00e00048, 0x00e0004b).rw(FUNC(pxa255_periphs_device::gpio_gedr_r<0>), FUNC(pxa255_periphs_device::gpio_gedr_w<0>)); + map(0x00e0004c, 0x00e0004f).rw(FUNC(pxa255_periphs_device::gpio_gedr_r<1>), FUNC(pxa255_periphs_device::gpio_gedr_w<1>)); + map(0x00e00050, 0x00e00053).rw(FUNC(pxa255_periphs_device::gpio_gedr_r<2>), FUNC(pxa255_periphs_device::gpio_gedr_w<2>)); + map(0x00e00054, 0x00e00057).rw(FUNC(pxa255_periphs_device::gpio_gafrl_r<0>), FUNC(pxa255_periphs_device::gpio_gafrl_w<0>)); + map(0x00e00058, 0x00e0005b).rw(FUNC(pxa255_periphs_device::gpio_gafru_r<0>), FUNC(pxa255_periphs_device::gpio_gafru_w<0>)); + map(0x00e0005c, 0x00e0005f).rw(FUNC(pxa255_periphs_device::gpio_gafrl_r<1>), FUNC(pxa255_periphs_device::gpio_gafrl_w<1>)); + map(0x00e00060, 0x00e00063).rw(FUNC(pxa255_periphs_device::gpio_gafru_r<1>), FUNC(pxa255_periphs_device::gpio_gafru_w<1>)); + map(0x00e00064, 0x00e00067).rw(FUNC(pxa255_periphs_device::gpio_gafrl_r<2>), FUNC(pxa255_periphs_device::gpio_gafrl_w<2>)); + map(0x00e00068, 0x00e0006b).rw(FUNC(pxa255_periphs_device::gpio_gafru_r<2>), FUNC(pxa255_periphs_device::gpio_gafru_w<2>)); + map(0x00f00000, 0x00f00003).rw(FUNC(pxa255_periphs_device::pwr_pmcr_r), FUNC(pxa255_periphs_device::pwr_pmcr_w)); + map(0x00f00004, 0x00f00007).rw(FUNC(pxa255_periphs_device::pwr_pssr_r), FUNC(pxa255_periphs_device::pwr_pssr_w)); + map(0x00f00008, 0x00f0000b).rw(FUNC(pxa255_periphs_device::pwr_pspr_r), FUNC(pxa255_periphs_device::pwr_pspr_w)); + map(0x00f0000c, 0x00f0000f).rw(FUNC(pxa255_periphs_device::pwr_pwer_r), FUNC(pxa255_periphs_device::pwr_pwer_w)); + map(0x00f00010, 0x00f00013).rw(FUNC(pxa255_periphs_device::pwr_prer_r), FUNC(pxa255_periphs_device::pwr_prer_w)); + map(0x00f00014, 0x00f00017).rw(FUNC(pxa255_periphs_device::pwr_pfer_r), FUNC(pxa255_periphs_device::pwr_pfer_w)); + map(0x00f00018, 0x00f0001b).rw(FUNC(pxa255_periphs_device::pwr_pedr_r), FUNC(pxa255_periphs_device::pwr_pedr_w)); + map(0x00f0001c, 0x00f0001f).rw(FUNC(pxa255_periphs_device::pwr_pcfr_r), FUNC(pxa255_periphs_device::pwr_pcfr_w)); + map(0x00f00020, 0x00f00023).rw(FUNC(pxa255_periphs_device::pwr_pgsr_r<0>), FUNC(pxa255_periphs_device::pwr_pgsr_w<0>)); + map(0x00f00024, 0x00f00027).rw(FUNC(pxa255_periphs_device::pwr_pgsr_r<1>), FUNC(pxa255_periphs_device::pwr_pgsr_w<1>)); + map(0x00f00028, 0x00f0002b).rw(FUNC(pxa255_periphs_device::pwr_pgsr_r<2>), FUNC(pxa255_periphs_device::pwr_pgsr_w<2>)); + map(0x00f00030, 0x00f00033).r(FUNC(pxa255_periphs_device::pwr_rcsr_r)); + map(0x00f00034, 0x00f00037).rw(FUNC(pxa255_periphs_device::pwr_pmfw_r), FUNC(pxa255_periphs_device::pwr_pmfw_w)); + map(0x01300000, 0x01300003).rw(FUNC(pxa255_periphs_device::clk_cccr_r), FUNC(pxa255_periphs_device::clk_cccr_w)); + map(0x01300004, 0x01300007).rw(FUNC(pxa255_periphs_device::clk_cken_r), FUNC(pxa255_periphs_device::clk_cken_w)); + map(0x01300008, 0x0130000b).rw(FUNC(pxa255_periphs_device::clk_oscc_r), FUNC(pxa255_periphs_device::clk_oscc_w)); + map(0x04000000, 0x04000003).rw(FUNC(pxa255_periphs_device::lcd_lccr_r<0>), FUNC(pxa255_periphs_device::lcd_lccr_w<0>)); + map(0x04000004, 0x04000007).rw(FUNC(pxa255_periphs_device::lcd_lccr_r<1>), FUNC(pxa255_periphs_device::lcd_lccr_w<1>)); + map(0x04000008, 0x0400000b).rw(FUNC(pxa255_periphs_device::lcd_lccr_r<2>), FUNC(pxa255_periphs_device::lcd_lccr_w<2>)); + map(0x0400000c, 0x0400000f).rw(FUNC(pxa255_periphs_device::lcd_lccr_r<3>), FUNC(pxa255_periphs_device::lcd_lccr_w<3>)); + map(0x04000020, 0x04000023).rw(FUNC(pxa255_periphs_device::lcd_fbr_r<0>), FUNC(pxa255_periphs_device::lcd_fbr_w<0>)); + map(0x04000024, 0x04000027).rw(FUNC(pxa255_periphs_device::lcd_fbr_r<1>), FUNC(pxa255_periphs_device::lcd_fbr_w<1>)); + map(0x04000038, 0x0400003b).rw(FUNC(pxa255_periphs_device::lcd_lcsr_r), FUNC(pxa255_periphs_device::lcd_lcsr_w)); + map(0x0400003c, 0x0400003f).rw(FUNC(pxa255_periphs_device::lcd_liidr_r), FUNC(pxa255_periphs_device::lcd_liidr_w)); + map(0x04000040, 0x04000043).rw(FUNC(pxa255_periphs_device::lcd_trgbr_r), FUNC(pxa255_periphs_device::lcd_trgbr_w)); + map(0x04000044, 0x04000047).rw(FUNC(pxa255_periphs_device::lcd_tcr_r), FUNC(pxa255_periphs_device::lcd_tcr_w)); + map(0x04000200, 0x04000203).rw(FUNC(pxa255_periphs_device::lcd_fdadr_r<0>), FUNC(pxa255_periphs_device::lcd_fdadr_w<0>)); + map(0x04000204, 0x04000207).rw(FUNC(pxa255_periphs_device::lcd_fsadr_r<0>), FUNC(pxa255_periphs_device::lcd_fsadr_w<0>)); + map(0x04000208, 0x0400020b).rw(FUNC(pxa255_periphs_device::lcd_fidr_r<0>), FUNC(pxa255_periphs_device::lcd_fidr_w<0>)); + map(0x0400020c, 0x0400020f).rw(FUNC(pxa255_periphs_device::lcd_ldcmd_r<0>), FUNC(pxa255_periphs_device::lcd_ldcmd_w<0>)); + map(0x04000210, 0x04000213).rw(FUNC(pxa255_periphs_device::lcd_fdadr_r<1>), FUNC(pxa255_periphs_device::lcd_fdadr_w<1>)); + map(0x04000214, 0x04000217).rw(FUNC(pxa255_periphs_device::lcd_fsadr_r<1>), FUNC(pxa255_periphs_device::lcd_fsadr_w<1>)); + map(0x04000218, 0x0400021b).rw(FUNC(pxa255_periphs_device::lcd_fidr_r<1>), FUNC(pxa255_periphs_device::lcd_fidr_w<1>)); + map(0x0400021c, 0x0400021f).rw(FUNC(pxa255_periphs_device::lcd_ldcmd_r<1>), FUNC(pxa255_periphs_device::lcd_ldcmd_w<1>)); +} + +void pxa255_periphs_device::device_start() +{ + for (int index = 0; index < 16; index++) + { + if (index != 3) + { + m_dma_regs.timer[index] = timer_alloc(FUNC(pxa255_periphs_device::dma_end_tick), this); + } + else + { + m_dma_regs.timer[index] = timer_alloc(FUNC(pxa255_periphs_device::audio_dma_end_tick), this); + } + } + + for (int index = 0; index < 4; index++) + { + m_ostimer_regs.timer[index] = timer_alloc(FUNC(pxa255_periphs_device::ostimer_match_tick), this); + } + + m_lcd_regs.dma[0].eof = timer_alloc(FUNC(pxa255_periphs_device::lcd_dma_eof_tick), this); + m_lcd_regs.dma[1].eof = timer_alloc(FUNC(pxa255_periphs_device::lcd_dma_eof_tick), this); + + m_lcd_palette = make_unique_clear(0x100); + m_lcd_framebuffer = make_unique_clear(0x100000); + m_samples = make_unique_clear(0x1000); + + m_rtc_regs.timer = timer_alloc(FUNC(pxa255_periphs_device::rtc_tick), this); +} + +void pxa255_periphs_device::device_reset() +{ + for (int index = 0; index < 16; index++) + { + m_dma_regs.dcsr[index] = 0x00000008; + } + + m_rtc_regs.rcnr = 0x00000000; + m_rtc_regs.rtar = 0x00000000; + m_rtc_regs.rtsr = 0x00000000; + m_rtc_regs.rttr = 0x00007fff; + m_rtc_regs.timer->adjust(attotime::from_hz(1)); + + memset(&m_intc_regs, 0, sizeof(m_intc_regs)); + + m_lcd_regs.trgbr = 0x00aa5500; + m_lcd_regs.tcr = 0x0000754f; + + memset(&m_gpio_regs, 0, sizeof(m_gpio_regs)); + memset(&m_power_regs, 0, sizeof(m_power_regs)); + memset(&m_clk_regs, 0, sizeof(m_clk_regs)); +} + +void pxa255_periphs_device::device_add_mconfig(machine_config &config) +{ + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_refresh_hz(60); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); + screen.set_size(1024, 1024); + screen.set_visarea(0, 295, 0, 479); + screen.set_screen_update(FUNC(pxa255_periphs_device::screen_update)); + + PALETTE(config, m_palette).set_entries(256); + + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + DMADAC(config, m_dmadac[0]).add_route(ALL_OUTPUTS, "lspeaker", 1.0); + DMADAC(config, m_dmadac[1]).add_route(ALL_OUTPUTS, "rspeaker", 1.0); +} + /* PXA255 Inter-Integrated-Circuit Sound (I2S) Controller @@ -55,88 +277,110 @@ pxa255_periphs_device::pxa255_periphs_device(const machine_config &mconfig, cons */ -uint32_t pxa255_periphs_device::i2s_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::i2s_sacr0_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_i2s_regs.sacr0; + LOGMASKED(LOG_I2S, "%s: i2s_sacr0_r: Serial Audio Controller Global Control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_sacr0_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_sacr0_r: Serial Audio Controller Global Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_i2s_regs.sacr0 = data & 0x0000ff3d; +} + +u32 pxa255_periphs_device::i2s_sacr1_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_i2s_regs.sacr1; + LOGMASKED(LOG_I2S, "%s: i2s_sacr1_r: Serial Audio Controller I2S/MSB-Justified Control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_sacr1_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_sacr1_w: Serial Audio Controller I2S/MSB-Justified Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_i2s_regs.sacr1 = data & 0x00000039; +} + +u32 pxa255_periphs_device::i2s_sasr0_r(offs_t offset, u32 mem_mask) { - switch (PXA255_I2S_BASE_ADDR | (offset << 2)) + const u32 data = m_i2s_regs.sasr0; + LOGMASKED(LOG_I2S, "%s: i2s_sasr0_r: Serial Audio Controller I2S/MSB-Justified Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_sasr0_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_sasr0_w: Serial Audio Controller I2S/MSB-Justified Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_i2s_regs.sasr0 = data & 0x0000ff7f; +} + +u32 pxa255_periphs_device::i2s_saimr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_i2s_regs.saimr; + LOGMASKED(LOG_I2S, "%s: i2s_saimr_r: Serial Audio Interrupt Mask Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_saimr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_saimr_w: Serial Audio Interrupt Mask Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_i2s_regs.saimr = data & 0x00000078; +} + +u32 pxa255_periphs_device::i2s_saicr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_i2s_regs.saicr; + LOGMASKED(LOG_I2S, "%s: i2s_saimr_r: Serial Audio Interrupt Clear Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_saicr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_saicr_w: Serial Audio Interrupt Clear Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + if (m_i2s_regs.saicr & SAICR_ROR) { - case PXA255_SACR0: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Controller Global Control Register: %08x & %08x\n", m_i2s_regs.sacr0, mem_mask); - return m_i2s_regs.sacr0; - case PXA255_SACR1: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Controller I2S/MSB-Justified Control Register: %08x & %08x\n", m_i2s_regs.sacr1, mem_mask); - return m_i2s_regs.sacr1; - case PXA255_SASR0: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Controller I2S/MSB-Justified Status Register: %08x & %08x\n", m_i2s_regs.sasr0, mem_mask); - return m_i2s_regs.sasr0; - case PXA255_SAIMR: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Interrupt Mask Register: %08x & %08x\n", m_i2s_regs.saimr, mem_mask); - return m_i2s_regs.saimr; - case PXA255_SAICR: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Interrupt Clear Register: %08x & %08x\n", m_i2s_regs.saicr, mem_mask); - return m_i2s_regs.saicr; - case PXA255_SADIV: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Clock Divider Register: %08x & %08x\n", m_i2s_regs.sadiv, mem_mask); - return m_i2s_regs.sadiv; - case PXA255_SADR: - LOGMASKED(LOG_I2S, "pxa255_i2s_r: Serial Audio Data Register: %08x & %08x\n", m_i2s_regs.sadr, mem_mask); - return m_i2s_regs.sadr; - default: - LOGMASKED(LOG_I2S | LOG_UNKNOWN, "pxa255_i2s_r: Unknown address: %08x\n", PXA255_I2S_BASE_ADDR | (offset << 2)); - break; + m_i2s_regs.sasr0 &= ~SASR0_ROR; + } + if (m_i2s_regs.saicr & SAICR_TUR) + { + m_i2s_regs.sasr0 &= ~SASR0_TUR; } - return 0; } -void pxa255_periphs_device::i2s_w(offs_t offset, uint32_t data, uint32_t mem_mask) +u32 pxa255_periphs_device::i2s_sadiv_r(offs_t offset, u32 mem_mask) { - switch (PXA255_I2S_BASE_ADDR | (offset << 2)) + const u32 data = m_i2s_regs.sadiv; + LOGMASKED(LOG_I2S, "%s: i2s_sadiv_r: Serial Audio Clock Divider Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_sadiv_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_saicr_w: Serial Audio Clock Divider Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_i2s_regs.sadiv = data & 0x0000007f; + for (int i = 0; i < 2; i++) { - case PXA255_SACR0: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Controller Global Control Register: %08x & %08x\n", data, mem_mask); - m_i2s_regs.sacr0 = data & 0x0000ff3d; - break; - case PXA255_SACR1: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Controller I2S/MSB-Justified Control Register: %08x & %08x\n", data, mem_mask); - m_i2s_regs.sacr1 = data & 0x00000039; - break; - case PXA255_SASR0: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Controller I2S/MSB-Justified Status Register: %08x & %08x\n", data, mem_mask); - m_i2s_regs.sasr0 = data & 0x0000ff7f; - break; - case PXA255_SAIMR: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Interrupt Mask Register: %08x & %08x\n", data, mem_mask); - m_i2s_regs.saimr = data & 0x00000078; - break; - case PXA255_SAICR: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Interrupt Clear Register: %08x & %08x\n", data, mem_mask); - if (m_i2s_regs.saicr & PXA255_SAICR_ROR) - { - m_i2s_regs.sasr0 &= ~PXA255_SASR0_ROR; - } - if (m_i2s_regs.saicr & PXA255_SAICR_TUR) - { - m_i2s_regs.sasr0 &= ~PXA255_SASR0_TUR; - } - break; - case PXA255_SADIV: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Clock Divider Register: %08x & %08x\n", data, mem_mask); - m_i2s_regs.sadiv = data & 0x0000007f; - for (int i = 0; i < 2; i++) - { - m_dmadac[i]->set_frequency(((double)147600000 / (double)m_i2s_regs.sadiv) / 256.0); - m_dmadac[i]->enable(1); - } - break; - case PXA255_SADR: - LOGMASKED(LOG_I2S, "pxa255_i2s_w: Serial Audio Data Register: %08x & %08x\n", data, mem_mask); - m_i2s_regs.sadr = data; - break; - default: - LOGMASKED(LOG_I2S | LOG_UNKNOWN, "pxa255_i2s_w: Unknown address: %08x = %08x & %08x\n", PXA255_I2S_BASE_ADDR | (offset << 2), data, mem_mask); - break; + m_dmadac[i]->set_frequency(((double)147600000 / (double)m_i2s_regs.sadiv) / 256.0); + m_dmadac[i]->enable(1); } } +u32 pxa255_periphs_device::i2s_sadr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_i2s_regs.sadr; + LOGMASKED(LOG_I2S, "%s: i2s_sadr_r: Serial Audio Data Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::i2s_sadr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_I2S, "%s: i2s_sadr_r: Serial Audio Data Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_i2s_regs.sadr = data; +} + + /* PXA255 DMA controller @@ -150,7 +394,7 @@ void pxa255_periphs_device::dma_irq_check() int set_irq = 0; for (int channel = 0; channel < 16; channel++) { - if (m_dma_regs.dcsr[channel] & (PXA255_DCSR_ENDINTR | PXA255_DCSR_STARTINTR | PXA255_DCSR_BUSERRINTR)) + if (m_dma_regs.dcsr[channel] & (DCSR_ENDINTR | DCSR_STARTINTR | DCSR_BUSERRINTR)) { m_dma_regs.dint |= 1 << channel; set_irq = 1; @@ -161,7 +405,7 @@ void pxa255_periphs_device::dma_irq_check() } } - set_irq_line(PXA255_INT_DMA, set_irq); + set_irq_line(INT_DMA, set_irq); } void pxa255_periphs_device::dma_load_descriptor_and_start(int channel) @@ -174,7 +418,6 @@ void pxa255_periphs_device::dma_load_descriptor_and_start(int channel) } // Load the next descriptor - address_space &space = m_maincpu->space(AS_PROGRAM); m_dma_regs.dsadr[channel] = space.read_dword(m_dma_regs.ddadr[channel] + 0x4); m_dma_regs.dtadr[channel] = space.read_dword(m_dma_regs.ddadr[channel] + 0x8); @@ -193,26 +436,26 @@ void pxa255_periphs_device::dma_load_descriptor_and_start(int channel) } // Interrupt as necessary - if (m_dma_regs.dcmd[channel] & PXA255_DCMD_STARTIRQEN) + if (m_dma_regs.dcmd[channel] & DCMD_STARTIRQEN) { - m_dma_regs.dcsr[channel] |= PXA255_DCSR_STARTINTR; + m_dma_regs.dcsr[channel] |= DCSR_STARTINTR; } - m_dma_regs.dcsr[channel] &= ~PXA255_DCSR_STOPSTATE; + m_dma_regs.dcsr[channel] &= ~DCSR_STOPSTATE; } TIMER_CALLBACK_MEMBER(pxa255_periphs_device::audio_dma_end_tick) { address_space &space = m_maincpu->space(AS_PROGRAM); - const uint32_t count = m_dma_regs.dcmd[3] & 0x00001fff; - uint32_t sadr = m_dma_regs.dsadr[3]; + const u32 count = m_dma_regs.dcmd[3] & 0x00001fff; + u32 sadr = m_dma_regs.dsadr[3]; - int16_t *out_samples = &m_samples[0]; - for (uint32_t index = 0; index < count; index += 4, sadr += 4) + s16 *out_samples = &m_samples[0]; + for (u32 index = 0; index < count; index += 4, sadr += 4) { - const uint32_t word = space.read_dword(sadr); - *out_samples++ = (int16_t)(word >> 16); - *out_samples++ = (int16_t)(word & 0xffff); + const u32 word = space.read_dword(sadr); + *out_samples++ = (s16)(word >> 16); + *out_samples++ = (s16)(word & 0xffff); } for (int index = 0; index < 2; index++) @@ -227,34 +470,34 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::audio_dma_end_tick) TIMER_CALLBACK_MEMBER(pxa255_periphs_device::dma_end_tick) { address_space &space = m_maincpu->space(AS_PROGRAM); - const uint32_t count = m_dma_regs.dcmd[param] & 0x00001fff; - uint32_t sadr = m_dma_regs.dsadr[param]; - uint32_t tadr = m_dma_regs.dtadr[param]; + const u32 count = m_dma_regs.dcmd[param] & 0x00001fff; + u32 sadr = m_dma_regs.dsadr[param]; + u32 tadr = m_dma_regs.dtadr[param]; - static const uint32_t s_inc_size[4] = { 0, 1, 2, 4 }; - const uint32_t inc_index = (m_dma_regs.dcmd[param] >> PXA255_DCMD_SIZE_SHIFT) & PXA255_DCMD_SIZE_MASK; - const uint32_t inc_val = s_inc_size[inc_index]; - const uint32_t sadr_inc = (m_dma_regs.dcmd[param] & PXA255_DCMD_INCSRCADDR) ? inc_val : 0; - const uint32_t tadr_inc = (m_dma_regs.dcmd[param] & PXA255_DCMD_INCTRGADDR) ? inc_val : 0; + static const u32 s_inc_size[4] = { 0, 1, 2, 4 }; + const u32 inc_index = (m_dma_regs.dcmd[param] >> DCMD_SIZE_SHIFT) & DCMD_SIZE_MASK; + const u32 inc_val = s_inc_size[inc_index]; + const u32 sadr_inc = (m_dma_regs.dcmd[param] & DCMD_INCSRCADDR) ? inc_val : 0; + const u32 tadr_inc = (m_dma_regs.dcmd[param] & DCMD_INCTRGADDR) ? inc_val : 0; if (inc_val > 0) { switch (inc_val) { - case PXA255_DCMD_SIZE_8: - for (uint32_t index = 0; index < count; index += inc_val, sadr += sadr_inc, tadr += tadr_inc) + case DCMD_SIZE_8: + for (u32 index = 0; index < count; index += inc_val, sadr += sadr_inc, tadr += tadr_inc) space.write_byte(tadr, space.read_byte(sadr)); break; - case PXA255_DCMD_SIZE_16: - for (uint32_t index = 0; index < count; index += inc_val, sadr += sadr_inc, tadr += tadr_inc) + case DCMD_SIZE_16: + for (u32 index = 0; index < count; index += inc_val, sadr += sadr_inc, tadr += tadr_inc) space.write_word(tadr, space.read_byte(sadr)); break; - case PXA255_DCMD_SIZE_32: - for (uint32_t index = 0; index < count; index += inc_val, sadr += sadr_inc, tadr += tadr_inc) + case DCMD_SIZE_32: + for (u32 index = 0; index < count; index += inc_val, sadr += sadr_inc, tadr += tadr_inc) space.write_dword(tadr, space.read_byte(sadr)); break; default: - logerror( "pxa255_dma_dma_end: Unsupported DMA size\n" ); + LOGMASKED(LOG_DMA, "pxa255_dma_dma_end: Unsupported DMA size\n"); break; } } @@ -264,169 +507,151 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::dma_end_tick) void pxa255_periphs_device::dma_finish(int channel) { - if (m_dma_regs.dcmd[channel] & PXA255_DCMD_ENDIRQEN) + if (m_dma_regs.dcmd[channel] & DCMD_ENDIRQEN) { - m_dma_regs.dcsr[channel] |= PXA255_DCSR_ENDINTR; + m_dma_regs.dcsr[channel] |= DCSR_ENDINTR; } - if (!(m_dma_regs.ddadr[channel] & PXA255_DDADR_STOP) && (m_dma_regs.dcsr[channel] & PXA255_DCSR_RUN)) + if (!(m_dma_regs.ddadr[channel] & DDADR_STOP) && (m_dma_regs.dcsr[channel] & DCSR_RUN)) { - if (m_dma_regs.dcsr[channel] & PXA255_DCSR_RUN) + if (m_dma_regs.dcsr[channel] & DCSR_RUN) { dma_load_descriptor_and_start(channel); } else { - m_dma_regs.dcsr[channel] &= ~PXA255_DCSR_RUN; - m_dma_regs.dcsr[channel] |= PXA255_DCSR_STOPSTATE; + m_dma_regs.dcsr[channel] &= ~DCSR_RUN; + m_dma_regs.dcsr[channel] |= DCSR_STOPSTATE; } } else { - m_dma_regs.dcsr[channel] &= ~PXA255_DCSR_RUN; - m_dma_regs.dcsr[channel] |= PXA255_DCSR_STOPSTATE; + m_dma_regs.dcsr[channel] &= ~DCSR_RUN; + m_dma_regs.dcsr[channel] |= DCSR_STOPSTATE; } dma_irq_check(); } -uint32_t pxa255_periphs_device::dma_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::dma_dcsr_r(offs_t offset, u32 mem_mask) { - switch (PXA255_DMA_BASE_ADDR | (offset << 2)) - { - case PXA255_DCSR0: case PXA255_DCSR1: case PXA255_DCSR2: case PXA255_DCSR3: - case PXA255_DCSR4: case PXA255_DCSR5: case PXA255_DCSR6: case PXA255_DCSR7: - case PXA255_DCSR8: case PXA255_DCSR9: case PXA255_DCSR10: case PXA255_DCSR11: - case PXA255_DCSR12: case PXA255_DCSR13: case PXA255_DCSR14: case PXA255_DCSR15: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, m_dma_regs.dcsr[offset], mem_mask); - return m_dma_regs.dcsr[offset]; - case PXA255_DINT: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Interrupt Register: %08x & %08x\n", m_dma_regs.dint, mem_mask); - return m_dma_regs.dint; - case PXA255_DRCMR0: case PXA255_DRCMR1: case PXA255_DRCMR2: case PXA255_DRCMR3: - case PXA255_DRCMR4: case PXA255_DRCMR5: case PXA255_DRCMR6: case PXA255_DRCMR7: - case PXA255_DRCMR8: case PXA255_DRCMR9: case PXA255_DRCMR10: case PXA255_DRCMR11: - case PXA255_DRCMR12: case PXA255_DRCMR13: case PXA255_DRCMR14: case PXA255_DRCMR15: - case PXA255_DRCMR16: case PXA255_DRCMR17: case PXA255_DRCMR18: case PXA255_DRCMR19: - case PXA255_DRCMR20: case PXA255_DRCMR21: case PXA255_DRCMR22: case PXA255_DRCMR23: - case PXA255_DRCMR24: case PXA255_DRCMR25: case PXA255_DRCMR26: case PXA255_DRCMR27: - case PXA255_DRCMR28: case PXA255_DRCMR29: case PXA255_DRCMR30: case PXA255_DRCMR31: - case PXA255_DRCMR32: case PXA255_DRCMR33: case PXA255_DRCMR34: case PXA255_DRCMR35: - case PXA255_DRCMR36: case PXA255_DRCMR37: case PXA255_DRCMR38: case PXA255_DRCMR39: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Request to Channel Map Register %d: %08x & %08x\n", offset - (0x100 >> 2), 0, mem_mask); - return m_dma_regs.drcmr[offset - (0x100 >> 2)]; - case PXA255_DDADR0: case PXA255_DDADR1: case PXA255_DDADR2: case PXA255_DDADR3: - case PXA255_DDADR4: case PXA255_DDADR5: case PXA255_DDADR6: case PXA255_DDADR7: - case PXA255_DDADR8: case PXA255_DDADR9: case PXA255_DDADR10: case PXA255_DDADR11: - case PXA255_DDADR12: case PXA255_DDADR13: case PXA255_DDADR14: case PXA255_DDADR15: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Descriptor Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask); - return m_dma_regs.ddadr[(offset - (0x200 >> 2)) >> 2]; - case PXA255_DSADR0: case PXA255_DSADR1: case PXA255_DSADR2: case PXA255_DSADR3: - case PXA255_DSADR4: case PXA255_DSADR5: case PXA255_DSADR6: case PXA255_DSADR7: - case PXA255_DSADR8: case PXA255_DSADR9: case PXA255_DSADR10: case PXA255_DSADR11: - case PXA255_DSADR12: case PXA255_DSADR13: case PXA255_DSADR14: case PXA255_DSADR15: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Source Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask); - return m_dma_regs.dsadr[(offset - (0x200 >> 2)) >> 2]; - case PXA255_DTADR0: case PXA255_DTADR1: case PXA255_DTADR2: case PXA255_DTADR3: - case PXA255_DTADR4: case PXA255_DTADR5: case PXA255_DTADR6: case PXA255_DTADR7: - case PXA255_DTADR8: case PXA255_DTADR9: case PXA255_DTADR10: case PXA255_DTADR11: - case PXA255_DTADR12: case PXA255_DTADR13: case PXA255_DTADR14: case PXA255_DTADR15: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Target Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask); - return m_dma_regs.dtadr[(offset - (0x200 >> 2)) >> 2]; - case PXA255_DCMD0: case PXA255_DCMD1: case PXA255_DCMD2: case PXA255_DCMD3: - case PXA255_DCMD4: case PXA255_DCMD5: case PXA255_DCMD6: case PXA255_DCMD7: - case PXA255_DCMD8: case PXA255_DCMD9: case PXA255_DCMD10: case PXA255_DCMD11: - case PXA255_DCMD12: case PXA255_DCMD13: case PXA255_DCMD14: case PXA255_DCMD15: - LOGMASKED(LOG_DMA, "pxa255_dma_r: DMA Command Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, 0, mem_mask); - return m_dma_regs.dcmd[(offset - (0x200 >> 2)) >> 2]; - default: - LOGMASKED(LOG_DMA | LOG_UNKNOWN, "pxa255_dma_r: Unknown address: %08x\n", PXA255_DMA_BASE_ADDR | (offset << 2)); - break; - } - return 0; + const u32 data = m_dma_regs.dcsr[offset]; + LOGMASKED(LOG_DMA, "%s: dma_dcsr_r: DMA Channel Control/Status Register %d: %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + return data; } -void pxa255_periphs_device::dma_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pxa255_periphs_device::dma_dcsr_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_DMA_BASE_ADDR | (offset << 2)) + LOGMASKED(LOG_DMA, "%s: dma_dcsr_w: DMA Channel Control/Status Register %d = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + m_dma_regs.dcsr[offset] &= ~(data & 0x00000007); + m_dma_regs.dcsr[offset] &= ~0x60000000; + m_dma_regs.dcsr[offset] |= data & 0x60000000; + if ((data & DCSR_RUN) && !(m_dma_regs.dcsr[offset] & DCSR_RUN)) { - case PXA255_DCSR0: case PXA255_DCSR1: case PXA255_DCSR2: case PXA255_DCSR3: - case PXA255_DCSR4: case PXA255_DCSR5: case PXA255_DCSR6: case PXA255_DCSR7: - case PXA255_DCSR8: case PXA255_DCSR9: case PXA255_DCSR10: case PXA255_DCSR11: - case PXA255_DCSR12: case PXA255_DCSR13: case PXA255_DCSR14: case PXA255_DCSR15: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Channel Control/Status Register %d: %08x & %08x\n", offset, data, mem_mask); - m_dma_regs.dcsr[offset] &= ~(data & 0x00000007); - m_dma_regs.dcsr[offset] &= ~0x60000000; - m_dma_regs.dcsr[offset] |= data & 0x60000000; - if ((data & PXA255_DCSR_RUN) && !(m_dma_regs.dcsr[offset] & PXA255_DCSR_RUN)) - { - m_dma_regs.dcsr[offset] |= PXA255_DCSR_RUN; - if (data & PXA255_DCSR_NODESCFETCH) - { - LOGMASKED(LOG_DMA, " No-Descriptor-Fetch mode is not supported.\n"); - break; - } - - dma_load_descriptor_and_start(offset); - } - else if (!(data & PXA255_DCSR_RUN)) - { - m_dma_regs.dcsr[offset] &= ~PXA255_DCSR_RUN; - } + m_dma_regs.dcsr[offset] |= DCSR_RUN; + if (data & DCSR_NODESCFETCH) + { + LOGMASKED(LOG_DMA, "%s: No-Descriptor-Fetch mode is not supported.\n", machine().describe_context()); + return; + } - dma_irq_check(); - break; - case PXA255_DINT: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Interrupt Register: %08x & %08x\n", data, mem_mask); - m_dma_regs.dint &= ~data; - break; - case PXA255_DRCMR0: case PXA255_DRCMR1: case PXA255_DRCMR2: case PXA255_DRCMR3: - case PXA255_DRCMR4: case PXA255_DRCMR5: case PXA255_DRCMR6: case PXA255_DRCMR7: - case PXA255_DRCMR8: case PXA255_DRCMR9: case PXA255_DRCMR10: case PXA255_DRCMR11: - case PXA255_DRCMR12: case PXA255_DRCMR13: case PXA255_DRCMR14: case PXA255_DRCMR15: - case PXA255_DRCMR16: case PXA255_DRCMR17: case PXA255_DRCMR18: case PXA255_DRCMR19: - case PXA255_DRCMR20: case PXA255_DRCMR21: case PXA255_DRCMR22: case PXA255_DRCMR23: - case PXA255_DRCMR24: case PXA255_DRCMR25: case PXA255_DRCMR26: case PXA255_DRCMR27: - case PXA255_DRCMR28: case PXA255_DRCMR29: case PXA255_DRCMR30: case PXA255_DRCMR31: - case PXA255_DRCMR32: case PXA255_DRCMR33: case PXA255_DRCMR34: case PXA255_DRCMR35: - case PXA255_DRCMR36: case PXA255_DRCMR37: case PXA255_DRCMR38: case PXA255_DRCMR39: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Request to Channel Map Register %d: %08x & %08x\n", offset - (0x100 >> 2), data, mem_mask); - m_dma_regs.drcmr[offset - (0x100 >> 2)] = data & 0x0000008f; - break; - case PXA255_DDADR0: case PXA255_DDADR1: case PXA255_DDADR2: case PXA255_DDADR3: - case PXA255_DDADR4: case PXA255_DDADR5: case PXA255_DDADR6: case PXA255_DDADR7: - case PXA255_DDADR8: case PXA255_DDADR9: case PXA255_DDADR10: case PXA255_DDADR11: - case PXA255_DDADR12: case PXA255_DDADR13: case PXA255_DDADR14: case PXA255_DDADR15: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Descriptor Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask); - m_dma_regs.ddadr[(offset - (0x200 >> 2)) >> 2] = data & 0xfffffff1; - break; - case PXA255_DSADR0: case PXA255_DSADR1: case PXA255_DSADR2: case PXA255_DSADR3: - case PXA255_DSADR4: case PXA255_DSADR5: case PXA255_DSADR6: case PXA255_DSADR7: - case PXA255_DSADR8: case PXA255_DSADR9: case PXA255_DSADR10: case PXA255_DSADR11: - case PXA255_DSADR12: case PXA255_DSADR13: case PXA255_DSADR14: case PXA255_DSADR15: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Source Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask); - m_dma_regs.dsadr[(offset - (0x200 >> 2)) >> 2] = data & 0xfffffffc; - break; - case PXA255_DTADR0: case PXA255_DTADR1: case PXA255_DTADR2: case PXA255_DTADR3: - case PXA255_DTADR4: case PXA255_DTADR5: case PXA255_DTADR6: case PXA255_DTADR7: - case PXA255_DTADR8: case PXA255_DTADR9: case PXA255_DTADR10: case PXA255_DTADR11: - case PXA255_DTADR12: case PXA255_DTADR13: case PXA255_DTADR14: case PXA255_DTADR15: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Target Address Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask); - m_dma_regs.dtadr[(offset - (0x200 >> 2)) >> 2] = data & 0xfffffffc; - break; - case PXA255_DCMD0: case PXA255_DCMD1: case PXA255_DCMD2: case PXA255_DCMD3: - case PXA255_DCMD4: case PXA255_DCMD5: case PXA255_DCMD6: case PXA255_DCMD7: - case PXA255_DCMD8: case PXA255_DCMD9: case PXA255_DCMD10: case PXA255_DCMD11: - case PXA255_DCMD12: case PXA255_DCMD13: case PXA255_DCMD14: case PXA255_DCMD15: - LOGMASKED(LOG_DMA, "pxa255_dma_w: DMA Command Register %d: %08x & %08x\n", (offset - (0x200 >> 2)) >> 2, data, mem_mask); - m_dma_regs.dcmd[(offset - (0x200 >> 2)) >> 2] = data & 0xf067dfff; - break; - default: - LOGMASKED(LOG_DMA | LOG_UNKNOWN, "pxa255_dma_w: Unknown address: %08x = %08x & %08x\n", PXA255_DMA_BASE_ADDR | (offset << 2), data, mem_mask); - break; + dma_load_descriptor_and_start(offset); + } + else if (!(data & DCSR_RUN)) + { + m_dma_regs.dcsr[offset] &= ~DCSR_RUN; } + + dma_irq_check(); +} + +u32 pxa255_periphs_device::dma_dint_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_dma_regs.dint; + LOGMASKED(LOG_DMA, "%s: dma_dint_r: DMA Interrupt Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::dma_dint_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_DMA, "%s: dma_dint_w: DMA Interrupt Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_dma_regs.dint &= ~data; +} + +u32 pxa255_periphs_device::dma_drcmr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_dma_regs.drcmr[offset]; + LOGMASKED(LOG_DMA, "%s: dma_drcmr_r: DMA Request to Channel Map Register %d: %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + return data; +} + +void pxa255_periphs_device::dma_drcmr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_DMA, "%s: dma_drcmr_w: DMA Request to Channel Map Register %d = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + m_dma_regs.drcmr[offset] = data & 0x0000008f; +} + +template +u32 pxa255_periphs_device::dma_ddadr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_dma_regs.ddadr[Which]; + LOGMASKED(LOG_DMA, "%s: dma_ddadr_r: DMA Descriptor Address Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::dma_ddadr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_DMA, "%s: dma_ddadr_w: DMA Descriptor Address Register %d = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + m_dma_regs.ddadr[offset] = data & 0xfffffff1; +} + +template +u32 pxa255_periphs_device::dma_dsadr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_dma_regs.dsadr[Which]; + LOGMASKED(LOG_DMA, "%s: dma_dsadr_r: DMA Source Address Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::dma_dsadr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_DMA, "%s: dma_dsadr_w: DMA Source Address Register %d = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + m_dma_regs.dsadr[offset] = data & 0xfffffffc; +} + +template +u32 pxa255_periphs_device::dma_dtadr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_dma_regs.dtadr[Which]; + LOGMASKED(LOG_DMA, "%s: dma_dtadr_r: DMA Target Address Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::dma_dtadr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_DMA, "%s: dma_dtadr_w: DMA Target Address Register %d = %08x & %08x\n", machine().describe_context(), offset, data, mem_mask); + m_dma_regs.dtadr[Which] = data & 0xfffffffc; +} + +template +u32 pxa255_periphs_device::dma_dcmd_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_dma_regs.dcmd[Which]; + LOGMASKED(LOG_DMA, "%s: dma_dcmd_r: DMA Command Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::dma_dcmd_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_DMA, "%s: dma_dcmd_w: DMA Command Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_dma_regs.dcmd[offset] = data & 0xf067dfff; } + /* PXA255 Real-Time Clock @@ -441,7 +666,7 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::rtc_tick) if (BIT(m_rtc_regs.rtsr, 3)) { m_rtc_regs.rtsr |= (1 << 1); - set_irq_line(PXA255_INT_RTC_HZ, 1); + set_irq_line(INT_RTC_HZ, 1); } if (m_rtc_regs.rcnr == m_rtc_regs.rtar) @@ -449,73 +674,75 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::rtc_tick) if (BIT(m_rtc_regs.rtsr, 2)) { m_rtc_regs.rtsr |= (1 << 0); - set_irq_line(PXA255_INT_RTC_ALARM, 1); + set_irq_line(INT_RTC_ALARM, 1); } } } -uint32_t pxa255_periphs_device::rtc_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::rtc_rcnr_r(offs_t offset, u32 mem_mask) { - switch (PXA255_RTC_BASE_ADDR | (offset << 2)) - { - case PXA255_RCNR: - LOGMASKED(LOG_RTC, "%s: pxa255 rtc_r: RTC Counter Register: %08x\n", machine().describe_context(), m_rtc_regs.rcnr); - return m_rtc_regs.rcnr; - case PXA255_RTAR: - LOGMASKED(LOG_RTC, "%s: pxa255 rtc_r: RTC Alarm Register: %08x\n", machine().describe_context(), m_rtc_regs.rtar); - return m_rtc_regs.rtar; - case PXA255_RTSR: - LOGMASKED(LOG_RTC, "%s: pxa255 rtc_r: RTC Status Register: %08x\n", machine().describe_context(), m_rtc_regs.rtsr); - return m_rtc_regs.rtsr; - case PXA255_RTTR: - LOGMASKED(LOG_RTC, "%s: pxa255 rtc_r: RTC Trim Register: %08x\n", machine().describe_context(), m_rtc_regs.rttr); - return m_rtc_regs.rttr; - default: - LOGMASKED(LOG_RTC | LOG_UNKNOWN, "pxa255 rtc_r: Unknown address: %08x\n", PXA255_RTC_BASE_ADDR | (offset << 2)); - break; - } - return 0; + const u32 data = m_rtc_regs.rcnr; + LOGMASKED(LOG_RTC, "%s: rtc_rcnr_r: RTC Counter Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } -void pxa255_periphs_device::rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pxa255_periphs_device::rtc_rcnr_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_RTC_BASE_ADDR | (offset << 2)) + LOGMASKED(LOG_RTC, "%s: rtc_rcnr_w: RTC Counter Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_rtc_regs.rcnr); +} + +u32 pxa255_periphs_device::rtc_rtar_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_rtc_regs.rtar; + LOGMASKED(LOG_RTC, "%s: rtc_rtar_r: RTC Alarm Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::rtc_rtar_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_RTC, "%s: rtc_rtar_w: RTC Alarm Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_rtc_regs.rtar); +} + +u32 pxa255_periphs_device::rtc_rtsr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_rtc_regs.rtsr; + LOGMASKED(LOG_RTC, "%s: rtc_rtsr_r: RTC Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::rtc_rtsr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_RTC, "%s: rtc_rtsr_w: RTC Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + const u32 old = m_rtc_regs.rtsr; + m_rtc_regs.rtsr &= ~(data & 0x00000003); + m_rtc_regs.rtsr &= ~0x0000000c; + m_rtc_regs.rtsr |= data & 0x0000000c; + const u32 diff = old ^ m_rtc_regs.rtsr; + if (BIT(diff, 1)) + set_irq_line(INT_RTC_HZ, 0); + if (BIT(diff, 0)) + set_irq_line(INT_RTC_ALARM, 0); +} + +u32 pxa255_periphs_device::rtc_rttr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_rtc_regs.rttr; + LOGMASKED(LOG_RTC, "%s: rtc_rttr_r: RTC Trim Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::rtc_rttr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_RTC, "%s: rtc_rttr_w: RTC Trim Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + if (!BIT(m_rtc_regs.rttr, 31)) { - case PXA255_RCNR: - LOGMASKED(LOG_RTC, "pxa255 rtc_w: RTC Counter Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_rtc_regs.rcnr); - break; - case PXA255_RTAR: - LOGMASKED(LOG_RTC, "pxa255 rtc_w: RTC Alarm Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_rtc_regs.rtar); - break; - case PXA255_RTSR: - { - LOGMASKED(LOG_RTC, "pxa255 rtc_w: RTC Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); - const uint32_t old = m_rtc_regs.rtsr; - m_rtc_regs.rtsr &= ~(data & 0x00000003); - m_rtc_regs.rtsr &= ~0x0000000c; - m_rtc_regs.rtsr |= data & 0x0000000c; - const uint32_t diff = old ^ m_rtc_regs.rtsr; - if (BIT(diff, 1)) - set_irq_line(PXA255_INT_RTC_HZ, 0); - if (BIT(diff, 0)) - set_irq_line(PXA255_INT_RTC_ALARM, 0); - break; - } - case PXA255_RTTR: - LOGMASKED(LOG_RTC, "pxa255 rtc_w: RTC Trim Register (not yet implemented): %08x & %08x\n", machine().describe_context(), data, mem_mask); - if (!BIT(m_rtc_regs.rttr, 31)) - { - COMBINE_DATA(&m_rtc_regs.rttr); - } - break; - default: - LOGMASKED(LOG_RTC | LOG_UNKNOWN, "pxa255 rtc_w: Unknown address: %08x = %08x & %08x\n", PXA255_RTC_BASE_ADDR | (offset << 2), data, mem_mask); - break; + COMBINE_DATA(&m_rtc_regs.rttr); } } + /* PXA255 OS Timer register @@ -526,10 +753,10 @@ void pxa255_periphs_device::rtc_w(offs_t offset, uint32_t data, uint32_t mem_mas void pxa255_periphs_device::ostimer_irq_check() { - set_irq_line(PXA255_INT_OSTIMER0, (m_ostimer_regs.oier & PXA255_OIER_E0) ? ((m_ostimer_regs.ossr & PXA255_OSSR_M0) ? 1 : 0) : 0); - //set_irq_line(PXA255_INT_OSTIMER1, (m_ostimer_regs.oier & PXA255_OIER_E1) ? ((m_ostimer_regs.ossr & PXA255_OSSR_M1) ? 1 : 0) : 0); - //set_irq_line(PXA255_INT_OSTIMER2, (m_ostimer_regs.oier & PXA255_OIER_E2) ? ((m_ostimer_regs.ossr & PXA255_OSSR_M2) ? 1 : 0) : 0); - //set_irq_line(PXA255_INT_OSTIMER3, (m_ostimer_regs.oier & PXA255_OIER_E3) ? ((m_ostimer_regs.ossr & PXA255_OSSR_M3) ? 1 : 0) : 0); + set_irq_line(INT_OSTIMER0, (m_ostimer_regs.oier & OIER_E0) ? ((m_ostimer_regs.ossr & OSSR_M0) ? 1 : 0) : 0); + //set_irq_line(INT_OSTIMER1, (m_ostimer_regs.oier & OIER_E1) ? ((m_ostimer_regs.ossr & OSSR_M1) ? 1 : 0) : 0); + //set_irq_line(INT_OSTIMER2, (m_ostimer_regs.oier & OIER_E2) ? ((m_ostimer_regs.ossr & OSSR_M2) ? 1 : 0) : 0); + //set_irq_line(INT_OSTIMER3, (m_ostimer_regs.oier & OIER_E3) ? ((m_ostimer_regs.ossr & OSSR_M3) ? 1 : 0) : 0); } TIMER_CALLBACK_MEMBER(pxa255_periphs_device::ostimer_match_tick) @@ -539,116 +766,110 @@ TIMER_CALLBACK_MEMBER(pxa255_periphs_device::ostimer_match_tick) ostimer_irq_check(); } -uint32_t pxa255_periphs_device::ostimer_r(offs_t offset, uint32_t mem_mask) +template +void pxa255_periphs_device::ostimer_update_interrupts() { - switch (PXA255_OSTMR_BASE_ADDR | (offset << 2)) + if ((m_ostimer_regs.oier & (OIER_E0 << Which)) && Which != 3) { - case PXA255_OSMR0: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Match Register 0: %08x & %08x\n", m_ostimer_regs.osmr[0], mem_mask); - return m_ostimer_regs.osmr[0]; - case PXA255_OSMR1: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Match Register 1: %08x & %08x\n", m_ostimer_regs.osmr[1], mem_mask); - return m_ostimer_regs.osmr[1]; - case PXA255_OSMR2: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Match Register 2: %08x & %08x\n", m_ostimer_regs.osmr[2], mem_mask); - return m_ostimer_regs.osmr[2]; - case PXA255_OSMR3: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Match Register 3: %08x & %08x\n", m_ostimer_regs.osmr[3], mem_mask); - return m_ostimer_regs.osmr[3]; - case PXA255_OSCR: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Count Register: %08x & %08x\n", m_ostimer_regs.oscr, mem_mask); - // free-running 3.something MHz counter. this is a complete hack. - m_ostimer_regs.oscr += 0x300; - return m_ostimer_regs.oscr; - case PXA255_OSSR: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Status Register: %08x & %08x\n", m_ostimer_regs.ossr, mem_mask); - return m_ostimer_regs.ossr; - case PXA255_OWER: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Watchdog Match Enable Register: %08x & %08x\n", m_ostimer_regs.ower, mem_mask); - return m_ostimer_regs.ower; - case PXA255_OIER: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_r: OS Timer Interrupt Enable Register: %08x & %08x\n", m_ostimer_regs.oier, mem_mask); - return m_ostimer_regs.oier; - default: - LOGMASKED(LOG_OSTIMER | LOG_UNKNOWN, "pxa255_ostimer_r: Unknown address: %08x\n", PXA255_OSTMR_BASE_ADDR | (offset << 2)); - break; + m_ostimer_regs.timer[Which]->adjust(attotime::from_hz(3846400) * (m_ostimer_regs.osmr[Which] - m_ostimer_regs.oscr), Which); } - return 0; } -void pxa255_periphs_device::ostimer_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pxa255_periphs_device::ostimer_update_count() { - switch (PXA255_OSTMR_BASE_ADDR | (offset << 2)) - { - case PXA255_OSMR0: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Match Register 0: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.osmr[0] = data; - if (m_ostimer_regs.oier & PXA255_OIER_E0) - { - m_ostimer_regs.timer[0]->adjust(attotime::from_hz(3846400) * (m_ostimer_regs.osmr[0] - m_ostimer_regs.oscr), 0); - } - break; - case PXA255_OSMR1: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Match Register 1: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.osmr[1] = data; - if (m_ostimer_regs.oier & PXA255_OIER_E1) - { - m_ostimer_regs.timer[1]->adjust(attotime::from_hz(3846400) * (m_ostimer_regs.osmr[1] - m_ostimer_regs.oscr), 1); - } - break; - case PXA255_OSMR2: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Match Register 2: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.osmr[2] = data; - if (m_ostimer_regs.oier & PXA255_OIER_E2) - { - m_ostimer_regs.timer[2]->adjust(attotime::from_hz(3846400) * (m_ostimer_regs.osmr[2] - m_ostimer_regs.oscr), 2); - } - break; - case PXA255_OSMR3: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Match Register 3: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.osmr[3] = data; - if (m_ostimer_regs.oier & PXA255_OIER_E3) - { - //m_ostimer_regs.timer[3]->adjust(attotime::from_hz(3846400) * (m_ostimer_regs.osmr[3] - m_ostimer_regs.oscr), 3); - } - break; - case PXA255_OSCR: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Count Register: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.oscr = data; - break; - case PXA255_OSSR: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Status Register: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.ossr &= ~data; - ostimer_irq_check(); - break; - case PXA255_OWER: - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Watchdog Enable Register: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.ower = data & 0x00000001; - break; - case PXA255_OIER: - { - LOGMASKED(LOG_OSTIMER, "pxa255_ostimer_w: OS Timer Interrupt Enable Register: %08x & %08x\n", data, mem_mask); - m_ostimer_regs.oier = data & 0x0000000f; - for (int index = 0; index < 4; index++) - { - if (m_ostimer_regs.oier & (1 << index)) - { - //m_ostimer_regs.timer[index]->adjust(attotime::from_hz(200000000) * m_ostimer_regs.osmr[index], index); - } - } - break; - } - default: - LOGMASKED(LOG_OSTIMER | LOG_UNKNOWN, "pxa255_ostimer_w: Unknown address: %08x = %08x & %08x\n", PXA255_OSTMR_BASE_ADDR | (offset << 2), data, mem_mask); - break; - } + const attotime time_delta = machine().time() - m_ostimer_regs.last_count_sync; + const uint64_t ticks_elapsed = time_delta.as_ticks(INTERNAL_OSC); + if (ticks_elapsed == 0ULL) // Accrue time until we can tick at least once + return; + + const uint32_t wrapped_ticks = (uint32_t)ticks_elapsed; + m_ostimer_regs.oscr += wrapped_ticks; + m_ostimer_regs.last_count_sync = machine().time(); + ostimer_update_interrupts<0>(); + ostimer_update_interrupts<1>(); + ostimer_update_interrupts<2>(); + ostimer_update_interrupts<3>(); } -/* - - PXA255 Interrupt registers +template +u32 pxa255_periphs_device::tmr_osmr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_ostimer_regs.osmr[Which]; + LOGMASKED(LOG_OSTIMER, "%s: tmr_osmr_r: OS Timer Match Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} - pg. 124 to 132, PXA255 Processor Developers Manual [278693-002].pdf +template +void pxa255_periphs_device::tmr_osmr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_OSTIMER, "%s: pxa255_ostimer_w: OS Timer Match Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + ostimer_update_count(); + m_ostimer_regs.osmr[Which] = data; + ostimer_update_count(); + ostimer_update_interrupts(); +} + +u32 pxa255_periphs_device::tmr_oscr_r(offs_t offset, u32 mem_mask) +{ + ostimer_update_count(); + const u32 data = m_ostimer_regs.oscr; + LOGMASKED(LOG_OSTIMER, "%s: tmr_oscr_r: OS Timer Count Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return m_ostimer_regs.oscr; +} + +void pxa255_periphs_device::tmr_oscr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_OSTIMER, "%s: tmr_oscr_w: OS Timer Count Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_ostimer_regs.oscr = data; + m_ostimer_regs.last_count_sync = machine().time(); +} + +u32 pxa255_periphs_device::tmr_ossr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_ostimer_regs.ossr; + LOGMASKED(LOG_OSTIMER, "%s: tmr_ossr_r: OS Timer Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::tmr_ossr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_OSTIMER, "%s: tmr_ossr_w: OS Timer Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_ostimer_regs.ossr &= ~data; + ostimer_irq_check(); +} + +u32 pxa255_periphs_device::tmr_ower_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_ostimer_regs.ower; + LOGMASKED(LOG_OSTIMER, "%s: tmr_ower_r: OS Timer Watchdog Match Enable Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::tmr_ower_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_OSTIMER, "%s: tmr_ower_w: OS Timer Watchdog Match Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_ostimer_regs.ower = data & 0x00000001; +} + +u32 pxa255_periphs_device::tmr_oier_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_ostimer_regs.oier; + LOGMASKED(LOG_OSTIMER, "%s: tmr_oier_r: OS Timer Interrupt Enable Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::tmr_oier_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_OSTIMER, "%s: tmr_oier_w: OS Timer Interrupt Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_ostimer_regs.oier = data & 0x0000000f; +} + + +/* + + PXA255 Interrupt registers + + pg. 124 to 132, PXA255 Processor Developers Manual [278693-002].pdf */ @@ -660,73 +881,89 @@ void pxa255_periphs_device::update_interrupts() m_maincpu->set_input_line(ARM7_IRQ_LINE, m_intc_regs.icip ? ASSERT_LINE : CLEAR_LINE); } -void pxa255_periphs_device::set_irq_line(uint32_t line, int irq_state) +void pxa255_periphs_device::set_irq_line(u32 line, int irq_state) { m_intc_regs.icpr &= ~line; m_intc_regs.icpr |= irq_state ? line : 0; update_interrupts(); } -uint32_t pxa255_periphs_device::intc_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::intc_icip_r(offs_t offset, u32 mem_mask) { - switch (PXA255_INTC_BASE_ADDR | (offset << 2)) - { - case PXA255_ICIP: - LOGMASKED(LOG_INTC, "pxa255_intc_r: Interrupt Controller IRQ Pending Register: %08x & %08x\n", m_intc_regs.icip, mem_mask); - return m_intc_regs.icip; - case PXA255_ICMR: - LOGMASKED(LOG_INTC, "pxa255_intc_r: Interrupt Controller Mask Register: %08x & %08x\n", m_intc_regs.icmr, mem_mask); - return m_intc_regs.icmr; - case PXA255_ICLR: - LOGMASKED(LOG_INTC, "pxa255_intc_r: Interrupt Controller Level Register: %08x & %08x\n", m_intc_regs.iclr, mem_mask); - return m_intc_regs.iclr; - case PXA255_ICFP: - LOGMASKED(LOG_INTC, "pxa255_intc_r: Interrupt Controller FIQ Pending Register: %08x & %08x\n", m_intc_regs.icfp, mem_mask); - return m_intc_regs.icfp; - case PXA255_ICPR: - LOGMASKED(LOG_INTC, "pxa255_intc_r: Interrupt Controller Pending Register: %08x & %08x\n", m_intc_regs.icpr, mem_mask); - return m_intc_regs.icpr; - case PXA255_ICCR: - LOGMASKED(LOG_INTC, "pxa255_intc_r: Interrupt Controller Control Register: %08x & %08x\n", m_intc_regs.iccr, mem_mask); - return m_intc_regs.iccr; - default: - LOGMASKED(LOG_INTC | LOG_UNKNOWN, "pxa255_intc_r: Unknown address: %08x\n", PXA255_INTC_BASE_ADDR | (offset << 2)); - break; - } - return 0; + const u32 data = m_intc_regs.icip; + LOGMASKED(LOG_INTC, "%s: intc_icip_r: Interrupt Controller IRQ Pending Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } -void pxa255_periphs_device::intc_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pxa255_periphs_device::intc_icip_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_INTC_BASE_ADDR | (offset << 2)) - { - case PXA255_ICIP: - LOGMASKED(LOG_INTC, "pxa255_intc_w: (Invalid Write) Interrupt Controller IRQ Pending Register: %08x & %08x\n", data, mem_mask); - break; - case PXA255_ICMR: - LOGMASKED(LOG_INTC, "pxa255_intc_w: Interrupt Controller Mask Register: %08x & %08x\n", data, mem_mask); - m_intc_regs.icmr = data & 0xfffe7f00; - break; - case PXA255_ICLR: - LOGMASKED(LOG_INTC, "pxa255_intc_w: Interrupt Controller Level Register: %08x & %08x\n", data, mem_mask); - m_intc_regs.iclr = data & 0xfffe7f00; - break; - case PXA255_ICFP: - LOGMASKED(LOG_INTC, "pxa255_intc_w: (Invalid Write) Interrupt Controller FIQ Pending Register: %08x & %08x\n", data, mem_mask); - break; - case PXA255_ICPR: - LOGMASKED(LOG_INTC, "pxa255_intc_w: (Invalid Write) Interrupt Controller Pending Register: %08x & %08x\n", data, mem_mask); - break; - case PXA255_ICCR: - LOGMASKED(LOG_INTC, "pxa255_intc_w: Interrupt Controller Control Register: %08x & %08x\n", data, mem_mask); - m_intc_regs.iccr = data & 0x00000001; - break; - default: - LOGMASKED(LOG_INTC | LOG_UNKNOWN, "pxa255_intc_w: Unknown address: %08x = %08x & %08x\n", PXA255_INTC_BASE_ADDR | (offset << 2), data, mem_mask); - break; - } + LOGMASKED(LOG_INTC, "%s: intc_icip_w: (Invalid Write) Interrupt Controller IRQ Pending Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); +} + +u32 pxa255_periphs_device::intc_icmr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_intc_regs.icmr; + LOGMASKED(LOG_INTC, "%s: intc_icmr_r: Interrupt Controller Mask Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } +void pxa255_periphs_device::intc_icmr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_INTC, "%s: intc_icmr_w: Interrupt Controller Mask Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_intc_regs.icmr = data & 0xfffe7f00; +} + +u32 pxa255_periphs_device::intc_iclr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_intc_regs.iclr; + LOGMASKED(LOG_INTC, "%s: intc_iclr_r: Interrupt Controller Level Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::intc_iclr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_INTC, "%s: intc_iclr_w: Interrupt Controller Level Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_intc_regs.iclr = data & 0xfffe7f00; +} + +u32 pxa255_periphs_device::intc_icfp_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_intc_regs.icfp; + LOGMASKED(LOG_INTC, "%s: intc_icfp_r: Interrupt Controller FIQ Pending Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::intc_icfp_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_INTC, "%s: intc_icfp_w: (Invalid Write) Interrupt Controller FIQ Pending Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); +} + +u32 pxa255_periphs_device::intc_icpr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_intc_regs.icpr; + LOGMASKED(LOG_INTC, "%s: intc_icpr_r: Interrupt Controller Pending Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::intc_icpr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_INTC, "%s: intc_icpr_w: (Invalid Write) Interrupt Controller Pending Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); +} + +u32 pxa255_periphs_device::intc_iccr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_intc_regs.iccr; + LOGMASKED(LOG_INTC, "%s: intc_iccr_r: Interrupt Controller control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::intc_iccr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_INTC, "%s: intc_iccr_w: Interrupt Controller Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_intc_regs.iccr = data & 0x00000001; +} + + /* PXA255 General-Purpose I/O registers @@ -735,321 +972,358 @@ void pxa255_periphs_device::intc_w(offs_t offset, uint32_t data, uint32_t mem_ma */ -void pxa255_periphs_device::gpio_bit_w(offs_t offset, uint8_t data, uint8_t mem_mask) +template +void pxa255_periphs_device::update_gpio_outputs(const u32 old) { - const uint32_t val = (data != 0 ? 1 : 0); - LOGMASKED(LOG_GPIO, "pxa255: GPIO%d written: %d\n", offset, val); - if (offset < 32) + const u32 new_data = (m_gpio_regs.in_data[Which] & ~m_gpio_regs.gpdr[Which]) | (m_gpio_regs.out_data[Which] & m_gpio_regs.gpdr[Which]); + const u32 changed = old ^ new_data; + if (changed == 0) + return; + + for (u32 bit = 0; bit < 32; bit++) { - const uint32_t old = m_gpio_regs.gplr0; - m_gpio_regs.gplr0 &= ~(1 << offset); - m_gpio_regs.gplr0 |= (val << offset); + if (!BIT(changed, bit)) + continue; + LOGMASKED(LOG_GPIO, "Setting GPIO bit %d: %d\n", Which * 32 + bit, BIT(new_data, bit)); + m_gpio_w[Which * 32 + bit](BIT(new_data, bit)); + } +} - LOGMASKED(LOG_GPIO, "pxa255: Old GPLR0 %08x, New GPLR0 %08x\n", old, m_gpio_regs.gplr0); +template +void pxa255_periphs_device::check_gpio_irqs(const u32 old) +{ + const u32 new_data = (m_gpio_regs.in_data[Which] & ~m_gpio_regs.gpdr[Which]) | (m_gpio_regs.out_data[Which] & m_gpio_regs.gpdr[Which]); + if (old == new_data) + return; - const uint32_t rising = ~old & m_gpio_regs.gplr0; - const uint32_t falling = old & ~m_gpio_regs.gplr0; + const u32 rising = ~old & new_data; + const u32 falling = old & ~new_data; - LOGMASKED(LOG_GPIO, "pxa255: Rising %08x, Falling %08x\n", rising, falling); + LOGMASKED(LOG_GPIO, "pxa255: Rising %08x, Falling %08x\n", rising, falling); - const uint32_t old_gedr = m_gpio_regs.gedr0; - m_gpio_regs.gedr0 |= (rising & m_gpio_regs.grer0); - m_gpio_regs.gedr0 |= (falling & m_gpio_regs.gfer0); + const u32 old_gedr = m_gpio_regs.gedr[Which]; + m_gpio_regs.gedr[Which] |= rising & m_gpio_regs.grer[Which]; + m_gpio_regs.gedr[Which] |= falling & m_gpio_regs.gfer[Which]; + + LOGMASKED(LOG_GPIO, "pxa255: Old GEDR%d %08x, New GEDR%d %08x\n", Which, old_gedr, Which, m_gpio_regs.gedr[Which]); + const u32 changed_gedr = old_gedr ^ m_gpio_regs.gedr[Which]; + if (changed_gedr == 0) + return; + + for (u32 bit = 0; bit < 32; bit++) + { + if (!BIT(changed_gedr, bit)) + continue; - LOGMASKED(LOG_GPIO, "pxa255: Old GEDR0 %08x, New GEDR0 %08x\n", old_gedr, m_gpio_regs.gedr0); - if (old_gedr != m_gpio_regs.gedr0) + LOGMASKED(LOG_GPIO, "pxa255: Edge detected on GPIO%d Pin %d\n", Which, bit); + if (Which == 0) { - LOGMASKED(LOG_GPIO, "pxa255: Edge detected on GPIO%d\n", offset); - if (offset > 1) - set_irq_line(PXA255_INT_GPIO84_2, 1); - else if (offset == 1) - set_irq_line(PXA255_INT_GPIO1, 1); + if (bit > 1) + set_irq_line(INT_GPIO84_2, 1); + else if (bit == 1) + set_irq_line(INT_GPIO1, 1); else - set_irq_line(PXA255_INT_GPIO0, 1); + set_irq_line(INT_GPIO0, 1); } - } - else if (offset < 64) - { - const uint32_t old = m_gpio_regs.gplr1; - m_gpio_regs.gplr1 &= ~(1 << (offset - 32)); - m_gpio_regs.gplr1 |= ~(val << (offset - 32)); - - const uint32_t rising = ~old & m_gpio_regs.gplr1; - const uint32_t falling = old & ~m_gpio_regs.gplr1; - - const uint32_t old_gedr = m_gpio_regs.gedr1; - m_gpio_regs.gedr1 |= (rising & m_gpio_regs.grer1); - m_gpio_regs.gedr1 |= (falling & m_gpio_regs.gfer1); - if (old_gedr != m_gpio_regs.gedr1) + else if (Which == 1) { - LOGMASKED(LOG_GPIO, "pxa255: Edge detected on GPIO%d\n", offset); - set_irq_line(PXA255_INT_GPIO84_2, 1); + set_irq_line(INT_GPIO84_2, 1); + } + else if (Which == 2) + { + set_irq_line(INT_GPIO84_2, 1); } } - else if (offset < 85) - { - const uint32_t old = m_gpio_regs.gplr2; - m_gpio_regs.gplr2 &= ~(1 << (offset - 64)); - m_gpio_regs.gplr2 |= ~(val << (offset - 64)); +} - const uint32_t rising = ~old & m_gpio_regs.gplr2; - const uint32_t falling = old & ~m_gpio_regs.gplr2; +template void pxa255_periphs_device::gpio_in<0>(int state); +template void pxa255_periphs_device::gpio_in<1>(int state); +template void pxa255_periphs_device::gpio_in<2>(int state); +template void pxa255_periphs_device::gpio_in<3>(int state); +template void pxa255_periphs_device::gpio_in<4>(int state); +template void pxa255_periphs_device::gpio_in<5>(int state); +template void pxa255_periphs_device::gpio_in<6>(int state); +template void pxa255_periphs_device::gpio_in<7>(int state); +template void pxa255_periphs_device::gpio_in<8>(int state); +template void pxa255_periphs_device::gpio_in<9>(int state); +template void pxa255_periphs_device::gpio_in<10>(int state); +template void pxa255_periphs_device::gpio_in<11>(int state); +template void pxa255_periphs_device::gpio_in<12>(int state); +template void pxa255_periphs_device::gpio_in<13>(int state); +template void pxa255_periphs_device::gpio_in<14>(int state); +template void pxa255_periphs_device::gpio_in<15>(int state); +template void pxa255_periphs_device::gpio_in<16>(int state); +template void pxa255_periphs_device::gpio_in<17>(int state); +template void pxa255_periphs_device::gpio_in<18>(int state); +template void pxa255_periphs_device::gpio_in<19>(int state); +template void pxa255_periphs_device::gpio_in<20>(int state); +template void pxa255_periphs_device::gpio_in<21>(int state); +template void pxa255_periphs_device::gpio_in<22>(int state); +template void pxa255_periphs_device::gpio_in<23>(int state); +template void pxa255_periphs_device::gpio_in<24>(int state); +template void pxa255_periphs_device::gpio_in<25>(int state); +template void pxa255_periphs_device::gpio_in<26>(int state); +template void pxa255_periphs_device::gpio_in<27>(int state); +template void pxa255_periphs_device::gpio_in<28>(int state); +template void pxa255_periphs_device::gpio_in<29>(int state); +template void pxa255_periphs_device::gpio_in<30>(int state); +template void pxa255_periphs_device::gpio_in<31>(int state); +template void pxa255_periphs_device::gpio_in<32>(int state); +template void pxa255_periphs_device::gpio_in<33>(int state); +template void pxa255_periphs_device::gpio_in<34>(int state); +template void pxa255_periphs_device::gpio_in<35>(int state); +template void pxa255_periphs_device::gpio_in<36>(int state); +template void pxa255_periphs_device::gpio_in<37>(int state); +template void pxa255_periphs_device::gpio_in<38>(int state); +template void pxa255_periphs_device::gpio_in<39>(int state); +template void pxa255_periphs_device::gpio_in<40>(int state); +template void pxa255_periphs_device::gpio_in<41>(int state); +template void pxa255_periphs_device::gpio_in<42>(int state); +template void pxa255_periphs_device::gpio_in<43>(int state); +template void pxa255_periphs_device::gpio_in<44>(int state); +template void pxa255_periphs_device::gpio_in<45>(int state); +template void pxa255_periphs_device::gpio_in<46>(int state); +template void pxa255_periphs_device::gpio_in<47>(int state); +template void pxa255_periphs_device::gpio_in<48>(int state); +template void pxa255_periphs_device::gpio_in<49>(int state); +template void pxa255_periphs_device::gpio_in<50>(int state); +template void pxa255_periphs_device::gpio_in<51>(int state); +template void pxa255_periphs_device::gpio_in<52>(int state); +template void pxa255_periphs_device::gpio_in<53>(int state); +template void pxa255_periphs_device::gpio_in<54>(int state); +template void pxa255_periphs_device::gpio_in<55>(int state); +template void pxa255_periphs_device::gpio_in<56>(int state); +template void pxa255_periphs_device::gpio_in<57>(int state); +template void pxa255_periphs_device::gpio_in<58>(int state); +template void pxa255_periphs_device::gpio_in<59>(int state); +template void pxa255_periphs_device::gpio_in<60>(int state); +template void pxa255_periphs_device::gpio_in<61>(int state); +template void pxa255_periphs_device::gpio_in<62>(int state); +template void pxa255_periphs_device::gpio_in<63>(int state); +template void pxa255_periphs_device::gpio_in<64>(int state); +template void pxa255_periphs_device::gpio_in<65>(int state); +template void pxa255_periphs_device::gpio_in<66>(int state); +template void pxa255_periphs_device::gpio_in<67>(int state); +template void pxa255_periphs_device::gpio_in<68>(int state); +template void pxa255_periphs_device::gpio_in<69>(int state); +template void pxa255_periphs_device::gpio_in<70>(int state); +template void pxa255_periphs_device::gpio_in<71>(int state); +template void pxa255_periphs_device::gpio_in<72>(int state); +template void pxa255_periphs_device::gpio_in<73>(int state); +template void pxa255_periphs_device::gpio_in<74>(int state); +template void pxa255_periphs_device::gpio_in<75>(int state); +template void pxa255_periphs_device::gpio_in<76>(int state); +template void pxa255_periphs_device::gpio_in<77>(int state); +template void pxa255_periphs_device::gpio_in<78>(int state); +template void pxa255_periphs_device::gpio_in<79>(int state); +template void pxa255_periphs_device::gpio_in<80>(int state); +template void pxa255_periphs_device::gpio_in<81>(int state); +template void pxa255_periphs_device::gpio_in<82>(int state); +template void pxa255_periphs_device::gpio_in<83>(int state); +template void pxa255_periphs_device::gpio_in<84>(int state); +template void pxa255_periphs_device::gpio_in<85>(int state); +template void pxa255_periphs_device::gpio_in<86>(int state); +template void pxa255_periphs_device::gpio_in<87>(int state); +template void pxa255_periphs_device::gpio_in<88>(int state); +template void pxa255_periphs_device::gpio_in<89>(int state); +template void pxa255_periphs_device::gpio_in<90>(int state); +template void pxa255_periphs_device::gpio_in<91>(int state); +template void pxa255_periphs_device::gpio_in<92>(int state); +template void pxa255_periphs_device::gpio_in<93>(int state); +template void pxa255_periphs_device::gpio_in<94>(int state); +template void pxa255_periphs_device::gpio_in<95>(int state); + +template +void pxa255_periphs_device::gpio_in(int state) +{ + LOGMASKED(LOG_GPIO, "pxa255: GPIO Pin %d written: %d\n", Bit, state); - const uint32_t old_gedr = m_gpio_regs.gedr2; - m_gpio_regs.gedr2 |= (rising & m_gpio_regs.grer2); - m_gpio_regs.gedr2 |= (falling & m_gpio_regs.gfer2); - if (old_gedr != m_gpio_regs.gedr2) - { - LOGMASKED(LOG_GPIO, "pxa255: Edge detected on GPIO%d\n", offset); - set_irq_line(PXA255_INT_GPIO84_2, 1); - } + const u32 which = Bit >> 5; + const u32 old = m_gpio_regs.in_data[which] & ~m_gpio_regs.gpdr[which]; + if (state) + m_gpio_regs.in_data[which] |= (1 << (Bit & 31)); + else + m_gpio_regs.in_data[which] &= ~(1 << (Bit & 31)); + + const u32 new_inputs = m_gpio_regs.in_data[which] & ~m_gpio_regs.gpdr[which]; + LOGMASKED(LOG_GPIO, "pxa255: Old GPIO Pin %d Input %08x, New GPIO Pin %d Input %08x\n", Bit, old, Bit, new_inputs); + + if (Bit < 32) + check_gpio_irqs<0>(old); + else if (Bit < 64) + check_gpio_irqs<1>(old); + else + check_gpio_irqs<2>(old); +} + +template +u32 pxa255_periphs_device::gpio_gplr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = (m_gpio_regs.in_data[Which] & ~m_gpio_regs.gpdr[Which]) | (m_gpio_regs.out_data[Which] & m_gpio_regs.gpdr[Which]); + LOGMASKED(LOG_GPIO, "%s: gpio_gplr_r: GPIO Pin-Level Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gplr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_gplr_w: (Invalid Write) GPIO Pin-Level Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); +} + +template +u32 pxa255_periphs_device::gpio_gpdr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_gpio_regs.gpdr[Which]; + LOGMASKED(LOG_GPIO, "%s: gpio_gpdr_r: GPIO Pin Direction Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gpdr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_gpdr_w: GPIO Pin Direction Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.gpdr[Which] = data; +} + +template +u32 pxa255_periphs_device::gpio_gpsr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = 0; + LOGMASKED(LOG_GPIO, "%s: gpio_gpsr_r: (Invalid Read) GPIO Pin Output Set Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gpsr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_gpsr_w: GPIO Pin Output Set Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.out_data[Which] |= data & mem_mask; + const u32 set = data & mem_mask & m_gpio_regs.gpdr[Which]; + for (u32 i = 0; i < 32; i++) + { + if (BIT(set, i)) + m_gpio_w[Which * 32 + i](1); } } -uint32_t pxa255_periphs_device::gpio_r(offs_t offset, uint32_t mem_mask) +template +u32 pxa255_periphs_device::gpio_gpcr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = 0; + LOGMASKED(LOG_GPIO, "%s: gpio_gpcr_r: (Invalid Read) GPIO Pin Output Clear Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gpcr_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_GPIO_BASE_ADDR | (offset << 2)) + LOGMASKED(LOG_GPIO, "%s: gpio_gpcr_w: GPIO Pin Output Clear Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.out_data[Which] &= ~(data & mem_mask); + const u32 cleared = data & mem_mask & m_gpio_regs.gpdr[Which]; + for (u32 i = 0; i < 32; i++) { - case PXA255_GPLR0: - { - const uint32_t value = (m_gpio_regs.gplr0 & m_gpio_regs.gpdr0) | m_gpio0_r(0, ~m_gpio_regs.gpdr0); - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin-Level Register 0: %08x & %08x\n", m_gpio_regs.gplr0, mem_mask); - return value; - } - case PXA255_GPLR1: - { - const uint32_t value = (m_gpio_regs.gplr1 & m_gpio_regs.gpdr1) | m_gpio1_r(0, ~m_gpio_regs.gpdr1); - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin-Level Register 1: %08x & %08x\n", m_gpio_regs.gplr1, mem_mask); - return value; - } - case PXA255_GPLR2: - { - const uint32_t value = (m_gpio_regs.gplr2 & m_gpio_regs.gpdr2) | m_gpio2_r(0, ~m_gpio_regs.gpdr2); - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin-Level Register 2: %08x & %08x\n", m_gpio_regs.gplr2, mem_mask); - return value; - } - case PXA255_GPDR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin Direction Register 0: %08x & %08x\n", m_gpio_regs.gpdr0, mem_mask); - return m_gpio_regs.gpdr0; - case PXA255_GPDR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin Direction Register 1: %08x & %08x\n", m_gpio_regs.gpdr1, mem_mask); - return m_gpio_regs.gpdr1; - case PXA255_GPDR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Pin Direction Register 2: %08x & %08x\n", m_gpio_regs.gpdr2, mem_mask); - return m_gpio_regs.gpdr2; - case PXA255_GPSR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: (Invalid Read) GPIO Pin Output Set Register 0: %08x & %08x\n", machine().rand(), mem_mask); - return machine().rand(); - case PXA255_GPSR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: (Invalid Read) GPIO Pin Output Set Register 1: %08x & %08x\n", machine().rand(), mem_mask); - return machine().rand(); - case PXA255_GPSR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: (Invalid Read) GPIO Pin Output Set Register 2: %08x & %08x\n", machine().rand(), mem_mask); - return machine().rand(); - case PXA255_GPCR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: (Invalid Read) GPIO Pin Output Clear Register 0: %08x & %08x\n", machine().rand(), mem_mask); - return machine().rand(); - case PXA255_GPCR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: (Invalid Read) GPIO Pin Output Clear Register 1: %08x & %08x\n", machine().rand(), mem_mask); - return machine().rand(); - case PXA255_GPCR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: (Invalid Read) GPIO Pin Output Clear Register 2: %08x & %08x\n", machine().rand(), mem_mask); - return machine().rand(); - case PXA255_GRER0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Rising Edge Detect Enable Register 0: %08x & %08x\n", m_gpio_regs.grer0, mem_mask); - return m_gpio_regs.grer0; - case PXA255_GRER1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Rising Edge Detect Enable Register 1: %08x & %08x\n", m_gpio_regs.grer1, mem_mask); - return m_gpio_regs.grer1; - case PXA255_GRER2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Rising Edge Detect Enable Register 2: %08x & %08x\n", m_gpio_regs.grer2, mem_mask); - return m_gpio_regs.grer2; - case PXA255_GFER0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Falling Edge Detect Enable Register 0: %08x & %08x\n", m_gpio_regs.gfer0, mem_mask); - return m_gpio_regs.gfer0; - case PXA255_GFER1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Falling Edge Detect Enable Register 1: %08x & %08x\n", m_gpio_regs.gfer1, mem_mask); - return m_gpio_regs.gfer1; - case PXA255_GFER2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Falling Edge Detect Enable Register 2: %08x & %08x\n", m_gpio_regs.gfer2, mem_mask); - return m_gpio_regs.gfer2; - case PXA255_GEDR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Edge Detect Status Register 0: %08x & %08x\n", m_gpio_regs.gedr0, mem_mask); - return m_gpio_regs.gedr0; - case PXA255_GEDR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Edge Detect Status Register 1: %08x & %08x\n", m_gpio_regs.gedr1, mem_mask); - return m_gpio_regs.gedr1; - case PXA255_GEDR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Edge Detect Status Register 2: %08x & %08x\n", m_gpio_regs.gedr2, mem_mask); - return m_gpio_regs.gedr2; - case PXA255_GAFR0_L: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Alternate Function Register 0 Lower: %08x & %08x\n", m_gpio_regs.gafr0l, mem_mask); - return m_gpio_regs.gafr0l; - case PXA255_GAFR0_U: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Alternate Function Register 0 Upper: %08x & %08x\n", m_gpio_regs.gafr0u, mem_mask); - return m_gpio_regs.gafr0u; - case PXA255_GAFR1_L: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Alternate Function Register 1 Lower: %08x & %08x\n", m_gpio_regs.gafr1l, mem_mask); - return m_gpio_regs.gafr1l; - case PXA255_GAFR1_U: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Alternate Function Register 1 Upper: %08x & %08x\n", m_gpio_regs.gafr1u, mem_mask); - return m_gpio_regs.gafr1u; - case PXA255_GAFR2_L: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Alternate Function Register 2 Lower: %08x & %08x\n", m_gpio_regs.gafr2l, mem_mask); - return m_gpio_regs.gafr2l; - case PXA255_GAFR2_U: - LOGMASKED(LOG_GPIO, "pxa255_gpio_r: GPIO Alternate Function Register 2 Upper: %08x & %08x\n", m_gpio_regs.gafr2u, mem_mask); - return m_gpio_regs.gafr2u; - default: - LOGMASKED(LOG_GPIO | LOG_UNKNOWN, "pxa255_gpio_r: Unknown address: %08x\n", PXA255_GPIO_BASE_ADDR | (offset << 2)); - break; + if (BIT(cleared, i)) + m_gpio_w[Which * 32 + i](0); } - return 0; } -void pxa255_periphs_device::gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask) +template +u32 pxa255_periphs_device::gpio_grer_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_gpio_regs.grer[Which]; + LOGMASKED(LOG_GPIO, "%s: gpio_grer_r: GPIO Rising Edge Detect Enable Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_grer_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_grer_w: GPIO Rising Edge Detect Enable Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.grer[Which] = data; +} + +template +u32 pxa255_periphs_device::gpio_gfer_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_gpio_regs.gfer[Which]; + LOGMASKED(LOG_GPIO, "%s: gpio_grer_r: GPIO Falling Edge Detect Enable Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gfer_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_gfer_w: GPIO Falling Edge Detect Enable Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.gfer[Which] = data; +} +template +u32 pxa255_periphs_device::gpio_gedr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_gpio_regs.gedr[Which]; + LOGMASKED(LOG_GPIO, "%s: gpio_gedr_r: GPIO Edge Detect Status Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gedr_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_GPIO_BASE_ADDR | (offset << 2)) + LOGMASKED(LOG_GPIO, "%s: gpio_gedr_w: GPIO Edge Detect Status Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + const u32 old = m_gpio_regs.gedr[Which]; + m_gpio_regs.gedr[Which] &= ~data; + const u32 lowered = old & ~m_gpio_regs.gedr[Which]; + if (Which == 0) { - case PXA255_GPLR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: (Invalid Write) GPIO Pin-Level Register 0: %08x & %08x\n", data, mem_mask); - break; - case PXA255_GPLR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: (Invalid Write) GPIO Pin-Level Register 1: %08x & %08x\n", data, mem_mask); - break; - case PXA255_GPLR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: (Invalid Write) GPIO Pin-Level Register 2: %08x & %08x\n", data, mem_mask); - break; - case PXA255_GPDR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Direction Register 0: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpdr0 = data; - break; - case PXA255_GPDR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Direction Register 1: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpdr1 = data; - break; - case PXA255_GPDR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Direction Register 2: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpdr2 = data; - break; - case PXA255_GPSR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Set Register 0: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpsr0 |= data & m_gpio_regs.gpdr0; - m_gpio0_w(0, data, m_gpio_regs.gpdr0); - break; - case PXA255_GPSR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Set Register 1: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpsr1 |= data & m_gpio_regs.gpdr1; - m_gpio1_w(0, data, m_gpio_regs.gpdr1); - break; - case PXA255_GPSR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Set Register 2: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpsr2 |= data & m_gpio_regs.gpdr2; - m_gpio2_w(0, data, m_gpio_regs.gpdr2); - break; - case PXA255_GPCR0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Clear Register 0: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpsr0 &= ~(data & m_gpio_regs.gpdr0); - m_gpio0_w(0, data, m_gpio_regs.gpdr0); - break; - case PXA255_GPCR1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Clear Register 1: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpsr1 &= ~(data & m_gpio_regs.gpdr1); - m_gpio1_w(0, data, m_gpio_regs.gpdr1); - break; - case PXA255_GPCR2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Pin Output Clear Register 2: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gpsr2 &= ~(data & m_gpio_regs.gpdr2); - m_gpio2_w(0, data, m_gpio_regs.gpdr2); - break; - case PXA255_GRER0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Rising Edge Detect Enable Register 0: %08x & %08x\n", data, mem_mask); - m_gpio_regs.grer0 = data; - break; - case PXA255_GRER1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Rising Edge Detect Enable Register 1: %08x & %08x\n", data, mem_mask); - m_gpio_regs.grer1 = data; - break; - case PXA255_GRER2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Rising Edge Detect Enable Register 2: %08x & %08x\n", data, mem_mask); - m_gpio_regs.grer2 = data; - break; - case PXA255_GFER0: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Falling Edge Detect Enable Register 0: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gfer0 = data; - break; - case PXA255_GFER1: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Falling Edge Detect Enable Register 1: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gfer1 = data; - break; - case PXA255_GFER2: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Falling Edge Detect Enable Register 2: %08x & %08x\n", data, mem_mask); - m_gpio_regs.gfer2 = data; - break; - case PXA255_GEDR0: + if (BIT(lowered, 0)) { - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Edge Detect Status Register 0: %08x & %08x\n", m_gpio_regs.gedr0, mem_mask); - const uint32_t old = m_gpio_regs.gedr0; - m_gpio_regs.gedr0 &= ~data; - const uint32_t lowered = old & ~m_gpio_regs.gedr0; - if (BIT(lowered, 0)) - set_irq_line(PXA255_INT_GPIO0, 0); - else if (BIT(lowered, 1)) - set_irq_line(PXA255_INT_GPIO1, 0); - else if ((lowered & 0xfffffffc) && !m_gpio_regs.gedr0 && !m_gpio_regs.gedr1 && !m_gpio_regs.gedr2) - set_irq_line(PXA255_INT_GPIO84_2, 0); - break; + set_irq_line(INT_GPIO0, 0); + return; } - case PXA255_GEDR1: + else if (BIT(lowered, 1)) { - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Edge Detect Status Register 1: %08x & %08x\n", m_gpio_regs.gedr1, mem_mask); - const uint32_t old = m_gpio_regs.gedr1; - m_gpio_regs.gedr1 &= ~data; - const uint32_t lowered = old & !m_gpio_regs.gedr1; - if (lowered && !m_gpio_regs.gedr0 && !m_gpio_regs.gedr1 && !m_gpio_regs.gedr2) - set_irq_line(PXA255_INT_GPIO84_2, 0); - break; + set_irq_line(INT_GPIO1, 0); + return; } - case PXA255_GEDR2: + else if (!(lowered & 0xfffffffc)) { - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Edge Detect Status Register 2: %08x & %08x\n", m_gpio_regs.gedr2, mem_mask); - const uint32_t old = m_gpio_regs.gedr2; - m_gpio_regs.gedr2 &= ~data; - const uint32_t lowered = old & !m_gpio_regs.gedr2; - if (lowered && !m_gpio_regs.gedr0 && !m_gpio_regs.gedr1 && !m_gpio_regs.gedr2) - set_irq_line(PXA255_INT_GPIO84_2, 0); - break; + return; } - case PXA255_GAFR0_L: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Alternate Function Register 0 Lower: %08x & %08x\n", m_gpio_regs.gafr0l, mem_mask); - m_gpio_regs.gafr0l = data; - break; - case PXA255_GAFR0_U: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Alternate Function Register 0 Upper: %08x & %08x\n", m_gpio_regs.gafr0u, mem_mask); - m_gpio_regs.gafr0u = data; - break; - case PXA255_GAFR1_L: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Alternate Function Register 1 Lower: %08x & %08x\n", m_gpio_regs.gafr1l, mem_mask); - m_gpio_regs.gafr1l = data; - break; - case PXA255_GAFR1_U: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Alternate Function Register 1 Upper: %08x & %08x\n", m_gpio_regs.gafr1u, mem_mask); - m_gpio_regs.gafr1u = data; - break; - case PXA255_GAFR2_L: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Alternate Function Register 2 Lower: %08x & %08x\n", m_gpio_regs.gafr2l, mem_mask); - m_gpio_regs.gafr2l = data; - break; - case PXA255_GAFR2_U: - LOGMASKED(LOG_GPIO, "pxa255_gpio_w: GPIO Alternate Function Register 2 Upper: %08x & %08x\n", m_gpio_regs.gafr2u, mem_mask); - m_gpio_regs.gafr2u = data; - break; - default: - LOGMASKED(LOG_GPIO | LOG_UNKNOWN, "pxa255_gpio_w: Unknown address: %08x = %08x & %08x\n", PXA255_GPIO_BASE_ADDR | (offset << 2), data, mem_mask); - break; } + + if (!m_gpio_regs.gedr[0] && !m_gpio_regs.gedr[1] && !m_gpio_regs.gedr[2]) + set_irq_line(INT_GPIO84_2, 0); +} + +template +u32 pxa255_periphs_device::gpio_gafrl_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_gpio_regs.gafrl[Which]; + LOGMASKED(LOG_GPIO, "%s: gpio_gafrl_r: GPIO Alternate Function Register %d Lower: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gafrl_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_gafrl_w: GPIO Alternate Function Register %d Lower = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.gafrl[Which] = data; +} + +template +u32 pxa255_periphs_device::gpio_gafru_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_gpio_regs.gafru[Which]; + LOGMASKED(LOG_GPIO, "%s: gpio_gafru_r: GPIO Alternate Function Register %d Upper: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::gpio_gafru_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_GPIO, "%s: gpio_gafru_w: GPIO Alternate Function Register %d Upper = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_gpio_regs.gafru[Which] = data; } + /* PXA255 LCD Controller @@ -1058,8 +1332,34 @@ void pxa255_periphs_device::gpio_w(offs_t offset, uint32_t data, uint32_t mem_ma */ -void pxa255_periphs_device::lcd_load_dma_descriptor(address_space & space, uint32_t address, int channel) +u32 pxa255_periphs_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + for (int y = 0; y <= (m_lcd_regs.lccr[2] & LCCR2_LPP); y++) + { + u32 *dst = &bitmap.pix(y); + for (int x = 0; x <= (m_lcd_regs.lccr[1] & LCCR1_PPL); x++) + { + *dst++ = m_lcd_palette[m_lcd_framebuffer[y * ((m_lcd_regs.lccr[1] & LCCR1_PPL) + 1) + x]]; + } + } + return 0; +} + +TIMER_CALLBACK_MEMBER(pxa255_periphs_device::lcd_dma_eof_tick) +{ + LOGMASKED(LOG_LCD_DMA, "End of frame callback\n" ); + if (m_lcd_regs.dma[param].ldcmd & LDCMD_EOFINT) + { + m_lcd_regs.liidr = m_lcd_regs.dma[param].fidr; + m_lcd_regs.lcsr |= LCSR_EOF; + } + lcd_check_load_next_branch(param); + lcd_irq_check(); +} + +void pxa255_periphs_device::lcd_load_dma_descriptor(u32 address, int channel) { + address_space & space = m_maincpu->space(AS_PROGRAM); m_lcd_regs.dma[channel].fdadr = space.read_dword(address); m_lcd_regs.dma[channel].fsadr = space.read_dword(address + 0x04); m_lcd_regs.dma[channel].fidr = space.read_dword(address + 0x08); @@ -1073,15 +1373,15 @@ void pxa255_periphs_device::lcd_load_dma_descriptor(address_space & space, uint3 void pxa255_periphs_device::lcd_irq_check() { - if (((m_lcd_regs.lcsr & PXA255_LCSR_BS) != 0 && (m_lcd_regs.lccr0 & PXA255_LCCR0_BM) == 0) || - ((m_lcd_regs.lcsr & PXA255_LCSR_EOF) != 0 && (m_lcd_regs.lccr0 & PXA255_LCCR0_EFM) == 0) || - ((m_lcd_regs.lcsr & PXA255_LCSR_SOF) != 0 && (m_lcd_regs.lccr0 & PXA255_LCCR0_SFM) == 0)) + if (((m_lcd_regs.lcsr & LCSR_BS) != 0 && (m_lcd_regs.lccr[0] & LCCR0_BM) == 0) || + ((m_lcd_regs.lcsr & LCSR_EOF) != 0 && (m_lcd_regs.lccr[0] & LCCR0_EFM) == 0) || + ((m_lcd_regs.lcsr & LCSR_SOF) != 0 && (m_lcd_regs.lccr[0] & LCCR0_SFM) == 0)) { - set_irq_line(PXA255_INT_LCD, 1); + set_irq_line(INT_LCD, 1); } else { - set_irq_line(PXA255_INT_LCD, 0); + set_irq_line(INT_LCD, 0); } } @@ -1093,21 +1393,21 @@ void pxa255_periphs_device::lcd_dma_kickoff(int channel) m_lcd_regs.dma[channel].eof->adjust(period, channel); - if (m_lcd_regs.dma[channel].ldcmd & PXA255_LDCMD_SOFINT) + if (m_lcd_regs.dma[channel].ldcmd & LDCMD_SOFINT) { m_lcd_regs.liidr = m_lcd_regs.dma[channel].fidr; - m_lcd_regs.lcsr |= PXA255_LCSR_SOF; + m_lcd_regs.lcsr |= LCSR_SOF; lcd_irq_check(); } - if (m_lcd_regs.dma[channel].ldcmd & PXA255_LDCMD_PAL) + if (m_lcd_regs.dma[channel].ldcmd & LDCMD_PAL) { address_space &space = m_maincpu->space(AS_PROGRAM); int length = m_lcd_regs.dma[channel].ldcmd & 0x000fffff; int index = 0; for(index = 0; index < length; index += 2) { - uint16_t color = space.read_word((m_lcd_regs.dma[channel].fsadr &~ 1) + index); + u16 color = space.read_word((m_lcd_regs.dma[channel].fsadr &~ 1) + index); m_lcd_palette[index >> 1] = (((((color >> 11) & 0x1f) << 3) | (color >> 13)) << 16) | (((((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3)) << 8) | (((color & 0x1f) << 3) | ((color >> 2) & 0x7)); m_palette->set_pen_color(index >> 1, (((color >> 11) & 0x1f) << 3) | (color >> 13), (((color >> 5) & 0x3f) << 2) | ((color >> 9) & 0x3), ((color & 0x1f) << 3) | ((color >> 2) & 0x7)); } @@ -1132,447 +1432,374 @@ void pxa255_periphs_device::lcd_check_load_next_branch(int channel) LOGMASKED(LOG_LCD_DMA, "lcd_check_load_next_branch: Taking branch\n" ); m_lcd_regs.fbr[channel] &= ~1; address_space &space = m_maincpu->space(AS_PROGRAM); - //m_lcd_regs.fbr[channel] = (space.read_dword(m_lcd_regs.fbr[channel] & 0xfffffff0) & 0xfffffff0) | (m_lcd_regs.fbr[channel] & 0x00000003); - //printf( "%08x\n", m_lcd_regs.fbr[channel] ); - lcd_load_dma_descriptor(space, m_lcd_regs.fbr[channel] & 0xfffffff0, 0); + lcd_load_dma_descriptor(m_lcd_regs.fbr[channel] & 0xfffffff0, 0); m_lcd_regs.fbr[channel] = (space.read_dword(m_lcd_regs.fbr[channel] & 0xfffffff0) & 0xfffffff0) | (m_lcd_regs.fbr[channel] & 0x00000003); lcd_dma_kickoff(0); if (m_lcd_regs.fbr[channel] & 2) { m_lcd_regs.fbr[channel] &= ~2; - if (!(m_lcd_regs.lccr0 & PXA255_LCCR0_BM)) + if (!(m_lcd_regs.lccr[0] & LCCR0_BM)) { - m_lcd_regs.lcsr |= PXA255_LCSR_BS; + m_lcd_regs.lcsr |= LCSR_BS; } } } else { - LOGMASKED(LOG_LCD_DMA, "pxa255_lcd_check_load_next_branch: Not taking branch\n" ); + LOGMASKED(LOG_LCD_DMA, "lcd_check_load_next_branch: Not taking branch\n" ); } } -TIMER_CALLBACK_MEMBER(pxa255_periphs_device::lcd_dma_eof_tick) +template +u32 pxa255_periphs_device::lcd_lccr_r(offs_t offset, u32 mem_mask) { - LOGMASKED(LOG_LCD_DMA, "End of frame callback\n" ); - if (m_lcd_regs.dma[param].ldcmd & PXA255_LDCMD_EOFINT) + const u32 data = m_lcd_regs.lccr[Which]; + LOGMASKED(LOG_LCD, "%s: lcd_lccr_r: LCD Control Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::lcd_lccr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_lccr_w: LCD Control Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + if (Which == 0) + m_lcd_regs.lccr[Which] = data & 0x00fffeff; + else + m_lcd_regs.lccr[Which] = data; +} + +template +u32 pxa255_periphs_device::lcd_fbr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_lcd_regs.fbr[Which]; + LOGMASKED(LOG_LCD, "%s: lcd_fbr_r: LCD Frame Branch Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::lcd_fbr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_lccr_w: LCD Frame Branch Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + m_lcd_regs.fbr[Which] = data & 0xfffffff3; + if (!m_lcd_regs.dma[Which].eof->enabled()) { - m_lcd_regs.liidr = m_lcd_regs.dma[param].fidr; - m_lcd_regs.lcsr |= PXA255_LCSR_EOF; + LOGMASKED(LOG_LCD, "ch%d EOF timer is not enabled, taking branch now\n", Which); + lcd_check_load_next_branch(Which); + lcd_irq_check(); } - lcd_check_load_next_branch(param); +} + +u32 pxa255_periphs_device::lcd_lcsr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_lcd_regs.lcsr; + LOGMASKED(LOG_LCD, "%s: lcd_lcsr_r: LCD Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::lcd_lcsr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_lcsr_w: LCD Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_lcd_regs.lcsr &= ~data; lcd_irq_check(); } -uint32_t pxa255_periphs_device::lcd_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::lcd_liidr_r(offs_t offset, u32 mem_mask) { - switch (PXA255_LCD_BASE_ADDR | (offset << 2)) - { - case PXA255_LCCR0: // 0x44000000 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Control 0: %08x & %08x\n", m_lcd_regs.lccr0, mem_mask); - return m_lcd_regs.lccr0; - case PXA255_LCCR1: // 0x44000004 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Control 1: %08x & %08x\n", m_lcd_regs.lccr1, mem_mask); - return m_lcd_regs.lccr1; - case PXA255_LCCR2: // 0x44000008 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Control 2: %08x & %08x\n", m_lcd_regs.lccr2, mem_mask); - return m_lcd_regs.lccr2; - case PXA255_LCCR3: // 0x4400000c - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Control 3: %08x & %08x\n", m_lcd_regs.lccr3, mem_mask); - return m_lcd_regs.lccr3; - case PXA255_FBR0: // 0x44000020 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Frame Branch Register 0: %08x & %08x\n", m_lcd_regs.fbr[0], mem_mask); - return m_lcd_regs.fbr[0]; - case PXA255_FBR1: // 0x44000024 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Frame Branch Register 1: %08x & %08x\n", m_lcd_regs.fbr[1], mem_mask); - return m_lcd_regs.fbr[1]; - case PXA255_LCSR: // 0x44000038 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Status Register: %08x & %08x\n", m_lcd_regs.lcsr, mem_mask); - return m_lcd_regs.lcsr; - case PXA255_LIIDR: // 0x4400003c - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD Interrupt ID Register: %08x & %08x\n", m_lcd_regs.liidr, mem_mask); - return m_lcd_regs.liidr; - case PXA255_TRGBR: // 0x44000040 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: TMED RGB Seed Register: %08x & %08x\n", m_lcd_regs.trgbr, mem_mask); - return m_lcd_regs.trgbr; - case PXA255_TCR: // 0x44000044 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: TMED RGB Seed Register: %08x & %08x\n", m_lcd_regs.tcr, mem_mask); - return m_lcd_regs.tcr; - case PXA255_FDADR0: // 0x44000200 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", m_lcd_regs.dma[0].fdadr, mem_mask); - return m_lcd_regs.dma[0].fdadr; - case PXA255_FSADR0: // 0x44000204 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Frame Source Address Register 0: %08x & %08x\n", m_lcd_regs.dma[0].fsadr, mem_mask); - return m_lcd_regs.dma[0].fsadr; - case PXA255_FIDR0: // 0x44000208 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Frame ID Register 0: %08x & %08x\n", m_lcd_regs.dma[0].fidr, mem_mask); - return m_lcd_regs.dma[0].fidr; - case PXA255_LDCMD0: // 0x4400020c - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Command Register 0: %08x & %08x\n", m_lcd_regs.dma[0].ldcmd & 0xfff00000, mem_mask); - return m_lcd_regs.dma[0].ldcmd & 0xfff00000; - case PXA255_FDADR1: // 0x44000210 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Frame Descriptor Address Register 1: %08x & %08x\n", m_lcd_regs.dma[1].fdadr, mem_mask); - return m_lcd_regs.dma[1].fdadr; - case PXA255_FSADR1: // 0x44000214 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Frame Source Address Register 1: %08x & %08x\n", m_lcd_regs.dma[1].fsadr, mem_mask); - return m_lcd_regs.dma[1].fsadr; - case PXA255_FIDR1: // 0x44000218 - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Frame ID Register 1: %08x & %08x\n", m_lcd_regs.dma[1].fidr, mem_mask); - return m_lcd_regs.dma[1].fidr; - case PXA255_LDCMD1: // 0x4400021c - LOGMASKED(LOG_LCD, "pxa255_lcd_r: LCD DMA Command Register 1: %08x & %08x\n", m_lcd_regs.dma[1].ldcmd & 0xfff00000, mem_mask); - return m_lcd_regs.dma[1].ldcmd & 0xfff00000; - default: - LOGMASKED(LOG_LCD | LOG_UNKNOWN, "pxa255_lcd_r: Unknown address: %08x\n", PXA255_LCD_BASE_ADDR | (offset << 2)); - break; - } - return 0; + const u32 data = m_lcd_regs.liidr; + LOGMASKED(LOG_LCD, "%s: lcd_liidr_r: LCD Interrupt ID Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } -void pxa255_periphs_device::lcd_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask) +void pxa255_periphs_device::lcd_liidr_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_LCD_BASE_ADDR | (offset << 2)) - { - case PXA255_LCCR0: // 0x44000000 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Control 0: %08x & %08x\n", data, mem_mask); - m_lcd_regs.lccr0 = data & 0x00fffeff; - break; - case PXA255_LCCR1: // 0x44000004 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Control 1: %08x & %08x\n", data, mem_mask); - m_lcd_regs.lccr1 = data; - break; - case PXA255_LCCR2: // 0x44000008 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Control 2: %08x & %08x\n", data, mem_mask); - m_lcd_regs.lccr2 = data; - break; - case PXA255_LCCR3: // 0x4400000c - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Control 3: %08x & %08x\n", data, mem_mask); - m_lcd_regs.lccr3 = data; - break; - case PXA255_FBR0: // 0x44000020 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Frame Branch Register 0: %08x & %08x\n", data, mem_mask); - m_lcd_regs.fbr[0] = data & 0xfffffff3; - if (!m_lcd_regs.dma[0].eof->enabled()) - { - LOGMASKED(LOG_LCD, "ch0 EOF timer is not enabled, taking branch now\n" ); - lcd_check_load_next_branch(0); - lcd_irq_check(); - } - break; - case PXA255_FBR1: // 0x44000024 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Frame Branch Register 1: %08x & %08x\n", data, mem_mask); - m_lcd_regs.fbr[1] = data & 0xfffffff3; - if (!m_lcd_regs.dma[1].eof->enabled()) - { - LOGMASKED(LOG_LCD, "ch1 EOF timer is not enabled, taking branch now\n" ); - lcd_check_load_next_branch(1); - lcd_irq_check(); - } - break; - case PXA255_LCSR: // 0x44000038 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Controller Status Register: %08x & %08x\n", data, mem_mask); - m_lcd_regs.lcsr &= ~data; - lcd_irq_check(); - break; - case PXA255_LIIDR: // 0x4400003c - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD Controller Interrupt ID Register: %08x & %08x\n", data, mem_mask); - break; - case PXA255_TRGBR: // 0x44000040 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: TMED RGB Seed Register: %08x & %08x\n", data, mem_mask); - m_lcd_regs.trgbr = data & 0x00ffffff; - break; - case PXA255_TCR: // 0x44000044 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: TMED Control Register: %08x & %08x\n", data, mem_mask); - m_lcd_regs.tcr = data & 0x00004fff; - break; - case PXA255_FDADR0: // 0x44000200 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD DMA Frame Descriptor Address Register 0: %08x & %08x\n", data, mem_mask); - if (!m_lcd_regs.dma[0].eof->enabled()) - { - lcd_load_dma_descriptor(space, data & 0xfffffff0, 0); - } - else - { - m_lcd_regs.fbr[0] &= 0x00000003; - m_lcd_regs.fbr[0] |= data & 0xfffffff0; - } - break; - case PXA255_FSADR0: // 0x44000204 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame Source Address Register 0: %08x & %08x\n", data, mem_mask); - break; - case PXA255_FIDR0: // 0x44000208 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame ID Register 0: %08x & %08x\n", data, mem_mask); - break; - case PXA255_LDCMD0: // 0x4400020c - LOGMASKED(LOG_LCD, "pxa255_lcd_w: (Invalid Write) LCD DMA Command Register 0: %08x & %08x\n", data, mem_mask); - break; - case PXA255_FDADR1: // 0x44000210 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: LCD DMA Frame Descriptor Address Register 1: %08x & %08x\n", data, mem_mask); - if (!m_lcd_regs.dma[1].eof->enabled()) - { - lcd_load_dma_descriptor(space, data & 0xfffffff0, 1); - } - else - { - m_lcd_regs.fbr[1] &= 0x00000003; - m_lcd_regs.fbr[1] |= data & 0xfffffff0; - } - break; - case PXA255_FSADR1: // 0x44000214 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame Source Address Register 1: %08x & %08x\n", data, mem_mask); - break; - case PXA255_FIDR1: // 0x44000218 - LOGMASKED(LOG_LCD, "pxa255_lcd_w: (Invalid Write) LCD DMA Frame ID Register 1: %08x & %08x\n", data, mem_mask); - break; - case PXA255_LDCMD1: // 0x4400021c - LOGMASKED(LOG_LCD, "pxa255_lcd_w: (Invalid Write) LCD DMA Command Register 1: %08x & %08x\n", data, mem_mask); - break; - default: - LOGMASKED(LOG_LCD | LOG_UNKNOWN, "pxa255_lcd_w: Unknown address: %08x = %08x & %08x\n", PXA255_LCD_BASE_ADDR | (offset << 2), data, mem_mask); - break; - } + LOGMASKED(LOG_LCD, "%s: lcd_liidr_w: LCD Interrupt ID Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); } -uint32_t pxa255_periphs_device::power_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::lcd_trgbr_r(offs_t offset, u32 mem_mask) { - switch (PXA255_POWER_BASE_ADDR | (offset << 2)) - { - case PXA255_PMCR: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Control Register: %08x\n", machine().describe_context(), m_power_regs.pmcr); - return m_power_regs.pmcr; - case PXA255_PSSR: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Sleep Status Register: %08x\n", machine().describe_context(), m_power_regs.pssr); - return m_power_regs.pssr; - case PXA255_PSPR: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Scratch Pad Register: %08x\n", machine().describe_context(), m_power_regs.pspr); - return m_power_regs.pspr; - case PXA255_PWER: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager Wake-up Enable Register: %08x\n", machine().describe_context(), m_power_regs.pwer); - return m_power_regs.pwer; - case PXA255_PRER: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Rising-Edge Detect Enable Register: %08x\n", machine().describe_context(), m_power_regs.prer); - return m_power_regs.prer; - case PXA255_PFER: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Falling-Edge Detect Enable Register: %08x\n", machine().describe_context(), m_power_regs.pfer); - return m_power_regs.pfer; - case PXA255_PEDR: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Edge Detect Status Register: %08x\n", machine().describe_context(), m_power_regs.pedr); - return m_power_regs.pedr; - case PXA255_PCFR: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager General Configuration Register: %08x\n", machine().describe_context(), m_power_regs.pcfr); - return m_power_regs.pcfr; - case PXA255_PGSR0: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Sleep State Register for GP[31-0]: %08x\n", machine().describe_context(), m_power_regs.pgsr0); - return m_power_regs.pgsr0; - case PXA255_PGSR1: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Sleep State Register for GP[63-32]: %08x\n", machine().describe_context(), m_power_regs.pgsr1); - return m_power_regs.pgsr1; - case PXA255_PGSR2: - LOGMASKED(LOG_POWER, "%s: power_r: Power Manager GPIO Sleep State Register for GP[84-64]: %08x\n", machine().describe_context(), m_power_regs.pgsr2); - return m_power_regs.pgsr2; - case PXA255_RCSR: - LOGMASKED(LOG_POWER, "%s: power_r: Reset Controller Status Register: %08x\n", machine().describe_context(), m_power_regs.rcsr); - return m_power_regs.rcsr; - case PXA255_PMFW: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Fast Sleep Walk-Up Configuration Register: %08x\n", machine().describe_context(), m_power_regs.pmfw); - return m_power_regs.pmfw; - default: - LOGMASKED(LOG_POWER | LOG_UNKNOWN, "%s: power_r: Unknown address: %08x\n", machine().describe_context(), PXA255_POWER_BASE_ADDR | (offset << 2)); - break; - } - return 0; + const u32 data = m_lcd_regs.trgbr; + LOGMASKED(LOG_LCD, "%s: lcd_trgbr_r: TMED RGB Seed Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::lcd_trgbr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_trgbr_w: TMED RGB Seed Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_lcd_regs.trgbr = data & 0x00ffffff; +} + +u32 pxa255_periphs_device::lcd_tcr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_lcd_regs.tcr; + LOGMASKED(LOG_LCD, "%s: lcd_tcr_r: TMED Control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::lcd_tcr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_tcr_w: TMED Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_lcd_regs.tcr = data & 0x00004fff; } -void pxa255_periphs_device::power_w(offs_t offset, uint32_t data, uint32_t mem_mask) +template +u32 pxa255_periphs_device::lcd_fdadr_r(offs_t offset, u32 mem_mask) { - switch (PXA255_POWER_BASE_ADDR | (offset << 2)) + const u32 data = m_lcd_regs.dma[Which].fdadr; + LOGMASKED(LOG_LCD, "%s: lcd_fdadr_r: LCD DMA Frame Descriptor Address Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::lcd_fdadr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_fdadr_w: LCD DMA Frame Descriptor Address Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + if (!m_lcd_regs.dma[Which].eof->enabled()) { - case PXA255_PMCR: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pmcr); - break; - case PXA255_PSSR: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Sleep Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - m_power_regs.pssr &= ~(data & 0x00000037); - break; - case PXA255_PSPR: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Scratch Pad Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pspr); - break; - case PXA255_PWER: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Wake-Up Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pwer); - break; - case PXA255_PRER: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Rising-Edge Detect Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.prer); - break; - case PXA255_PFER: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Falling-Edge Detect Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pfer); - break; - case PXA255_PEDR: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager GPIO Edge Detect Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - m_power_regs.pedr &= ~(data & 0x0000ffff); - break; - case PXA255_PCFR: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager General Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pcfr); - break; - case PXA255_PGSR0: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager GPIO Sleep State Register 0 = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pgsr0); - break; - case PXA255_PGSR1: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager GPIO Sleep State Register 1 = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pgsr1); - break; - case PXA255_PGSR2: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager GPIO Sleep State Register 2 = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pgsr2); - break; - case PXA255_PMFW: - LOGMASKED(LOG_POWER, "%s: power_w: Power Manager Fast Sleep Walk-Up Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_power_regs.pmfw); - break; - default: - LOGMASKED(LOG_POWER | LOG_UNKNOWN, "%s: power_w: Unknown address: %08x = %08x & %08x\n", machine().describe_context(), PXA255_POWER_BASE_ADDR | (offset << 2), - data, mem_mask); - break; + lcd_load_dma_descriptor(data & 0xfffffff0, Which); } + else + { + m_lcd_regs.fbr[Which] &= 0x00000003; + m_lcd_regs.fbr[Which] |= data & 0xfffffff0; + } +} + +template +u32 pxa255_periphs_device::lcd_fsadr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_lcd_regs.dma[Which].fsadr; + LOGMASKED(LOG_LCD, "%s: lcd_fsadr_r: LCD DMA Frame Source Address Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::lcd_fsadr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_fsadr_w: (Ignored) LCD DMA Frame Source Address Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); +} + +template +u32 pxa255_periphs_device::lcd_fidr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_lcd_regs.dma[Which].fidr; + LOGMASKED(LOG_LCD, "%s: lcd_fidr_r: LCD DMA Frame ID Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::lcd_fidr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_fidr_w: (Ignored) LCD DMA Frame ID Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); +} + +template +u32 pxa255_periphs_device::lcd_ldcmd_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_lcd_regs.dma[Which].ldcmd & 0xfff00000; + LOGMASKED(LOG_LCD, "%s: lcd_ldcmd_r: LCD DMA Command Register %d: %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); + return data; } +template +void pxa255_periphs_device::lcd_ldcmd_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_LCD, "%s: lcd_ldcmd_w: (Ignored) LCD DMA Command Register %d = %08x & %08x\n", machine().describe_context(), Which, data, mem_mask); +} + + /* - PXA255 Clock controller - pg. 96 to 100, PXA255 Processor Developers Manual [278693-002].pdf + PXA255 Power Controller + + pg. 85 to 96, PXA255 Processor Developers Manual [278693-002].pdf */ -uint32_t pxa255_periphs_device::clocks_r(offs_t offset, uint32_t mem_mask) +u32 pxa255_periphs_device::pwr_pmcr_r(offs_t offset, u32 mem_mask) { - switch (PXA255_CLOCKS_BASE_ADDR | (offset << 2)) - { - case PXA255_CCCR: - LOGMASKED(LOG_CLOCKS, "%s: clocks_r: Core Clock Configuration Register: %08x\n", machine().describe_context(), m_clocks_regs.cccr); - return m_clocks_regs.cccr; - case PXA255_CKEN: - LOGMASKED(LOG_CLOCKS, "%s: clocks_r: Clock Enable Register: %08x\n", machine().describe_context(), m_clocks_regs.cken); - return m_clocks_regs.cken; - case PXA255_OSCC: - LOGMASKED(LOG_CLOCKS, "%s: clocks_r: Oscillator Configuration Register: %08x\n", machine().describe_context(), m_clocks_regs.oscc); - return BIT(m_clocks_regs.oscc, 0); - default: - LOGMASKED(LOG_CLOCKS | LOG_UNKNOWN, "%s: clocks_r: Unknown address: %08x\n", machine().describe_context(), PXA255_CLOCKS_BASE_ADDR | (offset << 2)); - break; - } - return 0; + const u32 data = m_power_regs.pmcr; + LOGMASKED(LOG_POWER, "%s: pwr_pmcr_r: Power Manager Control Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } -void pxa255_periphs_device::clocks_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void pxa255_periphs_device::pwr_pmcr_w(offs_t offset, u32 data, u32 mem_mask) { - switch (PXA255_CLOCKS_BASE_ADDR | (offset << 2)) - { - case PXA255_CCCR: - LOGMASKED(LOG_CLOCKS, "%s: clocks_w: Core Clock Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_clocks_regs.cccr); - break; - case PXA255_CKEN: - LOGMASKED(LOG_CLOCKS, "%s: clocks_w: Clock Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - COMBINE_DATA(&m_clocks_regs.cken); - break; - case PXA255_OSCC: - LOGMASKED(LOG_CLOCKS, "%s: clocks_w: Oscillator Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); - if (BIT(data, 1)) - { - m_clocks_regs.oscc |= 0x00000003; - } - break; - default: - LOGMASKED(LOG_CLOCKS | LOG_UNKNOWN, "%s: clocks_w: Unknown address: %08x = %08x & %08x\n", machine().describe_context(), PXA255_CLOCKS_BASE_ADDR | (offset << 2), - data, mem_mask); - break; - } + LOGMASKED(LOG_POWER, "%s: pwr_pmcr_w: Power Manager Control Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pmcr); } -void pxa255_periphs_device::device_start() +u32 pxa255_periphs_device::pwr_pssr_r(offs_t offset, u32 mem_mask) { - for (int index = 0; index < 16; index++) - { - if (index != 3) - { - m_dma_regs.timer[index] = timer_alloc(FUNC(pxa255_periphs_device::dma_end_tick), this); - } - else - { - m_dma_regs.timer[index] = timer_alloc(FUNC(pxa255_periphs_device::audio_dma_end_tick), this); - } - } + const u32 data = m_power_regs.pssr; + LOGMASKED(LOG_POWER, "%s: pwr_pssr_r: Power Manager Sleep Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} - for (int index = 0; index < 4; index++) - { - m_ostimer_regs.timer[index] = timer_alloc(FUNC(pxa255_periphs_device::ostimer_match_tick), this); - } +void pxa255_periphs_device::pwr_pssr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_pssr_w: Power Manager Sleep Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_power_regs.pssr &= ~(data & 0x00000037); +} - m_lcd_regs.dma[0].eof = timer_alloc(FUNC(pxa255_periphs_device::lcd_dma_eof_tick), this); - m_lcd_regs.dma[1].eof = timer_alloc(FUNC(pxa255_periphs_device::lcd_dma_eof_tick), this); +u32 pxa255_periphs_device::pwr_pspr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.pspr; + LOGMASKED(LOG_POWER, "%s: pwr_pspr_r: Power Manager Scratch Pad Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} - m_lcd_palette = make_unique_clear(0x100); - m_lcd_framebuffer = make_unique_clear(0x100000); - m_samples = make_unique_clear(0x1000); +void pxa255_periphs_device::pwr_pspr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_pspr_w: Power Manager Scratch Pad Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pspr); +} - m_rtc_regs.timer = timer_alloc(FUNC(pxa255_periphs_device::rtc_tick), this); +u32 pxa255_periphs_device::pwr_pwer_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.pwer; + LOGMASKED(LOG_POWER, "%s: pwr_pwer_r: Power Manager Wake-Up Enable Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } -void pxa255_periphs_device::device_reset() +void pxa255_periphs_device::pwr_pwer_w(offs_t offset, u32 data, u32 mem_mask) { - for (int index = 0; index < 16; index++) - { - m_dma_regs.dcsr[index] = 0x00000008; - } + LOGMASKED(LOG_POWER, "%s: pwr_pwer_w: Power Manager Wake-Up Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pwer); +} - m_rtc_regs.rcnr = 0x00000000; - m_rtc_regs.rtar = 0x00000000; - m_rtc_regs.rtsr = 0x00000000; - m_rtc_regs.rttr = 0x00007fff; - m_rtc_regs.timer->adjust(attotime::from_hz(1)); +u32 pxa255_periphs_device::pwr_prer_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.prer; + LOGMASKED(LOG_POWER, "%s: pwr_prer_r: Power Manager GPIO Rising-Edge Detect Enable Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} - memset(&m_intc_regs, 0, sizeof(m_intc_regs)); +void pxa255_periphs_device::pwr_prer_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_prer_w: Power Manager GPIO Rising-Edge Detect Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.prer); +} - m_lcd_regs.trgbr = 0x00aa5500; - m_lcd_regs.tcr = 0x0000754f; +u32 pxa255_periphs_device::pwr_pfer_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.pfer; + LOGMASKED(LOG_POWER, "%s: pwr_pfer_r: Power Manager GPIO Falling-Edge Detect Enable Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} - memset(&m_power_regs, 0, sizeof(m_power_regs)); - memset(&m_clocks_regs, 0, sizeof(m_clocks_regs)); +void pxa255_periphs_device::pwr_pfer_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_pfer_w: Power Manager GPIO Falling-Edge Detect Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pfer); } -uint32_t pxa255_periphs_device::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +u32 pxa255_periphs_device::pwr_pedr_r(offs_t offset, u32 mem_mask) { - for (int y = 0; y <= (m_lcd_regs.lccr2 & PXA255_LCCR2_LPP); y++) - { - uint32_t *dst = &bitmap.pix(y); - for (int x = 0; x <= (m_lcd_regs.lccr1 & PXA255_LCCR1_PPL); x++) - { - *dst++ = m_lcd_palette[m_lcd_framebuffer[y * ((m_lcd_regs.lccr1 & PXA255_LCCR1_PPL) + 1) + x]]; - } - } - return 0; + const u32 data = m_power_regs.pedr; + LOGMASKED(LOG_POWER, "%s: pwr_pedr_r: Power Manager GPIO Edge Detect Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; } -void pxa255_periphs_device::device_add_mconfig(machine_config &config) +void pxa255_periphs_device::pwr_pedr_w(offs_t offset, u32 data, u32 mem_mask) { - screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); - screen.set_refresh_hz(60); - screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); - screen.set_size(1024, 1024); - screen.set_visarea(0, 295, 0, 479); - screen.set_screen_update(FUNC(pxa255_periphs_device::screen_update)); + LOGMASKED(LOG_POWER, "%s: pwr_pedr_w: Power Manager GPIO Edge-Detect Status Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + m_power_regs.pedr &= ~(data & 0x0000ffff); +} - PALETTE(config, m_palette).set_entries(256); +u32 pxa255_periphs_device::pwr_pcfr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.pcfr; + LOGMASKED(LOG_POWER, "%s: pwr_pcfr_r: Power Manager General Configuration Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} - SPEAKER(config, "lspeaker").front_left(); - SPEAKER(config, "rspeaker").front_right(); +void pxa255_periphs_device::pwr_pcfr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_pcfr_w: Power Manager General Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pcfr); +} - DMADAC(config, m_dmadac[0]).add_route(ALL_OUTPUTS, "lspeaker", 1.0); - DMADAC(config, m_dmadac[1]).add_route(ALL_OUTPUTS, "rspeaker", 1.0); +template +u32 pxa255_periphs_device::pwr_pgsr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.pgsr[Which]; + LOGMASKED(LOG_POWER, "%s: pwr_pgsr_r: Power Manager GPIO Sleep State Register for GPIO%d-%d: %08x & %08x\n", machine().describe_context(), Which * 32, Which * 32 + 31, data, mem_mask); + return data; +} + +template +void pxa255_periphs_device::pwr_pgsr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_pgsr_w: Power Manager GPIO Sleep State Register for GPIO%d-%d = %08x & %08x\n", machine().describe_context(), Which * 32, Which * 32 + 31, data, mem_mask); + COMBINE_DATA(&m_power_regs.pgsr[Which]); +} + +u32 pxa255_periphs_device::pwr_rcsr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.rcsr; + LOGMASKED(LOG_POWER, "%s: pwr_rcsr_r: Reset Controller Status Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +u32 pxa255_periphs_device::pwr_pmfw_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_power_regs.pmfw; + LOGMASKED(LOG_POWER, "%s: pwr_pmfw_r: Power Manager Fast Sleep Wake-Up Configuration Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::pwr_pmfw_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_POWER, "%s: pwr_pmfw_w: Power Manager Fast Sleep Wake-Up Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_power_regs.pmfw); +} + + +/* + PXA255 Clock controller + + pg. 96 to 100, PXA255 Processor Developers Manual [278693-002].pdf + +*/ + +u32 pxa255_periphs_device::clk_cccr_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_clk_regs.cccr; + LOGMASKED(LOG_CLOCKS, "%s: clk_cccr_r: Core Clock Configuration Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::clk_cccr_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_CLOCKS, "%s: clk_cccr_w: Core Clock Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_clk_regs.cccr); +} + +u32 pxa255_periphs_device::clk_cken_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_clk_regs.cken; + LOGMASKED(LOG_CLOCKS, "%s: clk_cken_r: Clock Enable Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::clk_cken_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_CLOCKS, "%s: clk_cken_w: Clock Enable Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + COMBINE_DATA(&m_clk_regs.cken); +} + +u32 pxa255_periphs_device::clk_oscc_r(offs_t offset, u32 mem_mask) +{ + const u32 data = m_clk_regs.cccr; + LOGMASKED(LOG_CLOCKS, "%s: clk_oscc_r: Oscillator Configuration Register: %08x & %08x\n", machine().describe_context(), data, mem_mask); + return data; +} + +void pxa255_periphs_device::clk_oscc_w(offs_t offset, u32 data, u32 mem_mask) +{ + LOGMASKED(LOG_CLOCKS, "%s: clk_oscc_w: Oscillator Configuration Register = %08x & %08x\n", machine().describe_context(), data, mem_mask); + if (BIT(data, 1)) + { + m_clk_regs.oscc |= 0x00000003; + } } diff --git a/src/devices/machine/pxa255.h b/src/devices/machine/pxa255.h index 75eadbac2c56a..3cc9b43c8a997 100644 --- a/src/devices/machine/pxa255.h +++ b/src/devices/machine/pxa255.h @@ -19,253 +19,461 @@ #include "sound/dmadac.h" #include "emupal.h" -#include "pxa255defs.h" - class pxa255_periphs_device : public device_t { public: template - pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&cpu_tag) + pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, T &&cpu_tag) : pxa255_periphs_device(mconfig, tag, owner, clock) { m_maincpu.set_tag(std::forward(cpu_tag)); } - pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - auto gpio0_write() { return m_gpio0_w.bind(); } - auto gpio0_read() { return m_gpio0_r.bind(); } - auto gpio1_write() { return m_gpio1_w.bind(); } - auto gpio1_read() { return m_gpio1_r.bind(); } - auto gpio2_write() { return m_gpio2_w.bind(); } - auto gpio2_read() { return m_gpio2_r.bind(); } - - uint32_t dma_r(offs_t offset, uint32_t mem_mask = ~0); - void dma_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t i2s_r(offs_t offset, uint32_t mem_mask = ~0); - void i2s_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t rtc_r(offs_t offset, uint32_t mem_mask = ~0); - void rtc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t ostimer_r(offs_t offset, uint32_t mem_mask = ~0); - void ostimer_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t intc_r(offs_t offset, uint32_t mem_mask = ~0); - void intc_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - void gpio_bit_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0); - uint32_t gpio_r(offs_t offset, uint32_t mem_mask = ~0); - void gpio_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t lcd_r(offs_t offset, uint32_t mem_mask = ~0); - void lcd_w(address_space &space, offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t power_r(offs_t offset, uint32_t mem_mask = ~0); - void power_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t clocks_r(offs_t offset, uint32_t mem_mask = ~0); - void clocks_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); + pxa255_periphs_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); + + template auto gpio_out() { return m_gpio_w[Bit].bind(); } + template void gpio_in(int state); + + void map(address_map &map); + + // gpio_bit_w protected: virtual void device_add_mconfig(machine_config &config) override; virtual void device_start() override; virtual void device_reset() override; + static constexpr u32 INTERNAL_OSC = 3686400; + + // DMA Hardware void dma_irq_check(); void dma_load_descriptor_and_start(int channel); - void ostimer_irq_check(); - void update_interrupts(); - void lcd_load_dma_descriptor(address_space & space, uint32_t address, int channel); - void lcd_irq_check(); - void lcd_dma_kickoff(int channel); - void lcd_check_load_next_branch(int channel); - - uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - - TIMER_CALLBACK_MEMBER(dma_end_tick); TIMER_CALLBACK_MEMBER(audio_dma_end_tick); - TIMER_CALLBACK_MEMBER(ostimer_match_tick); - TIMER_CALLBACK_MEMBER(lcd_dma_eof_tick); - TIMER_CALLBACK_MEMBER(rtc_tick); - + TIMER_CALLBACK_MEMBER(dma_end_tick); void dma_finish(int channel); - void set_irq_line(uint32_t line, int state); - struct dma_regs + u32 dma_dcsr_r(offs_t offset, u32 mem_mask); + void dma_dcsr_w(offs_t offset, u32 data, u32 mem_mask); + u32 dma_dint_r(offs_t offset, u32 mem_mask); + void dma_dint_w(offs_t offset, u32 data, u32 mem_mask); + u32 dma_drcmr_r(offs_t offset, u32 mem_mask); + void dma_drcmr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 dma_ddadr_r(offs_t offset, u32 mem_mask); + template void dma_ddadr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 dma_dsadr_r(offs_t offset, u32 mem_mask); + template void dma_dsadr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 dma_dtadr_r(offs_t offset, u32 mem_mask); + template void dma_dtadr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 dma_dcmd_r(offs_t offset, u32 mem_mask); + template void dma_dcmd_w(offs_t offset, u32 data, u32 mem_mask); + + enum dma_bits_t : u32 { - uint32_t dcsr[16]; - uint32_t pad0[44]; - - uint32_t dint; - uint32_t pad1[3]; + DCSR_BUSERRINTR = 1u << 0, + DCSR_STARTINTR = 1u << 1, + DCSR_ENDINTR = 1u << 2, + DCSR_STOPSTATE = 1u << 3, + DCSR_REQPEND = 1u << 8, + DCSR_STOPIRQ = 1u << 29, + DCSR_NODESCFETCH = 1u << 30, + DCSR_RUN = 1u << 31, + + DDADR_STOP = 1u << 0, + + DCMD_INCSRCADDR = 1u << 31, + DCMD_INCTRGADDR = 1u << 30, + DCMD_STARTIRQEN = 1u << 22, + DCMD_ENDIRQEN = 1u << 21, + DCMD_SIZE_SHIFT = 16, + DCMD_SIZE_MASK = 3, + DCMD_SIZE_0 = 0, + DCMD_SIZE_8 = 1, + DCMD_SIZE_16 = 2, + DCMD_SIZE_32 = 3 + }; - uint32_t drcmr[40]; - uint32_t pad2[24]; + struct dma_regs + { + u32 dcsr[16]; + u32 dint; + u32 drcmr[40]; - uint32_t ddadr[16]; - uint32_t dsadr[16]; - uint32_t dtadr[16]; - uint32_t dcmd[16]; + u32 ddadr[16]; + u32 dsadr[16]; + u32 dtadr[16]; + u32 dcmd[16]; emu_timer* timer[16]; }; - struct i2s_regs - { - uint32_t sacr0; - uint32_t sacr1; - uint32_t pad0; + dma_regs m_dma_regs; - uint32_t sasr0; - uint32_t pad1; + // RTC Hardware + TIMER_CALLBACK_MEMBER(rtc_tick); + u32 rtc_rcnr_r(offs_t offset, u32 mem_mask); + void rtc_rcnr_w(offs_t offset, u32 data, u32 mem_mask); + u32 rtc_rtar_r(offs_t offset, u32 mem_mask); + void rtc_rtar_w(offs_t offset, u32 data, u32 mem_mask); + u32 rtc_rtsr_r(offs_t offset, u32 mem_mask); + void rtc_rtsr_w(offs_t offset, u32 data, u32 mem_mask); + u32 rtc_rttr_r(offs_t offset, u32 mem_mask); + void rtc_rttr_w(offs_t offset, u32 data, u32 mem_mask); - uint32_t saimr; - uint32_t saicr; - uint32_t pad2[17]; + struct rtc_regs + { + u32 rcnr; + u32 rtar; + u32 rtsr; + u32 rttr; + emu_timer *timer; + }; - uint32_t sadiv; - uint32_t pad3[6]; + rtc_regs m_rtc_regs; - uint32_t sadr; + // I2S (Audio) Hardware + u32 i2s_sacr0_r(offs_t offset, u32 mem_mask); + void i2s_sacr0_w(offs_t offset, u32 data, u32 mem_mask); + u32 i2s_sacr1_r(offs_t offset, u32 mem_mask); + void i2s_sacr1_w(offs_t offset, u32 data, u32 mem_mask); + u32 i2s_sasr0_r(offs_t offset, u32 mem_mask); + void i2s_sasr0_w(offs_t offset, u32 data, u32 mem_mask); + u32 i2s_saimr_r(offs_t offset, u32 mem_mask); + void i2s_saimr_w(offs_t offset, u32 data, u32 mem_mask); + u32 i2s_saicr_r(offs_t offset, u32 mem_mask); + void i2s_saicr_w(offs_t offset, u32 data, u32 mem_mask); + u32 i2s_sadiv_r(offs_t offset, u32 mem_mask); + void i2s_sadiv_w(offs_t offset, u32 data, u32 mem_mask); + u32 i2s_sadr_r(offs_t offset, u32 mem_mask); + void i2s_sadr_w(offs_t offset, u32 data, u32 mem_mask); + + enum i2s_bits_t : u32 + { + SASR0_TNF = 1u << 0, + SASR0_RNE = 1u << 1, + SASR0_BSY = 1u << 2, + SASR0_TFS = 1u << 3, + SASR0_RFS = 1u << 4, + SASR0_TUR = 1u << 5, + SASR0_ROR = 1u << 6, + SASR0_TFL = 15u << 8, + SASR0_RFL = 15u << 12, + + SAICR_TUR = 1u << 5, + SAICR_ROR = 1u << 6, }; - struct rtc_regs + struct i2s_regs { - uint32_t rcnr; - uint32_t rtar; - uint32_t rtsr; - uint32_t rttr; - emu_timer *timer; + u32 sacr0; + u32 sacr1; + u32 sasr0; + u32 saimr; + u32 saicr; + u32 sadiv; + u32 sadr; + }; + + i2s_regs m_i2s_regs; + + // Timer Hardware + void ostimer_irq_check(); + TIMER_CALLBACK_MEMBER(ostimer_match_tick); + template void ostimer_update_interrupts(); + void ostimer_update_count(); + + template u32 tmr_osmr_r(offs_t offset, u32 mem_mask); + template void tmr_osmr_w(offs_t offset, u32 data, u32 mem_mask); + u32 tmr_oscr_r(offs_t offset, u32 mem_mask); + void tmr_oscr_w(offs_t offset, u32 data, u32 mem_mask); + u32 tmr_ossr_r(offs_t offset, u32 mem_mask); + void tmr_ossr_w(offs_t offset, u32 data, u32 mem_mask); + u32 tmr_ower_r(offs_t offset, u32 mem_mask); + void tmr_ower_w(offs_t offset, u32 data, u32 mem_mask); + u32 tmr_oier_r(offs_t offset, u32 mem_mask); + void tmr_oier_w(offs_t offset, u32 data, u32 mem_mask); + + enum tmr_bits_t : u32 + { + OSSR_M0 = 1u << 0, + OSSR_M1 = 1u << 1, + OSSR_M2 = 1u << 2, + OSSR_M3 = 1u << 3, + + OIER_E0 = 1u << 0, + OIER_E1 = 1u << 1, + OIER_E2 = 1u << 2, + OIER_E3 = 1u << 3 }; struct ostmr_regs { - uint32_t osmr[4]; - uint32_t oscr; - uint32_t ossr; - uint32_t ower; - uint32_t oier; + u32 osmr[4]; + u32 oscr; + u32 ossr; + u32 ower; + u32 oier; emu_timer* timer[4]; + attotime last_count_sync; + }; + + ostmr_regs m_ostimer_regs; + + // Interrupt Hardware + enum intc_bits_t : u32 + { + INT_HUART = 1u << 7, + INT_GPIO0 = 1u << 8, + INT_GPIO1 = 1u << 9, + INT_GPIO84_2 = 1u << 10, + INT_USB = 1u << 11, + INT_PMU = 1u << 12, + INT_I2S = 1u << 13, + INT_AC97 = 1u << 14, + INT_NETWORK = 1u << 16, + INT_LCD = 1u << 17, + INT_I2C = 1u << 18, + INT_ICP = 1u << 19, + INT_STUART = 1u << 20, + INT_BTUART = 1u << 21, + INT_FFUART = 1u << 22, + INT_MMC = 1u << 23, + INT_SSP = 1u << 24, + INT_DMA = 1u << 25, + INT_OSTIMER0 = 1u << 26, + INT_OSTIMER1 = 1u << 27, + INT_OSTIMER2 = 1u << 28, + INT_OSTIMER3 = 1u << 29, + INT_RTC_HZ = 1u << 30, + INT_RTC_ALARM = 1u << 31 }; + void update_interrupts(); + u32 intc_icip_r(offs_t offset, u32 mem_mask); + void intc_icip_w(offs_t offset, u32 data, u32 mem_mask); + u32 intc_icmr_r(offs_t offset, u32 mem_mask); + void intc_icmr_w(offs_t offset, u32 data, u32 mem_mask); + u32 intc_iclr_r(offs_t offset, u32 mem_mask); + void intc_iclr_w(offs_t offset, u32 data, u32 mem_mask); + u32 intc_icfp_r(offs_t offset, u32 mem_mask); + void intc_icfp_w(offs_t offset, u32 data, u32 mem_mask); + u32 intc_icpr_r(offs_t offset, u32 mem_mask); + void intc_icpr_w(offs_t offset, u32 data, u32 mem_mask); + u32 intc_iccr_r(offs_t offset, u32 mem_mask); + void intc_iccr_w(offs_t offset, u32 data, u32 mem_mask); + struct intc_regs { - uint32_t icip; - uint32_t icmr; - uint32_t iclr; - uint32_t icfp; - uint32_t icpr; - uint32_t iccr; + u32 icip; + u32 icmr; + u32 iclr; + u32 icfp; + u32 icpr; + u32 iccr; }; + intc_regs m_intc_regs; + + // GPIO Hardware + template void update_gpio_outputs(const u32 old); + template void check_gpio_irqs(const u32 old); + template u32 gpio_gplr_r(offs_t offset, u32 mem_mask); + template void gpio_gplr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gpdr_r(offs_t offset, u32 mem_mask); + template void gpio_gpdr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gpsr_r(offs_t offset, u32 mem_mask); + template void gpio_gpsr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gpcr_r(offs_t offset, u32 mem_mask); + template void gpio_gpcr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_grer_r(offs_t offset, u32 mem_mask); + template void gpio_grer_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gfer_r(offs_t offset, u32 mem_mask); + template void gpio_gfer_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gedr_r(offs_t offset, u32 mem_mask); + template void gpio_gedr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gafrl_r(offs_t offset, u32 mem_mask); + template void gpio_gafrl_w(offs_t offset, u32 data, u32 mem_mask); + template u32 gpio_gafru_r(offs_t offset, u32 mem_mask); + template void gpio_gafru_w(offs_t offset, u32 data, u32 mem_mask); + struct gpio_regs { - uint32_t gplr0; // GPIO Pin-Level - uint32_t gplr1; - uint32_t gplr2; - - uint32_t gpdr0; - uint32_t gpdr1; - uint32_t gpdr2; - - uint32_t gpsr0; - uint32_t gpsr1; - uint32_t gpsr2; - - uint32_t gpcr0; - uint32_t gpcr1; - uint32_t gpcr2; - - uint32_t grer0; - uint32_t grer1; - uint32_t grer2; - - uint32_t gfer0; - uint32_t gfer1; - uint32_t gfer2; - - uint32_t gedr0; - uint32_t gedr1; - uint32_t gedr2; - - uint32_t gafr0l; - uint32_t gafr0u; - uint32_t gafr1l; - uint32_t gafr1u; - uint32_t gafr2l; - uint32_t gafr2u; + u32 gpdr[3]; + u32 gpsr[3]; + u32 gpcr[3]; + u32 grer[3]; + u32 gfer[3]; + u32 gedr[3]; + u32 gafrl[3]; + u32 gafru[3]; + u32 out_data[3]; // Output data + u32 in_data[3]; // Input data + }; + + gpio_regs m_gpio_regs; + + // LCD Hardware + u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + TIMER_CALLBACK_MEMBER(lcd_dma_eof_tick); + void lcd_load_dma_descriptor(u32 address, int channel); + void lcd_irq_check(); + void lcd_dma_kickoff(int channel); + void lcd_check_load_next_branch(int channel); + + template u32 lcd_lccr_r(offs_t offset, u32 mem_mask); + template void lcd_lccr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 lcd_fbr_r(offs_t offset, u32 mem_mask); + template void lcd_fbr_w(offs_t offset, u32 data, u32 mem_mask); + u32 lcd_lcsr_r(offs_t offset, u32 mem_mask); + void lcd_lcsr_w(offs_t offset, u32 data, u32 mem_mask); + u32 lcd_liidr_r(offs_t offset, u32 mem_mask); + void lcd_liidr_w(offs_t offset, u32 data, u32 mem_mask); + u32 lcd_trgbr_r(offs_t offset, u32 mem_mask); + void lcd_trgbr_w(offs_t offset, u32 data, u32 mem_mask); + u32 lcd_tcr_r(offs_t offset, u32 mem_mask); + void lcd_tcr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 lcd_fdadr_r(offs_t offset, u32 mem_mask); + template void lcd_fdadr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 lcd_fsadr_r(offs_t offset, u32 mem_mask); + template void lcd_fsadr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 lcd_fidr_r(offs_t offset, u32 mem_mask); + template void lcd_fidr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 lcd_ldcmd_r(offs_t offset, u32 mem_mask); + template void lcd_ldcmd_w(offs_t offset, u32 data, u32 mem_mask); + + enum lcd_bits_t : u32 + { + LCCR0_ENB = 1u << 0, + LCCR0_CMS = 1u << 1, + LCCR0_SDS = 1u << 2, + LCCR0_LDM = 1u << 3, + LCCR0_SFM = 1u << 4, + LCCR0_IUM = 1u << 5, + LCCR0_EFM = 1u << 6, + LCCR0_PAS = 1u << 7, + LCCR0_DPD = 1u << 9, + LCCR0_DIS = 1u << 10, + LCCR0_QDM = 1u << 11, + LCCR0_PDD = 0xff << 12, + LCCR0_BM = 1u << 20, + LCCR0_OUM = 1u << 21, + + LCCR1_PPL = 0x000003ff, + + LCCR2_LPP = 0x000003ff, + + LCSR_LDD = 1u << 0, + LCSR_SOF = 1u << 1, + LCSR_BER = 1u << 2, + LCSR_ABC = 1u << 3, + LCSR_IUL = 1u << 4, + LCSR_IUU = 1u << 5, + LCSR_OU = 1u << 6, + LCSR_QD = 1u << 7, + LCSR_EOF = 1u << 8, + LCSR_BS = 1u << 9, + LCSR_SINT = 1u << 10, + + LDCMD_EOFINT = 1u << 21, + LDCMD_SOFINT = 1u << 22, + LDCMD_PAL = 1u << 26 }; struct lcd_dma_regs { - uint32_t fdadr; - uint32_t fsadr; - uint32_t fidr; - uint32_t ldcmd; + u32 fdadr; + u32 fsadr; + u32 fidr; + u32 ldcmd; emu_timer *eof; }; struct lcd_regs { - uint32_t lccr0; - uint32_t lccr1; - uint32_t lccr2; - uint32_t lccr3; + u32 lccr[4]; - uint32_t fbr[2]; + u32 fbr[2]; - uint32_t lcsr; - uint32_t liidr; - uint32_t trgbr; - uint32_t tcr; + u32 lcsr; + u32 liidr; + u32 trgbr; + u32 tcr; lcd_dma_regs dma[2]; }; + lcd_regs m_lcd_regs; + + // Power Management Hardware + u32 pwr_pmcr_r(offs_t offset, u32 mem_mask); + void pwr_pmcr_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_pssr_r(offs_t offset, u32 mem_mask); + void pwr_pssr_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_pspr_r(offs_t offset, u32 mem_mask); + void pwr_pspr_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_pwer_r(offs_t offset, u32 mem_mask); + void pwr_pwer_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_prer_r(offs_t offset, u32 mem_mask); + void pwr_prer_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_pfer_r(offs_t offset, u32 mem_mask); + void pwr_pfer_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_pedr_r(offs_t offset, u32 mem_mask); + void pwr_pedr_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_pcfr_r(offs_t offset, u32 mem_mask); + void pwr_pcfr_w(offs_t offset, u32 data, u32 mem_mask); + template u32 pwr_pgsr_r(offs_t offset, u32 mem_mask); + template void pwr_pgsr_w(offs_t offset, u32 data, u32 mem_mask); + u32 pwr_rcsr_r(offs_t offset, u32 mem_mask); + u32 pwr_pmfw_r(offs_t offset, u32 mem_mask); + void pwr_pmfw_w(offs_t offset, u32 data, u32 mem_mask); + struct power_regs { - uint32_t pmcr; - uint32_t pssr; - uint32_t pspr; - uint32_t pwer; - uint32_t prer; - uint32_t pfer; - uint32_t pedr; - uint32_t pcfr; - uint32_t pgsr0; - uint32_t pgsr1; - uint32_t pgsr2; - uint32_t rcsr; - uint32_t pmfw; + u32 pmcr; + u32 pssr; + u32 pspr; + u32 pwer; + u32 prer; + u32 pfer; + u32 pedr; + u32 pcfr; + u32 pgsr[3]; + u32 rcsr; + u32 pmfw; }; - struct clocks_regs + power_regs m_power_regs; + + // System Clock Hardware + u32 clk_cccr_r(offs_t offset, u32 mem_mask); + void clk_cccr_w(offs_t offset, u32 data, u32 mem_mask); + u32 clk_cken_r(offs_t offset, u32 mem_mask); + void clk_cken_w(offs_t offset, u32 data, u32 mem_mask); + u32 clk_oscc_r(offs_t offset, u32 mem_mask); + void clk_oscc_w(offs_t offset, u32 data, u32 mem_mask); + + struct clk_regs { - uint32_t cccr; - uint32_t cken; - uint32_t oscc; + u32 cccr; + u32 cken; + u32 oscc; }; - dma_regs m_dma_regs; - i2s_regs m_i2s_regs; - rtc_regs m_rtc_regs; - ostmr_regs m_ostimer_regs; - intc_regs m_intc_regs; - gpio_regs m_gpio_regs; - lcd_regs m_lcd_regs; - power_regs m_power_regs; - clocks_regs m_clocks_regs; + clk_regs m_clk_regs; + + void set_irq_line(u32 line, int state); - devcb_write32 m_gpio0_w; - devcb_write32 m_gpio1_w; - devcb_write32 m_gpio2_w; - devcb_read32 m_gpio0_r; - devcb_read32 m_gpio1_r; - devcb_read32 m_gpio2_r; + devcb_write_line::array<96> m_gpio_w; required_device m_maincpu; required_device_array m_dmadac; required_device m_palette; - std::unique_ptr m_lcd_palette; // 0x100 - std::unique_ptr m_lcd_framebuffer; // 0x100000 - std::unique_ptr m_samples; // 0x1000 + std::unique_ptr m_lcd_palette; // 0x100 + std::unique_ptr m_lcd_framebuffer; // 0x100000 + std::unique_ptr m_samples; // 0x1000 }; DECLARE_DEVICE_TYPE(PXA255_PERIPHERALS, pxa255_periphs_device) diff --git a/src/devices/machine/pxa255defs.h b/src/devices/machine/pxa255defs.h deleted file mode 100644 index 424eeb0c53c9a..0000000000000 --- a/src/devices/machine/pxa255defs.h +++ /dev/null @@ -1,427 +0,0 @@ -// license:BSD-3-Clause -// copyright-holders:Ryan Holtz -/************************************************************************** - * - * Intel XScale PXA255 peripheral emulation defines - * - **************************************************************************/ - -#ifndef MAME_MACHINE_PXA255DEFS -#define MAME_MACHINE_PXA255DEFS - -#pragma once - -/* - PXA255 DMA controller - - pg. 151 to 182, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_DMA_BASE_ADDR (0x40000000) -#define PXA255_DCSR0 (PXA255_DMA_BASE_ADDR + 0x00000000) -#define PXA255_DCSR1 (PXA255_DMA_BASE_ADDR + 0x00000004) -#define PXA255_DCSR2 (PXA255_DMA_BASE_ADDR + 0x00000008) -#define PXA255_DCSR3 (PXA255_DMA_BASE_ADDR + 0x0000000c) -#define PXA255_DCSR4 (PXA255_DMA_BASE_ADDR + 0x00000010) -#define PXA255_DCSR5 (PXA255_DMA_BASE_ADDR + 0x00000014) -#define PXA255_DCSR6 (PXA255_DMA_BASE_ADDR + 0x00000018) -#define PXA255_DCSR7 (PXA255_DMA_BASE_ADDR + 0x0000001c) -#define PXA255_DCSR8 (PXA255_DMA_BASE_ADDR + 0x00000020) -#define PXA255_DCSR9 (PXA255_DMA_BASE_ADDR + 0x00000024) -#define PXA255_DCSR10 (PXA255_DMA_BASE_ADDR + 0x00000028) -#define PXA255_DCSR11 (PXA255_DMA_BASE_ADDR + 0x0000002c) -#define PXA255_DCSR12 (PXA255_DMA_BASE_ADDR + 0x00000030) -#define PXA255_DCSR13 (PXA255_DMA_BASE_ADDR + 0x00000034) -#define PXA255_DCSR14 (PXA255_DMA_BASE_ADDR + 0x00000038) -#define PXA255_DCSR15 (PXA255_DMA_BASE_ADDR + 0x0000003c) - #define PXA255_DCSR_RUN (0x80000000) - #define PXA255_DCSR_NODESCFETCH (0x40000000) - #define PXA255_DCSR_STOPIRQ (0x20000000) - #define PXA255_DCSR_REQPEND (0x00000100) - #define PXA255_DCSR_STOPSTATE (0x00000008) - #define PXA255_DCSR_ENDINTR (0x00000004) - #define PXA255_DCSR_STARTINTR (0x00000002) - #define PXA255_DCSR_BUSERRINTR (0x00000001) -#define PXA255_DINT (PXA255_DMA_BASE_ADDR + 0x000000f0) -#define PXA255_DRCMR0 (PXA255_DMA_BASE_ADDR + 0x00000100) -#define PXA255_DRCMR1 (PXA255_DMA_BASE_ADDR + 0x00000104) -#define PXA255_DRCMR2 (PXA255_DMA_BASE_ADDR + 0x00000108) -#define PXA255_DRCMR3 (PXA255_DMA_BASE_ADDR + 0x0000010c) -#define PXA255_DRCMR4 (PXA255_DMA_BASE_ADDR + 0x00000110) -#define PXA255_DRCMR5 (PXA255_DMA_BASE_ADDR + 0x00000114) -#define PXA255_DRCMR6 (PXA255_DMA_BASE_ADDR + 0x00000118) -#define PXA255_DRCMR7 (PXA255_DMA_BASE_ADDR + 0x0000011c) -#define PXA255_DRCMR8 (PXA255_DMA_BASE_ADDR + 0x00000120) -#define PXA255_DRCMR9 (PXA255_DMA_BASE_ADDR + 0x00000124) -#define PXA255_DRCMR10 (PXA255_DMA_BASE_ADDR + 0x00000128) -#define PXA255_DRCMR11 (PXA255_DMA_BASE_ADDR + 0x0000012c) -#define PXA255_DRCMR12 (PXA255_DMA_BASE_ADDR + 0x00000130) -#define PXA255_DRCMR13 (PXA255_DMA_BASE_ADDR + 0x00000134) -#define PXA255_DRCMR14 (PXA255_DMA_BASE_ADDR + 0x00000138) -#define PXA255_DRCMR15 (PXA255_DMA_BASE_ADDR + 0x0000013c) -#define PXA255_DRCMR16 (PXA255_DMA_BASE_ADDR + 0x00000140) -#define PXA255_DRCMR17 (PXA255_DMA_BASE_ADDR + 0x00000144) -#define PXA255_DRCMR18 (PXA255_DMA_BASE_ADDR + 0x00000148) -#define PXA255_DRCMR19 (PXA255_DMA_BASE_ADDR + 0x0000014c) -#define PXA255_DRCMR20 (PXA255_DMA_BASE_ADDR + 0x00000150) -#define PXA255_DRCMR21 (PXA255_DMA_BASE_ADDR + 0x00000154) -#define PXA255_DRCMR22 (PXA255_DMA_BASE_ADDR + 0x00000158) -#define PXA255_DRCMR23 (PXA255_DMA_BASE_ADDR + 0x0000015c) -#define PXA255_DRCMR24 (PXA255_DMA_BASE_ADDR + 0x00000160) -#define PXA255_DRCMR25 (PXA255_DMA_BASE_ADDR + 0x00000164) -#define PXA255_DRCMR26 (PXA255_DMA_BASE_ADDR + 0x00000168) -#define PXA255_DRCMR27 (PXA255_DMA_BASE_ADDR + 0x0000016c) -#define PXA255_DRCMR28 (PXA255_DMA_BASE_ADDR + 0x00000170) -#define PXA255_DRCMR29 (PXA255_DMA_BASE_ADDR + 0x00000174) -#define PXA255_DRCMR30 (PXA255_DMA_BASE_ADDR + 0x00000178) -#define PXA255_DRCMR31 (PXA255_DMA_BASE_ADDR + 0x0000017c) -#define PXA255_DRCMR32 (PXA255_DMA_BASE_ADDR + 0x00000180) -#define PXA255_DRCMR33 (PXA255_DMA_BASE_ADDR + 0x00000184) -#define PXA255_DRCMR34 (PXA255_DMA_BASE_ADDR + 0x00000188) -#define PXA255_DRCMR35 (PXA255_DMA_BASE_ADDR + 0x0000018c) -#define PXA255_DRCMR36 (PXA255_DMA_BASE_ADDR + 0x00000190) -#define PXA255_DRCMR37 (PXA255_DMA_BASE_ADDR + 0x00000194) -#define PXA255_DRCMR38 (PXA255_DMA_BASE_ADDR + 0x00000198) -#define PXA255_DRCMR39 (PXA255_DMA_BASE_ADDR + 0x0000019c) -#define PXA255_DDADR0 (PXA255_DMA_BASE_ADDR + 0x00000200) -#define PXA255_DSADR0 (PXA255_DMA_BASE_ADDR + 0x00000204) -#define PXA255_DTADR0 (PXA255_DMA_BASE_ADDR + 0x00000208) -#define PXA255_DCMD0 (PXA255_DMA_BASE_ADDR + 0x0000020c) -#define PXA255_DDADR1 (PXA255_DMA_BASE_ADDR + 0x00000210) -#define PXA255_DSADR1 (PXA255_DMA_BASE_ADDR + 0x00000214) -#define PXA255_DTADR1 (PXA255_DMA_BASE_ADDR + 0x00000218) -#define PXA255_DCMD1 (PXA255_DMA_BASE_ADDR + 0x0000021c) -#define PXA255_DDADR2 (PXA255_DMA_BASE_ADDR + 0x00000220) -#define PXA255_DSADR2 (PXA255_DMA_BASE_ADDR + 0x00000224) -#define PXA255_DTADR2 (PXA255_DMA_BASE_ADDR + 0x00000228) -#define PXA255_DCMD2 (PXA255_DMA_BASE_ADDR + 0x0000022c) -#define PXA255_DDADR3 (PXA255_DMA_BASE_ADDR + 0x00000230) -#define PXA255_DSADR3 (PXA255_DMA_BASE_ADDR + 0x00000234) -#define PXA255_DTADR3 (PXA255_DMA_BASE_ADDR + 0x00000238) -#define PXA255_DCMD3 (PXA255_DMA_BASE_ADDR + 0x0000023c) -#define PXA255_DDADR4 (PXA255_DMA_BASE_ADDR + 0x00000240) -#define PXA255_DSADR4 (PXA255_DMA_BASE_ADDR + 0x00000244) -#define PXA255_DTADR4 (PXA255_DMA_BASE_ADDR + 0x00000248) -#define PXA255_DCMD4 (PXA255_DMA_BASE_ADDR + 0x0000024c) -#define PXA255_DDADR5 (PXA255_DMA_BASE_ADDR + 0x00000250) -#define PXA255_DSADR5 (PXA255_DMA_BASE_ADDR + 0x00000254) -#define PXA255_DTADR5 (PXA255_DMA_BASE_ADDR + 0x00000258) -#define PXA255_DCMD5 (PXA255_DMA_BASE_ADDR + 0x0000025c) -#define PXA255_DDADR6 (PXA255_DMA_BASE_ADDR + 0x00000260) -#define PXA255_DSADR6 (PXA255_DMA_BASE_ADDR + 0x00000264) -#define PXA255_DTADR6 (PXA255_DMA_BASE_ADDR + 0x00000268) -#define PXA255_DCMD6 (PXA255_DMA_BASE_ADDR + 0x0000026c) -#define PXA255_DDADR7 (PXA255_DMA_BASE_ADDR + 0x00000270) -#define PXA255_DSADR7 (PXA255_DMA_BASE_ADDR + 0x00000274) -#define PXA255_DTADR7 (PXA255_DMA_BASE_ADDR + 0x00000278) -#define PXA255_DCMD7 (PXA255_DMA_BASE_ADDR + 0x0000027c) -#define PXA255_DDADR8 (PXA255_DMA_BASE_ADDR + 0x00000280) -#define PXA255_DSADR8 (PXA255_DMA_BASE_ADDR + 0x00000284) -#define PXA255_DTADR8 (PXA255_DMA_BASE_ADDR + 0x00000288) -#define PXA255_DCMD8 (PXA255_DMA_BASE_ADDR + 0x0000028c) -#define PXA255_DDADR9 (PXA255_DMA_BASE_ADDR + 0x00000290) -#define PXA255_DSADR9 (PXA255_DMA_BASE_ADDR + 0x00000294) -#define PXA255_DTADR9 (PXA255_DMA_BASE_ADDR + 0x00000298) -#define PXA255_DCMD9 (PXA255_DMA_BASE_ADDR + 0x0000029c) -#define PXA255_DDADR10 (PXA255_DMA_BASE_ADDR + 0x000002a0) -#define PXA255_DSADR10 (PXA255_DMA_BASE_ADDR + 0x000002a4) -#define PXA255_DTADR10 (PXA255_DMA_BASE_ADDR + 0x000002a8) -#define PXA255_DCMD10 (PXA255_DMA_BASE_ADDR + 0x000002ac) -#define PXA255_DDADR11 (PXA255_DMA_BASE_ADDR + 0x000002b0) -#define PXA255_DSADR11 (PXA255_DMA_BASE_ADDR + 0x000002b4) -#define PXA255_DTADR11 (PXA255_DMA_BASE_ADDR + 0x000002b8) -#define PXA255_DCMD11 (PXA255_DMA_BASE_ADDR + 0x000002bc) -#define PXA255_DDADR12 (PXA255_DMA_BASE_ADDR + 0x000002c0) -#define PXA255_DSADR12 (PXA255_DMA_BASE_ADDR + 0x000002c4) -#define PXA255_DTADR12 (PXA255_DMA_BASE_ADDR + 0x000002c8) -#define PXA255_DCMD12 (PXA255_DMA_BASE_ADDR + 0x000002cc) -#define PXA255_DDADR13 (PXA255_DMA_BASE_ADDR + 0x000002d0) -#define PXA255_DSADR13 (PXA255_DMA_BASE_ADDR + 0x000002d4) -#define PXA255_DTADR13 (PXA255_DMA_BASE_ADDR + 0x000002d8) -#define PXA255_DCMD13 (PXA255_DMA_BASE_ADDR + 0x000002dc) -#define PXA255_DDADR14 (PXA255_DMA_BASE_ADDR + 0x000002e0) -#define PXA255_DSADR14 (PXA255_DMA_BASE_ADDR + 0x000002e4) -#define PXA255_DTADR14 (PXA255_DMA_BASE_ADDR + 0x000002e8) -#define PXA255_DCMD14 (PXA255_DMA_BASE_ADDR + 0x000002ec) -#define PXA255_DDADR15 (PXA255_DMA_BASE_ADDR + 0x000002f0) - #define PXA255_DDADR_STOP (0x00000001) -#define PXA255_DSADR15 (PXA255_DMA_BASE_ADDR + 0x000002f4) -#define PXA255_DTADR15 (PXA255_DMA_BASE_ADDR + 0x000002f8) -#define PXA255_DCMD15 (PXA255_DMA_BASE_ADDR + 0x000002fc) - #define PXA255_DCMD_INCSRCADDR (0x80000000) - #define PXA255_DCMD_INCTRGADDR (0x40000000) - #define PXA255_DCMD_FLOWSRC (0x20000000) - #define PXA255_DCMD_FLOWTRG (0x10000000) - #define PXA255_DCMD_STARTIRQEN (0x00400000) - #define PXA255_DCMD_ENDIRQEN (0x00200000) - #define PXA255_DCMD_ENDIAN (0x00040000) - #define PXA255_DCMD_SIZE_SHIFT (16) - #define PXA255_DCMD_SIZE_MASK (0x00000003) - #define PXA255_DCMD_SIZE_0 (0x00000000) - #define PXA255_DCMD_SIZE_8 (0x00000001) - #define PXA255_DCMD_SIZE_16 (0x00000002) - #define PXA255_DCMD_SIZE_32 (0x00000003) - #define PXA255_DCMD_WIDTH (0x0000c000) - #define PXA255_DCMD_WIDTH_0 (0x00000000) - #define PXA255_DCMD_WIDTH_1 (0x00004000) - #define PXA255_DCMD_WIDTH_2 (0x00008000) - #define PXA255_DCMD_WIDTH_4 (0x0000c000) - -/* - - PXA255 Inter-Integrated-Circuit Sound (I2S) Controller - - pg. 489 to 504, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_I2S_BASE_ADDR (0x40400000) -#define PXA255_SACR0 (PXA255_I2S_BASE_ADDR + 0x00000000) - #define PXA255_SACR0_ENB (0x00000001) // Enable I2S function: 0 = Disable, 1 = Enable - #define PXA255_SACR0_BCKD (0x00000004) // Input/Output direction of BITCLK: 0 = Input, 1 = Output - #define PXA255_SACR0_RST (0x00000008) // Reset FIFO Logic and all registers: 0 = Not Reset, 1 = Reset is active - #define PXA255_SACR0_EFWR (0x00000010) // Special-purpose FIFO Write/Read Enable: 0 = Disable, 1 = Enable - #define PXA255_SACR0_STRF (0x00000020) // Select Transmit or Receive FIFO for EFWR-based special-purpose function: 0 = Xmit FIFO, 1 = Recv FIFO - #define PXA255_SACR0_TFTH (0x00000f00) // Transmit FIFO interrupt or DMA threshold - #define PXA255_SACR0_TFTH_S (8) - #define PXA255_SACR0_RFTH (0x0000f000) // Receive FIFO interrupt or DMA threshold - #define PXA255_SACR0_RFTH_S (12) -#define PXA255_SACR1 (PXA255_I2S_BASE_ADDR + 0x00000004) - #define PXA255_SACR1_AMSL (0x00000001) // Alternate Mode: 0 = I2S Operation Mode, 1 = MSB-Justified Operation Mode - #define PXA255_SACR1_DREC (0x00000008) // Disable Recording: 0 = Recording Function is enabled, 1 = Recording Function is disabled - #define PXA255_SACR1_DRPL (0x00000010) // Disable Replaying: 0 = Replaying Function is enabled, 1 = Recording Function is disabled - #define PXA255_SACR1_ENLBF (0x00000020) // Enable I2S/MSB Interface Loopback -#define PXA255_SASR0 (PXA255_I2S_BASE_ADDR + 0x0000000c) - #define PXA255_SASR0_TNF (0x00000001) - #define PXA255_SASR0_RNE (0x00000002) - #define PXA255_SASR0_BSY (0x00000004) - #define PXA255_SASR0_TFS (0x00000008) - #define PXA255_SASR0_RFS (0x00000010) - #define PXA255_SASR0_TUR (0x00000020) - #define PXA255_SASR0_ROR (0x00000040) - #define PXA255_SASR0_TFL (0x00000f00) - #define PXA255_SASR0_RFL (0x0000f000) -#define PXA255_SAIMR (PXA255_I2S_BASE_ADDR + 0x00000014) - #define PXA255_SAIMR_TFS (0x00000008) - #define PXA255_SAIMR_RFS (0x00000010) - #define PXA255_SAIMR_TUR (0x00000020) - #define PXA255_SAIMR_ROR (0x00000040) -#define PXA255_SAICR (PXA255_I2S_BASE_ADDR + 0x00000018) - #define PXA255_SAICR_TUR (0x00000020) - #define PXA255_SAICR_ROR (0x00000040) -#define PXA255_SADIV (PXA255_I2S_BASE_ADDR + 0x00000060) -#define PXA255_SADR (PXA255_I2S_BASE_ADDR + 0x00000080) - -/* - - PXA255 Real-Time Clock - - pg. 132 to 138, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_RTC_BASE_ADDR (0x40900000) -#define PXA255_RCNR (PXA255_RTC_BASE_ADDR + 0x00000000) -#define PXA255_RTAR (PXA255_RTC_BASE_ADDR + 0x00000004) -#define PXA255_RTSR (PXA255_RTC_BASE_ADDR + 0x00000008) -#define PXA255_RTTR (PXA255_RTC_BASE_ADDR + 0x0000000c) - -/* - - PXA255 OS Timer register - - pg. 138 to 142, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_OSTMR_BASE_ADDR (0x40a00000) -#define PXA255_OSMR0 (PXA255_OSTMR_BASE_ADDR + 0x00000000) -#define PXA255_OSMR1 (PXA255_OSTMR_BASE_ADDR + 0x00000004) -#define PXA255_OSMR2 (PXA255_OSTMR_BASE_ADDR + 0x00000008) -#define PXA255_OSMR3 (PXA255_OSTMR_BASE_ADDR + 0x0000000c) -#define PXA255_OSCR (PXA255_OSTMR_BASE_ADDR + 0x00000010) -#define PXA255_OSSR (PXA255_OSTMR_BASE_ADDR + 0x00000014) - #define PXA255_OSSR_M0 (0x00000001) - #define PXA255_OSSR_M1 (0x00000002) - #define PXA255_OSSR_M2 (0x00000004) - #define PXA255_OSSR_M3 (0x00000008) -#define PXA255_OWER (PXA255_OSTMR_BASE_ADDR + 0x00000018) -#define PXA255_OIER (PXA255_OSTMR_BASE_ADDR + 0x0000001c) - #define PXA255_OIER_E0 (0x00000001) - #define PXA255_OIER_E1 (0x00000002) - #define PXA255_OIER_E2 (0x00000004) - #define PXA255_OIER_E3 (0x00000008) - -/* - - PXA255 Interrupt registers - - pg. 124 to 132, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_INTC_BASE_ADDR (0x40d00000) -#define PXA255_ICIP (PXA255_INTC_BASE_ADDR + 0x00000000) -#define PXA255_ICMR (PXA255_INTC_BASE_ADDR + 0x00000004) -#define PXA255_ICLR (PXA255_INTC_BASE_ADDR + 0x00000008) -#define PXA255_ICFP (PXA255_INTC_BASE_ADDR + 0x0000000c) -#define PXA255_ICPR (PXA255_INTC_BASE_ADDR + 0x00000010) -#define PXA255_ICCR (PXA255_INTC_BASE_ADDR + 0x00000014) - -#define PXA255_INT_HUART (1 << 7) -#define PXA255_INT_GPIO0 (1 << 8) -#define PXA255_INT_GPIO1 (1 << 9) -#define PXA255_INT_GPIO84_2 (1 << 10) -#define PXA255_INT_USB (1 << 11) -#define PXA255_INT_PMU (1 << 12) -#define PXA255_INT_I2S (1 << 13) -#define PXA255_INT_AC97 (1 << 14) -#define PXA255_INT_NETWORK (1 << 16) -#define PXA255_INT_LCD (1 << 17) -#define PXA255_INT_I2C (1 << 18) -#define PXA255_INT_ICP (1 << 19) -#define PXA255_INT_STUART (1 << 20) -#define PXA255_INT_BTUART (1 << 21) -#define PXA255_INT_FFUART (1 << 22) -#define PXA255_INT_MMC (1 << 23) -#define PXA255_INT_SSP (1 << 24) -#define PXA255_INT_DMA (1 << 25) -#define PXA255_INT_OSTIMER0 (1 << 26) -#define PXA255_INT_OSTIMER1 (1 << 27) -#define PXA255_INT_OSTIMER2 (1 << 28) -#define PXA255_INT_OSTIMER3 (1 << 29) -#define PXA255_INT_RTC_HZ (1 << 30) -#define PXA255_INT_RTC_ALARM (1 << 31) - -/* - - PXA255 General-Purpose I/O registers - - pg. 105 to 124, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_GPIO_BASE_ADDR (0x40e00000) -#define PXA255_GPLR0 (PXA255_GPIO_BASE_ADDR + 0x00000000) -#define PXA255_GPLR1 (PXA255_GPIO_BASE_ADDR + 0x00000004) -#define PXA255_GPLR2 (PXA255_GPIO_BASE_ADDR + 0x00000008) -#define PXA255_GPDR0 (PXA255_GPIO_BASE_ADDR + 0x0000000c) -#define PXA255_GPDR1 (PXA255_GPIO_BASE_ADDR + 0x00000010) -#define PXA255_GPDR2 (PXA255_GPIO_BASE_ADDR + 0x00000014) -#define PXA255_GPSR0 (PXA255_GPIO_BASE_ADDR + 0x00000018) -#define PXA255_GPSR1 (PXA255_GPIO_BASE_ADDR + 0x0000001c) -#define PXA255_GPSR2 (PXA255_GPIO_BASE_ADDR + 0x00000020) -#define PXA255_GPCR0 (PXA255_GPIO_BASE_ADDR + 0x00000024) -#define PXA255_GPCR1 (PXA255_GPIO_BASE_ADDR + 0x00000028) -#define PXA255_GPCR2 (PXA255_GPIO_BASE_ADDR + 0x0000002c) -#define PXA255_GRER0 (PXA255_GPIO_BASE_ADDR + 0x00000030) -#define PXA255_GRER1 (PXA255_GPIO_BASE_ADDR + 0x00000034) -#define PXA255_GRER2 (PXA255_GPIO_BASE_ADDR + 0x00000038) -#define PXA255_GFER0 (PXA255_GPIO_BASE_ADDR + 0x0000003c) -#define PXA255_GFER1 (PXA255_GPIO_BASE_ADDR + 0x00000040) -#define PXA255_GFER2 (PXA255_GPIO_BASE_ADDR + 0x00000044) -#define PXA255_GEDR0 (PXA255_GPIO_BASE_ADDR + 0x00000048) -#define PXA255_GEDR1 (PXA255_GPIO_BASE_ADDR + 0x0000004c) -#define PXA255_GEDR2 (PXA255_GPIO_BASE_ADDR + 0x00000050) -#define PXA255_GAFR0_L (PXA255_GPIO_BASE_ADDR + 0x00000054) -#define PXA255_GAFR0_U (PXA255_GPIO_BASE_ADDR + 0x00000058) -#define PXA255_GAFR1_L (PXA255_GPIO_BASE_ADDR + 0x0000005c) -#define PXA255_GAFR1_U (PXA255_GPIO_BASE_ADDR + 0x00000060) -#define PXA255_GAFR2_L (PXA255_GPIO_BASE_ADDR + 0x00000064) -#define PXA255_GAFR2_U (PXA255_GPIO_BASE_ADDR + 0x00000068) - -/* - - PXA255 LCD Controller - - pg. 265 to 310, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_LCD_BASE_ADDR (0x44000000) -#define PXA255_LCCR0 (PXA255_LCD_BASE_ADDR + 0x00000000) - #define PXA255_LCCR0_OUM (0x00200000) - #define PXA255_LCCR0_BM (0x00100000) - #define PXA255_LCCR0_PDD (0x000ff000) - #define PXA255_LCCR0_QDM (0x00000800) - #define PXA255_LCCR0_DIS (0x00000400) - #define PXA255_LCCR0_DPD (0x00000200) - #define PXA255_LCCR0_PAS (0x00000080) - #define PXA255_LCCR0_EFM (0x00000040) - #define PXA255_LCCR0_IUM (0x00000020) - #define PXA255_LCCR0_SFM (0x00000010) - #define PXA255_LCCR0_LDM (0x00000008) - #define PXA255_LCCR0_SDS (0x00000004) - #define PXA255_LCCR0_CMS (0x00000002) - #define PXA255_LCCR0_ENB (0x00000001) -#define PXA255_LCCR1 (PXA255_LCD_BASE_ADDR + 0x00000004) - #define PXA255_LCCR1_PPL (0x000003ff) -#define PXA255_LCCR2 (PXA255_LCD_BASE_ADDR + 0x00000008) - #define PXA255_LCCR2_LPP (0x000003ff) -#define PXA255_LCCR3 (PXA255_LCD_BASE_ADDR + 0x0000000c) -#define PXA255_FBR0 (PXA255_LCD_BASE_ADDR + 0x00000020) - #define PXA255_FBR_BAR (0x00000001) - #define PXA255_FBR_BINT (0x00000003) -#define PXA255_FBR1 (PXA255_LCD_BASE_ADDR + 0x00000024) -#define PXA255_LCSR (PXA255_LCD_BASE_ADDR + 0x00000038) - #define PXA255_LCSR_LDD (0x00000001) - #define PXA255_LCSR_SOF (0x00000002) - #define PXA255_LCSR_BER (0x00000004) - #define PXA255_LCSR_ABC (0x00000008) - #define PXA255_LCSR_IUL (0x00000010) - #define PXA255_LCSR_IUU (0x00000020) - #define PXA255_LCSR_OU (0x00000040) - #define PXA255_LCSR_QD (0x00000080) - #define PXA255_LCSR_EOF (0x00000100) - #define PXA255_LCSR_BS (0x00000200) - #define PXA255_LCSR_SINT (0x00000400) -#define PXA255_LIIDR (PXA255_LCD_BASE_ADDR + 0x0000003c) -#define PXA255_TRGBR (PXA255_LCD_BASE_ADDR + 0x00000040) -#define PXA255_TCR (PXA255_LCD_BASE_ADDR + 0x00000044) -#define PXA255_FDADR0 (PXA255_LCD_BASE_ADDR + 0x00000200) -#define PXA255_FSADR0 (PXA255_LCD_BASE_ADDR + 0x00000204) -#define PXA255_FIDR0 (PXA255_LCD_BASE_ADDR + 0x00000208) -#define PXA255_LDCMD0 (PXA255_LCD_BASE_ADDR + 0x0000020c) - #define PXA255_LDCMD_EOFINT (0x00200000) - #define PXA255_LDCMD_SOFINT (0x00400000) - #define PXA255_LDCMD_PAL (0x04000000) -#define PXA255_FDADR1 (PXA255_LCD_BASE_ADDR + 0x00000210) -#define PXA255_FSADR1 (PXA255_LCD_BASE_ADDR + 0x00000214) -#define PXA255_FIDR1 (PXA255_LCD_BASE_ADDR + 0x00000218) -#define PXA255_LDCMD1 (PXA255_LCD_BASE_ADDR + 0x0000021c) - -/* - PXA255 Power controller - - pg. 85 to 96, PXA255 Processor Developers Manual [278693-002].pdf -*/ - -#define PXA255_POWER_BASE_ADDR (0x40f00000) -#define PXA255_PMCR (PXA255_POWER_BASE_ADDR + 0x00000000) -#define PXA255_PSSR (PXA255_POWER_BASE_ADDR + 0x00000004) -#define PXA255_PSPR (PXA255_POWER_BASE_ADDR + 0x00000008) -#define PXA255_PWER (PXA255_POWER_BASE_ADDR + 0x0000000c) -#define PXA255_PRER (PXA255_POWER_BASE_ADDR + 0x00000010) -#define PXA255_PFER (PXA255_POWER_BASE_ADDR + 0x00000014) -#define PXA255_PEDR (PXA255_POWER_BASE_ADDR + 0x00000018) -#define PXA255_PCFR (PXA255_POWER_BASE_ADDR + 0x0000001c) -#define PXA255_PGSR0 (PXA255_POWER_BASE_ADDR + 0x00000020) -#define PXA255_PGSR1 (PXA255_POWER_BASE_ADDR + 0x00000024) -#define PXA255_PGSR2 (PXA255_POWER_BASE_ADDR + 0x00000028) -#define PXA255_RCSR (PXA255_POWER_BASE_ADDR + 0x00000030) -#define PXA255_PMFW (PXA255_POWER_BASE_ADDR + 0x00000034) - -/* - PXA255 Clock controller - - pg. 96 to 100, PXA255 Processor Developers Manual [278693-002].pdf - -*/ - -#define PXA255_CLOCKS_BASE_ADDR (0x41300000) -#define PXA255_CCCR (PXA255_CLOCKS_BASE_ADDR + 0x00000000) -#define PXA255_CKEN (PXA255_CLOCKS_BASE_ADDR + 0x00000004) -#define PXA255_OSCC (PXA255_CLOCKS_BASE_ADDR + 0x00000008) - -#endif // MAME_MACHINE_PXA255DEFS diff --git a/src/devices/machine/t10mmc.cpp b/src/devices/machine/t10mmc.cpp index b597c27a4af1c..7797156f82357 100644 --- a/src/devices/machine/t10mmc.cpp +++ b/src/devices/machine/t10mmc.cpp @@ -1273,19 +1273,15 @@ void t10mmc::ReadData( uint8_t *data, int dataLength ) data[ptr++] = 0x8e; // page E, parameter is savable data[ptr++] = 0x0e; // page length data[ptr++] = (1 << 2) | (m_sotc << 1); // IMMED = 1 - ptr += 6; // skip reserved bytes - // connect each audio channel to 1 output port + ptr += 5; // skip reserved bytes + // connect each audio channel to 1 output port and indicate max volume data[ptr++] = 1; - data[ptr++] = 2; - data[ptr++] = 4; - data[ptr++] = 8; - // indicate max volume data[ptr++] = 0xff; - ptr++; + data[ptr++] = 2; data[ptr++] = 0xff; - ptr++; + data[ptr++] = 4; data[ptr++] = 0xff; - ptr++; + data[ptr++] = 8; data[ptr++] = 0xff; } @@ -1383,6 +1379,9 @@ void t10mmc::WriteData( uint8_t *data, int dataLength ) m_device->logerror("Ch 1 route: %x vol: %x\n", data[10], data[11]); m_device->logerror("Ch 2 route: %x vol: %x\n", data[12], data[13]); m_device->logerror("Ch 3 route: %x vol: %x\n", data[14], data[15]); + + // TODO: CDDA audio channels and output port should be separate + // The actual audio channel that gets sent to the output port is configurable and more than one audio channel can go to an output port m_cdda->set_output_gain(0, data[9] / 255.0f); m_cdda->set_output_gain(1, data[11] / 255.0f); break; diff --git a/src/devices/sound/swp00.cpp b/src/devices/sound/swp00.cpp index 830baba8e0afa..d1936fd9c6fbc 100644 --- a/src/devices/sound/swp00.cpp +++ b/src/devices/sound/swp00.cpp @@ -567,8 +567,8 @@ template void swp00_device::lpf_info_w(offs_t offset, u8 data) if(m_lpf_info[chan] == old) return; - // if(!sel) - // logerror("lpf_info[%02x] = %04x\n", chan, m_lpf_info[chan]); + // if(!sel) + // logerror("lpf_info[%02x] = %04x\n", chan, m_lpf_info[chan]); u32 fb = m_lpf_info[chan] >> 11; u32 level = m_lpf_info[chan] & 0x7ff; @@ -593,7 +593,7 @@ void swp00_device::lpf_speed_w(offs_t offset, u8 data) return; m_stream->update(); m_lpf_speed[chan] = data; - // logerror("lpf_speed[%02x] = %02x\n", chan, m_lpf_speed[chan]); + // logerror("lpf_speed[%02x] = %02x\n", chan, m_lpf_speed[chan]); } u8 swp00_device::lpf_speed_r(offs_t offset) @@ -609,7 +609,7 @@ void swp00_device::lfo_famod_depth_w(offs_t offset, u8 data) return; m_stream->update(); m_lfo_famod_depth[chan] = data; - // logerror("lfo_famod_depth[%02x] = %02x\n", chan, m_lfo_famod_depth[chan]); + // logerror("lfo_famod_depth[%02x] = %02x\n", chan, m_lfo_famod_depth[chan]); } u8 swp00_device::lfo_famod_depth_r(offs_t offset) @@ -625,7 +625,7 @@ void swp00_device::rev_level_w(offs_t offset, u8 data) return; m_stream->update(); m_rev_level[chan] = data; - // logerror("rev_level[%02x] = %02x\n", chan, m_rev_level[chan]); + // logerror("rev_level[%02x] = %02x\n", chan, m_rev_level[chan]); } u8 swp00_device::rev_level_r(offs_t offset) @@ -641,7 +641,7 @@ void swp00_device::dry_level_w(offs_t offset, u8 data) return; m_stream->update(); m_dry_level[chan] = data; - // logerror("dry_level[%02x] = %02x\n", chan, m_dry_level[chan]); + // logerror("dry_level[%02x] = %02x\n", chan, m_dry_level[chan]); } u8 swp00_device::dry_level_r(offs_t offset) @@ -657,7 +657,7 @@ void swp00_device::cho_level_w(offs_t offset, u8 data) return; m_stream->update(); m_cho_level[chan] = data; - // logerror("cho_level[%02x] = %02x\n", chan, m_cho_level[chan]); + // logerror("cho_level[%02x] = %02x\n", chan, m_cho_level[chan]); } u8 swp00_device::cho_level_r(offs_t offset) @@ -673,7 +673,7 @@ void swp00_device::var_level_w(offs_t offset, u8 data) return; m_stream->update(); m_var_level[chan] = data; - // logerror("var_level[%02x] = %02x\n", chan, m_var_level[chan]); + // logerror("var_level[%02x] = %02x\n", chan, m_var_level[chan]); } u8 swp00_device::var_level_r(offs_t offset) @@ -688,7 +688,7 @@ void swp00_device::glo_level_w(offs_t offset, u8 data) if(m_glo_level[chan] == data) return; m_glo_level[chan] = data; - // logerror("glo_level[%02x] = %02x\n", chan, m_glo_level[chan]); + // logerror("glo_level[%02x] = %02x\n", chan, m_glo_level[chan]); } u8 swp00_device::glo_level_r(offs_t offset) @@ -704,7 +704,7 @@ void swp00_device::panning_w(offs_t offset, u8 data) return; m_stream->update(); m_panning[chan] = data; - // logerror("panning[%02x] = %02x\n", chan, m_panning[chan]); + // logerror("panning[%02x] = %02x\n", chan, m_panning[chan]); } u8 swp00_device::panning_r(offs_t offset) @@ -790,8 +790,8 @@ template void swp00_device::pitch_w(offs_t offset, u8 data) m_pitch[chan] = (m_pitch[chan] & ~(0xff << (8*sel))) | (data << (8*sel)); if(m_pitch[chan] == old) return; - // if(!sel) - // logerror("pitch[%02x] = %04x\n", chan, m_pitch[chan]); + // if(!sel) + // logerror("pitch[%02x] = %04x\n", chan, m_pitch[chan]); } template u8 swp00_device::pitch_r(offs_t offset) @@ -806,8 +806,8 @@ template void swp00_device::sample_start_w(offs_t offset, u8 data) m_stream->update(); m_sample_start[chan] = (m_sample_start[chan] & ~(0xff << (8*sel))) | (data << (8*sel)); - // if(!sel) - // logerror("sample_start[%02x] = %04x\n", chan, m_sample_start[chan]); + // if(!sel) + // logerror("sample_start[%02x] = %04x\n", chan, m_sample_start[chan]); } template u8 swp00_device::sample_start_r(offs_t offset) @@ -822,8 +822,8 @@ template void swp00_device::sample_end_w(offs_t offset, u8 data) m_stream->update(); m_sample_end[chan] = (m_sample_end[chan] & ~(0xff << (8*sel))) | (data << (8*sel)); - // if(!sel) - // logerror("sample_end[%02x] = %04x\n", chan, m_sample_end[chan]); + // if(!sel) + // logerror("sample_end[%02x] = %04x\n", chan, m_sample_end[chan]); } template u8 swp00_device::sample_end_r(offs_t offset) @@ -838,7 +838,7 @@ void swp00_device::sample_dec_and_format_w(offs_t offset, u8 data) m_stream->update(); m_sample_dec_and_format[chan] = data; - // logerror("sample_dec_and_format[%02x] = %02x\n", chan, m_sample_dec_and_format[chan]); + // logerror("sample_dec_and_format[%02x] = %02x\n", chan, m_sample_dec_and_format[chan]); } u8 swp00_device::sample_dec_and_format_r(offs_t offset) @@ -853,8 +853,8 @@ template void swp00_device::sample_address_w(offs_t offset, u8 data) m_stream->update(); m_sample_address[chan] = (m_sample_address[chan] & ~(0xff << (8*sel))) | (data << (8*sel)); - // if(!sel) - // logerror("sample_address[%02x] = %04x\n", chan, m_sample_address[chan]); + // if(!sel) + // logerror("sample_address[%02x] = %04x\n", chan, m_sample_address[chan]); } template u8 swp00_device::sample_address_r(offs_t offset) @@ -871,7 +871,7 @@ void swp00_device::lfo_step_w(offs_t offset, u8 data) m_stream->update(); m_lfo_step[chan] = data; - // logerror("lfo_step[%02x] = %02x\n", chan, m_lfo_step[chan]); + // logerror("lfo_step[%02x] = %02x\n", chan, m_lfo_step[chan]); } u8 swp00_device::lfo_step_r(offs_t offset) @@ -888,7 +888,7 @@ void swp00_device::lfo_pmod_depth_w(offs_t offset, u8 data) m_stream->update(); m_lfo_pmod_depth[chan] = data; - // logerror("lfo_pmod_depth[%02x] = %02x\n", chan, m_lfo_pmod_depth[chan]); + // logerror("lfo_pmod_depth[%02x] = %02x\n", chan, m_lfo_pmod_depth[chan]); } u8 swp00_device::lfo_pmod_depth_r(offs_t offset) @@ -1136,7 +1136,7 @@ template s32 swp00_device::delay_block::rlfo(int offreg, u32 s32 val0 = m_buffer[pos & (size - 1)]; s32 val1 = m_buffer[(pos + 1) & (size - 1)]; - // fprintf(stderr, "lfo %02x %x %x\n", offreg, val0, val1); + // fprintf(stderr, "lfo %02x %x %x\n", offreg, val0, val1); return s32((val1 * s64(lfo_i_frac) + val0 * s64(0x400000 - lfo_i_frac)) >> 22); } @@ -1151,7 +1151,7 @@ template s32 swp00_device::delay_block::rlfo2(int offreg, s32 s32 val0 = m_buffer[pos & (size - 1)]; s32 val1 = m_buffer[(pos + 1) & (size - 1)]; - // fprintf(stderr, "lfo %02x %x %x\n", offreg, val0, val1); + // fprintf(stderr, "lfo %02x %x %x\n", offreg, val0, val1); return s32((val1 * s64(lfo_i_frac) + val0 * s64(0x800 - lfo_i_frac)) >> 11); } diff --git a/src/devices/sound/swp20.cpp b/src/devices/sound/swp20.cpp index 3767f3af11ed1..947d2bb8b0a5b 100644 --- a/src/devices/sound/swp20.cpp +++ b/src/devices/sound/swp20.cpp @@ -122,8 +122,8 @@ template void swp20_device::sample_start_w(u8 data) m_stream->update(); m_sample_start[m_voice] = (m_sample_start[m_voice] & ~(0xff << (8*sel))) | (data << (8*sel)); - // if(!sel) - // logerror("sample_start[%02x] = %04x\n", m_voice, m_sample_start[m_voice]); + // if(!sel) + // logerror("sample_start[%02x] = %04x\n", m_voice, m_sample_start[m_voice]); } template u8 swp20_device::sample_start_r() @@ -136,8 +136,8 @@ template void swp20_device::sample_end_w(u8 data) m_stream->update(); m_sample_end[m_voice] = (m_sample_end[m_voice] & ~(0xff << (8*sel))) | (data << (8*sel)); - // if(!sel) - // logerror("sample_end[%02x] = %04x\n", m_voice, m_sample_end[m_voice]); + // if(!sel) + // logerror("sample_end[%02x] = %04x\n", m_voice, m_sample_end[m_voice]); } template u8 swp20_device::sample_end_r() @@ -185,7 +185,7 @@ void swp20_device::eq_w(u8 data) u8 swp20_device::snd_r(offs_t offset) { - // logerror("r %02x %s\n", offset, machine().describe_context()); + // logerror("r %02x %s\n", offset, machine().describe_context()); return 0; } diff --git a/src/devices/sound/swp30.cpp b/src/devices/sound/swp30.cpp index d7b8308288ce8..265f1fc3ce9df 100644 --- a/src/devices/sound/swp30.cpp +++ b/src/devices/sound/swp30.cpp @@ -862,7 +862,7 @@ u16 swp30_device::lfo_step_pmod_r(offs_t offset) void swp30_device::lfo_step_pmod_w(offs_t offset, u16 data) { - // logerror("lfo_step_pmod[%02x] = %04x\n", offset >> 6, data); + // logerror("lfo_step_pmod[%02x] = %04x\n", offset >> 6, data); m_lfo_step_pmod[offset >> 6] = data; } @@ -873,7 +873,7 @@ u16 swp30_device::lfo_amod_r(offs_t offset) void swp30_device::lfo_amod_w(offs_t offset, u16 data) { - // logerror("lfo_amod[%02x] = %04x\n", offset >> 6, data); + // logerror("lfo_amod[%02x] = %04x\n", offset >> 6, data); m_lfo_amod[offset >> 6] = data; } @@ -1012,7 +1012,7 @@ template u16 swp30_device::meg_lfo_r(offs_t offset) template void swp30_device::meg_lfo_w(offs_t offset, u16 data) { - int slot = (offset >> 6)*2 + sel; + int slot = (offset >> 6)*2 + sel; m_meg_lfo[slot] = data; static const int dt[8] = { 0, 32, 64, 128, 256, 512, 1024, 2048 }; @@ -1218,7 +1218,7 @@ void swp30_device::execute_run() lfo_p_phase = lfo_a_phase = 0; // First, read the sample - + // - Find the base sample index and base address s32 sample_pos = m_sample_pos[chan]; if(m_sample_end[chan] & 0x80000000) @@ -1226,7 +1226,7 @@ void swp30_device::execute_run() s32 spos = sample_pos >> 8; offs_t base_address = m_sample_address[chan] & 0x1ffffff; - + // - Read/decompress the sample s16 val0, val1; switch(m_sample_address[chan] >> 30) { @@ -1452,7 +1452,7 @@ void swp30_device::execute_run() else m_decay2_done[chan] = fpstep(m_envelope_level[chan], (m_decay2[chan] & 0xff) << 20, m_global_step[(m_decay2[chan] >> 8) & 0x7f]); break; - + case RELEASE: if((m_release_glo[chan] & 0x6000) == 0x6000) { if(fpstep(m_envelope_level[chan], 0x8000000, decay_linear_step[(m_release_glo[chan] >> 8) & 0x1f])) @@ -1551,7 +1551,7 @@ void swp30_device::execute_run() } } } - + debugger_instruction_hook(m_meg_pc); m_icount --; m_meg_pc ++; diff --git a/src/devices/sound/upd933.cpp b/src/devices/sound/upd933.cpp index 8b9ae286b1bec..6167ec2a3c172 100644 --- a/src/devices/sound/upd933.cpp +++ b/src/devices/sound/upd933.cpp @@ -115,6 +115,9 @@ void upd933_device::device_reset() m_sample_count = 0; m_last_sample = 0; + + m_irq_timer->adjust(attotime::never); + m_irq_cb(0); } /**************************************************************************/ @@ -153,23 +156,35 @@ void upd933_device::id_w(int state) } /**************************************************************************/ -u8 upd933_device::irq_data() const +u8 upd933_device::irq_data() { // TODO: do these have the correct priority? for (int i = 0; i < 8; i++) { if (m_dco[i].m_irq) + { + if (!machine().side_effects_disabled()) + m_dco[i].m_irq = false; return 4 | (i << 3); + } } for (int i = 0; i < 8; i++) { if (m_dcw[i].m_irq) + { + if (!machine().side_effects_disabled()) + m_dcw[i].m_irq = false; return 2 | (i << 2); + } } for (int i = 0; i < 8; i++) { if (m_dca[i].m_irq) + { + if (!machine().side_effects_disabled()) + m_dca[i].m_irq = false; return 1 | (i << 1); + } } return 0; } @@ -184,14 +199,14 @@ void upd933_device::update_pending_irq() for (int i = 0; i < 8; i++) { env_active |= (m_dca[i].calc_timeout(new_time) - | m_dco[i].calc_timeout(new_time) - | m_dcw[i].calc_timeout(new_time)); + | m_dco[i].calc_timeout(new_time) + | m_dcw[i].calc_timeout(new_time)); } - if (!new_time) - m_irq_pending = 1; - else if (env_active) + if (env_active) m_irq_timer->adjust(clocks_to_attotime((u64)new_time * CLOCKS_PER_SAMPLE)); + else + m_irq_timer->adjust(attotime::never); } /**************************************************************************/ @@ -223,6 +238,7 @@ void upd933_device::write(u8 data) { m_stream->update(); + bool ok = true; const u8 reg = m_sound_data[0]; const u16 value = m_sound_regs[reg] = (m_sound_data[1] << 8) | data; @@ -310,10 +326,13 @@ void upd933_device::write(u8 data) else voice.m_wave[1] = voice.m_wave[0]; voice.m_window = BIT(value, 6, 3); - // see earlier comment - these bits actually control a different voice - mod_voice.m_ring_mod = BIT(value, 5); - mod_voice.m_pitch_mod = BIT(value, 3, 2); - mod_voice.m_mute_other = BIT(value, 2); + if (!BIT(vnum, 0)) + { + // see earlier comment - these bits actually control a different voice + mod_voice.m_ring_mod = BIT(value, 5); + mod_voice.m_pitch_mod = BIT(value, 3, 2); + mod_voice.m_mute_other = BIT(value, 2); + } break; case 0x13: // 98-9f: phase counter @@ -324,11 +343,20 @@ void upd933_device::write(u8 data) voice.m_position = value << (PITCH_SHIFT - 4); break; + case 0x17: // b8-bb: pitch modulator (probably - cz1 sets to zero when disabling noise) + if (vnum < 4) + m_voice[vnum << 1].m_pm_level = (s16)value; + else + ok = false; + break; + default: - logerror("%s: unknown sound reg write: %02x %04x\n", - machine().describe_context(), reg, value); + ok = false; break; } + + if (!ok) + logerror("%s: unknown sound reg write: %02x %04x\n", machine().describe_context(), reg, value); } else { @@ -554,19 +582,19 @@ void upd933_device::env_t::update() } if (!m_sustain && (m_current == m_target)) - m_irq = true; + m_irq = m_sustain = true; // set sustain too to make sure this only causes an interrupt once } /**************************************************************************/ bool upd933_device::env_t::calc_timeout(unsigned &samples) { - if (m_sustain || !m_rate) + if (m_irq) { - return false; + samples = 0; } - else if (m_irq) + else if (m_sustain || !m_rate) { - samples = 0; + return false; } else { diff --git a/src/devices/sound/upd933.h b/src/devices/sound/upd933.h index 7c2747a654aa0..b4023fb831143 100644 --- a/src/devices/sound/upd933.h +++ b/src/devices/sound/upd933.h @@ -67,7 +67,7 @@ class upd933_device : public device_t, public device_sound_interface TIMER_CALLBACK_MEMBER(timer_tick); s16 update(int vnum); - u8 irq_data() const; + u8 irq_data(); void update_pending_irq(); void update_irq(); diff --git a/src/devices/video/hd44780.cpp b/src/devices/video/hd44780.cpp index a56273b66e4ab..ade4187a02761 100644 --- a/src/devices/video/hd44780.cpp +++ b/src/devices/video/hd44780.cpp @@ -5,9 +5,116 @@ Hitachi HD44780 LCD controller TODO: - - dump internal CGROM - - emulate osc pin, determine video timings and busy flag duration from it, - and if possible, remove m_busy_factor + - dump internal CGROM via decap + - finish emulating osc pin: determine video timings from it, + and if possible, remove m_busy_factor + The internal oscillator is known to be based on the value of the resistor + Rf, presumably (based on the HD44780U datasheet diagrams) with an + equation close to this: + For 5V power, Frequency in Hz = 1 / (2 * PI * Rf * 6.5pF) + For 3V power, Frequency in Hz = 1 / (2 * PI * Rf * 7.86pF) + The vast majority of devices use the internal oscillator with an Rf + resistor of 91kOhms, for ~270kHz clock speed. + However, a few Hitachi-made LCD modules use an Rf resistor of + 200kOhms instead, for a ~122.4kHz clock speed, and it isn't clear + why they did this, as it is lower than the minimum intended clock + speed on the datasheet. + DONE + - busy flag durations in clock cycles + - blink timing in clock cycles + + BUSY TIMINGS: + Manufacturer: Hitachi Epson Samsung + Device: HD44780 SED1278 KS0066+S6A0069 + Clear display: 410 cycles 410 cycles 410 cycles + Return Home: 410 cycles 410 cycles 410 cycles + Entry Mode: 10 cycles 10 cycles 10 cycles + Display on/off: 10 cycles 10 cycles 10 cycles + Cursor/Display Shift: 10 cycles 10 cycles 10 cycles + Function Set: 10 cycles 10 cycles 10 cycles + Set CGRAM: 10 cycles 10 cycles 10 cycles + Set DDRAM: 10 cycles 10 cycles 10 cycles + Data Write: 10 cycles[1] 10 cycles 11 cycles + Data Read: 10 cycles[1] 10 cycles 11 cycles[2,3] + Blink Invert Rate: 102400 cycles 102400 cycles ? cycles[4] + [1] HD44780 bug: BUSY is only active for 10 cycles, but the ac inc/dec on + data read or write happens on the 11th cycle. + This bug is documented in the later HD44780U datasheet, as well as in + the SED1278 datasheet to note the bug is fixed there. + We do not emulate this bug, but emulate as SED1278 where it is fixed. + [2] KS0066 bug: a Data read from CGRAM after a CGRAM write + + increment/decrement has completed will read the previous byte, not + the new one the address counter now points to! + This bug is documented in the datasheet. + [3] S6A0069 note: the first data read from CGRAM must have a set address + command or a display shift command sent before the read command, or + it will instead return the potentially garbage data that was most + recently put into the read buffer register as the serially-accessed + ram hasn't had a chance to fully complete a serial cycle and update + said buffer. Also, if the AC direction has not been explicitly set + beforehand by a display shift command, the byte address + auto-increment vs auto-decrement might be doing either one randomly + after power-up. + In short, this documentation change plus some minor behavior change + "fixes" the bug of the KS0066, with the above caveat. + [4] In all likelyhood, this is almost certainly 102400 for compatibility + with the original HD44780A00 + + Known HD44780-compatible clones: + Epson SED1278 + Samsung KS0066[U] + Samsung S6A0069 (equivalent to KS0066U?) + Sitronix ST7066U + Sunplus SPLC780C (timings equivalent to SED1278?) + + Possibly compatible clones: + Toshiba T1719A (may be custom for Brother) + + Similar, but not quite compatible variants: + Hitachi HD66780 LCD-IIA (more or less the same as 44780 but has a + different LCD driver waveform, and like 44780 has + 16 Common/40 Segment drivers) + Samsung KS0073 (uses different DPRAM memory mapping than HD44780, and + has 34 Common/64 Segment drivers; it also has a low power mode and + 6-pixel character width modes) + Samsung S6A0073 (equivalent to KS0073) + Novatek NT7603 (clocked at twice the speed, has different LCD driver + waveforms, and has 16 Common/80 Segment drivers) + Novatek NT7605 (clocked at twice the speed, has different LCD driver + waveforms, and has 16 Common/100 Segment drivers) + Solomon Systech SSD1803 (2.7-3.45V only, 34 Common/100 Segment drivers, + has a 6-pixel character width mode, and when in 4-line mode, has a + memory map like KS0073; has two unique CGROMs) + + + Character set equivalency: + Hitachi Samsung Epson Sitronix Sunplus [Supported] + HD44780A00 KS0066F00 SED1278F0A ST7066-0A SPLC780C-01 Y + HD44780UA00 Y + HD44780UA01 + SPLC780C-17 + HD44780UA02 ST7066-0R Y + SED1278F0H ST7066-0T SPLC780C-02 + SED1278F0B ST7066-0B SPLC780C-03 Y + KS0066F03 SPLC780C-08 + KS0066F04 SPLC780C-13 + KS0066F05 ST7066-0E SPLC780C-11 Y + KS0066F06 SPLC780C-12 + ST7066-1G SPLC780C-14 + SPLC780C-15 + SPLC780C-19 + SED1278F0C + KS0066F59 SED1278F0E + SED1278F0G SPLC780C-18 + + + DPRAM 80-byte wrap behavior is based on increment/decrement: + In 1-line mode: + 4E 4F 00 01 02 ... 4D 4E 4F 00 01 02 ... + + In 2-line mode: + L1: 26 27 00 01 02 ... 24 25 26 27 00 01 02 ... + L2: 66 67 40 41 42 ... 64 65 66 67 40 41 42 ... ***************************************************************************/ @@ -86,6 +193,8 @@ ROM_START( ks0066 ) ROM_END +// TODO: Sitronix and Sunplus devices/variants + //************************************************************************** // live device //************************************************************************** @@ -165,7 +274,6 @@ void hd44780_device::device_start() m_busy_timer = timer_alloc(FUNC(hd44780_device::clear_busy_flag), this); m_blink_timer = timer_alloc(FUNC(hd44780_device::blink_tick), this); - m_blink_timer->adjust(attotime::from_msec(409), 0, attotime::from_msec(409)); // state saving save_item(NAME(m_busy_factor)); @@ -223,12 +331,26 @@ void hd44780_device::device_reset() m_rs_state = 0; m_rw_state = 0; - set_busy_flag(1520); + set_busy_flag(410); +} + +//------------------------------------------------- +// device_clock_changed +//------------------------------------------------- + +void hd44780_device::device_clock_changed() +{ + // (re)adjust blink timer + attotime period = attotime::from_ticks(102400, clock()); // blink happens every 102400 cycles + attotime remain = m_blink_timer->remaining(); + + m_blink_timer->adjust((remain > period) ? period : remain, 0, period); } //------------------------------------------------- // device validity check //------------------------------------------------- + void hd44780_device::device_validity_check(validity_checker &valid) const { if (clock() == 0) @@ -254,12 +376,10 @@ TIMER_CALLBACK_MEMBER(hd44780_device::blink_tick) // HELPERS //************************************************************************** -void hd44780_device::set_busy_flag(uint16_t usec) +void hd44780_device::set_busy_flag(uint16_t cycles) { m_busy_flag = true; - - usec = float(usec) * m_busy_factor + 0.5; - m_busy_timer->adjust(attotime::from_usec(usec)); + m_busy_timer->adjust(attotime::from_ticks(cycles, clock() / m_busy_factor)); } void hd44780_device::correct_ac() @@ -519,7 +639,7 @@ void hd44780_device::control_write(u8 data) m_active_ram = DDRAM; m_ac = m_ir & 0x7f; correct_ac(); - set_busy_flag(37); + set_busy_flag(10); LOG("HD44780: set DDRAM address %x\n", m_ac); return; @@ -529,7 +649,7 @@ void hd44780_device::control_write(u8 data) // set CGRAM address m_active_ram = CGRAM; m_ac = m_ir & 0x3f; - set_busy_flag(37); + set_busy_flag(10); LOG("HD44780: set CGRAM address %x\n", m_ac); return; @@ -548,7 +668,7 @@ void hd44780_device::control_write(u8 data) m_data_len = BIT(m_ir, 4) ? 8 : 4; m_num_line = BIT(m_ir, 3) + 1; correct_ac(); - set_busy_flag(37); + set_busy_flag(10); LOG("HD44780: char size 5x%d, data len %d, lines %d\n", m_char_size, m_data_len, m_num_line); return; @@ -565,7 +685,7 @@ void hd44780_device::control_write(u8 data) else update_ac(direction); - set_busy_flag(37); + set_busy_flag(10); } else if (BIT(m_ir, 3)) { @@ -573,7 +693,7 @@ void hd44780_device::control_write(u8 data) m_display_on = BIT(m_ir, 2); m_cursor_on = BIT(m_ir, 1); m_blink_on = BIT(m_ir, 0); - set_busy_flag(37); + set_busy_flag(10); LOG("HD44780: display %d, cursor %d, blink %d\n", m_display_on, m_cursor_on, m_blink_on); } @@ -582,7 +702,7 @@ void hd44780_device::control_write(u8 data) // entry mode set m_direction = (BIT(m_ir, 1)) ? +1 : -1; m_shift_on = BIT(m_ir, 0); - set_busy_flag(37); + set_busy_flag(10); LOG("HD44780: entry mode set: direction %d, shift %d\n", m_direction, m_shift_on); } @@ -595,7 +715,7 @@ void hd44780_device::control_write(u8 data) m_active_ram = DDRAM; m_direction = 1; m_disp_shift = 0; - set_busy_flag(1520); + set_busy_flag(410); } else if (BIT(m_ir, 0)) { @@ -607,7 +727,7 @@ void hd44780_device::control_write(u8 data) m_direction = 1; m_disp_shift = 0; memset(m_ddram, 0x20, sizeof(m_ddram)); - set_busy_flag(1520); + set_busy_flag(410); // Some machines do a "clear display" first, even though the datasheet insists "function set" must come before all else return; @@ -663,10 +783,10 @@ void hd44780_device::data_write(u8 data) else m_cgram[m_ac] = m_dr; + set_busy_flag(10); update_ac(m_direction); if (m_shift_on) shift_display(m_direction); - set_busy_flag(41); } u8 hd44780_device::data_read() @@ -685,8 +805,8 @@ u8 hd44780_device::data_read() if (!machine().side_effects_disabled()) { + set_busy_flag(10); update_ac(m_direction); - set_busy_flag(41); } return data; diff --git a/src/devices/video/hd44780.h b/src/devices/video/hd44780.h index b31f3e6af60fb..71bb5b3005807 100644 --- a/src/devices/video/hd44780.h +++ b/src/devices/video/hd44780.h @@ -63,6 +63,7 @@ class hd44780_device : public device_t // device_t implementation virtual void device_start() override; virtual void device_reset() override; + virtual void device_clock_changed() override; virtual void device_validity_check(validity_checker &valid) const override; virtual const tiny_rom_entry *device_rom_region() const override; @@ -78,7 +79,7 @@ class hd44780_device : public device_t enum { DDRAM, CGRAM }; // internal helper - void set_busy_flag(uint16_t usec); + void set_busy_flag(uint16_t cycles); void correct_ac(); void update_ac(int direction); void update_nibble(int rs, int rw); @@ -86,8 +87,8 @@ class hd44780_device : public device_t void pixel_update(bitmap_ind16 &bitmap, u8 line, u8 pos, u8 y, u8 x, int state); // internal state - emu_timer * m_blink_timer; emu_timer * m_busy_timer; + emu_timer * m_blink_timer; u8 m_lines; // number of lines u8 m_chars; // chars for line diff --git a/src/devices/video/imagetek_i4100.cpp b/src/devices/video/imagetek_i4100.cpp index 7f8706f5e10e1..1b12799a06655 100644 --- a/src/devices/video/imagetek_i4100.cpp +++ b/src/devices/video/imagetek_i4100.cpp @@ -1,6 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Luca Elia, David Haywood, Angelo Salese -/*************************************************************************** +/************************************************************************************************** Imagetek I4100 / I4220 / I4300 device files @@ -18,15 +18,18 @@ but the right palette is not at 00-ff. Related to the unknown table in the RAM mapped just before the palette? Update: the colors should have a common bank of 0xb (so 0x8bxx), it's unknown why the values - diverges, the blitter is responsible of the upload fwiw; - - Some gfx problems in ladykill, 3kokushi, puzzli, gakusai, seem related to how we handle + diverges, the blitter is responsible of the upload; + - gunmast title screen scroll right to left is jerky, again blitter + (uploads a sequence of destination values where bit 7 is first off then on + 1900 -> 1980 -> 1800 -> 1880 -> ... -> 000 -> 080) + - Some gfx problems in ladykill, 3kokushi, puzzli, gakusai seem related to how we handle windows, wrapping, read-modify-write areas; - puzzli: emulate hblank irq and fix video routines here (water effect not emulated, confirmed on PCB ref). Are the screen_ctrl_w "led" bits actually buffer latches for the layers? They get written in the middle of the screen, may also be v2 specific. - Unemulated/Unverified scrolling in flip screen. -============================================================================ +=================================================================================================== driver by Luca Elia (l.elia@tin.it) @@ -64,18 +67,27 @@ and height) -***************************************************************************/ +**************************************************************************************************/ #include "emu.h" #include "imagetek_i4100.h" #include -#define LOG_INT (1U << 1) -//#define VERBOSE (LOG_INT) +#define LOG_WARN (1U << 1) +#define LOG_INT (1U << 2) +#define LOG_BLIT (1U << 3) +#define LOG_BLITOP (1U << 4) + +#define VERBOSE (LOG_GENERAL | LOG_WARN) +//#define LOG_OUTPUT_FUNC osd_printf_info + #include "logmacro.h" -#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__) +#define LOGWARN(...) LOGMASKED(LOG_WARN, __VA_ARGS__) +#define LOGINT(...) LOGMASKED(LOG_INT, __VA_ARGS__) +#define LOGBLIT(...) LOGMASKED(LOG_BLIT, __VA_ARGS__) +#define LOGBLITOP(...) LOGMASKED(LOG_BLITOP, __VA_ARGS__) //************************************************************************** // GLOBAL VARIABLES @@ -629,7 +641,13 @@ void imagetek_i4100_device::layer_priority_w(offs_t offset, uint16_t data, uint1 m_layer_priority[1] = (data >> 2) & 3; m_layer_priority[0] = (data >> 0) & 3; if ((data >> 6) != 0) - logerror("%s warning: layer_priority_w write with %04x %04x\n",this->tag(),data,mem_mask); + { + LOGWARN("%s warning: layer_priority_w write with %04x %04x\n" + , this->tag() + , data + , mem_mask + ); + } } /************************************************************* @@ -649,7 +667,7 @@ void imagetek_i4100_device::background_color_w(offs_t offset, uint16_t data, uin m_background_color &= 0x0fff; if (data & 0xf000) - logerror("%s warning: background_color_w write with %04x %04x\n",this->tag(),data,mem_mask); + LOGWARN("%s warning: background_color_w write with %04x %04x\n", this->tag(), data, mem_mask); } /*************************************************************************** @@ -704,8 +722,8 @@ void imagetek_i4100_device::screen_ctrl_w(offs_t offset, uint16_t data, uint16_t m_screen_blank = BIT(data,1); m_screen_flip = BIT(data,0); - if (data & 0xff1c) - logerror("%s warning: screen_ctrl_w write with %04x %04x\n", this->tag(), data, mem_mask); + if (data & 0xf81c) + LOGWARN("%s warning: screen_ctrl_w write with %04x %04x\n", this->tag(), data, mem_mask); } @@ -754,7 +772,7 @@ void imagetek_i4100_device::crtc_unlock_w(offs_t offset, uint16_t data, uint16_t { m_crtc_unlock = BIT(data,0); if (data & ~1) - logerror("%s warning: unlock register write with %04x %04x\n",this->tag(),data,mem_mask); + LOGWARN("%s warning: unlock register write with %04x %04x\n",this->tag(),data,mem_mask); } /*************************************************************************** @@ -875,7 +893,7 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem int const shift = (dst_offs & 0x80) ? 0 : 8; u16 const mask = (dst_offs & 0x80) ? 0x00ff : 0xff00; -// logerror("%s Blitter regs %08X, %08X, %08X\n", machine().describe_context(), tmap, src_offs, dst_offs); + LOGBLIT("Blitter start %08X, %08X, %08X\n", tmap, src_offs, dst_offs); dst_offs >>= 7 + 1; switch (tmap) @@ -885,7 +903,7 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem case 3: break; default: - logerror("%s Blitter unknown destination: %08X\n", machine().describe_context(), tmap); + LOGWARN("%s Blitter unknown destination: %08X\n", machine().describe_context(), tmap); return; } @@ -895,9 +913,10 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem src_offs %= m_gfxrom_size; b1 = m_gfxrom[src_offs]; -// logerror("%s Blitter opcode %02X at %06X\n", machine().describe_context(), b1, src_offs); - src_offs++; + LOGBLITOP("%s Blitter opcode %02X at %06X\n", machine().describe_context(), b1, src_offs); + + src_offs++; count = ((~b1) & 0x3f) + 1; switch ((b1 & 0xc0) >> 6) @@ -910,11 +929,12 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem another blit. */ if (b1 == 0) { + LOGBLITOP("END\n"); m_blit_done_timer->adjust(attotime::from_usec(500)); return; } - /* Copy */ + LOGBLITOP("COPY\n"); while (count--) { src_offs %= m_gfxrom_size; @@ -929,6 +949,7 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem case 1: /* Fill with an increasing value */ + LOGBLITOP("FILL INC\n"); src_offs %= m_gfxrom_size; b2 = m_gfxrom[src_offs]; src_offs++; @@ -944,6 +965,7 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem case 2: /* Fill with a fixed value */ + LOGBLITOP("FILL FIX\n"); src_offs %= m_gfxrom_size; b2 = m_gfxrom[src_offs] << shift; src_offs++; @@ -960,18 +982,21 @@ void imagetek_i4100_device::blitter_w(offs_t offset, uint16_t data, uint16_t mem /* Skip to the next line ?? */ if (b1 == 0xc0) { + LOGBLITOP("SKIP LINE\n"); dst_offs += 0x100; dst_offs &= ~(0x100 - 1); dst_offs |= (0x100 - 1) & (m_blitter_regs[0x0a / 2] >> (7 + 1)); } else { + LOGBLITOP("SKIP %d\n", count); dst_offs += count; } break; + // shouldn't happen default: - //logerror("%s Blitter unknown opcode %02X at %06X\n",machine().describe_context(),b1,src_offs-1); + //("%s Blitter unknown opcode %02X at %06X\n",machine().describe_context(),b1,src_offs-1); return; } diff --git a/src/devices/video/mc6845.cpp b/src/devices/video/mc6845.cpp index 0189bd96f7d67..4fa82cf6c3596 100644 --- a/src/devices/video/mc6845.cpp +++ b/src/devices/video/mc6845.cpp @@ -406,6 +406,9 @@ int mc6845_device::vsync_r() void mc6845_device::recompute_parameters(bool postload) { + bool zero_horizontal_width = (m_horiz_disp == 0); + bool zero_vertical_height = (m_vert_disp == 0); + uint16_t hsync_on_pos, hsync_off_pos, vsync_on_pos, vsync_off_pos; uint16_t video_char_height = m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust); // fix garbage at the bottom of the screen (eg victor9k) @@ -417,8 +420,22 @@ void mc6845_device::recompute_parameters(bool postload) uint16_t vert_pix_total = (m_vert_char_total + 1) * video_char_height + m_vert_total_adj; /* determine the visible area, avoid division by 0 */ - uint16_t max_visible_x = m_horiz_disp * m_hpixels_per_column - 1; - uint16_t max_visible_y = m_vert_disp * video_char_height - 1; + uint16_t visible_width = zero_horizontal_width ? m_visible_width : (m_horiz_disp * m_hpixels_per_column); + uint16_t visible_height = zero_vertical_height ? m_visible_height : (m_vert_disp * video_char_height); + + // Check to see visual width or height needs to be adjusted due to changes with total + if (zero_horizontal_width || zero_vertical_height) + { + if (visible_width > horiz_pix_total) + { + visible_width = horiz_pix_total; + } + + if (visible_height > vert_pix_total) + { + visible_height = vert_pix_total; + } + } /* determine the syncing positions */ uint8_t horiz_sync_char_width = m_sync_width & 0x0f; @@ -452,13 +469,13 @@ void mc6845_device::recompute_parameters(bool postload) /* update only if screen parameters changed, unless we are coming here after loading the saved state */ if (postload || (horiz_pix_total != m_horiz_pix_total) || (vert_pix_total != m_vert_pix_total) || - (max_visible_x != m_max_visible_x) || (max_visible_y != m_max_visible_y) || + (visible_width != m_visible_width) || (visible_height != m_visible_height) || (hsync_on_pos != m_hsync_on_pos) || (vsync_on_pos != m_vsync_on_pos) || (hsync_off_pos != m_hsync_off_pos) || (vsync_off_pos != m_vsync_off_pos)) { /* update the screen if we have valid data */ - if ((horiz_pix_total > 0) && (max_visible_x < horiz_pix_total) && - (vert_pix_total > 0) && (max_visible_y < vert_pix_total) && + if ((horiz_pix_total > 0) && (visible_width <= horiz_pix_total) && + (vert_pix_total > 0) && (visible_height <= vert_pix_total) && (hsync_on_pos <= horiz_pix_total) && (vsync_on_pos <= vert_pix_total) && (hsync_on_pos != hsync_off_pos)) { @@ -473,23 +490,33 @@ void mc6845_device::recompute_parameters(bool postload) // Also, the mode-register change needs to be added to the changed-parameter tests above. if (MODE_INTERLACE_AND_VIDEO) { - //max_visible_y *= 2; + //visible_height *= 2; //vert_pix_total *= 2; } if(m_show_border_area) + { visarea.set(0, horiz_pix_total-2, 0, vert_pix_total-2); + } else - visarea.set(0 + m_visarea_adjust_min_x, max_visible_x + m_visarea_adjust_max_x, 0 + m_visarea_adjust_min_y, max_visible_y + m_visarea_adjust_max_y); + { + visarea.set( + 0 + m_visarea_adjust_min_x, visible_width - 1 + m_visarea_adjust_max_x, + 0 + m_visarea_adjust_min_y, visible_height - 1 + m_visarea_adjust_max_y); + } - LOGCONF("M6845 config screen: HTOTAL: %d VTOTAL: %d MAX_X: %d MAX_Y: %d HSYNC: %d-%d VSYNC: %d-%d Freq: %ffps\n", - horiz_pix_total, vert_pix_total, max_visible_x, max_visible_y, hsync_on_pos, hsync_off_pos - 1, vsync_on_pos, vsync_off_pos - 1, refresh.as_hz()); + LOGCONF("M6845 config screen: HTOTAL: %d VTOTAL: %d VIS_WIDTH: %d VIS_HEIGHT: %d HSYNC: %d-%d VSYNC: %d-%d Freq: %ffps\n", + horiz_pix_total, vert_pix_total, visible_width, visible_height, hsync_on_pos, hsync_off_pos - 1, vsync_on_pos, vsync_off_pos - 1, refresh.as_hz()); if (has_screen()) + { screen().configure(horiz_pix_total, vert_pix_total, visarea, refresh.as_attoseconds()); + } if(!m_reconfigure_cb.isnull()) + { m_reconfigure_cb(horiz_pix_total, vert_pix_total, visarea, refresh.as_attoseconds()); + } m_has_valid_parameters = true; } @@ -498,8 +525,8 @@ void mc6845_device::recompute_parameters(bool postload) m_horiz_pix_total = horiz_pix_total; m_vert_pix_total = vert_pix_total; - m_max_visible_x = max_visible_x; - m_max_visible_y = max_visible_y; + m_visible_width = visible_width; + m_visible_height = visible_height; m_hsync_on_pos = hsync_on_pos; m_hsync_off_pos = hsync_off_pos; m_vsync_on_pos = vsync_on_pos; @@ -671,6 +698,7 @@ bool hd6845s_device::check_cursor_visible(uint16_t ra, uint16_t line_addr) TIMER_CALLBACK_MEMBER(mc6845_device::handle_line_timer) { bool new_vsync = m_vsync; + bool nonzero_horizontal_width = (m_horiz_disp != 0); m_character_counter = 0; m_cursor_x = -1; @@ -748,8 +776,11 @@ TIMER_CALLBACK_MEMBER(mc6845_device::handle_line_timer) if ( m_line_enable_ff ) { - /* Schedule DE off signal change */ - m_de_off_timer->adjust(cclks_to_attotime(m_horiz_disp)); + if (nonzero_horizontal_width) + { + /* Schedule DE off signal change */ + m_de_off_timer->adjust(cclks_to_attotime(m_horiz_disp)); + } /* Is cursor visible on this line? */ if (check_cursor_visible(m_raster_counter, m_line_address)) @@ -769,7 +800,7 @@ TIMER_CALLBACK_MEMBER(mc6845_device::handle_line_timer) /* Set VSYNC and DE signals */ set_vsync( new_vsync ); - set_de( m_line_enable_ff ? true : false ); + set_de( (m_line_enable_ff && nonzero_horizontal_width) ? true : false ); } @@ -914,6 +945,7 @@ uint8_t mc6845_device::draw_scanline(int y, bitmap_rgb32 &bitmap, const rectangl { /* compute the current raster line */ uint8_t ra = y % (m_max_ras_addr + (MODE_INTERLACE_AND_VIDEO ? m_interlace_adjust : m_noninterlace_adjust)); + bool nonzero_horizontal_width = (m_horiz_disp != 0); // Check if the cursor is visible and is on this scanline. int cursor_visible = check_cursor_visible(ra, m_current_disp_addr); @@ -922,7 +954,7 @@ uint8_t mc6845_device::draw_scanline(int y, bitmap_rgb32 &bitmap, const rectangl // is in units of characters and is relative to the start of the // displayable area, not relative to the screen bitmap origin. int8_t cursor_x = cursor_visible ? (m_cursor_addr - m_current_disp_addr) : -1; - int de = (y <= m_max_visible_y) ? 1 : 0; + int de = ((y < m_visible_height) && nonzero_horizontal_width) ? 1 : 0; int vbp = m_vert_pix_total - m_vsync_off_pos; if (vbp < 0) vbp = 0; int hbp = m_horiz_pix_total - m_hsync_off_pos; @@ -1036,10 +1068,11 @@ void mc6845_device::device_start() m_upd_adr_timer = timer_alloc(FUNC(mc6845_device::adr_update_tick), this); m_upd_trans_timer = timer_alloc(FUNC(mc6845_device::transparent_update_tick), this); - /* Use some large startup values */ - m_horiz_char_total = 0xff; + // Make sure m_horiz_char_total/m_vert_char_total are less than m_horiz_disp/m_vert_disp + // to avoid calculating startup resolution before values are valid + m_horiz_char_total = 0; m_max_ras_addr = 0x1f; - m_vert_char_total = 0x7f; + m_vert_char_total = 0; m_mode_control = 0x00; m_supports_disp_start_addr_r = false; // MC6845 can not read Display Start (double checked on datasheet) @@ -1059,13 +1092,13 @@ void mc6845_device::device_start() m_de = 0; m_sync_width = 1; m_horiz_pix_total = m_vert_pix_total = 0; - m_max_visible_x = m_max_visible_y = 0; + m_visible_width = m_visible_height = 0; m_hsync_on_pos = m_vsync_on_pos = 0; m_hsync_off_pos = m_vsync_off_pos = 0; m_vsync = m_hsync = 0; m_cur = 0; m_line_counter = 0; - m_horiz_disp = m_vert_disp = 0; + m_horiz_disp = m_vert_disp = 0x7f; m_vert_sync_pos = 0; m_vert_total_adj = 0; m_cursor_start_ras = m_cursor_end_ras = m_cursor_addr = 0; diff --git a/src/devices/video/mc6845.h b/src/devices/video/mc6845.h index 43338ca1777b0..eee768de1fe8c 100644 --- a/src/devices/video/mc6845.h +++ b/src/devices/video/mc6845.h @@ -202,8 +202,8 @@ class mc6845_device : public device_t, /* These computed are used to define the screen parameters for a driver */ uint16_t m_horiz_pix_total; uint16_t m_vert_pix_total; - uint16_t m_max_visible_x; - uint16_t m_max_visible_y; + uint16_t m_visible_width; + uint16_t m_visible_height; uint16_t m_hsync_on_pos; uint16_t m_hsync_off_pos; uint16_t m_vsync_on_pos; diff --git a/src/devices/video/v9938.cpp b/src/devices/video/v9938.cpp index aec5835f4a0c9..6a24e97f7d49e 100644 --- a/src/devices/video/v9938.cpp +++ b/src/devices/video/v9938.cpp @@ -241,14 +241,14 @@ void v99x8_device::set_screen_parameters() } else { - // NYSC + // NTSC m_scanline_start = (m_cont_reg[9] & 0x80) ? 16 : 26; m_scanline_max = (m_cont_reg[9] & 0x80) ? 234 : 244; } m_visible_y = (m_cont_reg[9] & 0x80) ? 212 : 192; } - +// FIXME: this doesn't really allow for external clock configuration void v99x8_device::configure_pal_ntsc() { if (m_pal_ntsc) @@ -692,6 +692,7 @@ void v99x8_device::device_reset() m_cmd_write_first = m_pal_write_first = 0; m_int_state = 0; m_read_ahead = 0; m_address_latch = 0; // ??? + // FIXME: this drifts the scanline number wrt screen h/vpos m_scanline = 0; // MZ: The status registers 4 and 6 hold the high bits of the sprite // collision location. The unused bits are set to 1. @@ -810,6 +811,7 @@ void v99x8_device::check_int() ** called; because of this Mr. Ghost, Xevious and SD Snatcher don't ** run. As a patch it's called every scanline */ + // FIXME: breaks nichibutsu hrdvd.cpp & nichild.cpp, really needs INPUT_MERGER instead. m_int_callback(n); } diff --git a/src/lib/netlist/tools/nl_convert.cpp b/src/lib/netlist/tools/nl_convert.cpp index acffed63a4630..8fe3b19eca81a 100644 --- a/src/lib/netlist/tools/nl_convert.cpp +++ b/src/lib/netlist/tools/nl_convert.cpp @@ -336,7 +336,7 @@ void nl_convert_spice_t::convert_block(const str_list &contents) int linenumber = 1; for (const auto &line : contents) { - try + try { process_line(line); } diff --git a/src/mame/skeleton/ampex.cpp b/src/mame/ampex/ampex.cpp similarity index 100% rename from src/mame/skeleton/ampex.cpp rename to src/mame/ampex/ampex.cpp diff --git a/src/mame/skeleton/ampex210.cpp b/src/mame/ampex/ampex210.cpp similarity index 100% rename from src/mame/skeleton/ampex210.cpp rename to src/mame/ampex/ampex210.cpp diff --git a/src/mame/skeleton/ampex210_kbd.cpp b/src/mame/ampex/ampex210_kbd.cpp similarity index 100% rename from src/mame/skeleton/ampex210_kbd.cpp rename to src/mame/ampex/ampex210_kbd.cpp diff --git a/src/mame/skeleton/ampex210_kbd.h b/src/mame/ampex/ampex210_kbd.h similarity index 90% rename from src/mame/skeleton/ampex210_kbd.h rename to src/mame/ampex/ampex210_kbd.h index ae38687b34b47..88ec18bc671ec 100644 --- a/src/mame/skeleton/ampex210_kbd.h +++ b/src/mame/ampex/ampex210_kbd.h @@ -1,11 +1,13 @@ // license:BSD-3-Clause // copyright-holders:AJR +#ifndef MAME_AMPEX_AMPEX210_KBD_H +#define MAME_AMPEX_AMPEX210_KBD_H -#ifndef MAME_SKELETON_AMPEX210_KBD_H -#define MAME_SKELETON_AMPEX210_KBD_H +#pragma once #include "cpu/mcs48/mcs48.h" + class ampex230_keyboard_device : public device_t { public: @@ -46,4 +48,4 @@ class ampex230_keyboard_device : public device_t // device type declaration DECLARE_DEVICE_TYPE(AMPEX230_KEYBOARD, ampex230_keyboard_device) -#endif // MAME_SKELETON_AMPEX210_KBD_H +#endif // MAME_AMPEX_AMPEX210_KBD_H diff --git a/src/mame/apple/macquadra630.cpp b/src/mame/apple/macquadra630.cpp index 180c2e2034954..472fdead1b1d7 100644 --- a/src/mame/apple/macquadra630.cpp +++ b/src/mame/apple/macquadra630.cpp @@ -40,6 +40,8 @@ #include "mactoolbox.h" #include "valkyrie.h" +#include "bus/nubus/cards.h" +#include "bus/nubus/nubus.h" #include "cpu/m68000/m68040.h" #include "machine/ram.h" #include "machine/timer.h" @@ -180,6 +182,11 @@ void quadra630_state::macqd630(machine_config &config) m_primetimeii->pb5_callback().set(m_cuda, FUNC(cuda_device::set_tip)); m_primetimeii->write_cb2().set(m_cuda, FUNC(cuda_device::set_via_data)); + nubus_device &nubus(NUBUS(config, "pds", 0)); + nubus.set_space(m_maincpu, AS_PROGRAM); + nubus.out_irqe_callback().set(m_primetimeii, FUNC(primetime_device::via2_irq_w<0x20>)); + NUBUS_SLOT(config, "lcpds", "pds", mac_pdslc_cards, nullptr); + /* internal ram */ RAM(config, m_ram); m_ram->set_default_size("4M"); diff --git a/src/mame/appliedconcepts/boris.cpp b/src/mame/appliedconcepts/boris.cpp index 028a8f0c962c0..dfb1d46a42227 100644 --- a/src/mame/appliedconcepts/boris.cpp +++ b/src/mame/appliedconcepts/boris.cpp @@ -56,6 +56,9 @@ class boris_state : public driver_device required_device m_display; required_ioport_array<4> m_inputs; + u8 m_io[2] = { }; + u8 m_4042 = 0; + void main_map(address_map &map); void main_io(address_map &map); @@ -65,9 +68,6 @@ class boris_state : public driver_device void mux_w(u8 data); void digit_w(u8 data); u8 input_r(); - - u8 m_io[2] = { }; - u8 m_4042 = 0; }; void boris_state::machine_start() diff --git a/src/mame/appliedconcepts/borisdpl.cpp b/src/mame/appliedconcepts/borisdpl.cpp index 82cdf67475329..5547b710c0f1f 100644 --- a/src/mame/appliedconcepts/borisdpl.cpp +++ b/src/mame/appliedconcepts/borisdpl.cpp @@ -52,6 +52,11 @@ class borisdpl_state : public driver_device required_device m_display; required_ioport_array<4> m_inputs; + std::unique_ptr m_ram; + u8 m_ram_address = 0; + u8 m_matrix = 0; + u8 m_digit_data = 0; + void main_map(address_map &map); void main_io(address_map &map); @@ -65,11 +70,6 @@ class borisdpl_state : public driver_device void ram_address_w(u8 data) { m_ram_address = data; } u8 ram_data_r() { return m_ram[m_ram_address]; } void ram_data_w(u8 data) { m_ram[m_ram_address] = data; } - - std::unique_ptr m_ram; - u8 m_ram_address = 0; - u8 m_matrix = 0; - u8 m_digit_data = 0; }; void borisdpl_state::machine_start() diff --git a/src/mame/appliedconcepts/ggm.cpp b/src/mame/appliedconcepts/ggm.cpp index 695c256aa1163..c18609978a148 100644 --- a/src/mame/appliedconcepts/ggm.cpp +++ b/src/mame/appliedconcepts/ggm.cpp @@ -111,6 +111,14 @@ class ggm_state : public driver_device output_finder<2, 6> m_fdigit; required_ioport_array<4+3> m_inputs; + u8 m_inp_mux = 0; + u16 m_digit_data = 0; + u8 m_shift_data = 0; + u8 m_shift_clock = 0; + + bool m_extram_enabled = false; + u8 m_overlay = 0; + void main_map(address_map &map); void update_reset(ioport_value state); @@ -129,14 +137,6 @@ class ggm_state : public driver_device void shift_clock_w(int state); void shift_data_w(int state); - - u8 m_inp_mux = 0; - u16 m_digit_data = 0; - u8 m_shift_data = 0; - u8 m_shift_clock = 0; - - bool m_extram_enabled = false; - u8 m_overlay = 0; }; void ggm_state::machine_start() diff --git a/src/mame/appliedconcepts/prodigy.cpp b/src/mame/appliedconcepts/prodigy.cpp index 190eff98223c3..ef44c9f74517b 100644 --- a/src/mame/appliedconcepts/prodigy.cpp +++ b/src/mame/appliedconcepts/prodigy.cpp @@ -108,6 +108,11 @@ class prodigy_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + u8 m_select = 0; + u8 m_led_data = 0; + u8 m_shift_data = 0; + u8 m_shift_clock = 0; + void main_map(address_map &map); // I/O handlers @@ -118,11 +123,6 @@ class prodigy_state : public driver_device void shift_clock_w(int state); void shift_data_w(int state); - - u8 m_select = 0; - u8 m_led_data = 0; - u8 m_shift_data = 0; - u8 m_shift_clock = 0; }; void prodigy_state::machine_start() diff --git a/src/mame/atari/hitparade.cpp b/src/mame/atari/hitparade.cpp index b24d99ffeb201..52b70a3156166 100644 --- a/src/mame/atari/hitparade.cpp +++ b/src/mame/atari/hitparade.cpp @@ -60,12 +60,12 @@ class hitpar_state : public driver_device required_device m_display; required_ioport_array<6> m_inputs; + u32 m_r = 0; + u16 m_o = 0; + void write_r(u32 data); void write_o(u16 data); u8 read_k(); - - u32 m_r = 0; - u16 m_o = 0; }; void hitpar_state::machine_start() diff --git a/src/mame/atari/mediagx.cpp b/src/mame/atari/mediagx.cpp index 667b7eda035d1..9d5eb6ffb68f5 100644 --- a/src/mame/atari/mediagx.cpp +++ b/src/mame/atari/mediagx.cpp @@ -885,7 +885,7 @@ void mediagx_state::mediagx(machine_config &config) // TODO: checked at POST, wants a debug device? PC_LPT(config, m_lpt0); -// m_lpt0->irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir7_w)); +// m_lpt0->irq_handler().set("mb:pic8259", FUNC(pic8259_device::ir7_w)); pcat_common(config); diff --git a/src/mame/atari/shuuz.cpp b/src/mame/atari/shuuz.cpp index 467c2430fa3a7..7cdc5a88d0e85 100644 --- a/src/mame/atari/shuuz.cpp +++ b/src/mame/atari/shuuz.cpp @@ -165,6 +165,7 @@ uint32_t shuuz_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, uint16_t const *const mo = &mobitmap.pix(y); uint16_t *const pf = &bitmap.pix(y); for (int x = rect->left(); x <= rect->right(); x++) + { if (mo[x] != 0xffff) { /* verified from the GALs on the real PCB; equations follow @@ -181,18 +182,24 @@ uint32_t shuuz_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, * +PFS7*(LBD7&LBD6)*!M3*!O13 * */ - int const o13 = ((pf[x] & 0xf0) == 0xf0); - // compute the MO/PF signal - int mopf = 0; - if ((!(pf[x] & 0x80) && ((mo[x] & 0xc0) != 0xc0) && ((mo[x] & 0x0e) != 0x00) && !o13) || - ((pf[x] & 0x80) && ((mo[x] & 0xc0) == 0xc0) && ((mo[x] & 0x0e) != 0x00) && !o13)) - mopf = 1; + // This is based on observations, and not verified against schematics and GAL equations. + // TODO: + // * Locate schematics for (or trace out) video mixing section. + // * Obtain equations for video mixing GALs. + bool const o13 = (pf[x] & 0xf0) == 0xf0; + bool const mopf = ((pf[x] & 0x80) ? ((mo[x] & 0xc0) == 0xc0) : ((mo[x] & 0xc0) != 0xc0)) && !o13; - // if MO/PF is 1, we draw the MO + // if MO/PF is asserted, we draw the MO if (mopf) - pf[x] = mo[x]; + { + if (mo[x] & 0x0e) // solid colors + pf[x] = mo[x]; + else if (mo[x] & 0x01) // shadows + pf[x] |= 0x200; + } } + } } return 0; } diff --git a/src/mame/bmc/bmcpokr.cpp b/src/mame/bmc/bmcpokr.cpp index 7ca3f0e29eb49..3048e31e04bac 100644 --- a/src/mame/bmc/bmcpokr.cpp +++ b/src/mame/bmc/bmcpokr.cpp @@ -829,9 +829,68 @@ static INPUT_PORTS_START( mjmaglmp ) INPUT_PORTS_END static INPUT_PORTS_START( fengyunh ) - PORT_INCLUDE(mjmaglmp) + PORT_START("INPUTS") + // Joystick controls: + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_START1 ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // START + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // UP + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // DOWN + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_JOYSTICK_LEFT ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // LEFT + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_JOYSTICK_RIGHT ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // RIGHT + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // 1P E1 (select) - PORT_MODIFY("DSW1") + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN2 ) // NOTE + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_GAMBLE_KEYOUT ) // KEY DOWN + PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Pay Out") PORT_CODE(KEYCODE_O) // PAY + PORT_BIT( 0x0200, IP_ACTIVE_HIGH,IPT_CUSTOM ) PORT_READ_LINE_MEMBER(bmcpokr_state, hopper_r) // HOPPER + PORT_SERVICE_NO_TOGGLE( 0x0400, IP_ACTIVE_LOW ) // ACCOUNT + PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_NAME("Reset") // RESET + PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN ) // (unused) + PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // 1P E2 (bet) + PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_CONDITION("DSW3",0x01,EQUALS,0x00) // 1P E3 (select) + PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_COIN1 ) // COIN + + PORT_START("KEY1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_START1 ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + + PORT_START("KEY2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + + PORT_START("KEY3") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + + PORT_START("KEY4") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + + PORT_START("KEY5") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_CONDITION("DSW3",0x01,EQUALS,0x01) + + + PORT_START("DSW1") PORT_DIPNAME( 0x01, 0x01, "Max Bet" ) PORT_DIPLOCATION("DIP4:1") // 最大押分 PORT_DIPSETTING( 0x01, "10" ) PORT_DIPSETTING( 0x00, "20" ) @@ -854,7 +913,7 @@ static INPUT_PORTS_START( fengyunh ) PORT_DIPSETTING( 0x80, "Numbers" ) // 數字 (Arabic numerals) PORT_DIPSETTING( 0x00, "Circle Tiles" ) // 筒子 (tong mahjong tiles representing digits) - PORT_MODIFY("DSW2") + PORT_START("DSW2") PORT_DIPNAME( 0x03, 0x03, "Pay-Out Rate" ) PORT_DIPLOCATION("DIP3:1,2") // 遊戲機率 PORT_DIPSETTING( 0x02, "75" ) PORT_DIPSETTING( 0x01, "78" ) @@ -873,8 +932,10 @@ static INPUT_PORTS_START( fengyunh ) PORT_DIPSETTING( 0xc0, "2000" ) PORT_DIPSETTING( 0x00, "3000" ) - PORT_MODIFY("DSW3") - PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "DIP2:1" ) // not displayed in test mode + PORT_START("DSW3") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Controls ) ) PORT_DIPLOCATION("DIP2:1") // not displayed in test mode + PORT_DIPSETTING( 0x01, "Keyboard" ) + PORT_DIPSETTING( 0x00, DEF_STR( Joystick ) ) PORT_DIPNAME( 0x02, 0x02, "Key-In Limit" ) PORT_DIPLOCATION("DIP2:2") // 開分限制 PORT_DIPSETTING( 0x02, "1000" ) PORT_DIPSETTING( 0x00, "5000" ) @@ -893,7 +954,7 @@ static INPUT_PORTS_START( fengyunh ) PORT_DIPSETTING( 0x00, "50" ) PORT_DIPUNKNOWN_DIPLOC( 0x80, 0x80, "DIP2:8" ) // not displayed in test mode - PORT_MODIFY("DSW4") + PORT_START("DSW4") PORT_DIPNAME( 0x01, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DIP1:1") // not displayed in test mode PORT_DIPSETTING( 0x01, DEF_STR( No ) ) PORT_DIPSETTING( 0x00, DEF_STR( Yes ) ) @@ -926,7 +987,7 @@ static INPUT_PORTS_START( fengyunh ) INPUT_PORTS_END static INPUT_PORTS_START( shendeng ) - PORT_INCLUDE(mjmaglmp) + PORT_INCLUDE(fengyunh) PORT_MODIFY("DSW1") PORT_DIPNAME( 0x01, 0x01, "Max Bet" ) PORT_DIPLOCATION("DIP4:1") // 最大押分 @@ -971,7 +1032,9 @@ static INPUT_PORTS_START( shendeng ) PORT_DIPSETTING( 0x00, "3000" ) PORT_MODIFY("DSW3") - PORT_DIPUNKNOWN_DIPLOC( 0x01, 0x01, "DIP2:1" ) // not displayed in test mode + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Controls ) ) PORT_DIPLOCATION("DIP2:1") // not displayed in test mode + PORT_DIPSETTING( 0x01, "Keyboard" ) + PORT_DIPSETTING( 0x00, DEF_STR( Joystick ) ) PORT_DIPNAME( 0x02, 0x02, "Key-In Limit" ) PORT_DIPLOCATION("DIP2:2") // 開分限制 PORT_DIPSETTING( 0x02, "1000" ) PORT_DIPSETTING( 0x00, "5000" ) diff --git a/src/mame/capcom/1943.cpp b/src/mame/capcom/1943.cpp index 82e3356fe4bda..e03a7b8c36148 100644 --- a/src/mame/capcom/1943.cpp +++ b/src/mame/capcom/1943.cpp @@ -165,9 +165,9 @@ static INPUT_PORTS_START( 1943 ) PORT_DIPNAME( 0x10, 0x10, "2 Player Game" ) PORT_DIPLOCATION("SWA:4") PORT_DIPSETTING( 0x00, "1 Credit/2 Players" ) PORT_DIPSETTING( 0x10, "2 Credits/2 Players" ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Cabinet ) ) PORT_DIPLOCATION("SWA:3") - PORT_DIPSETTING( 0x20, DEF_STR( Upright )) - PORT_DIPSETTING( 0x00, DEF_STR( Cocktail )) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SWA:3") + PORT_DIPSETTING( 0x20, DEF_STR( Off )) + PORT_DIPSETTING( 0x00, DEF_STR( On )) PORT_DIPNAME( 0x40, 0x40, "Screen Stop" ) PORT_DIPLOCATION("SWA:2") PORT_DIPSETTING( 0x40, DEF_STR( Off )) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) diff --git a/src/mame/casio/cz1.cpp b/src/mame/casio/cz1.cpp new file mode 100644 index 0000000000000..13af6e7529cab --- /dev/null +++ b/src/mame/casio/cz1.cpp @@ -0,0 +1,950 @@ +// license: BSD-3-Clause +// copyright-holders: Devin Acker +/*************************************************************************** + + Casio CZ-1 Digital Synthesizer + + Also includes support for the MZ-1, an unreleased rack mount version supported by + the same ROM. This has no key/wheel/pedal inputs and never sends the corresponding + MIDI messages, but otherwise works identically to the CZ-1. + + Misc. notes: + + Hold all three Line 1 envelope buttons (DCO/DCW/DCA) on boot to perform a RAM test. + + Afterwards, the firmware will attempt to load and run a program from cartridge + if a valid 5-byte header is detected at the beginning: + - bytes 0-1: ignored + - bytes 2-3: program load address (valid within 0x8000-9fff, includes this header) + - byte 4: constant 0xD1 + - bytes 5+: start of program + + TODO: + + Both machines have MACHINE_IMPERFECT_SOUND due to unemulated stereo chorus. + +***************************************************************************/ + +#include "emu.h" + +#include "ra3.h" +#include "bus/midi/midiinport.h" +#include "bus/midi/midioutport.h" +#include "cpu/mcs48/mcs48.h" +#include "cpu/upd7810/upd7811.h" +#include "machine/clock.h" +#include "machine/input_merger.h" +#include "machine/msm6200.h" +#include "machine/nvram.h" +#include "sound/mixer.h" +#include "sound/upd933.h" +#include "video/hd44780.h" + +#include "emupal.h" +#include "screen.h" +#include "softlist.h" +#include "speaker.h" + +#include + +#include "cz1.lh" +#include "mz1.lh" + +namespace { + +//************************************************************************** +// TYPE DEFINITIONS +//************************************************************************** + +class cz1_state : public driver_device +{ +public: + cz1_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_subcpu(*this, "subcpu"), + m_mcu(*this, "mcu"), + m_hd44780(*this, "hd44780"), + m_upd933(*this, "upd933_%u", 0U), + m_cart(*this, "cart"), + m_mixer(*this, "mixer%u", 0U), + m_keys(*this, "KC%u", 0U), + m_leds(*this, "led_%u.%u", 0U, 0U), + m_led_env(*this, "led_env%u", 0U), + m_led_bank(*this, "led_bank%u", 0U), + m_led_tone(*this, "led_tone%u", 0U) + { } + + void mz1(machine_config &config); + void cz1(machine_config &config); + + int cont_r(); + int sync_r(); + + int cont49_r(); + int sync49_r(); + +protected: + virtual void machine_start() override; + virtual void machine_reset() override; + +private: + void cz1_palette(palette_device &palette) const; + HD44780_PIXEL_UPDATE(lcd_pixel_update); + + void mz1_main_map(address_map &map); + void cz1_main_map(address_map &map); + void sub_map(address_map &map); + void mcu_map(address_map &map); + + // main CPU r/w methods + u8 keys_r(); + void led_w(offs_t offset, u8 data); + void volume_w(u8 data); + void stereo_w(u8 data); + + void cart_addr_w(u8 data); + void cart_addr_hi_w(u8 data); + + void main_pa_w(u8 data); + u8 main_pa_r(); + void main_pb_w(u8 data); + void main_pc_w(u8 data); + + // sub CPU r/w methods + void sound_w(u8 data); + u8 sound_r(); + + void sub_pa_w(u8 data); + void sub_pb_w(u8 data); + void sub_pc_w(u8 data); + + // main/sub CPU comm methods + void main_to_sub_0_w(u8 data); + TIMER_CALLBACK_MEMBER(main_to_sub_0_cb); + u8 main_to_sub_0_r(); + void main_to_sub_1_w(u8 data); + TIMER_CALLBACK_MEMBER(main_to_sub_1_cb); + u8 main_to_sub_1_r(); + void sub_to_main_w(u8 data); + TIMER_CALLBACK_MEMBER(sub_to_main_cb); + u8 sub_to_main_r(); + + void sync_clr_w(u8); + TIMER_CALLBACK_MEMBER(sync_clr_cb); + + void main_irq_w(u8); + void main_irq_ack_w(u8); + + // main CPU / key MCU comm methods + u8 mcu_r(); + void mcu_p2_w(u8 data); + + required_device m_maincpu; + required_device m_subcpu; + optional_device m_mcu; + required_device m_hd44780; + required_device_array m_upd933; + required_device m_cart; + required_device_array m_mixer; + optional_ioport_array<16> m_keys; + output_finder<5, 6> m_leds; + output_finder<16> m_led_env; + output_finder<8> m_led_bank, m_led_tone; + + float m_volume[0x40]; + + u8 m_main_port[3]; + u8 m_mcu_p2; + u8 m_midi_rx; + + u8 m_main_to_sub[2]; + u8 m_sub_to_main; + u8 m_sync, m_sync49; + + u16 m_cart_addr; +}; + + +//************************************************************************** +// ADDRESS MAPS +//************************************************************************** + +void cz1_state::mz1_main_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x0000, 0x7fff).rom(); + map(0x8000, 0x9fff).ram().share("mainram"); + map(0xb000, 0xbfff).w(FUNC(cz1_state::volume_w)); + map(0xc000, 0xc000).mirror(0x1ff0).w(FUNC(cz1_state::main_to_sub_0_w)); + map(0xc001, 0xc001).mirror(0x1ff0).w(FUNC(cz1_state::main_to_sub_1_w)); + map(0xc002, 0xc002).mirror(0x1ff0).r(FUNC(cz1_state::sub_to_main_r)); + map(0xc004, 0xc004).mirror(0x1ff0).r(FUNC(cz1_state::keys_r)); + map(0xc005, 0xc005).mirror(0x1ff0).w(FUNC(cz1_state::sync_clr_w)); + map(0xc006, 0xc006).mirror(0x1ff0).w(FUNC(cz1_state::main_irq_ack_w)); + map(0xc007, 0xc00b).mirror(0x1ff0).w(FUNC(cz1_state::led_w)); + map(0xc00c, 0xc00c).mirror(0x1ff0).w(FUNC(cz1_state::stereo_w)); + map(0xc00e, 0xc00e).mirror(0x1ff0).w(FUNC(cz1_state::cart_addr_w)); + map(0xc00f, 0xc00f).mirror(0x1ff0).w(FUNC(cz1_state::cart_addr_hi_w)); +} + +/**************************************************************************/ +void cz1_state::cz1_main_map(address_map &map) +{ + mz1_main_map(map); + map(0xc00d, 0xc00d).mirror(0x1ff0).r(FUNC(cz1_state::mcu_r)); +} + +/**************************************************************************/ +void cz1_state::sub_map(address_map &map) +{ + map.unmap_value_high(); + + map(0x0000, 0x3fff).rom(); + map(0x4000, 0x7fff).ram().share("subram"); + map(0x8000, 0x9fff).rw(FUNC(cz1_state::sound_r), FUNC(cz1_state::sound_w)); + map(0xa000, 0xbfff).rw(FUNC(cz1_state::main_to_sub_1_r), FUNC(cz1_state::sub_to_main_w)); + map(0xc000, 0xdfff).rw(FUNC(cz1_state::main_to_sub_0_r), FUNC(cz1_state::main_irq_w)); +} + +/**************************************************************************/ +void cz1_state::mcu_map(address_map &map) +{ + map(0x00, 0xff).rw("kbd", FUNC(msm6200_device::read), FUNC(msm6200_device::write)); +} + +//************************************************************************** +// INPUT PORT DEFINITIONS +//************************************************************************** + +static INPUT_PORTS_START( mz1 ) + + PORT_START("KC0") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Normal") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Tone Mix") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Key Split") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Operation Memory") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Solo") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("MIDI") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC1") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Portamento On/Off") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Glide On/Off") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Key Transpose") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Master Tune") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Exchange") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Cartridge") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC2") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_1) PORT_NAME("Bank A") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_2) PORT_NAME("Bank B") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_3) PORT_NAME("Bank C") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_4) PORT_NAME("Bank D") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_5) PORT_NAME("Bank E") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_6) PORT_NAME("Bank F") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC3") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("Memory 5") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("Memory 6") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_7_PAD) PORT_NAME("Memory 7") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_8_PAD) PORT_NAME("Memory 8") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_7) PORT_NAME("Bank G") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_8) PORT_NAME("Bank H") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC4") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_LEFT) PORT_NAME("Cursor Left / No") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_RIGHT) PORT_NAME("Cursor Right / Yes") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("Memory 1") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("Memory 2") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("Memory 3") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("Memory 4") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC5") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_MINUS_PAD) PORT_NAME("Page Down") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_PLUS_PAD) PORT_NAME("Page Up") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Env. Point Sustain") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Env. Point End") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_UP) PORT_NAME("Value Down / Save") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_DOWN) PORT_NAME("Value Up / Load") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC6") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Wheel / Aftertouch") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Bend Range") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Glide") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Portamento") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Name") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Cartridge/MIDI Save/Load") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC7") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Initialize") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Octave") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Vibrato") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Line Select") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Ring") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Noise") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC8") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCO 1 Wave") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCO 1 Env") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCW 1 Key Follow") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCW 1 Env") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 1 Key Follow") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 1 Env") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC9") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCO 2 Wave") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCO 2 Env") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCW 2 Key Follow") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCW 2 Env") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 2 Key Follow") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 2 Env") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC10") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 1 Velocity") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 2 Velocity") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 1 Level") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("DCA 2 Level") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Parameter Copy") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Detune") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC11") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("MIDI On/Off") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Compare/Recall") + PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Write") + PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_NAME("Modulation On/Off") + PORT_BIT(0x10, IP_ACTIVE_LOW, IPT_OTHER) PORT_TOGGLE PORT_NAME("Memory Protect") + PORT_BIT(0xe0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("KC12") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_CUSTOM) PORT_READ_LINE_DEVICE_MEMBER("cart", casio_ram_cart_device, exists) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_CUSTOM) // low = MZ-1, high = CZ-1 + PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("MAIN_PB") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(cz1_state, sync_r) + PORT_BIT(0xfe, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("SUB_PB") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_CUSTOM) PORT_READ_LINE_DEVICE_MEMBER("upd933_0", upd933_device, rq_r) + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_CUSTOM) PORT_READ_LINE_DEVICE_MEMBER("upd933_1", upd933_device, rq_r) + PORT_BIT(0xfc, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_START("SUB_PC") + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(cz1_state, sync_r) + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(cz1_state, cont_r) + PORT_BIT(0xf8, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + +static INPUT_PORTS_START( cz1 ) + PORT_INCLUDE(mz1) + + PORT_START("kbd:KI8") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_UNUSED) + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C6") + + PORT_START("kbd:KI9") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("B5") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A#5") + + PORT_START("kbd:KI10") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A5") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G#5") + + PORT_START("kbd:KI11") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G5") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F#5") + + PORT_START("kbd:KI12") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F5") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("E5") + + PORT_START("kbd:KI13") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D#5") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D5") + + PORT_START("kbd:KI14") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C#5") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C5") + + PORT_START("kbd:KI15") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("B4") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A#4") + + PORT_START("kbd:KI16") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A4") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G#4") + + PORT_START("kbd:KI17") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G4") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F#4") + + PORT_START("kbd:KI18") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F4") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("E4") + + PORT_START("kbd:KI19") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D#4") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D4") + + PORT_START("kbd:KI20") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C#4") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C4") + + PORT_START("kbd:KI21") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("B3") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A#3") + + PORT_START("kbd:KI22") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A3") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G#3") + + PORT_START("kbd:KI23") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G3") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F#3") + + PORT_START("kbd:KI24") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F3") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("E3") + + PORT_START("kbd:KI25") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D#3") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D3") + + PORT_START("kbd:KI26") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C#3") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C3") + + PORT_START("kbd:KI27") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("B2") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A#2") + + PORT_START("kbd:KI28") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A2") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G#2") + + PORT_START("kbd:KI29") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G2") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F#2") + + PORT_START("kbd:KI30") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F2") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("E2") + + PORT_START("kbd:KI31") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D#2") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D2") + + PORT_START("kbd:KI32") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C#2") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C2") + + PORT_START("kbd:KI33") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("B1") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A#1") + + PORT_START("kbd:KI34") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("A1") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G#1") + + PORT_START("kbd:KI35") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("G1") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F#1") + + PORT_START("kbd:KI36") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("F1") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("E1") + + PORT_START("kbd:KI37") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D#1") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("D1") + + PORT_START("kbd:KI38") + PORT_BIT(0x1, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C#1") + PORT_BIT(0x2, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("C1") + + PORT_START("kbd:VELOCITY") + PORT_BIT(0x3f, 0x3f, IPT_POSITIONAL_V) PORT_NAME("Key Velocity") PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_CODE_DEC(JOYCODE_X_LEFT_SWITCH) PORT_CODE_INC(JOYCODE_X_RIGHT_SWITCH) + + PORT_START("AN0") + PORT_BIT(0xff, 0x7f, IPT_PADDLE) PORT_NAME("Pitch Wheel") PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_MINMAX(0x00, 0xff) PORT_CODE_DEC(JOYCODE_Y_DOWN_SWITCH) PORT_CODE_INC(JOYCODE_Y_UP_SWITCH) + + PORT_START("AN1") + PORT_BIT(0xff, 0x00, IPT_POSITIONAL_V) PORT_NAME("Modulation Wheel") PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(2) PORT_CODE_DEC(JOYCODE_Y_DOWN_SWITCH) PORT_CODE_INC(JOYCODE_Y_UP_SWITCH) + + PORT_START("AN2") + PORT_BIT(0xff, 0xff, IPT_POSITIONAL_V) PORT_NAME("Aftertouch") PORT_REVERSE PORT_SENSITIVITY(100) PORT_KEYDELTA(10) PORT_CENTERDELTA(0) PORT_PLAYER(3) PORT_CODE_DEC(JOYCODE_Y_DOWN_SWITCH) PORT_CODE_INC(JOYCODE_Y_UP_SWITCH) + + PORT_MODIFY("KC11") + PORT_BIT(0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Sustain Pedal") + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) + + PORT_MODIFY("KC12") + PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_CUSTOM) // low = MZ-1, high = CZ-1 + + PORT_START("MAIN_PC") + PORT_BIT(0x0f, IP_ACTIVE_LOW, IPT_UNUSED) + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(cz1_state, cont49_r) + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_CUSTOM) PORT_READ_LINE_MEMBER(cz1_state, sync49_r) + PORT_BIT(0xc0, IP_ACTIVE_LOW, IPT_UNUSED) +INPUT_PORTS_END + + +//************************************************************************** +// MACHINE EMULATION +//************************************************************************** + +void cz1_state::cz1_palette(palette_device &palette) const +{ + palette.set_pen_color(0, rgb_t(138, 146, 148)); // background + palette.set_pen_color(1, rgb_t( 63, 59, 62)); // LCD pixel on + palette.set_pen_color(2, rgb_t(131, 136, 139)); // LCD pixel off +} + +/**************************************************************************/ +HD44780_PIXEL_UPDATE( cz1_state::lcd_pixel_update ) +{ + // char size is 5x8 + if (x > 4 || y > 7) + return; + + if (line < 2 && pos < 16) + bitmap.pix(1 + y + line*8 + line, 1 + pos*6 + x) = state ? 1 : 2; +} + + +/**************************************************************************/ +u8 cz1_state::keys_r() +{ + return m_keys[m_main_port[0] & 0xf].read_safe(0xffff); +} + +/**************************************************************************/ +void cz1_state::led_w(offs_t offset, u8 data) +{ + for (int i = 0; i < 6; i++) + m_leds[offset][i] = BIT(data, i); +} + +/**************************************************************************/ +void cz1_state::volume_w(u8 data) +{ + const float vol = m_volume[~data & 0x3f]; + m_mixer[0]->set_output_gain(ALL_OUTPUTS, vol); + m_mixer[1]->set_output_gain(ALL_OUTPUTS, vol); +} + +/**************************************************************************/ +void cz1_state::stereo_w(u8 data) +{ + /* + bit 0: sound chip #1 routing (0: center, 1: left) + bit 1: sound chip #2 routing (0: center, 2: right) + bit 2: center channel stereo chorus (0: on, 1: off) + */ + m_mixer[0]->set_input_gain(1, BIT(data, 1) ? 0.0 : 1.0); + m_mixer[1]->set_input_gain(0, BIT(data, 0) ? 0.0 : 1.0); +} + +/**************************************************************************/ +void cz1_state::cart_addr_w(u8 data) +{ + m_cart_addr &= 0x3f00; + m_cart_addr |= ~data; +} + +/**************************************************************************/ +void cz1_state::cart_addr_hi_w(u8 data) +{ + m_cart_addr &= 0xff; + m_cart_addr |= (~data & 0x3f) << 8; +} + +/**************************************************************************/ +void cz1_state::main_pa_w(u8 data) +{ + m_hd44780->db_w(data); + m_main_port[0] = data; +} + +/**************************************************************************/ +u8 cz1_state::main_pa_r() +{ + u8 data = m_hd44780->db_r(); + if (!BIT(m_main_port[1], 2)) + data &= m_cart->read(m_cart_addr); + return data; +} + +/**************************************************************************/ +void cz1_state::main_pb_w(u8 data) +{ + if (BIT(data ^ m_main_port[1], 2)) + m_subcpu->set_input_line(UPD7810_INTF1, BIT(data, 2)); + + if (BIT(data, 4) && !BIT(m_main_port[1], 4) && BIT(m_main_port[1], 6)) + m_cart->write(m_cart_addr, m_main_port[0]); + + m_hd44780->e_w(BIT(~data, 7)); + m_hd44780->rw_w(BIT(data, 6)); + m_hd44780->rs_w(BIT(data, 5)); + + m_main_port[1] = data; +} + +/**************************************************************************/ +void cz1_state::main_pc_w(u8 data) +{ + m_main_port[2] = data; +} + + +/**************************************************************************/ +void cz1_state::sound_w(u8 data) +{ + m_upd933[0]->write(data); + m_upd933[1]->write(data); +} + +/**************************************************************************/ +u8 cz1_state::sound_r() +{ + return m_upd933[0]->read() & m_upd933[1]->read(); +} + +/**************************************************************************/ +void cz1_state::sub_pa_w(u8 data) +{ + for (int i = 0; i < 15; i++) + m_led_env[i] = (BIT(data, 0, 4) == i); + for (int i = 0; i < 8; i++) + m_led_tone[i] = !BIT(data, 7) && (BIT(data, 4, 3) == i); +} + +/**************************************************************************/ +void cz1_state::sub_pb_w(u8 data) +{ + for (int i = 0; i < 2; i++) + { + m_upd933[i]->id_w(BIT(data, 5)); + m_upd933[i]->cs_w(BIT(data, 2 + i)); + + m_upd933[i]->set_output_gain(ALL_OUTPUTS, BIT(data, 6) ? 0.0 : 1.0); + } +} + +/**************************************************************************/ +void cz1_state::sub_pc_w(u8 data) +{ + for (int i = 0; i < 8; i++) + m_led_bank[i] = !BIT(data, 0) && (BIT(data, 5, 3) == i); +} + +/**************************************************************************/ +void cz1_state::main_to_sub_0_w(u8 data) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(cz1_state::main_to_sub_0_cb), this), data); +} + +/**************************************************************************/ +TIMER_CALLBACK_MEMBER(cz1_state::main_to_sub_0_cb) +{ + m_main_to_sub[0] = param; + m_sync = 1; +} + +/**************************************************************************/ +u8 cz1_state::main_to_sub_0_r() +{ + if (!machine().side_effects_disabled()) + m_sync = 0; + return m_main_to_sub[0]; +} + +/**************************************************************************/ +void cz1_state::main_to_sub_1_w(u8 data) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(cz1_state::main_to_sub_1_cb), this), data); +} + +/**************************************************************************/ +TIMER_CALLBACK_MEMBER(cz1_state::main_to_sub_1_cb) +{ + m_main_to_sub[1] = param; +} + +/**************************************************************************/ +u8 cz1_state::main_to_sub_1_r() +{ + return m_main_to_sub[1]; +} + +/**************************************************************************/ +void cz1_state::sub_to_main_w(u8 data) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(cz1_state::sub_to_main_cb), this), data); +} + +/**************************************************************************/ +TIMER_CALLBACK_MEMBER(cz1_state::sub_to_main_cb) +{ + m_sub_to_main = param; +} + +/**************************************************************************/ +u8 cz1_state::sub_to_main_r() +{ + return m_sub_to_main; +} + +/**************************************************************************/ +int cz1_state::cont_r() +{ + return BIT(m_main_port[1], 3); +} + +/**************************************************************************/ +int cz1_state::sync_r() +{ + return m_sync; +} + +/**************************************************************************/ +void cz1_state::sync_clr_w(u8) +{ + machine().scheduler().synchronize(timer_expired_delegate(FUNC(cz1_state::sync_clr_cb), this), 0); +} + +/**************************************************************************/ +TIMER_CALLBACK_MEMBER(cz1_state::sync_clr_cb) +{ + m_sync = 0; +} + +/**************************************************************************/ +void cz1_state::main_irq_w(u8) +{ + m_maincpu->set_input_line(UPD7810_INTF1, ASSERT_LINE); +} + +/**************************************************************************/ +void cz1_state::main_irq_ack_w(u8) +{ + m_maincpu->set_input_line(UPD7810_INTF1, CLEAR_LINE); +} + +/**************************************************************************/ +u8 cz1_state::mcu_r() +{ + if (!machine().side_effects_disabled()) + m_sync49 = 0; + + return ~m_mcu->p1_r(); +} + +/**************************************************************************/ +void cz1_state::mcu_p2_w(u8 data) +{ + if (BIT(data ^ m_mcu_p2, 6)) + m_maincpu->set_input_line(UPD7810_INTF2, BIT(~data, 6)); + + if (BIT(~data & m_mcu_p2, 7)) + m_sync49 = 1; + + m_mcu_p2 = data; +} + +/**************************************************************************/ +int cz1_state::cont49_r() +{ + return BIT(m_mcu_p2, 5); +} + +/**************************************************************************/ +int cz1_state::sync49_r() +{ + return m_sync49; +} + +/**************************************************************************/ +void cz1_state::machine_start() +{ + m_leds.resolve(); + m_led_env.resolve(); + m_led_bank.resolve(); + m_led_tone.resolve(); + + // aftertouch amp levels (TODO: are these correct?) + for (int i = 0; i < 0x40; i++) + m_volume[i] = pow(2, (float)i / 0x3f) - 1.0; + + m_main_port[0] = m_main_port[1] = m_main_port[2] = 0xff; + m_mcu_p2 = 0xff; + + // register for save states + save_item(NAME(m_main_port)); + save_item(NAME(m_mcu_p2)); + save_item(NAME(m_midi_rx)); + save_item(NAME(m_cart_addr)); + save_item(NAME(m_main_to_sub)); + save_item(NAME(m_sub_to_main)); + save_item(NAME(m_sync)); + save_item(NAME(m_sync49)); +} + +/**************************************************************************/ +void cz1_state::machine_reset() +{ + m_main_to_sub[0] = m_main_to_sub[1] = 0; + m_sub_to_main = 0; + m_sync = 0; + m_sync49 = 1; + + m_cart_addr = 0; + m_midi_rx = 1; +} + + +//************************************************************************** +// MACHINE DEFINTIONS +//************************************************************************** + +void cz1_state::mz1(machine_config &config) +{ + UPD7810(config, m_maincpu, 15_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &cz1_state::mz1_main_map); + m_maincpu->pa_in_cb().set(FUNC(cz1_state::main_pa_r)); + m_maincpu->pa_out_cb().set(FUNC(cz1_state::main_pa_w)); + m_maincpu->pb_in_cb().set_ioport("MAIN_PB"); + m_maincpu->pb_out_cb().set(FUNC(cz1_state::main_pb_w)); + m_maincpu->pc_out_cb().set(FUNC(cz1_state::main_pc_w)); + + CLOCK(config, "midi_clock", 2_MHz_XTAL).signal_handler().set(m_maincpu, FUNC(upd7810_device::sck_w)); + + UPD7810(config, m_subcpu, 15_MHz_XTAL); + m_subcpu->set_addrmap(AS_PROGRAM, &cz1_state::sub_map); + m_subcpu->pa_out_cb().set(FUNC(cz1_state::sub_pa_w)); + m_subcpu->pb_in_cb().set_ioport("SUB_PB"); + m_subcpu->pb_out_cb().set(FUNC(cz1_state::sub_pb_w)); + m_subcpu->pc_in_cb().set_ioport("SUB_PC"); + m_subcpu->pc_out_cb().set(FUNC(cz1_state::sub_pc_w)); + + INPUT_MERGER_ANY_HIGH(config, "irq").output_handler().set_inputline(m_subcpu, UPD7810_INTF2); + + NVRAM(config, "mainram"); + NVRAM(config, "subram"); + CASIO_RA6(config, m_cart); + SOFTWARE_LIST(config, "cart_list").set_original("cz1_cart"); + + midi_port_device &mdin(MIDI_PORT(config, "mdin", midiin_slot, "midiin")); + mdin.rxd_handler().set([this] (int state) { m_midi_rx = state; }); + m_maincpu->rxd_func().set([this] () { return m_midi_rx; }); + + MIDI_PORT(config, "mdout", midiout_slot, "midiout"); + m_maincpu->txd_func().set("mdout", FUNC(midi_port_device::write_txd)); + + MIDI_PORT(config, "mdthru", midiout_slot, "midiout"); + mdin.rxd_handler().append("mdthru", FUNC(midi_port_device::write_txd)); + + // video hardware + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_LCD)); + screen.set_refresh_hz(50); + screen.set_vblank_time(ATTOSECONDS_IN_USEC(2500)); /* not accurate */ + screen.set_size(6*16 + 1, 19); + screen.set_visarea_full(); + screen.set_screen_update("hd44780", FUNC(hd44780_device::screen_update)); + screen.set_palette("palette"); + + PALETTE(config, "palette", FUNC(cz1_state::cz1_palette), 3); + + HD44780(config, m_hd44780, 250'000); // TODO: clock not measured, datasheet typical clock used + m_hd44780->set_lcd_size(2, 16); + m_hd44780->set_function_set_at_any_time(); + m_hd44780->set_pixel_update_cb(FUNC(cz1_state::lcd_pixel_update)); + + config.set_default_layout(layout_mz1); + + // sound hardware + SPEAKER(config, "lspeaker").front_left(); + SPEAKER(config, "rspeaker").front_right(); + + MIXER(config, m_mixer[0]).add_route(0, "lspeaker", 1.0); + MIXER(config, m_mixer[1]).add_route(0, "rspeaker", 1.0); + + UPD933(config, m_upd933[0], 8.96_MHz_XTAL / 2); + m_upd933[0]->irq_cb().set("irq", FUNC(input_merger_any_high_device::in_w<0>)); + m_upd933[0]->add_route(0, m_mixer[0], 1.0); + m_upd933[0]->add_route(0, m_mixer[1], 1.0); + + UPD933(config, m_upd933[1], 8.96_MHz_XTAL / 2); + m_upd933[1]->irq_cb().set("irq", FUNC(input_merger_any_high_device::in_w<1>)); + m_upd933[1]->add_route(0, m_mixer[0], 1.0); + m_upd933[1]->add_route(0, m_mixer[1], 1.0); +} + +/**************************************************************************/ +void cz1_state::cz1(machine_config &config) +{ + mz1(config); + m_maincpu->set_addrmap(AS_PROGRAM, &cz1_state::cz1_main_map); + m_maincpu->pc_in_cb().set_ioport("MAIN_PC"); + m_maincpu->an0_func().set_ioport("AN0"); + m_maincpu->an1_func().set_ioport("AN1"); + m_maincpu->an2_func().set_ioport("AN2"); + + I8049(config, m_mcu, 8.96_MHz_XTAL); + m_mcu->set_addrmap(AS_IO, &cz1_state::mcu_map); + m_mcu->p2_out_cb().set(FUNC(cz1_state::mcu_p2_w)); + m_mcu->t0_in_cb().set(FUNC(cz1_state::sync49_r)); + m_mcu->t1_in_cb().set([this] () { return BIT(m_main_port[2], 7); }); + + MSM6200(config, "kbd").irq_cb().set_inputline(m_mcu, MCS48_INPUT_IRQ); + + config.set_default_layout(layout_cz1); +} + +//************************************************************************** +// ROM DEFINITIONS +//************************************************************************** + +ROM_START( cz1 ) + ROM_REGION(0x8000, "maincpu", 0) + ROM_LOAD("upd27c256c-20a154.bin", 0x0000, 0x8000, CRC(a970ee65) SHA1(269f2e823ac6353eca9fdb682deebeb7d4d0f585)) + + ROM_REGION(0x2000, "mainram", 0) + ROM_LOAD("init_main.bin", 0x0000, 0x2000, CRC(25fbf88a) SHA1(b7eee5af1d3470ea951df3a019ba2e2a055e84c7)) + + ROM_REGION(0x4000, "subcpu", 0) + ROM_LOAD("upd23c128ec-036.bin", 0x0000, 0x4000, CRC(3cf23c4e) SHA1(b27ee664c31526058defd8e8666ec8e7828059a2)) + + ROM_REGION(0x4000, "subram", 0) + ROM_LOAD("init_sub.bin", 0x0000, 0x4000, CRC(c0b498af) SHA1(73c48bf5df0d3660c50c370286559a8d4cdb6b99)) + + ROM_REGION(0x800, "mcu", 0) // this dump is actually uPD80C49HC-187 from the HT-6000, though it appears functionally identical + ROM_LOAD("upd8049hc-672.bin", 0x000, 0x800, BAD_DUMP CRC(47b47af7) SHA1(8f0515f95dcc6e224a8a59e0c2cd7ddb4796e34e)) +ROM_END + +#define rom_mz1 rom_cz1 + +} // anonymous namespace + + +//************************************************************************** +// SYSTEM DRIVERS +//************************************************************************** + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS +SYST( 1986, cz1, 0, 0, cz1, cz1, cz1_state, empty_init, "Casio", "CZ-1", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND ) +SYST( 1986, mz1, cz1, 0, mz1, mz1, cz1_state, empty_init, "Casio", "MZ-1 (prototype)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK | MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/casio/cz101.cpp b/src/mame/casio/cz101.cpp index 5ebbc82490e37..731bf392259a8 100644 --- a/src/mame/casio/cz101.cpp +++ b/src/mame/casio/cz101.cpp @@ -94,7 +94,7 @@ class cz101_state : public driver_device required_device m_maincpu; required_device m_hd44780; required_device m_upd933; - required_device m_cart; + required_device m_cart; required_ioport_array<16> m_keys; output_finder<16> m_leds; output_finder<3, 4> m_led_env; @@ -117,7 +117,7 @@ void cz101_state::maincpu_map(address_map &map) map(0x0000, 0x7fff).rom().region("program", 0); map(0x8000, 0x8fff).ram().share("nvram"); - map(0x9000, 0x97ff).rw(m_cart, FUNC(casio_ra3_device::read), FUNC(casio_ra3_device::write)); + map(0x9000, 0x97ff).rw(m_cart, FUNC(casio_ram_cart_device::read), FUNC(casio_ram_cart_device::write)); map(0x9800, 0x9fff).w(FUNC(cz101_state::led_4_w)); map(0xa000, 0xa7ff).w(FUNC(cz101_state::led_3_w)); map(0xa800, 0xafff).w(FUNC(cz101_state::led_2_w)); @@ -249,7 +249,7 @@ static INPUT_PORTS_START( cz101 ) PORT_BIT(0x80, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_DEL) PORT_NAME("Env. Point End") PORT_START("kc13") - PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_CUSTOM) PORT_READ_LINE_DEVICE_MEMBER("cart", casio_ra3_device, present) + PORT_BIT(0x01, IP_ACTIVE_LOW, IPT_CUSTOM) PORT_READ_LINE_DEVICE_MEMBER("cart", casio_ram_cart_device, exists) PORT_BIT(0x02, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_A) PORT_NAME("Vibrato") PORT_BIT(0x04, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_S) PORT_NAME("DCO1 Wave Form") PORT_BIT(0x08, IP_ACTIVE_LOW, IPT_KEYPAD) PORT_CODE(KEYCODE_D) PORT_NAME("DCO1 Envelope") diff --git a/src/mame/casio/ra3.cpp b/src/mame/casio/ra3.cpp index acf8e73d53375..a56da78426b1a 100644 --- a/src/mame/casio/ra3.cpp +++ b/src/mame/casio/ra3.cpp @@ -13,67 +13,103 @@ // device type definition DEFINE_DEVICE_TYPE(CASIO_RA3, casio_ra3_device, "casio_ra3", "Casio RA-3 RAM cartridge") +DEFINE_DEVICE_TYPE(CASIO_RA6, casio_ra6_device, "casio_ra6", "Casio RA-6 RAM cartridge") /**************************************************************************/ -casio_ra3_device::casio_ra3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) - : device_t(mconfig, CASIO_RA3, tag, owner, clock) +casio_ram_cart_device::casio_ram_cart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, unsigned max_size) + : device_t(mconfig, type, tag, owner, clock) , device_memcard_image_interface(mconfig, *this) + , m_max_size(max_size) { + m_mask = max_size - 1; + m_size = 0; + + // only power-of-two sizes are supported + assert(!(m_max_size & m_mask)); } /**************************************************************************/ -void casio_ra3_device::device_start() +casio_ra3_device::casio_ra3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : casio_ram_cart_device(mconfig, CASIO_RA3, tag, owner, clock, 0x1000) { - m_ram.resize(0x1000, 0xff); +} + +/**************************************************************************/ +casio_ra6_device::casio_ra6_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) + : casio_ram_cart_device(mconfig, CASIO_RA6, tag, owner, clock, 0x4000) +{ +} + +/**************************************************************************/ +void casio_ram_cart_device::device_start() +{ + m_ram.resize(m_max_size, 0xff); save_item(NAME(m_ram)); } /**************************************************************************/ -std::pair casio_ra3_device::call_load() +std::pair casio_ram_cart_device::call_load() { - const size_t size = m_ram.size(); - if (length() != size) + const u32 size = loaded_through_softlist() ? get_software_region_length("rom") : length(); + + // size must be a power of two and at least 4kb + if (size < 0x1000 || (size & (size - 1))) return std::make_pair(image_error::INVALIDLENGTH, std::string()); - fseek(0, SEEK_SET); - const size_t ret = fread(m_ram.data(), size); - if (ret != size) - return std::make_pair(std::errc::io_error, "Error reading file"); + // allow loading larger than the maximum size (e.g. for CZ-1 ROM carts that use oversized ROMs) + m_size = std::min(size, m_max_size); + m_mask = m_size - 1; + + if (loaded_through_softlist()) + { + memcpy(m_ram.data(), get_software_region("rom"), m_size); + } + else + { + fseek(0, SEEK_SET); + const size_t ret = fread(m_ram.data(), m_size); + if (ret != m_size) + return std::make_pair(std::errc::io_error, "Error reading file"); + } return std::make_pair(std::error_condition(), std::string()); } /**************************************************************************/ -void casio_ra3_device::call_unload() +void casio_ram_cart_device::call_unload() { - fseek(0, SEEK_SET); - fwrite(m_ram.data(), m_ram.size()); + if (is_loaded()) + { + fseek(0, SEEK_SET); + fwrite(m_ram.data(), m_size); + } std::fill(m_ram.begin(), m_ram.end(), 0xff); } /**************************************************************************/ -std::pair casio_ra3_device::call_create(int format_type, util::option_resolution *format_options) +std::pair casio_ram_cart_device::call_create(int format_type, util::option_resolution *format_options) { std::fill(m_ram.begin(), m_ram.end(), 0); - const size_t size = m_ram.size(); - const size_t ret = fwrite(m_ram.data(), size); - if (ret != size) + m_size = m_max_size; + m_mask = m_max_size - 1; + const size_t ret = fwrite(m_ram.data(), m_size); + if (ret != m_size) return std::make_pair(std::errc::io_error, "Error writing file"); return std::make_pair(std::error_condition(), std::string()); } /**************************************************************************/ -u8 casio_ra3_device::read(offs_t offset) +u8 casio_ram_cart_device::read(offs_t offset) { - return m_ram[offset & 0xfff]; + return m_ram[offset & m_mask]; } /**************************************************************************/ -void casio_ra3_device::write(offs_t offset, u8 data) +void casio_ram_cart_device::write(offs_t offset, u8 data) { if (is_loaded()) - m_ram[offset & 0xfff] = data; + m_ram[offset & m_mask] = data; } diff --git a/src/mame/casio/ra3.h b/src/mame/casio/ra3.h index 48933c1e8a27d..e2eb6269dd364 100644 --- a/src/mame/casio/ra3.h +++ b/src/mame/casio/ra3.h @@ -9,14 +9,14 @@ #pragma once #include "imagedev/memcard.h" +#include "softlist_dev.h" #include -class casio_ra3_device : public device_t, public device_memcard_image_interface +class casio_ram_cart_device : public device_t, public device_memcard_image_interface { public: - casio_ra3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); - + virtual const char *image_interface() const noexcept override { return "cz_cart"; } virtual bool is_reset_on_load() const noexcept override { return false; } virtual const char *file_extensions() const noexcept override { return "bin"; } virtual const char *image_type_name() const noexcept override { return "cartridge"; } @@ -29,16 +29,32 @@ class casio_ra3_device : public device_t, public device_memcard_image_interface u8 read(offs_t offset); void write(offs_t offset, u8 data); - bool present() { return is_loaded(); } - protected: + casio_ram_cart_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, unsigned max_size); + virtual void device_start() override; + virtual const software_list_loader &get_software_list_loader() const override { return rom_software_list_loader::instance(); } private: std::vector m_ram; + const unsigned m_max_size; + unsigned m_size, m_mask; +}; + +class casio_ra3_device : public casio_ram_cart_device +{ +public: + casio_ra3_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); +}; + +class casio_ra6_device : public casio_ram_cart_device +{ +public: + casio_ra6_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock = 0); }; // device type definition DECLARE_DEVICE_TYPE(CASIO_RA3, casio_ra3_device) +DECLARE_DEVICE_TYPE(CASIO_RA6, casio_ra6_device) #endif // MAME_CASIO_RA3_H diff --git a/src/mame/chess/ave_arb.cpp b/src/mame/chess/ave_arb.cpp index 241aaf16c7982..89552a2f2e722 100644 --- a/src/mame/chess/ave_arb.cpp +++ b/src/mame/chess/ave_arb.cpp @@ -98,24 +98,24 @@ class arb_state : public driver_device optional_device m_cart; required_ioport_array<2> m_inputs; + u16 m_inp_mux = 0; + u16 m_led_select = 0; + u8 m_led_group = 0; + u8 m_led_latch = 0; + u16 m_led_data = 0; + + bool m_altboard = false; + void main_map(address_map &map); void v2_map(address_map &map); void init_board(int state); - bool m_altboard = false; - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); void update_display(); void leds_w(u8 data); void control_w(u8 data); u8 input_r(); - - u16 m_inp_mux = 0; - u16 m_led_select = 0; - u8 m_led_group = 0; - u8 m_led_latch = 0; - u16 m_led_data = 0; }; void arb_state::machine_start() diff --git a/src/mame/chess/cking_master.cpp b/src/mame/chess/cking_master.cpp index 3b6f92b2e6f63..38b10e67af723 100644 --- a/src/mame/chess/cking_master.cpp +++ b/src/mame/chess/cking_master.cpp @@ -66,6 +66,8 @@ class master_state : public driver_device required_device m_mainmap; required_ioport_array<2> m_inputs; + u8 m_inp_mux = 0; + // address maps void main_map(address_map &map); void main_trampoline(address_map &map); @@ -75,8 +77,6 @@ class master_state : public driver_device // I/O handlers u8 input_r(); void control_w(u8 data); - - u8 m_inp_mux = 0; }; diff --git a/src/mame/chess/compuchess.cpp b/src/mame/chess/compuchess.cpp index c4cc20f56825b..6f0b2ffd1e618 100644 --- a/src/mame/chess/compuchess.cpp +++ b/src/mame/chess/compuchess.cpp @@ -151,6 +151,11 @@ class cmpchess_state : public driver_device optional_device m_beeper; required_ioport_array<4> m_inputs; + u8 m_inp_mux = 0; + u8 m_digit_select = 0; + u8 m_digit_data = 0; + bool m_blink = false; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -173,11 +178,6 @@ class cmpchess_state : public driver_device void input_digit_select_w(u8 data) { input_w(data); digit_select_w(data); } void input_digit_data_w(u8 data) { input_w(data); digit_data_w(data); } - - u8 m_inp_mux = 0; - u8 m_digit_select = 0; - u8 m_digit_data = 0; - bool m_blink = false; }; diff --git a/src/mame/chess/conchess.cpp b/src/mame/chess/conchess.cpp index 4a5303b2210b1..ba5af49a26c00 100644 --- a/src/mame/chess/conchess.cpp +++ b/src/mame/chess/conchess.cpp @@ -112,6 +112,8 @@ class conchess_state : public driver_device required_device m_beeper; required_ioport_array<2> m_inputs; + u8 m_inp_mux = 0; + // address maps void main_map(address_map &map); @@ -120,8 +122,6 @@ class conchess_state : public driver_device u8 input_r(); void leds_w(offs_t offset, u8 data); void sound_w(u8 data); - - u8 m_inp_mux = 0; }; void conchess_state::machine_start() diff --git a/src/mame/chess/conic_cchess2.cpp b/src/mame/chess/conic_cchess2.cpp index 341c2482edce0..6561e625798c5 100644 --- a/src/mame/chess/conic_cchess2.cpp +++ b/src/mame/chess/conic_cchess2.cpp @@ -73,6 +73,10 @@ class cchess2_state : public driver_device required_device m_dac; required_ioport_array<8> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + int m_dac_on = 0; + // address maps void main_map(address_map &map); @@ -84,10 +88,6 @@ class cchess2_state : public driver_device u8 pia1_pa_r(); u8 pia1_pb_r(); void pia1_pb_w(u8 data); - - u8 m_inp_mux = 0; - u8 m_led_data = 0; - int m_dac_on = 0; }; void cchess2_state::machine_start() diff --git a/src/mame/chess/regence.cpp b/src/mame/chess/regence.cpp index 7b853de0ac2a5..091d472c538a8 100644 --- a/src/mame/chess/regence.cpp +++ b/src/mame/chess/regence.cpp @@ -69,6 +69,10 @@ class regence_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + bool m_power = false; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + // address maps void main_map(address_map &map); @@ -77,10 +81,6 @@ class regence_state : public driver_device void control_w(u8 data); void leds_w(u8 data); u8 input_r(); - - bool m_power = false; - u8 m_inp_mux = 0; - u8 m_led_data = 0; }; void regence_state::machine_start() diff --git a/src/mame/chess/tasc.cpp b/src/mame/chess/tasc.cpp index dead0da77fffd..4c691890be525 100644 --- a/src/mame/chess/tasc.cpp +++ b/src/mame/chess/tasc.cpp @@ -110,6 +110,12 @@ class tasc_state : public driver_device required_ioport_array<4> m_inputs; output_finder<2> m_out_leds; + bool m_bootrom_enabled = false; + + u32 m_control = 0; + u32 m_prev_pc = 0; + u64 m_prev_cycle = 0; + void main_map(address_map &map); // I/O handlers @@ -123,11 +129,6 @@ class tasc_state : public driver_device void set_cpu_freq(); void install_bootrom(bool enable); TIMER_DEVICE_CALLBACK_MEMBER(disable_bootrom) { install_bootrom(false); } - bool m_bootrom_enabled = false; - - u32 m_control = 0; - u32 m_prev_pc = 0; - u64 m_prev_cycle = 0; }; void tasc_state::machine_start() diff --git a/src/mame/chess/yeno_532xl.cpp b/src/mame/chess/yeno_532xl.cpp index e501766d2a293..50121c4ba14dc 100644 --- a/src/mame/chess/yeno_532xl.cpp +++ b/src/mame/chess/yeno_532xl.cpp @@ -70,6 +70,10 @@ class y532xl_state : public driver_device output_finder<8> m_out_digit; output_finder<64> m_out_lcd; + u8 m_led_data = 0; + u8 m_cb_mux = 0xff; + u8 m_control = 0xff; + // address maps void main_map(address_map &map); @@ -80,10 +84,6 @@ class y532xl_state : public driver_device void cb_w(u8 data); void led_w(u8 data); void control_w(offs_t offset, u8 data); - - u8 m_led_data = 0; - u8 m_cb_mux = 0xff; - u8 m_control = 0xff; }; void y532xl_state::machine_start() diff --git a/src/mame/commodore/chessmate.cpp b/src/mame/commodore/chessmate.cpp index f2a396af7222e..a9fc5c711302e 100644 --- a/src/mame/commodore/chessmate.cpp +++ b/src/mame/commodore/chessmate.cpp @@ -88,6 +88,10 @@ class chmate_state : public driver_device required_device m_dac; optional_ioport_array<5> m_inputs; + u8 m_inp_mux = 0; + u8 m_7seg_data = 0; + u8 m_led_data = 0; + // address maps void main_map(address_map &map); @@ -96,10 +100,6 @@ class chmate_state : public driver_device void control_w(u8 data); void digit_w(u8 data); u8 input_r(); - - u8 m_inp_mux = 0; - u8 m_7seg_data = 0; - u8 m_led_data = 0; }; void chmate_state::machine_start() diff --git a/src/mame/commodore/kim1.cpp b/src/mame/commodore/kim1.cpp index caccdc99b3dbd..67c86cce8e607 100644 --- a/src/mame/commodore/kim1.cpp +++ b/src/mame/commodore/kim1.cpp @@ -114,6 +114,12 @@ class kim1_state : public driver_device required_ioport_array<3> m_row; required_ioport m_special; + int m_sync_state = 0; + bool m_k7 = false; + uint8_t m_u2_port_b = 0; + uint8_t m_311_output = 0; + uint32_t m_cassette_high_count = 0; + void mem_map(address_map &map); void sync_map(address_map &map); @@ -126,12 +132,6 @@ class kim1_state : public driver_device void u2_write_b(uint8_t data); TIMER_DEVICE_CALLBACK_MEMBER(cassette_input); - - int m_sync_state = 0; - bool m_k7 = false; - uint8_t m_u2_port_b = 0; - uint8_t m_311_output = 0; - uint32_t m_cassette_high_count = 0; }; void kim1_state::machine_start() diff --git a/src/mame/cxg/ch2001.cpp b/src/mame/cxg/ch2001.cpp index fcbb44b84237f..bb2f7494ca634 100644 --- a/src/mame/cxg/ch2001.cpp +++ b/src/mame/cxg/ch2001.cpp @@ -62,6 +62,9 @@ class ch2001_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + u16 m_inp_mux = 0; + int m_dac_data = 0; + // address maps void main_map(address_map &map); @@ -69,9 +72,6 @@ class ch2001_state : public driver_device void speaker_w(u8 data); void leds_w(u8 data); u8 input_r(); - - u16 m_inp_mux = 0; - int m_dac_data = 0; }; void ch2001_state::machine_start() diff --git a/src/mame/cxg/dominator.cpp b/src/mame/cxg/dominator.cpp index e9f4df6b377e9..83621d9519c01 100644 --- a/src/mame/cxg/dominator.cpp +++ b/src/mame/cxg/dominator.cpp @@ -202,7 +202,7 @@ static INPUT_PORTS_START( dominator ) PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_L) PORT_NAME("Level") PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_NAME("Hint") PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_R) PORT_NAME("Replay") - PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) PORT_CODE(KEYCODE_BACKSPACE) PORT_CODE(KEYCODE_DEL) PORT_NAME("Library/Clear") + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) PORT_NAME("Library/Clear") PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_S) PORT_CODE(KEYCODE_C) PORT_NAME("Sound/Colour") PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) PORT_NAME("Enter Position") PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_NAME("New Game") @@ -231,7 +231,7 @@ static INPUT_PORTS_START( galaxy ) PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_NAME("New Game") PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) PORT_NAME("Enter Position") PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_S) PORT_CODE(KEYCODE_C) PORT_NAME("Sound/Color") - PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) PORT_CODE(KEYCODE_BACKSPACE) PORT_CODE(KEYCODE_DEL) PORT_NAME("Library/Clearboard") + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) PORT_NAME("Library/Clearboard") PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_U) PORT_NAME("Multi Move") PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_L) PORT_NAME("Level") PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_NAME("Hint") diff --git a/src/mame/cxg/scptchess.cpp b/src/mame/cxg/scptchess.cpp index 573ac7f71b31d..a922b966f4216 100644 --- a/src/mame/cxg/scptchess.cpp +++ b/src/mame/cxg/scptchess.cpp @@ -98,13 +98,13 @@ class scptchess_state : public driver_device required_device m_dac; required_ioport m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + void update_display(); template void mux_w(u8 data); void leds_w(u16 data); u16 input_r(); - - u8 m_inp_mux = 0; - u8 m_led_data = 0; }; void scptchess_state::machine_start() diff --git a/src/mame/cxg/senterprise.cpp b/src/mame/cxg/senterprise.cpp new file mode 100644 index 0000000000000..f9f562f2a1629 --- /dev/null +++ b/src/mame/cxg/senterprise.cpp @@ -0,0 +1,246 @@ +// license:BSD-3-Clause +// copyright-holders:hap +// thanks-to:Sean Riddle +/******************************************************************************* + +CXG Super Enterprise + +The chess engine is Kaare Danielsen's Enterprise program. It's the 16KB 'sequel' +to LogiChess used in Enterprise "S" (emulated in saitek/companion2.cpp). + +NOTE: It triggers an NMI when the power switch is changed from ON to SAVE. +If this is not done, NVRAM won't save properly. + +TODO: +- if/when MAME supports an exit callback, hook up power-off NMI to that +- dump/add model 210.C (it has two small LCDs like Sphinx Galaxy) + +Hardware notes: +- PCB label (Super Crown): CXG 218-600-001 +- Hitachi HD6301Y0 (mode 2), 8MHz XTAL +- 2KB battery-backed RAM (HM6116LP-3) +- chessboard buttons, 24 LEDs, piezo + +210 MCU is used in: +- CXG Super Enterprise (model 210, black/brown/blue) +- CXG Advanced Star Chess (model 211) +- CXG Super Crown (model 218, black/brown) +- Mephisto Merlin 16K (H+G brand Super Crown) + +210C MCU is used in: +- CXG Super Enterprise (model 210.C) +- CXG Sphinx Titan (model 270, suspected) + +*******************************************************************************/ + +#include "emu.h" + +#include "cpu/m6800/m6801.h" +#include "machine/nvram.h" +#include "machine/sensorboard.h" +#include "sound/dac.h" +#include "video/pwm.h" + +#include "speaker.h" + +// internal artwork +#include "cxg_senterprise.lh" + + +namespace { + +class senterp_state : public driver_device +{ +public: + senterp_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu"), + m_board(*this, "board"), + m_display(*this, "display"), + m_dac(*this, "dac"), + m_inputs(*this, "IN.%u", 0) + { } + + DECLARE_INPUT_CHANGED_MEMBER(power_off); + + void senterp(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + // devices/pointers + required_device m_maincpu; + required_device m_board; + required_device m_display; + required_device m_dac; + required_ioport_array<2> m_inputs; + + u8 m_inp_mux = 0; + + void main_map(address_map &map); + + // I/O handlers + u8 input1_r(); + u8 input2_r(); + void control_w(u8 data); + void mux_w(u8 data); +}; + +void senterp_state::machine_start() +{ + save_item(NAME(m_inp_mux)); +} + + + +/******************************************************************************* + I/O +*******************************************************************************/ + +INPUT_CHANGED_MEMBER(senterp_state::power_off) +{ + // NMI when power switch is set to SAVE, which will trigger standby mode + if (newval && !m_maincpu->standby()) + m_maincpu->pulse_input_line(INPUT_LINE_NMI, attotime::zero); +} + +u8 senterp_state::input1_r() +{ + u8 data = 0; + + // P20,P21: read buttons + for (int i = 0; i < 2; i++) + if (m_inp_mux & m_inputs[i]->read()) + data |= 1 << i; + + // P26,P27: freq sel + return ~data ^ 0x80; +} + +u8 senterp_state::input2_r() +{ + u8 data = 0; + + // P50-P57: read chessboard + for (int i = 0; i < 8; i++) + if (BIT(m_inp_mux, i)) + data |= m_board->read_rank(i); + + return ~data; +} + +void senterp_state::control_w(u8 data) +{ + // P22: speaker out + m_dac->write(BIT(data, 2)); + + // P23-P25: led select + m_display->write_my(~data >> 3 & 7); +} + +void senterp_state::mux_w(u8 data) +{ + // P60-P67: input mux, led data + m_inp_mux = ~data; + m_display->write_mx(m_inp_mux); +} + + + +/******************************************************************************* + Address Maps +*******************************************************************************/ + +void senterp_state::main_map(address_map &map) +{ + map(0x4000, 0x47ff).mirror(0x3800).ram().share("nvram"); +} + + + +/******************************************************************************* + Input Ports +*******************************************************************************/ + +static INPUT_PORTS_START( senterp ) + PORT_START("IN.0") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_O) PORT_NAME("Move") + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) PORT_NAME("Take Back") + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_6) PORT_CODE(KEYCODE_6_PAD) PORT_NAME("Pawn") + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_5) PORT_CODE(KEYCODE_5_PAD) PORT_NAME("Knight") + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_4) PORT_CODE(KEYCODE_4_PAD) PORT_NAME("Bishop") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_3) PORT_CODE(KEYCODE_3_PAD) PORT_NAME("Rook") + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("Queen") + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_1) PORT_CODE(KEYCODE_1_PAD) PORT_NAME("King") + + PORT_START("IN.1") + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_M) PORT_NAME("Multi Move") + PORT_BIT(0x02, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_L) PORT_NAME("Level") + PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_H) PORT_NAME("Hint") + PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_Y) PORT_NAME("Time") + PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_I) PORT_NAME("Library/Clearboard") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_S) PORT_CODE(KEYCODE_C) PORT_NAME("Sound/Color") + PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_E) PORT_NAME("Enter Position") + PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_NAME("New Game") + + PORT_START("POWER") // needs to be triggered for nvram to work + PORT_BIT(0x01, IP_ACTIVE_HIGH, IPT_OTHER) PORT_CODE(KEYCODE_F1) PORT_CHANGED_MEMBER(DEVICE_SELF, senterp_state, power_off, 0) PORT_NAME("Power Off") +INPUT_PORTS_END + + + +/******************************************************************************* + Machine Configs +*******************************************************************************/ + +void senterp_state::senterp(machine_config &config) +{ + // basic machine hardware + HD6301Y0(config, m_maincpu, 8_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &senterp_state::main_map); + m_maincpu->nvram_enable_backup(true); + m_maincpu->standby_cb().set(m_maincpu, FUNC(hd6301y0_cpu_device::nvram_set_battery)); + m_maincpu->standby_cb().append([this](int state) { if (state) m_display->clear(); }); + m_maincpu->in_p2_cb().set(FUNC(senterp_state::input1_r)); + m_maincpu->out_p2_cb().set(FUNC(senterp_state::control_w)); + m_maincpu->in_p5_cb().set(FUNC(senterp_state::input2_r)); + m_maincpu->out_p6_cb().set(FUNC(senterp_state::mux_w)); + + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + + SENSORBOARD(config, m_board).set_type(sensorboard_device::BUTTONS); + m_board->init_cb().set(m_board, FUNC(sensorboard_device::preset_chess)); + m_board->set_delay(attotime::from_msec(150)); + m_board->set_nvram_enable(true); + + // video hardware + PWM_DISPLAY(config, m_display).set_size(3, 8); + config.set_default_layout(layout_cxg_senterprise); + + // sound hardware + SPEAKER(config, "speaker").front_center(); + DAC_1BIT(config, m_dac).add_route(ALL_OUTPUTS, "speaker", 0.25); +} + + + +/******************************************************************************* + ROM Definitions +*******************************************************************************/ + +ROM_START( senterp ) + ROM_REGION( 0x4000, "maincpu", 0 ) + ROM_LOAD("1985_210_newcrest_hd6301y0a14p", 0x0000, 0x4000, CRC(871719c8) SHA1(8c0f5bef2573b9cbebe87be3a899fec6308603be) ) +ROM_END + +} // anonymous namespace + + + +/******************************************************************************* + Drivers +*******************************************************************************/ + +// YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY, FULLNAME, FLAGS +SYST( 1986, senterp, 0, 0, senterp, senterp, senterp_state, empty_init, "CXG Systems / Newcrest Technology", "Super Enterprise (model 210)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) diff --git a/src/mame/cxg/sphinx40.cpp b/src/mame/cxg/sphinx40.cpp index a65daf5186cea..9a7831bef8dc5 100644 --- a/src/mame/cxg/sphinx40.cpp +++ b/src/mame/cxg/sphinx40.cpp @@ -93,6 +93,10 @@ class sphinx40_state : public driver_device output_finder<8> m_out_digit; output_finder<64> m_out_lcd; + u8 m_cb_mux = 0; + u8 m_led_data = 0; + u8 m_inp_mux = 0; + // address maps void main_map(address_map &map); @@ -110,10 +114,6 @@ class sphinx40_state : public driver_device u8 nvram_r(offs_t offset) { return m_nvram[offset]; } void nvram_w(offs_t offset, u8 data) { m_nvram[offset] = data; } - - u8 m_cb_mux = 0; - u8 m_led_data = 0; - u8 m_inp_mux = 0; }; void sphinx40_state::machine_start() diff --git a/src/mame/dataeast/astrof.cpp b/src/mame/dataeast/astrof.cpp index 2928919d954c5..26332acdffd1b 100644 --- a/src/mame/dataeast/astrof.cpp +++ b/src/mame/dataeast/astrof.cpp @@ -1052,7 +1052,7 @@ ROM_START( astrof3 ) ROM_END // from an original Taito PCB with silkscreen -ROM_START( astroft ) +ROM_START( astroft ) ROM_REGION( 0x10000, "maincpu", 0 ) ROM_LOAD( "as_19.bin", 0xd000, 0x0800, CRC(fa9e5607) SHA1(246a3591196939ecca9088f44035cceb4ee3531e) ) ROM_LOAD( "as_18.bin", 0xd800, 0x0800, CRC(1c104d3d) SHA1(20015808ad87421e90c0eac806bb39dee5226b51) ) diff --git a/src/mame/ddr/chessmst.cpp b/src/mame/ddr/chessmst.cpp index 043b103d0221a..1d860d3ad2da6 100644 --- a/src/mame/ddr/chessmst.cpp +++ b/src/mame/ddr/chessmst.cpp @@ -74,6 +74,9 @@ class chessmst_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + u16 m_matrix = 0; + u8 m_led_data[2] = { 0, 0 }; + void chessmst_io(address_map &map); void chessmst_mem(address_map &map); @@ -83,9 +86,6 @@ class chessmst_state : public driver_device void pio2_port_b_w(u8 data); void update_leds(); - - u16 m_matrix = 0; - u8 m_led_data[2] = { 0, 0 }; }; void chessmst_state::machine_start() diff --git a/src/mame/ddr/chessmstdm.cpp b/src/mame/ddr/chessmstdm.cpp index 7e6a5e7876f53..aaf92c7fa25a6 100644 --- a/src/mame/ddr/chessmstdm.cpp +++ b/src/mame/ddr/chessmstdm.cpp @@ -78,6 +78,13 @@ class chessmstdm_state : public driver_device required_ioport_array<2> m_inputs; output_finder<4> m_digits; + u16 m_matrix = 0; + u8 m_led_data = 0; + u8 m_direct_leds = 0; + u8 m_digit_matrix = 0; + int m_digit_dot = 0; + u16 m_digit_data = 0; + void chessmstdm_mem(address_map &map); void chessmstdm_io(address_map &map); @@ -91,13 +98,6 @@ class chessmstdm_state : public driver_device void update_leds(); void update_digits(); - - u16 m_matrix = 0; - u8 m_led_data = 0; - u8 m_direct_leds = 0; - u8 m_digit_matrix = 0; - int m_digit_dot = 0; - u16 m_digit_data = 0; }; void chessmstdm_state::machine_start() diff --git a/src/mame/ddr/lc80.cpp b/src/mame/ddr/lc80.cpp index fd6bcb656ecab..77277252d996f 100644 --- a/src/mame/ddr/lc80.cpp +++ b/src/mame/ddr/lc80.cpp @@ -105,6 +105,8 @@ class lc80_state : public driver_device required_ioport_array<6> m_inputs; output_finder<> m_halt_led; + u8 m_matrix = 0; + void lc80_mem(address_map &map); void lc80a_mem(address_map &map); void lc80e_mem(address_map &map); @@ -119,8 +121,6 @@ class lc80_state : public driver_device u8 pio1_pb_r(); void pio1_pb_w(u8 data); u8 pio2_pb_r(); - - u8 m_matrix = 0; }; diff --git a/src/mame/ddr/poly880.cpp b/src/mame/ddr/poly880.cpp index 1cc0c3b584cfe..80331c0719f32 100644 --- a/src/mame/ddr/poly880.cpp +++ b/src/mame/ddr/poly880.cpp @@ -90,6 +90,9 @@ class poly880_state : public driver_device required_device m_cassette; required_ioport_array<3> m_inputs; + u8 m_matrix = 0; + bool m_nmi = false; + void poly880_io(address_map &map); void poly880_mem(address_map &map); void poly880s_mem(address_map &map); @@ -100,9 +103,6 @@ class poly880_state : public driver_device void pio1_pa_w(u8 data); u8 pio1_pb_r(); void pio1_pb_w(u8 data); - - u8 m_matrix = 0; - bool m_nmi = false; }; diff --git a/src/mame/ddr/sc2.cpp b/src/mame/ddr/sc2.cpp index 520b5e217649c..b998b7ac8a5d8 100644 --- a/src/mame/ddr/sc2.cpp +++ b/src/mame/ddr/sc2.cpp @@ -71,12 +71,12 @@ class sc2_state : public driver_device required_device m_dac; required_ioport_array<4> m_inputs; - void main_io(address_map &map); - void main_map(address_map &map); - u8 m_inp_mux = 0; u8 m_digit_data = 0; + void main_io(address_map &map); + void main_map(address_map &map); + void update_display(); u8 pio_port_b_r(); void pio_port_a_w(u8 data); diff --git a/src/mame/ddr/slc1.cpp b/src/mame/ddr/slc1.cpp index c9e1753fb5252..f96e3f476e8cd 100644 --- a/src/mame/ddr/slc1.cpp +++ b/src/mame/ddr/slc1.cpp @@ -95,14 +95,14 @@ class slc1_state : public driver_device required_device m_display; output_finder<> m_busyled; + u8 m_select = 0; + u8 m_segment = 0; + void mem_map(address_map &map); void io_map(address_map &map); u8 input_r(); void control_w(offs_t offset, u8 data); - - u8 m_select = 0; - u8 m_segment = 0; }; void slc1_state::machine_start() diff --git a/src/mame/dynax/ddenlovr.cpp b/src/mame/dynax/ddenlovr.cpp index cae9f328bb3fe..da382e389f908 100644 --- a/src/mame/dynax/ddenlovr.cpp +++ b/src/mame/dynax/ddenlovr.cpp @@ -43,6 +43,7 @@ Year + Game Board CPU Sound 1996 Mj Janshin Plus NM7001004 Z80 YMZ284 YM2413 M6295 TZ-2053P 1996 Mj Dai Touyouken NM7001004 Z80 YMZ284 YM2413 M6295 TZ-2053P 1996 Return Of Sel Jan II NM504-2 Z80 YM2149 YM2413 M6295 TZ-2053P? +1996 Return Of Sel Jan II NM5020403 Z80 YMZ284 YM2413 M6295 70C160F011? 1997 Hana Kagerou KC80 YM2413 M6295 70C160F011 1997 Kkot Bi Nyo 9090123-2 KC80 YM2413 M6295 70C160F011 A1010 1997 Kkot Bi Nyo Special 9090123-3 KC80 YM2413 M6295 ? @@ -13026,6 +13027,24 @@ ROM_START( sryudens ) ROM_LOAD( "50201.1c", 0x00000, 0x80000, CRC(5a8cd45c) SHA1(25ca573b8ba226fb3f2de48c57b5ced6884eaa63) ) ROM_END +ROM_START( seljan2a ) // same PCB as sryudens + ROM_REGION( 0x90000+16*0x1000, "maincpu", 0 ) // Z80 Code + ROM_LOAD( "50802.5c", 0x00000, 0x80000, CRC(2ccc37ad) SHA1(35d8891f7a68eda16c29d9039a75d0dd384d4b94) ) + ROM_RELOAD( 0x10000, 0x80000 ) + + ROM_REGION( 0x4c0000, "blitter", 0 ) // 14d, 14f and 15f empty. ROMs are accessed out of order. Is there a PAL governing this? Scratched IC at 12c might be it + ROM_LOAD( "50808.13f", 0x000000, 0x100000, CRC(97daddfc) SHA1(4e88e6e444e19b94f81160052f24546ee0b36d25) ) + ROM_LOAD( "50803.13b", 0x100000, 0x100000, CRC(5c7ffbdf) SHA1(c7072add7c8eaef400f3f35fed028c8ec7f2a2a2) ) + ROM_LOAD( "50809.15j", 0x200000, 0x100000, CRC(e2f7b62a) SHA1(62abe92484bd3854efa23f6d8576a34491882f0f) ) + ROM_LOAD( "50806.13d", 0x300000, 0x080000, CRC(8f34a31c) SHA1(9b56a462f871d935806b6594f07fa1e4214f9186) ) + ROM_LOAD( "50807.15d", 0x380000, 0x080000, CRC(2fdd3b49) SHA1(db27d5d9f74f532ab4e9b8ffa81eef2fae2ef6fd) ) + ROM_LOAD( "50805.15b", 0x400000, 0x080000, CRC(39ad357a) SHA1(899e369d7396ed40803df7c575199a65b18c046e) ) + ROM_LOAD( "50804.14b", 0x480000, 0x040000, CRC(073b52a7) SHA1(acd372a9093111bd95351b1cf63b1ad37019a188) ) + + ROM_REGION( 0x80000, "oki", 0 ) // samples, same as seljan2 and sryudens + ROM_LOAD( "50801.1c", 0x00000, 0x80000, CRC(5a8cd45c) SHA1(25ca573b8ba226fb3f2de48c57b5ced6884eaa63) ) +ROM_END + /*************************************************************************** Mahjong Daimyojin @@ -13320,6 +13339,7 @@ GAME( 1996, dtoyoken, 0, dtoyoken, dtoyoken, ddenlovr_state, empty_init GAME( 1996, sryudens, 0, sryudens, sryudens, ddenlovr_state, empty_init, ROT0, "Dynax / Face", "Mahjong Seiryu Densetsu [BET] (Japan, NM502)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, seljan2, 0, seljan2, seljan2, ddenlovr_state, empty_init, ROT0, "Dynax / Face", "Return Of Sel Jan II [BET] (Japan, NM557)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1996, seljan2a, seljan2, sryudens, seljan2, ddenlovr_state, empty_init, ROT0, "Dynax / Face", "Return Of Sel Jan II [BET] (Japan, NM508)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) GAME( 1996, mjflove, 0, mjflove, mjflove, ddenlovr_state, empty_init, ROT0, "Nakanihon", "Mahjong Fantasic Love (Japan)", MACHINE_NO_COCKTAIL | MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/dynax/royalmah.cpp b/src/mame/dynax/royalmah.cpp index fd168c8366996..cfa8a5770d3bf 100644 --- a/src/mame/dynax/royalmah.cpp +++ b/src/mame/dynax/royalmah.cpp @@ -809,7 +809,7 @@ void royalmah_prgbank_state::ichiban_map(address_map &map) { map(0x0000, 0x6fff).rom().region("maincpu", 0x10000); map(0x7000, 0x7fff).ram().share("nvram"); - map(0x8000, 0xffff).bankr(m_mainbank); // TODO: proper range for banked ROM + map(0x8000, 0xffff).bankr(m_mainbank); map(0x8000, 0xffff).writeonly().share(m_videoram); } @@ -943,16 +943,16 @@ void royalmah_prgbank_state::mjsiyoub_iomap(address_map &map) map(0x40, 0x49).w(FUNC(royalmah_prgbank_state::mjyarou_bank_w)); } -void royalmah_prgbank_state::ichiban_iomap(address_map &map) // TODO: writes to 0x12 and 0x14, probably code and palette banking +void royalmah_prgbank_state::ichiban_iomap(address_map &map) { map.global_mask(0xff); map(0x01, 0x01).r("aysnd", FUNC(ym2149_device::data_r)); map(0x02, 0x03).w("aysnd", FUNC(ym2149_device::data_address_w)); map(0x10, 0x10).portr("DSW-A").w(FUNC(royalmah_prgbank_state::mjderngr_coin_w)); map(0x11, 0x11).portr("SYSTEM").w(FUNC(royalmah_prgbank_state::input_port_select_w)); - map(0x12, 0x12).portr("DSW-B").nopw(); + map(0x12, 0x12).portr("DSW-B").lw8(NAME([this] (uint8_t data) { m_mainbank->set_entry(data); })); // TODO: only seems to write 0x00, 0x01, 0x02 and 0x04. How does the banking really work? map(0x13, 0x13).portr("DSW-C"); - map(0x14, 0x14).portr("DSW-D").nopw(); + map(0x14, 0x14).portr("DSW-D").lw8(NAME([this] (uint8_t data) { m_palette_base = data & 0x1f; })); // TODO: also uses bits 5 and 6 map(0x16, 0x17).w("ymsnd", FUNC(ym2413_device::write)); } @@ -5772,11 +5772,26 @@ HSync - 15.510kHz ***************************************************************************/ -ROM_START( ichiban ) +ROM_START( ichiban ) // TODO: how does the banking work? ROM_REGION( 0x60000, "maincpu", 0 ) // opcodes in first half are mixed with pseudo-random garbage ROM_LOAD( "3.u15", 0x00000, 0x20000, CRC(76240568) SHA1(cf055d1eaae25661a49ec4722a2c7caca862e66a) ) - ROM_LOAD( "2.u14", 0x20000, 0x20000, CRC(b4834d8e) SHA1(836ddf7586dc5440faf88f5ec50a32265e9a0ec8) ) - ROM_LOAD( "1.u28", 0x40000, 0x20000, CRC(2caa4d3f) SHA1(5e5af164880140b764c097a65388c22ba5ea572b) ) // ? + ROM_LOAD( "1.u28", 0x20000, 0x08000, CRC(2caa4d3f) SHA1(5e5af164880140b764c097a65388c22ba5ea572b) ) // bank 2 (title screen) + ROM_IGNORE(0x18000) + ROM_LOAD( "2.u14", 0x30000, 0x08000, CRC(b4834d8e) SHA1(836ddf7586dc5440faf88f5ec50a32265e9a0ec8) ) // bank 4 (mahjong tiles) + ROM_IGNORE(0x18000) + + // 1.u28 + // 1st 0x8000 contain title screen + // 2nd 0x8000 contain paytable + // 3rd 0x8000 contain in-game background + // 4th 0x8000 contain double up screen + + // 2.u14 + // 1st 0x8000 contain mahjong tiles (resulting in bad GFX for player's hand' tiles) + // 2nd 0x8000 contain mahjong tiles + // 3rd 0x8000 contain reels? + // 4th 0x8000 empty + ROM_REGION( 0x600, "proms", 0 ) ROM_LOAD( "mjr.u36", 0x000, 0x200, CRC(31cd7a90) SHA1(1525ad19d748561a52626e4ab13df67d9bedf3b8) ) @@ -5979,7 +5994,7 @@ void royalmah_prgbank_state::init_chalgirl() void royalmah_prgbank_state::init_ichiban() { // TODO: work out banking - m_mainbank->configure_entry(0, memregion("maincpu")->base() + 0x18000); + m_mainbank->configure_entries(0, 8, memregion("maincpu")->base() + 0x10000, 0x8000); } void royalmah_prgbank_state::init_pongboo2() @@ -6031,7 +6046,7 @@ GAME( 1991, mjvegasa, 0, mjvegasa, mjvegasa, royalmah_prgbank_state, ini GAME( 1991, mjvegas, mjvegasa, mjvegas, mjvegasa, royalmah_prgbank_state, init_mjvegas, ROT0, "Dynax", "Mahjong Vegas (Japan)", 0 ) GAME( 1992, cafetime, 0, cafetime, cafetime, royalmah_prgbank_state, init_cafetime, ROT0, "Dynax", "Mahjong Cafe Time", 0 ) GAME( 1993, cafedoll, 0, cafedoll, cafetime, royalmah_prgbank_state, init_cafedoll, ROT0, "Dynax", "Mahjong Cafe Doll (Japan, Ver. 1.00)", MACHINE_NOT_WORKING ) // needs correct banking implementation (P3 seems to be used differently) -GAME( 1993, ichiban, 0, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "Excel", "Ichi Ban Jyan", MACHINE_NOT_WORKING | MACHINE_WRONG_COLORS | MACHINE_IMPERFECT_SOUND ) // should just need correct palette and ROM banking +GAME( 1993, ichiban, 0, ichiban, ichiban, royalmah_prgbank_state, init_ichiban, ROT0, "Excel", "Ichi Ban Jyan", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // ROM banking is wrong, causing several GFX problems GAME( 1995, mjtensin, 0, mjtensin, mjtensin, royalmah_prgbank_state, init_mjtensin, ROT0, "Dynax", "Mahjong Tensinhai (Japan)", MACHINE_NOT_WORKING ) GAME( 1996, janptr96, 0, janptr96, janptr96, royalmah_prgbank_state, init_janptr96, ROT0, "Dynax", "Janputer '96 (Japan)", 0 ) GAME( 1997, janptrsp, 0, janptr96, janptr96, royalmah_prgbank_state, init_janptr96, ROT0, "Dynax", "Janputer Special (Japan)", 0 ) diff --git a/src/mame/elektor/avrmax.cpp b/src/mame/elektor/avrmax.cpp index a598f2bd5667f..be5779a320e9c 100644 --- a/src/mame/elektor/avrmax.cpp +++ b/src/mame/elektor/avrmax.cpp @@ -83,6 +83,10 @@ class avrmax_state : public driver_device optional_device m_lcd; required_ioport_array<4> m_inputs; + u8 m_inp_mux = 0; + u8 m_shift_reg = 0; + int m_shift_clk = 0; + // address maps void main_map(address_map &map); void data_map(address_map &map); @@ -95,10 +99,6 @@ class avrmax_state : public driver_device void lcd_w(u8 data); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - - u8 m_inp_mux = 0; - u8 m_shift_reg = 0; - int m_shift_clk = 0; }; void avrmax_state::machine_start() diff --git a/src/mame/entex/advision.cpp b/src/mame/entex/advision.cpp index 9480e787144d7..95a4bc2db07e6 100644 --- a/src/mame/entex/advision.cpp +++ b/src/mame/entex/advision.cpp @@ -98,6 +98,21 @@ class advision_state : public driver_device required_ioport m_joy; required_ioport m_conf; + static constexpr u32 DISPLAY_WIDTH = 0x400; + + bool m_video_strobe = false; + bool m_video_enable = false; + u8 m_video_bank = 0; + u32 m_video_hpos = 0; + u8 m_led_output[5] = { }; + u8 m_led_latch[5] = { }; + std::unique_ptr m_display; + + memory_region *m_cart_rom = nullptr; + std::vector m_ext_ram; + u16 m_rambank = 0; + u8 m_sound_cmd = 0; + void io_map(address_map &map); void program_map(address_map &map); @@ -117,21 +132,6 @@ class advision_state : public driver_device u8 ext_ram_r(offs_t offset); void ext_ram_w(offs_t offset, u8 data); u8 controller_r(); - - static constexpr u32 DISPLAY_WIDTH = 0x400; - - bool m_video_strobe = false; - bool m_video_enable = false; - u8 m_video_bank = 0; - u32 m_video_hpos = 0; - u8 m_led_output[5] = { }; - u8 m_led_latch[5] = { }; - std::unique_ptr m_display; - - memory_region *m_cart_rom = nullptr; - std::vector m_ext_ram; - u16 m_rambank = 0; - u8 m_sound_cmd = 0; }; diff --git a/src/mame/entex/sag.cpp b/src/mame/entex/sag.cpp index a5286419fc423..96be402e3a254 100644 --- a/src/mame/entex/sag.cpp +++ b/src/mame/entex/sag.cpp @@ -66,14 +66,14 @@ class sag_state : public driver_device required_device m_cart; required_ioport_array<6> m_inputs; + u16 m_grid = 0; + u16 m_plate = 0; + void update_display(); u8 input_r(); void speaker_w(int state); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); - u16 m_grid = 0; - u16 m_plate = 0; - void hmcs40_write_r(offs_t offset, u8 data); void hmcs40_write_d(u16 data); u16 hmcs40_read_d(); diff --git a/src/mame/epoch/gamepock.cpp b/src/mame/epoch/gamepock.cpp index 004f748e3176b..fe35f674cbd5c 100644 --- a/src/mame/epoch/gamepock.cpp +++ b/src/mame/epoch/gamepock.cpp @@ -56,15 +56,15 @@ class gamepock_state : public driver_device required_device m_speaker; required_ioport_array<2> m_inputs; + u8 m_control = 0; + u8 m_lcd_data = 0; + void control_w(u8 data); void lcd_data_w(u8 data); u8 input_r(); u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void main_map(address_map &map); - - u8 m_control = 0; - u8 m_lcd_data = 0; }; void gamepock_state::machine_start() diff --git a/src/mame/f32/f-32.cpp b/src/mame/f32/f-32.cpp index f65bb5418191c..52a9d3e208114 100644 --- a/src/mame/f32/f-32.cpp +++ b/src/mame/f32/f-32.cpp @@ -520,7 +520,7 @@ EEPROM: 93C46 (controlled through FPGA) F-E1-32-009 +------------------------------------------------------------------+ | VOL +---------+ | -+-+ YM3812 | SND | | ++-+ YM3012 | SND | | | +---------+ | +-+ YM2151 OKI6295 | | | diff --git a/src/mame/fidelity/as12.cpp b/src/mame/fidelity/as12.cpp index 19ab1c896b4f1..b8d86b3d9bd04 100644 --- a/src/mame/fidelity/as12.cpp +++ b/src/mame/fidelity/as12.cpp @@ -82,6 +82,9 @@ class as12_state : public fidel_clockdiv_state required_device m_dac; required_ioport m_inputs; + u16 m_inp_mux = 0; + u8 m_led_data = 0; + // address maps void main_map(address_map &map); @@ -90,9 +93,6 @@ class as12_state : public fidel_clockdiv_state void control_w(u8 data); void led_w(offs_t offset, u8 data); u8 input_r(offs_t offset); - - u16 m_inp_mux = 0; - u8 m_led_data = 0; }; void as12_state::machine_start() @@ -284,11 +284,11 @@ ROM_START( feleg ) // model 6085, serial 613623xx ROM_LOAD("feleg.e000", 0xe000, 0x2000, CRC(b1fb49aa) SHA1(d8c9687dd564f0fa603e6d684effb1d113ac64b4) ) // " ROM_END -ROM_START( felega ) // model AS12, serial 427921xx, but roms were upgraded +ROM_START( felega ) // model AS12 ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD("felega.8000", 0x8000, 0x2000, CRC(e86453ed) SHA1(8279cf9a7f471f893922d53d901dae65fabbd33f) ) // MBM2764-25, no meaningful label - ROM_LOAD("felega.c000", 0xc000, 0x1000, CRC(4a2b6946) SHA1(fd7d11e2589e654f91f7c2f667b927075bd49339) ) // TMS2732AJL-45, " - ROM_LOAD("felega.e000", 0xe000, 0x2000, CRC(823083ad) SHA1(4ea6a679edc7c149f1467113e9e5736ee0d5f643) ) // MBM27C64-20, " + ROM_LOAD("blue.8000", 0x8000, 0x2000, CRC(e86453ed) SHA1(8279cf9a7f471f893922d53d901dae65fabbd33f) ) // AM2764-25DC + ROM_LOAD("green.c000", 0xc000, 0x1000, CRC(4a2b6946) SHA1(fd7d11e2589e654f91f7c2f667b927075bd49339) ) // D2732D + ROM_LOAD("black.e000", 0xe000, 0x2000, CRC(823083ad) SHA1(4ea6a679edc7c149f1467113e9e5736ee0d5f643) ) // AM2764-25DC ROM_END ROM_START( felega1 ) // model AS12, only 1 byte difference compared with felega2 (evidently not a bad dump) diff --git a/src/mame/fidelity/bridgeb.cpp b/src/mame/fidelity/bridgeb.cpp index f87974ef03b89..5ccb208102a73 100644 --- a/src/mame/fidelity/bridgeb.cpp +++ b/src/mame/fidelity/bridgeb.cpp @@ -66,6 +66,8 @@ class bridgeb_state : public driver_device required_ioport_array<8> m_inputs; output_finder<12> m_digits; + u8 m_inp_mux = 0; + void main_map(address_map &map); void main_io(address_map &map); @@ -76,8 +78,6 @@ class bridgeb_state : public driver_device u8 input_r(); void input_w(u8 data); void update_pa(); - - u8 m_inp_mux = 0; }; void bridgeb_state::machine_start() diff --git a/src/mame/fidelity/card.cpp b/src/mame/fidelity/card.cpp index 576eb87931a76..ee452e6c75525 100644 --- a/src/mame/fidelity/card.cpp +++ b/src/mame/fidelity/card.cpp @@ -228,14 +228,15 @@ class card_state : public driver_device optional_device m_dac; required_ioport_array<8> m_inputs; + u32 m_barcode = 0; + u16 m_vfd_data = 0; + u8 m_inp_mux = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); TIMER_DEVICE_CALLBACK_MEMBER(barcode_shift) { m_barcode >>= 1; } - u32 m_barcode = 0; - u16 m_vfd_data = 0; - u8 m_inp_mux = 0; // I/O handlers void update_display(); diff --git a/src/mame/fidelity/cc1.cpp b/src/mame/fidelity/cc1.cpp index 8f1e9f675a2f0..62f1e21dd4e2b 100644 --- a/src/mame/fidelity/cc1.cpp +++ b/src/mame/fidelity/cc1.cpp @@ -104,6 +104,9 @@ class cc1_state : public driver_device optional_device m_delay; required_ioport_array<2> m_inputs; + u8 m_led_select = 0; + u8 m_7seg_data = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -114,9 +117,6 @@ class cc1_state : public driver_device u8 ppi_porta_r(); void ppi_portb_w(u8 data); void ppi_portc_w(u8 data); - - u8 m_led_select = 0; - u8 m_7seg_data = 0; }; void cc1_state::machine_start() diff --git a/src/mame/fidelity/cc10.cpp b/src/mame/fidelity/cc10.cpp index 8022775236173..3ecfc7759f7cf 100644 --- a/src/mame/fidelity/cc10.cpp +++ b/src/mame/fidelity/cc10.cpp @@ -78,7 +78,9 @@ class ccx_state : public driver_device optional_device m_beeper; required_ioport_array<4> m_inputs; - TIMER_DEVICE_CALLBACK_MEMBER(beeper_off) { m_beeper->set_state(0); } + u8 m_inp_mux = 0; + u8 m_led_select = 0; + u8 m_7seg_data = 0; // address maps void acr_map(address_map &map); @@ -89,16 +91,14 @@ class ccx_state : public driver_device u8 main_trampoline_r(offs_t offset); void main_trampoline_w(offs_t offset, u8 data); + TIMER_DEVICE_CALLBACK_MEMBER(beeper_off) { m_beeper->set_state(0); } + // I/O handlers void update_display(); void ppi_porta_w(u8 data); void ppi_portb_w(u8 data); u8 ppi_portc_r(); void ppi_portc_w(u8 data); - - u8 m_inp_mux = 0; - u8 m_led_select = 0; - u8 m_7seg_data = 0; }; void ccx_state::machine_start() diff --git a/src/mame/fidelity/cc7.cpp b/src/mame/fidelity/cc7.cpp index d6c5b7f280098..969cbc5d3ca27 100644 --- a/src/mame/fidelity/cc7.cpp +++ b/src/mame/fidelity/cc7.cpp @@ -86,6 +86,9 @@ class bcc_state : public driver_device optional_device m_dac; required_ioport_array<4> m_inputs; + u8 m_inp_mux = 0; + u8 m_7seg_data = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -93,9 +96,6 @@ class bcc_state : public driver_device // I/O handlers u8 input_r(); void control_w(offs_t offset, u8 data); - - u8 m_inp_mux = 0; - u8 m_7seg_data = 0; }; void bcc_state::machine_start() diff --git a/src/mame/fidelity/checkc2.cpp b/src/mame/fidelity/checkc2.cpp index 71d72d9142b5f..79352cda47a82 100644 --- a/src/mame/fidelity/checkc2.cpp +++ b/src/mame/fidelity/checkc2.cpp @@ -52,6 +52,15 @@ class cr_state : public driver_device required_device m_display; required_ioport_array<4> m_inputs; + u8 m_ram[0x100] = { }; + u8 m_ram_address = 0; + u8 m_ram_data = 0; + u8 m_ram_control = 0; + + u8 m_inp_mux = 0; + u8 m_led_select = 0; + u8 m_7seg_data = 0; + // I/O handlers void update_display(); void segsel_w(u8 data); @@ -63,15 +72,6 @@ class cr_state : public driver_device void rama0_w(u8 data); void rama1_w(u8 data); u8 input_r(); - - u8 m_ram[0x100] = { }; - u8 m_ram_address = 0; - u8 m_ram_data = 0; - u8 m_ram_control = 0; - - u8 m_inp_mux = 0; - u8 m_led_select = 0; - u8 m_7seg_data = 0; }; void cr_state::machine_start() diff --git a/src/mame/fidelity/chesster.cpp b/src/mame/fidelity/chesster.cpp index 0559b03a7623b..4ace69306bb43 100644 --- a/src/mame/fidelity/chesster.cpp +++ b/src/mame/fidelity/chesster.cpp @@ -71,16 +71,16 @@ class chesster_state : public driver_device required_device m_display; required_ioport m_inputs; + int m_numbanks = 0; + u8 m_speech_bank = 0; + u8 m_select = 0; + // address maps void main_map(address_map &map); // I/O handlers void control_w(offs_t offset, u8 data); u8 input_r(offs_t offset); - - int m_numbanks = 0; - u8 m_speech_bank = 0; - u8 m_select = 0; }; void chesster_state::init_chesster() diff --git a/src/mame/fidelity/clockdiv.h b/src/mame/fidelity/clockdiv.h index 93cf327b0dede..ecb142d455e91 100644 --- a/src/mame/fidelity/clockdiv.h +++ b/src/mame/fidelity/clockdiv.h @@ -34,14 +34,14 @@ class fidel_clockdiv_state : public driver_device void div_refresh(ioport_value val = 0xff); private: - inline void div_set_cpu_freq(offs_t offset); - memory_passthrough_handler m_read_tap; memory_passthrough_handler m_write_tap; u16 m_div_status = 0; double m_div_scale = 0; emu_timer *m_div_timer = nullptr; + + inline void div_set_cpu_freq(offs_t offset); }; diff --git a/src/mame/fidelity/csc.cpp b/src/mame/fidelity/csc.cpp index 6bbb97d77ae97..3d0b477a83a16 100644 --- a/src/mame/fidelity/csc.cpp +++ b/src/mame/fidelity/csc.cpp @@ -266,6 +266,11 @@ class csc_state : public driver_device optional_region_ptr m_language; optional_ioport_array<9> m_inputs; + u8 m_led_data = 0; + u8 m_7seg_data = 0; + u8 m_inp_mux = 0; + u8 m_speech_bank = 0; + // address maps void csc_map(address_map &map); void csce_map(address_map &map); @@ -287,11 +292,6 @@ class csc_state : public driver_device void pia1_pb_w(u8 data); u8 pia1_pb_r(); void pia1_ca2_w(int state); - - u8 m_led_data = 0; - u8 m_7seg_data = 0; - u8 m_inp_mux = 0; - u8 m_speech_bank = 0; }; void csc_state::machine_start() diff --git a/src/mame/fidelity/dames.cpp b/src/mame/fidelity/dames.cpp index 3152a698a7a0f..84cf9b8243fae 100644 --- a/src/mame/fidelity/dames.cpp +++ b/src/mame/fidelity/dames.cpp @@ -64,6 +64,9 @@ class dsc_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_select = 0; + // address maps void main_map(address_map &map); @@ -75,9 +78,6 @@ class dsc_state : public driver_device void init_board(int state); u8 read_board_row(u8 row); - - u8 m_inp_mux = 0; - u8 m_led_select = 0; }; void dsc_state::machine_start() diff --git a/src/mame/fidelity/desdis.cpp b/src/mame/fidelity/desdis.cpp index 3e02beb539596..b497bc4f95327 100644 --- a/src/mame/fidelity/desdis.cpp +++ b/src/mame/fidelity/desdis.cpp @@ -88,6 +88,9 @@ class desdis_state : public driver_device required_device m_dac; required_ioport m_inputs; + u8 m_select = 0; + u32 m_lcd_data = 0; + // address maps void fdes2100d_map(address_map &map); @@ -96,9 +99,6 @@ class desdis_state : public driver_device virtual void control_w(offs_t offset, u8 data); virtual void lcd_w(offs_t offset, u8 data); virtual u8 input_r(offs_t offset); - - u8 m_select = 0; - u32 m_lcd_data = 0; }; void desdis_state::init_fdes2100d() diff --git a/src/mame/fidelity/eag68k.cpp b/src/mame/fidelity/eag68k.cpp index 084b84a269842..81baa4ebb44aa 100644 --- a/src/mame/fidelity/eag68k.cpp +++ b/src/mame/fidelity/eag68k.cpp @@ -273,6 +273,11 @@ class eag_state : public driver_device required_device m_dac; optional_ioport_array<3> m_inputs; + bool m_rotate = true; + u8 m_select = 0; + u8 m_7seg_data = 0; + u8 m_led_data = 0; + // address maps void eag_map(address_map &map); void eagv7_map(address_map &map); @@ -285,11 +290,6 @@ class eag_state : public driver_device u8 input_r(offs_t offset); void leds_w(offs_t offset, u8 data); void digit_w(offs_t offset, u8 data); - - bool m_rotate = true; - u8 m_select = 0; - u8 m_7seg_data = 0; - u8 m_led_data = 0; }; void eag_state::machine_start() diff --git a/src/mame/fidelity/eldorado.cpp b/src/mame/fidelity/eldorado.cpp index 9c746e16a8128..4145cbd0958bf 100644 --- a/src/mame/fidelity/eldorado.cpp +++ b/src/mame/fidelity/eldorado.cpp @@ -56,6 +56,10 @@ class eldorado_state : public driver_device required_device m_dac; required_ioport m_inputs; + bool m_kp_select = false; + u16 m_inp_mux = 0; + u8 m_led_select = 0; + // I/O handlers void update_display(); void mux_w(u8 data); @@ -63,10 +67,6 @@ class eldorado_state : public driver_device void control_w(u8 data); int t0_r(); u8 input_r(); - - bool m_kp_select = false; - u16 m_inp_mux = 0; - u8 m_led_select = 0; }; void eldorado_state::machine_start() diff --git a/src/mame/fidelity/elite.cpp b/src/mame/fidelity/elite.cpp index 1de0f1f0df9f5..2c89dc8190473 100644 --- a/src/mame/fidelity/elite.cpp +++ b/src/mame/fidelity/elite.cpp @@ -137,6 +137,12 @@ class elite_state : public fidel_clockdiv_state required_region_ptr m_language; required_ioport_array<2> m_inputs; + bool m_rotate = false; + u8 m_led_data = 0; + u8 m_7seg_data = 0; + u8 m_inp_mux = 0; + u8 m_speech_bank = 0; + // address maps void eas_map(address_map &map); void pc_map(address_map &map); @@ -150,12 +156,6 @@ class elite_state : public fidel_clockdiv_state void ppi_porta_w(u8 data); u8 ppi_portb_r(); void ppi_portc_w(u8 data); - - bool m_rotate = false; - u8 m_led_data = 0; - u8 m_7seg_data = 0; - u8 m_inp_mux = 0; - u8 m_speech_bank = 0; }; void elite_state::machine_start() diff --git a/src/mame/fidelity/excel.cpp b/src/mame/fidelity/excel.cpp index aecaaef1d92cc..8cab91d51ebee 100644 --- a/src/mame/fidelity/excel.cpp +++ b/src/mame/fidelity/excel.cpp @@ -192,6 +192,11 @@ class excel_state : public driver_device optional_region_ptr m_speech_rom; optional_ioport_array<3> m_inputs; + u8 m_select = 0; + u8 m_7seg_data = 0; + u8 m_speech_data = 0; + u8 m_speech_bank = 0; + // address maps void fexcel_map(address_map &map); void fexcelb_map(address_map &map); @@ -200,11 +205,6 @@ class excel_state : public driver_device u8 speech_r(offs_t offset); void ttl_w(offs_t offset, u8 data); u8 ttl_r(offs_t offset); - - u8 m_select = 0; - u8 m_7seg_data = 0; - u8 m_speech_data = 0; - u8 m_speech_bank = 0; }; void excel_state::machine_start() diff --git a/src/mame/fidelity/msc.cpp b/src/mame/fidelity/msc.cpp index ed8a8fc5a039f..3d30c3c29b379 100644 --- a/src/mame/fidelity/msc.cpp +++ b/src/mame/fidelity/msc.cpp @@ -68,6 +68,9 @@ class msc_state : public driver_device required_device m_dac; required_ioport m_inputs; + u8 m_led_select = 0; + u16 m_inp_mux = 0; + // address maps void main_map(address_map &map); @@ -80,9 +83,6 @@ class msc_state : public driver_device u8 read_inputs(); u8 input_hi_r(); u8 input_lo_r(); - - u8 m_led_select = 0; - u16 m_inp_mux = 0; }; void msc_state::machine_start() diff --git a/src/mame/fidelity/phantom.cpp b/src/mame/fidelity/phantom.cpp index 387307ed94b3f..756df180f09ec 100644 --- a/src/mame/fidelity/phantom.cpp +++ b/src/mame/fidelity/phantom.cpp @@ -98,6 +98,19 @@ class phantom_state : public driver_device output_finder<5> m_out_motor; output_finder<2> m_out_pos; + u8 m_mux = 0; + u8 m_select = 0; + u32 m_lcd_data = 0; + + u8 m_motors_ctrl = 0; + int m_hmotor_pos = 0; + int m_vmotor_pos = 0; + bool m_vmotor_sensor0_ff = false; + bool m_vmotor_sensor1_ff = false; + bool m_hmotor_sensor0_ff = false; + bool m_hmotor_sensor1_ff = false; + u8 m_pieces_map[0x80][0x80] = { }; + // address maps virtual void main_map(address_map &map); @@ -117,19 +130,6 @@ class phantom_state : public driver_device TIMER_DEVICE_CALLBACK_MEMBER(motors_timer); void update_pieces_position(int state); void output_magnet_pos(); - - u8 m_mux = 0; - u8 m_select = 0; - u32 m_lcd_data = 0; - - u8 m_motors_ctrl = 0; - int m_hmotor_pos = 0; - int m_vmotor_pos = 0; - bool m_vmotor_sensor0_ff = false; - bool m_vmotor_sensor1_ff = false; - bool m_hmotor_sensor0_ff = false; - bool m_hmotor_sensor1_ff = false; - u8 m_pieces_map[0x80][0x80] = { }; }; void phantom_state::machine_start() diff --git a/src/mame/fidelity/sc12.cpp b/src/mame/fidelity/sc12.cpp index c74425bb5a409..c9d0423693f6f 100644 --- a/src/mame/fidelity/sc12.cpp +++ b/src/mame/fidelity/sc12.cpp @@ -103,14 +103,14 @@ class sc12_state : public fidel_clockdiv_state required_device m_dac; required_ioport m_inputs; + u8 m_inp_mux = 0; + // address maps void main_map(address_map &map); // I/O handlers void control_w(u8 data); u8 input_r(offs_t offset); - - u8 m_inp_mux = 0; }; void sc12_state::machine_start() diff --git a/src/mame/fidelity/sc6.cpp b/src/mame/fidelity/sc6.cpp index 79d476cd62bab..64f0fa16598a0 100644 --- a/src/mame/fidelity/sc6.cpp +++ b/src/mame/fidelity/sc6.cpp @@ -123,6 +123,9 @@ class sc6_state : public driver_device optional_device m_cart; required_ioport m_inputs; + u8 m_led_select = 0; + u8 m_inp_mux = 0; + // address maps void msc_map(address_map &map); void sc6_map(address_map &map); @@ -137,9 +140,6 @@ class sc6_state : public driver_device u8 input_r(); int input6_r(); int input7_r(); - - u8 m_led_select = 0; - u8 m_inp_mux = 0; }; void sc6_state::machine_start() diff --git a/src/mame/fidelity/sc8.cpp b/src/mame/fidelity/sc8.cpp index 0864e2598f3a4..442979dfb9063 100644 --- a/src/mame/fidelity/sc8.cpp +++ b/src/mame/fidelity/sc8.cpp @@ -63,6 +63,9 @@ class scc_state : public driver_device required_device m_dac; required_ioport m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -70,9 +73,6 @@ class scc_state : public driver_device // I/O handlers u8 input_r(); void control_w(offs_t offset, u8 data); - - u8 m_inp_mux = 0; - u8 m_led_data = 0; }; void scc_state::machine_start() diff --git a/src/mame/fidelity/sc9.cpp b/src/mame/fidelity/sc9.cpp index f10c9d9f72f01..943226725758d 100644 --- a/src/mame/fidelity/sc9.cpp +++ b/src/mame/fidelity/sc9.cpp @@ -94,6 +94,9 @@ class sc9_state : public driver_device required_device m_dac; required_ioport m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + // address maps void sc9_map(address_map &map); void sc9d_map(address_map &map); @@ -104,9 +107,6 @@ class sc9_state : public driver_device void led_w(offs_t offset, u8 data); u8 input_r(); u8 input_d7_r(offs_t offset); - - u8 m_inp_mux = 0; - u8 m_led_data = 0; }; void sc9_state::machine_start() diff --git a/src/mame/fidelity/vcc.cpp b/src/mame/fidelity/vcc.cpp index 96256671f02c5..cd62259ac6921 100644 --- a/src/mame/fidelity/vcc.cpp +++ b/src/mame/fidelity/vcc.cpp @@ -150,6 +150,11 @@ class vcc_state : public driver_device required_region_ptr m_language; required_ioport_array<4> m_inputs; + u8 m_led_select = 0; + u8 m_7seg_data = 0; + u8 m_inp_mux = 0; + u8 m_speech_bank = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -162,11 +167,6 @@ class vcc_state : public driver_device void ppi_portb_w(u8 data); u8 ppi_portc_r(); void ppi_portc_w(u8 data); - - u8 m_led_select = 0; - u8 m_7seg_data = 0; - u8 m_inp_mux = 0; - u8 m_speech_bank = 0; }; void vcc_state::machine_start() diff --git a/src/mame/fidelity/vsc.cpp b/src/mame/fidelity/vsc.cpp index c03e3dd7619ad..31e1a52fd0aaa 100644 --- a/src/mame/fidelity/vsc.cpp +++ b/src/mame/fidelity/vsc.cpp @@ -199,6 +199,13 @@ class vsc_state : public driver_device required_region_ptr m_language; required_ioport_array<2> m_inputs; + u8 m_led_data = 0; + u8 m_7seg_data = 0; + u8 m_cb_mux = 0; + u8 m_kp_mux = 0; + bool m_lan_switch = false; + u8 m_speech_bank = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -214,13 +221,6 @@ class vsc_state : public driver_device u8 pio_porta_r(); u8 pio_portb_r(); void pio_portb_w(u8 data); - - u8 m_led_data = 0; - u8 m_7seg_data = 0; - u8 m_cb_mux = 0; - u8 m_kp_mux = 0; - bool m_lan_switch = false; - u8 m_speech_bank = 0; }; void vsc_state::machine_start() diff --git a/src/mame/galaxian/galaxian.cpp b/src/mame/galaxian/galaxian.cpp index fb91e88533eb4..407874bbd17c9 100644 --- a/src/mame/galaxian/galaxian.cpp +++ b/src/mame/galaxian/galaxian.cpp @@ -1639,7 +1639,7 @@ void sbhoei_state::sbhoei_soundlatch_w(uint8_t data) { m_soundlatch->write(data & 0x7f); m_8039->set_input_line(0, (data & 0x80) ? ASSERT_LINE : CLEAR_LINE); - machine().scheduler().perfect_quantum(attotime::from_usec(50)); // main CPU polls for response from 8039 + machine().scheduler().perfect_quantum(attotime::from_usec(100)); // main CPU polls for response from 8039 } void sbhoei_state::p2_w(uint8_t data) @@ -8747,7 +8747,7 @@ void galaxian_state::init_highroll() { uint8_t x = rom[i]; - switch(i & 0x03) + switch (i & 0x03) { case 0x000: x = bitswap<8>(x, 1, 6, 7, 4, 5, 2, 3, 0); break; case 0x001: x = bitswap<8>(x, 5, 6, 3, 4, 1, 2, 7, 0); break; @@ -8762,7 +8762,7 @@ void galaxian_state::init_highroll() { uint8_t x = rom[i]; - switch(i & 0x01) + switch (i & 0x01) { case 0x000: x = bitswap<8>(x, 3, 6, 1, 4, 5, 2, 7, 0); break; case 0x001: x = bitswap<8>(x, 1, 6, 7, 4, 3, 2, 5, 0); break; @@ -9522,13 +9522,13 @@ void galaxian_state::init_crazym() { init_nolock(); - m_extend_sprite_info_ptr = extend_sprite_info_delegate(&bagmanmc_state::upper_extend_sprite_info, this); + m_extend_sprite_info_ptr = extend_sprite_info_delegate(&galaxian_state::upper_extend_sprite_info, this); uint8_t *rom = memregion("maincpu")->base(); for (int i = 0; i < 0x4000; i++) { - switch(rom[i] & 0x38) + switch (rom[i] & 0x38) { case 0x00: (i & 0x01) ? rom[i] ^= 0x30 : rom[i] ^= 0x20; break; case 0x08: (i & 0x01) ? rom[i] ^= 0x30 : rom[i] ^= 0x08; break; @@ -15420,7 +15420,7 @@ SUPER COBRA RA1 5C 1981 STERN (black dot on label) SUPER COBRA RA1 5D 1981 STERN (black dot on label) SUPER COBRA RA1 5E 1981 STERN (black dot on label) */ -ROM_START( scobrae ) // main program is identical to the scobras set once decrypted +ROM_START( scobrae ) // main program is identical to the scobras set once decrypted. L-1200-1B + L-1220-2B PCBs ROM_REGION( 0x10000, "maincpu", 0 ) // all roms have STERN labels ROM_LOAD( "super cobra ra1 2c 1981.2c", 0x0000, 0x1000, CRC(ba9d4152) SHA1(f1792c0049804ac956ab7f95f699559fca4df960) ) ROM_LOAD( "super cobra ra1 2e 1981.2e", 0x1000, 0x1000, CRC(f9b77b27) SHA1(7974761456aaabcf016158ee5f5c32c89e43c748) ) @@ -15435,12 +15435,12 @@ ROM_START( scobrae ) // main program is identical to the scobras set once decryp // ROMs below were missing, so not verified for this set but likely the same because the main program is. ROM_REGION( 0x10000, "audiocpu", 0 ) - ROM_LOAD( "5c", 0x0000, 0x0800, BAD_DUMP CRC(deeb0dd3) SHA1(b815a586f05361b75078d58f1fddfdb36f9d8fae) ) - ROM_LOAD( "5d", 0x0800, 0x0800, BAD_DUMP CRC(872c1a74) SHA1(20f05bf398ad2690f5ba4e4158ad62aeec226413) ) - ROM_LOAD( "5e", 0x1000, 0x0800, BAD_DUMP CRC(ccd7a110) SHA1(5a247e360530be0f94c90fcc7d0ce628d460449f) ) + ROM_LOAD( "super cobra ra1 5c 1981.5c", 0x0000, 0x0800, CRC(deeb0dd3) SHA1(b815a586f05361b75078d58f1fddfdb36f9d8fae) ) + ROM_LOAD( "super cobra ra1 5d 1981.5d", 0x0800, 0x0800, CRC(872c1a74) SHA1(20f05bf398ad2690f5ba4e4158ad62aeec226413) ) + ROM_LOAD( "super cobra ra1 5e 1981.5e", 0x1000, 0x0800, CRC(ccd7a110) SHA1(5a247e360530be0f94c90fcc7d0ce628d460449f) ) ROM_REGION( 0x0020, "proms", 0 ) - ROM_LOAD( "82s123.6e", 0x0000, 0x0020, BAD_DUMP CRC(9b87f90d) SHA1(d11ac5e4a6057301ea2a9cbb404c2b978eb4c1dc) ) + ROM_LOAD( "ss1.6e", 0x0000, 0x0020, CRC(fd35c561) SHA1(590f60beb443dd689c890c37cc100e0b936bf8c9) ) ROM_END @@ -16328,7 +16328,7 @@ GAME( 1981, pacmanblc, puckman, pacmanbl, pacmanbl, galaxian_state, init_ GAME( 1981, pacmanblci, puckman, pacmanbl, pacmanbl, galaxian_state, init_pacmanbl, ROT270, "bootleg (Cirsa)", "Pac-Man (Cirsa, Spanish bootleg on Galaxian hardware)", MACHINE_SUPPORTS_SAVE ) GAME( 199?, komemokos, puckman, pacmanbl, pacmanbl, galaxian_state, init_pacmanbl, ROT270, "hack", "Komemokos (hack of 'Pac-Man (Cirsa, Spanish bootleg)')", MACHINE_SUPPORTS_SAVE ) GAME( 1981, pacmanblv, puckman, pacmanbl, pacmanbl, galaxian_state, init_pacmanbl, ROT270, "bootleg (Video Dens)", "Pac-Man (Video Dens, Spanish bootleg on Galaxian hardware)", MACHINE_SUPPORTS_SAVE ) -GAME( 1982, crazym, puckman, galaxian, pacmanblb, galaxian_state, init_crazym, ROT90, "bootleg (GAT)", "Crazy Mazey", MACHINE_SUPPORTS_SAVE ) +GAME( 1982, crazym, puckman, galaxian, pacmanblb, galaxian_state, init_crazym, ROT90, "bootleg (Game-A-Tron)", "Crazy Mazey", MACHINE_SUPPORTS_SAVE ) GAME( 1981, ghostmun, puckman, pacmanbl, streakng, galaxian_state, init_ghostmun, ROT90, "bootleg (Leisure and Allied)", "Ghost Muncher", MACHINE_SUPPORTS_SAVE ) GAME( 1981, phoenxp2, phoenix, pisces, phoenxp2, pisces_state, init_batman2, ROT270, "bootleg", "Phoenix Part 2", MACHINE_SUPPORTS_SAVE ) GAME( 1981, batman2, phoenix, pisces, batman2, pisces_state, init_batman2, ROT270, "bootleg", "Batman Part 2", MACHINE_SUPPORTS_SAVE ) // Similar to pisces, but with different video banking characteristics diff --git a/src/mame/handheld/chessking.cpp b/src/mame/handheld/chessking.cpp index 263b0b2b32283..251fab38a869a 100644 --- a/src/mame/handheld/chessking.cpp +++ b/src/mame/handheld/chessking.cpp @@ -74,6 +74,10 @@ class chessking_state : public driver_device required_device m_beeper; required_device m_cart; + uint8_t m_3f_data = 0; + uint8_t m_cart_bank = 0; + uint16_t m_beeper_freq = 0; + void chesskng_map(address_map &map); void chesskng_io(address_map &map); @@ -96,10 +100,6 @@ class chessking_state : public driver_device void unk_6f_w(uint8_t data); uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - - uint8_t m_3f_data = 0; - uint8_t m_cart_bank = 0; - uint16_t m_beeper_freq = 0; }; void chessking_state::machine_start() diff --git a/src/mame/handheld/gmaster.cpp b/src/mame/handheld/gmaster.cpp index be5937e963b69..3e1ca8b073f86 100644 --- a/src/mame/handheld/gmaster.cpp +++ b/src/mame/handheld/gmaster.cpp @@ -80,6 +80,8 @@ class gmaster_state : public driver_device required_device m_screen; required_device m_speaker; + u8 m_chipsel = 0; + u8 io_r(offs_t offset); void io_w(offs_t offset, u8 data); void portb_w(u8 data); @@ -88,8 +90,6 @@ class gmaster_state : public driver_device template SED1520_UPDATE_CB(screen_update_cb); void main_map(address_map &map); - - u8 m_chipsel = 0; }; void gmaster_state::machine_start() diff --git a/src/mame/handheld/hh_cops1.cpp b/src/mame/handheld/hh_cops1.cpp index 4190f2f7ab4d4..57574c5034635 100644 --- a/src/mame/handheld/hh_cops1.cpp +++ b/src/mame/handheld/hh_cops1.cpp @@ -358,6 +358,7 @@ class qkracer_state : public hh_cops1_state private: required_device m_ds8874; + void ds8874_output_w(u16 data); void update_display(); @@ -710,6 +711,7 @@ class cambrp_state : public hh_cops1_state private: required_device m_ds8874; + void ds8874_output_w(u16 data); void update_display(); diff --git a/src/mame/handheld/hh_hmcs40.cpp b/src/mame/handheld/hh_hmcs40.cpp index 0910725cadc60..487b6c4d5c8d1 100644 --- a/src/mame/handheld/hh_hmcs40.cpp +++ b/src/mame/handheld/hh_hmcs40.cpp @@ -2433,13 +2433,14 @@ class cdkong_state : public hh_hmcs40_state private: required_device m_volume; + double m_speaker_volume = 0.0; + void update_display(); void plate_w(offs_t offset, u8 data); void grid_w(u16 data); void speaker_update(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; }; void cdkong_state::machine_start() @@ -3355,6 +3356,8 @@ class eturtles_state : public hh_hmcs40_state required_device m_audiocpu; + u8 m_cop_irq = 0; + void set_clock(); void update_int(); virtual void update_display(); @@ -3365,8 +3368,6 @@ class eturtles_state : public hh_hmcs40_state void cop_irq_w(u8 data); u8 cop_latch_r(); u8 cop_ack_r(); - - u8 m_cop_irq = 0; }; void eturtles_state::machine_start() diff --git a/src/mame/handheld/hh_pic16.cpp b/src/mame/handheld/hh_pic16.cpp index 92037ad267846..d2e12d679882e 100644 --- a/src/mame/handheld/hh_pic16.cpp +++ b/src/mame/handheld/hh_pic16.cpp @@ -874,6 +874,8 @@ class flash_state : public hh_pic16_state private: required_device m_volume; + double m_speaker_volume = 0.0; + void update_display(); void write_b(u8 data); u8 read_c(); @@ -881,7 +883,6 @@ class flash_state : public hh_pic16_state void speaker_update(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; }; void flash_state::machine_start() @@ -1318,13 +1319,14 @@ class leboom_state : public hh_pic16_state private: required_device m_volume; + double m_speaker_volume = 0.0; + u8 read_a(); void write_b(u8 data); void write_c(u8 data); void speaker_update(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; }; void leboom_state::machine_start() diff --git a/src/mame/handheld/hh_sm510.cpp b/src/mame/handheld/hh_sm510.cpp index b1015da6ca6f4..132b9a53fd2e9 100644 --- a/src/mame/handheld/hh_sm510.cpp +++ b/src/mame/handheld/hh_sm510.cpp @@ -6754,8 +6754,8 @@ class tgaiden_state : public hh_sm510_state private: // R2 connects to a single LED behind the screen - void led_w(u8 data) { m_led_out = data >> 1 & 1; } output_finder<> m_led_out; + void led_w(u8 data) { m_led_out = data >> 1 & 1; } }; void tgaiden_state::machine_start() diff --git a/src/mame/handheld/hh_tms1k.cpp b/src/mame/handheld/hh_tms1k.cpp index 2753ab2ea91db..36a85f7e1b600 100644 --- a/src/mame/handheld/hh_tms1k.cpp +++ b/src/mame/handheld/hh_tms1k.cpp @@ -987,13 +987,13 @@ class bcheetah_state : public hh_tms1k_state virtual void machine_start() override; private: - void write_r(u32 data); - void write_o(u16 data); - u8 read_k(); - output_finder<> m_motor1; output_finder<> m_motor2_left; output_finder<> m_motor2_right; + + void write_r(u32 data); + void write_o(u16 data); + u8 read_k(); }; void bcheetah_state::machine_start() @@ -1873,12 +1873,13 @@ class cchime_state : public hh_tms1k_state required_device m_volume; required_device m_tempo_timer; + double m_speaker_volume = 0.0; + void write_o(u16 data); void write_r(u32 data); u8 read_k(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; }; void cchime_state::machine_start() @@ -3097,8 +3098,8 @@ class quizwizc_state : public hh_tms1k_state virtual void machine_start() override; private: - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); u16 m_pinout = 0x07; // cartridge R pins + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); void update_display(); void write_r(u32 data); @@ -3288,8 +3289,8 @@ class tc4_state : public hh_tms1k_state virtual void machine_start() override; private: - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); u8 m_pinout = 0xf; // cartridge K pins + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); void update_display(); void write_r(u32 data); @@ -3471,12 +3472,13 @@ class litelrn_state : public hh_tms1k_state private: required_device m_volume; + double m_speaker_volume = 0.0; + void write_o(u16 data); void write_r(u32 data); u8 read_k(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; }; void litelrn_state::machine_start() @@ -4026,6 +4028,7 @@ class cnfball_state : public hh_tms1k_state private: required_device m_ds8874; + void ds8874_output_w(u16 data); void update_display(); @@ -5994,13 +5997,14 @@ class mmarvin_state : public hh_tms1k_state required_device m_volume; required_device m_speed_timer; + double m_speaker_volume = 0.0; + void update_display(); void write_r(u32 data); void write_o(u16 data); u8 read_k(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; }; void mmarvin_state::machine_start() @@ -7005,6 +7009,7 @@ class ginv2000_state : public hh_tms1k_state private: required_device m_expander; + void expander_w(offs_t offset, u8 data); void update_display(); @@ -7458,25 +7463,25 @@ class skywriter_state : public hh_tms1k_state virtual void machine_start() override; private: + std::unique_ptr m_pixbuf; + u8 m_led_data[2] = { }; + u16 m_wand_pos[2] = { }; + attotime m_shake; + void write_r(u32 data); void write_o(u16 data); u8 read_k(); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER(check_pos); - - std::unique_ptr m_display; - u8 m_led_data[2] = { }; - u16 m_wand_pos[2] = { }; - attotime m_shake; }; void skywriter_state::machine_start() { hh_tms1k_state::machine_start(); - m_display = make_unique_clear(7 * SKYWRITER_WIDTH); - save_pointer(NAME(m_display), 7 * SKYWRITER_WIDTH); + m_pixbuf = make_unique_clear(7 * SKYWRITER_WIDTH); + save_pointer(NAME(m_pixbuf), 7 * SKYWRITER_WIDTH); save_item(NAME(m_led_data)); save_item(NAME(m_wand_pos)); @@ -7493,7 +7498,7 @@ u32 skywriter_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, int dy = (i / SKYWRITER_WIDTH) * 4 + 1; // write current led state to pixels - u8 red = std::clamp(m_display[i], 0, 0xff); + u8 red = std::clamp(m_pixbuf[i], 0, 0xff); u8 green = red / 16; u8 blue = red / 12; @@ -7505,7 +7510,7 @@ u32 skywriter_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, // decay led brightness const double rate = 1.15; - m_display[i] /= rate; + m_pixbuf[i] /= rate; } return 0; @@ -7525,11 +7530,11 @@ TIMER_DEVICE_CALLBACK_MEMBER(skywriter_state::check_pos) m_wand_pos[0] = pos; } - // write lit leds to display + // write lit leds to pixel buffer for (int i = 0; i < 7; i++) { if (BIT(m_led_data[0] | m_led_data[1], i)) - m_display[i * SKYWRITER_WIDTH + pos] = 0x180; + m_pixbuf[i * SKYWRITER_WIDTH + pos] = 0x180; } m_led_data[1] = m_led_data[0]; @@ -9679,20 +9684,21 @@ class bigtrak_state : public hh_tms1k_state virtual void machine_start() override; private: - void update_speaker(); - void write_r(u32 data); - void write_o(u16 data); - u8 read_k(); - - TIMER_DEVICE_CALLBACK_MEMBER(gearbox_sim_tick); - bool sensor_state() { return m_gearbox_pos < 0 && m_display->element_on(0, 0); } - int m_gearbox_pos = 0; - output_finder<> m_left_motor_forward; output_finder<> m_left_motor_reverse; output_finder<> m_right_motor_forward; output_finder<> m_right_motor_reverse; output_finder<> m_ext_out; + + int m_gearbox_pos = 0; + + TIMER_DEVICE_CALLBACK_MEMBER(gearbox_sim_tick); + bool sensor_state() { return m_gearbox_pos < 0 && m_display->element_on(0, 0); } + + void update_speaker(); + void write_r(u32 data); + void write_o(u16 data); + u8 read_k(); }; void bigtrak_state::machine_start() @@ -9903,9 +9909,6 @@ class mbdtower_state : public hh_tms1k_state virtual void machine_start() override; private: - void update_display(); - bool sensor_led_on() { return m_display->element_on(0, 0); } - output_finder<> m_motor_pos_out; output_finder<> m_card_pos_out; output_finder<> m_motor_on_out; @@ -9916,6 +9919,9 @@ class mbdtower_state : public hh_tms1k_state bool m_motor_on = false; bool m_sensor_blind = false; + void update_display(); + bool sensor_led_on() { return m_display->element_on(0, 0); } + TIMER_DEVICE_CALLBACK_MEMBER(motor_sim_tick); void write_r(u32 data); @@ -12325,15 +12331,15 @@ class wtalker_state : public hh_tms1k_state required_device m_tms5100; required_device m_tms6100; + attotime m_pulse; + u8 m_dial = 0; + u8 m_ram_address = 0; + void write_r(u32 data); void write_o(u16 data); u8 read_k(); TIMER_DEVICE_CALLBACK_MEMBER(sense_weight); - - attotime m_pulse; - u8 m_dial = 0; - u8 m_ram_address = 0; }; void wtalker_state::machine_start() @@ -15225,8 +15231,8 @@ class playmaker_state : public hh_tms1k_state virtual void machine_start() override; private: - DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); u8 m_notch = 0; // cartridge K1/K2 + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); void update_display(); void write_r(u32 data); @@ -16254,6 +16260,7 @@ class tbreakup_state : public hh_tms1k_state private: required_device m_expander; u8 m_exp_port[7] = { }; + void expander_w(offs_t offset, u8 data); void set_clock(); @@ -16693,6 +16700,7 @@ class slepachi_state : public hh_tms1k_state private: required_device m_expander; + void expander_w(offs_t offset, u8 data); void update_display(); diff --git a/src/mame/handheld/lk3000.cpp b/src/mame/handheld/lk3000.cpp index 7506b48ae56de..1790d930e93e6 100644 --- a/src/mame/handheld/lk3000.cpp +++ b/src/mame/handheld/lk3000.cpp @@ -69,6 +69,14 @@ class lk3000_state : public driver_device required_ioport_array<8> m_inputs; output_finder<16> m_digits; + u8 m_p0 = 0; + u8 m_p1 = 0; + u8 m_p4 = 0; + u8 m_p5 = 0; + + bool m_has_ram = false; + u8 m_ram[0x400]; + void main_map(address_map &map); void main_io(address_map &map); @@ -83,14 +91,6 @@ class lk3000_state : public driver_device void p4_w(u8 data); u8 p5_r(); void p5_w(u8 data); - - u8 m_p0 = 0; - u8 m_p1 = 0; - u8 m_p4 = 0; - u8 m_p5 = 0; - - bool m_has_ram = false; - u8 m_ram[0x400]; }; void lk3000_state::machine_start() diff --git a/src/mame/handheld/monty.cpp b/src/mame/handheld/monty.cpp index fd453d3108be2..5b81179e6b7de 100644 --- a/src/mame/handheld/monty.cpp +++ b/src/mame/handheld/monty.cpp @@ -69,6 +69,10 @@ class monty_state : public driver_device required_device m_dac; required_ioport_array<6> m_inputs; + u64 m_lcd_data[32] = { }; + int m_lcd_cs = 0; + int m_halt = 0; + void monty_mem(address_map &map); void mmonty_mem(address_map &map); void monty_io(address_map &map); @@ -80,10 +84,6 @@ class monty_state : public driver_device void lcd_w(offs_t offset, u8 data) { m_lcd[m_lcd_cs]->write(offset, data); } u8 input_r(offs_t offset); void halt_changed(int state) { m_halt = state; } - - u64 m_lcd_data[32] = { }; - int m_lcd_cs = 0; - int m_halt = 0; }; void monty_state::machine_start() diff --git a/src/mame/handheld/scrablex.cpp b/src/mame/handheld/scrablex.cpp index 6589cedf17a63..b0138bcc4b2c7 100644 --- a/src/mame/handheld/scrablex.cpp +++ b/src/mame/handheld/scrablex.cpp @@ -51,13 +51,13 @@ class scrablex_state : public driver_device required_device m_speaker; required_ioport_array<5> m_inputs; + u8 m_inp_mux = 0; + u16 m_r = 0; + void write_o(u8 data); void write_p(u8 data); template u8 read_r(); template void write_r(u8 data); - - u8 m_inp_mux = 0; - u16 m_r = 0; }; void scrablex_state::machine_start() diff --git a/src/mame/handheld/talkingbb.cpp b/src/mame/handheld/talkingbb.cpp index ac94564652bce..f27177b10a2b0 100644 --- a/src/mame/handheld/talkingbb.cpp +++ b/src/mame/handheld/talkingbb.cpp @@ -140,12 +140,12 @@ class talkingbb_state : public driver_device required_device m_display; required_ioport_array<5> m_inputs; - void main_map(address_map &map); - void main_io(address_map &map); - u8 m_bank = 0; u8 m_inp_mux = 0; + void main_map(address_map &map); + void main_io(address_map &map); + // I/O handlers void bank_w(u8 data); u8 bank_r(offs_t offset); diff --git a/src/mame/handheld/talkingfb.cpp b/src/mame/handheld/talkingfb.cpp index 878673a551436..149d5eef92cb4 100644 --- a/src/mame/handheld/talkingfb.cpp +++ b/src/mame/handheld/talkingfb.cpp @@ -58,12 +58,12 @@ class talkingfb_state : public driver_device required_region_ptr m_rom; required_ioport_array<5> m_inputs; - void main_map(address_map &map); - void main_io(address_map &map); - u8 m_bank = 0; u8 m_inp_mux = 0; + void main_map(address_map &map); + void main_io(address_map &map); + // I/O handlers void bank_w(u8 data); template u8 bank_r(offs_t offset); diff --git a/src/mame/handheld/teammate.cpp b/src/mame/handheld/teammate.cpp index 4888def03615e..ead490dea51e7 100644 --- a/src/mame/handheld/teammate.cpp +++ b/src/mame/handheld/teammate.cpp @@ -56,6 +56,12 @@ class teammate_state : public driver_device required_device m_dac; required_ioport_array<3> m_inputs; + u8 m_inp_sel = 0; + u8 m_input = 0; + u8 m_sound = 0; + u8 m_select = 0; + u8 m_led_data = 0; + void main_map(address_map &map); void main_io(address_map &map); @@ -67,12 +73,6 @@ class teammate_state : public driver_device u8 input_r(); void sound_w(u8 data); u8 sound_r(); - - u8 m_inp_sel = 0; - u8 m_input = 0; - u8 m_sound = 0; - u8 m_select = 0; - u8 m_led_data = 0; }; void teammate_state::machine_start() diff --git a/src/mame/handheld/wildfire.cpp b/src/mame/handheld/wildfire.cpp index 2ef97d14fce38..dd5cfb889a7cc 100644 --- a/src/mame/handheld/wildfire.cpp +++ b/src/mame/handheld/wildfire.cpp @@ -73,16 +73,17 @@ class wildfire_state : public driver_device required_device m_speaker; required_device m_volume; + u16 m_a = 0; + u8 m_d = 0; + + double m_speaker_volume = 0.0; + void update_display(); void write_d(u8 data); void write_a(u16 data); void speaker_update(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_decay_sim); - double m_speaker_volume = 0.0; - - u16 m_a = 0; - u8 m_d = 0; }; void wildfire_state::machine_start() diff --git a/src/mame/heathkit/tlb.cpp b/src/mame/heathkit/tlb.cpp index 98347546c05cd..becfa6eb5f5a7 100644 --- a/src/mame/heathkit/tlb.cpp +++ b/src/mame/heathkit/tlb.cpp @@ -19,8 +19,6 @@ - 49/50 row mode only shows half the screen. - In 49/50 row mode, character descenders are cut off. - Screen saver does not disable the screen - - With superset slot option - - Screensaver freezes the screen instead of blanking the screen ****************************************************************************/ /*************************************************************************** @@ -873,6 +871,7 @@ ROM_START( h19 ) ROM_LOAD( "2716_444-37_h19keyb.u445", 0x0000, 0x0800, CRC(5c3e6972) SHA1(df49ce64ae48652346a91648c58178a34fb37d3c)) ROM_END + ROM_START( super19 ) // Super-19 ROM ROM_REGION( 0x1000, "maincpu", ROMREGION_ERASEFF ) @@ -887,6 +886,7 @@ ROM_START( super19 ) ROM_LOAD( "2716_444-37_h19keyb.u445", 0x0000, 0x0800, CRC(5c3e6972) SHA1(df49ce64ae48652346a91648c58178a34fb37d3c)) ROM_END + ROM_START( superset ) // SuperSet ROM ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF ) @@ -905,6 +905,7 @@ ROM_START( superset ) ROM_LOAD( "2716_101-422_superset_kbd.u445", 0x0000, 0x0800, CRC(549d15b3) SHA1(981962e5e05bbdc5a66b0e86870853ce5596e877)) ROM_END + ROM_START( watz19 ) ROM_REGION( 0x1000, "maincpu", ROMREGION_ERASEFF ) ROM_DEFAULT_BIOS("watzman-a") @@ -925,6 +926,7 @@ ROM_START( watz19 ) ROM_LOAD( "keybd.u445", 0x0000, 0x0800, CRC(58dc8217) SHA1(1b23705290bdf9fc6342065c6a528c04bff67b13)) ROM_END + ROM_START( ultra19 ) // Ultra ROM ROM_REGION( 0x1000, "maincpu", ROMREGION_ERASEFF ) @@ -939,6 +941,7 @@ ROM_START( ultra19 ) ROM_LOAD( "2716_h19_ultra_keyboard.u445", 0x0000, 0x0800, CRC(76130c92) SHA1(ca39c602af48505139d2750a084b5f8f0e662ff7)) ROM_END + ROM_START( gp19 ) // GP-19 ROMs ROM_REGION( 0x3000, "maincpu", ROMREGION_ERASEFF ) @@ -955,6 +958,7 @@ ROM_START( gp19 ) ROM_LOAD( "2716_444-37_h19keyb.u445", 0x0000, 0x0800, CRC(5c3e6972) SHA1(df49ce64ae48652346a91648c58178a34fb37d3c)) ROM_END + ROM_START( imaginator ) // Program code ROM_REGION( 0x4000, "maincpu", ROMREGION_ERASEFF ) @@ -1096,6 +1100,7 @@ ioport_constructor heath_super19_tlb_device::device_input_ports() const return INPUT_PORTS_NAME(super19); } + /** * Superset ROM * @@ -1119,6 +1124,7 @@ void heath_superset_tlb_device::device_add_mconfig(machine_config &config) // per line updates are needed for onscreen menu to display properly m_screen->set_video_attributes(VIDEO_UPDATE_SCANLINE); + m_crtc->set_begin_update_callback(FUNC(heath_superset_tlb_device::crtc_begin_update)); m_crtc->set_update_row_callback(FUNC(heath_superset_tlb_device::crtc_update_row)); // link up the serial port outputs to font chip. @@ -1181,6 +1187,11 @@ void heath_superset_tlb_device::crtc_reg_w(offs_t reg, uint8_t val) heath_tlb_device::crtc_reg_w(reg, val); } +MC6845_BEGIN_UPDATE(heath_superset_tlb_device::crtc_begin_update) +{ + bitmap.fill(rgb_t::black(), cliprect); +} + MC6845_UPDATE_ROW(heath_superset_tlb_device::crtc_update_row) { rgb_t const *const palette = m_palette->palette()->entry_list_raw(); @@ -1243,6 +1254,7 @@ void heath_superset_tlb_device::out2_internal(int data) m_selected_char_set = (m_selected_char_set & 0x0a) | (data & 0x01); } + /** * Watzman ROM * @@ -1263,6 +1275,7 @@ ioport_constructor heath_watz_tlb_device::device_input_ports() const return INPUT_PORTS_NAME(watz19); } + /** * UltraROM * @@ -1301,6 +1314,7 @@ ioport_constructor heath_ultra_tlb_device::device_input_ports() const return INPUT_PORTS_NAME(ultra19); } + /** * Northwest Digital Systems GP-19 add-in board */ @@ -1397,7 +1411,6 @@ void heath_gp19_tlb_device::latch_u5_w(uint8_t data) } } - MC6845_UPDATE_ROW(heath_gp19_tlb_device::crtc_update_row) { rgb_t const *const palette = m_palette->palette()->entry_list_raw(); diff --git a/src/mame/heathkit/tlb.h b/src/mame/heathkit/tlb.h index 55b11d1c98db9..1380f88dd6988 100644 --- a/src/mame/heathkit/tlb.h +++ b/src/mame/heathkit/tlb.h @@ -169,6 +169,7 @@ class heath_superset_tlb_device : public heath_tlb_device void mem_map(address_map &map); void io_map(address_map &map); + MC6845_BEGIN_UPDATE(crtc_begin_update); virtual MC6845_UPDATE_ROW(crtc_update_row) override; void dtr_internal(int data); diff --git a/src/mame/hegenerglaser/brikett.cpp b/src/mame/hegenerglaser/brikett.cpp index 585591361dcf2..05bb6a5ecf49c 100644 --- a/src/mame/hegenerglaser/brikett.cpp +++ b/src/mame/hegenerglaser/brikett.cpp @@ -135,6 +135,11 @@ class brikett_state : public driver_device required_device m_speaker_off; optional_ioport_array<4+2> m_inputs; + bool m_reset = false; + u8 m_esb_led = 0; + u8 m_esb_row = 0; + u8 m_esb_select = 0; + // address maps void mephisto_map(address_map &map); void mephistoj_map(address_map &map); @@ -156,11 +161,6 @@ class brikett_state : public driver_device int esb_r(); TIMER_DEVICE_CALLBACK_MEMBER(speaker_off) { m_dac->write(0); } - - bool m_reset = false; - u8 m_esb_led = 0; - u8 m_esb_row = 0; - u8 m_esb_select = 0; }; diff --git a/src/mame/hegenerglaser/glasgow.cpp b/src/mame/hegenerglaser/glasgow.cpp index 5517853bde6aa..d67280e1ac1ce 100644 --- a/src/mame/hegenerglaser/glasgow.cpp +++ b/src/mame/hegenerglaser/glasgow.cpp @@ -73,13 +73,13 @@ class glasgow_state : public driver_device required_device m_dac; required_ioport_array<2> m_keys; + u8 m_kp_mux = 0; + void glasgow_mem(address_map &map); void control_w(u8 data); u8 keys_r(); void keys_w(u8 data); - - u8 m_kp_mux = 0; }; void glasgow_state::machine_start() diff --git a/src/mame/hegenerglaser/milano.cpp b/src/mame/hegenerglaser/milano.cpp index 339091116c3d5..9c2829ae1c81c 100644 --- a/src/mame/hegenerglaser/milano.cpp +++ b/src/mame/hegenerglaser/milano.cpp @@ -55,6 +55,9 @@ class milano_state : public driver_device required_device m_led_pwm; required_ioport m_keys; + u8 m_board_mux = 0; + u8 m_led_data = 0; + void milano_mem(address_map &map); void update_leds(); @@ -62,9 +65,6 @@ class milano_state : public driver_device void board_w(u8 data); u8 board_r(); u8 keys_r(offs_t offset); - - u8 m_board_mux = 0; - u8 m_led_data = 0; }; void milano_state::machine_start() diff --git a/src/mame/hegenerglaser/mm1.cpp b/src/mame/hegenerglaser/mm1.cpp index 67c31ec694857..3051677c02c3d 100644 --- a/src/mame/hegenerglaser/mm1.cpp +++ b/src/mame/hegenerglaser/mm1.cpp @@ -85,6 +85,9 @@ class mm1_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + bool m_reset = false; + u8 m_kp_mux = 0; + // address maps void mirage_map(address_map &map); void mm1_map(address_map &map); @@ -97,9 +100,6 @@ class mm1_state : public driver_device void unknown_w(u8 data); void keypad_w(u8 data); template int keypad_r(); - - bool m_reset = false; - u8 m_kp_mux = 0; }; void mm1_state::machine_start() diff --git a/src/mame/hegenerglaser/mmdisplay1.h b/src/mame/hegenerglaser/mmdisplay1.h index a930c832dd52e..530152995654d 100644 --- a/src/mame/hegenerglaser/mmdisplay1.h +++ b/src/mame/hegenerglaser/mmdisplay1.h @@ -33,11 +33,11 @@ class mephisto_display1_device : public device_t output_finder<4> m_digits; devcb_write8 m_output_digit; - void update_lcd(); - int m_strobe; u8 m_digit_idx; u8 m_digit_data[4]; + + void update_lcd(); }; diff --git a/src/mame/hegenerglaser/mmdisplay2.h b/src/mame/hegenerglaser/mmdisplay2.h index 7b2cd6793007c..94a4b55b177f4 100644 --- a/src/mame/hegenerglaser/mmdisplay2.h +++ b/src/mame/hegenerglaser/mmdisplay2.h @@ -39,11 +39,11 @@ class mephisto_display2_device : public device_t required_device m_lcd; required_device m_dac; - void lcd_palette(palette_device &palette) const; - HD44780_PIXEL_UPDATE(lcd_pixel_update); - u8 m_latch; u8 m_ctrl; + + void lcd_palette(palette_device &palette) const; + HD44780_PIXEL_UPDATE(lcd_pixel_update); }; diff --git a/src/mame/hegenerglaser/modena.cpp b/src/mame/hegenerglaser/modena.cpp index cba4e1e486269..63e4bbcc0365d 100644 --- a/src/mame/hegenerglaser/modena.cpp +++ b/src/mame/hegenerglaser/modena.cpp @@ -62,15 +62,15 @@ class modena_state : public driver_device required_device m_dac; required_ioport m_keys; + u8 m_board_mux = 0; + u8 m_io_ctrl = 0; + void modena_mem(address_map &map); u8 input_r(); void io_w(u8 data); void led_w(u8 data); void update_display(); - - u8 m_board_mux = 0; - u8 m_io_ctrl = 0; }; void modena_state::machine_start() diff --git a/src/mame/hegenerglaser/modular.cpp b/src/mame/hegenerglaser/modular.cpp index d423898d69674..acb4b8779eb34 100644 --- a/src/mame/hegenerglaser/modular.cpp +++ b/src/mame/hegenerglaser/modular.cpp @@ -140,6 +140,8 @@ class mmodular_state : public driver_device required_device m_bav_busy; optional_ioport m_fake; + u8 m_bav_data = 0; + // address maps void alm16_mem(address_map &map); void alm32_mem(address_map &map); @@ -160,8 +162,6 @@ class mmodular_state : public driver_device u8 spawn_cb(offs_t offset); void set_sbtype(ioport_value newval); - - u8 m_bav_data = 0; }; void mmodular_state::machine_start() diff --git a/src/mame/hegenerglaser/modular_tm.cpp b/src/mame/hegenerglaser/modular_tm.cpp index 1269760454926..1f5522a3f7386 100644 --- a/src/mame/hegenerglaser/modular_tm.cpp +++ b/src/mame/hegenerglaser/modular_tm.cpp @@ -88,6 +88,8 @@ class mmtm_state : public driver_device required_device m_disable_bootrom; optional_ioport m_fake; + bool m_bootrom_enabled = false; + // address maps void mmtm_2m_map(address_map &map); void mmtm_8m_map(address_map &map); @@ -97,7 +99,6 @@ class mmtm_state : public driver_device void install_bootrom(bool enable); TIMER_DEVICE_CALLBACK_MEMBER(disable_bootrom) { install_bootrom(false); } - bool m_bootrom_enabled = false; void set_cpu_freq(); }; @@ -140,7 +141,7 @@ void mmtm_state::set_cpu_freq() m_maincpu->set_unscaled_clock(xtal[val]); // lcd busy flag timing problem when overclocked - subdevice("display:hd44780")->set_busy_factor((val > 1) ? 0.75 : 1.0); + subdevice("display:hd44780")->set_clock_scale((val > 1) ? 1.32 : 1.0); } diff --git a/src/mame/hegenerglaser/mondial.cpp b/src/mame/hegenerglaser/mondial.cpp index 53dc3cfa7b918..14c9a2243ab96 100644 --- a/src/mame/hegenerglaser/mondial.cpp +++ b/src/mame/hegenerglaser/mondial.cpp @@ -57,13 +57,13 @@ class mondial_state : public driver_device required_device m_beeper; required_ioport_array<2> m_keys; + u8 m_inp_mux = 0; + void mondial_mem(address_map &map); void control_w(u8 data); u8 irq_ack_r(); u8 input_r(offs_t offset); - - u8 m_inp_mux = 0; }; void mondial_state::machine_start() diff --git a/src/mame/hegenerglaser/mondial2.cpp b/src/mame/hegenerglaser/mondial2.cpp index 21fe17adb4d5c..5de2f691c8574 100644 --- a/src/mame/hegenerglaser/mondial2.cpp +++ b/src/mame/hegenerglaser/mondial2.cpp @@ -52,16 +52,16 @@ class mondial2_state : public driver_device required_device m_dac; required_ioport_array<4> m_keys; + u8 m_keypad_mux = 0; + u8 m_board_mux = 0; + u8 m_led_data = 0; + void mondial2_mem(address_map &map); void update_leds(); void control_w(u8 data); void board_w(u8 data); u8 input_r(offs_t offset); - - u8 m_keypad_mux = 0; - u8 m_board_mux = 0; - u8 m_led_data = 0; }; void mondial2_state::machine_start() diff --git a/src/mame/hegenerglaser/mondial68k.cpp b/src/mame/hegenerglaser/mondial68k.cpp index 7aa0efbdab559..e73eb1903bc37 100644 --- a/src/mame/hegenerglaser/mondial68k.cpp +++ b/src/mame/hegenerglaser/mondial68k.cpp @@ -56,14 +56,6 @@ class mondial68k_state : public driver_device virtual void machine_start() override; private: - void mondial68k_mem(address_map &map); - - void update_leds(); - void lcd_output_w(u32 data); - void input_mux_w(u8 data); - void board_mux_w(u8 data); - u8 inputs_r(); - required_device m_maincpu; required_device m_board; required_device m_lcd_latch; @@ -74,6 +66,14 @@ class mondial68k_state : public driver_device u8 m_input_mux = 0xff; u8 m_board_mux = 0xff; + + void mondial68k_mem(address_map &map); + + void update_leds(); + void lcd_output_w(u32 data); + void input_mux_w(u8 data); + void board_mux_w(u8 data); + u8 inputs_r(); }; void mondial68k_state::machine_start() diff --git a/src/mame/hegenerglaser/smondial.cpp b/src/mame/hegenerglaser/smondial.cpp index fa1647502c62e..ede319a4b9e75 100644 --- a/src/mame/hegenerglaser/smondial.cpp +++ b/src/mame/hegenerglaser/smondial.cpp @@ -77,6 +77,9 @@ class smondialb_state : public driver_device required_ioport_array<4> m_keys; output_finder<8> m_digits; + u8 m_led_data = 0; + u8 m_board_mux = 0; + // address maps void smondialb_mem(address_map &map); void smondial2_mem(address_map &map); @@ -88,9 +91,6 @@ class smondialb_state : public driver_device virtual void led_w(u8 data); void board_w(u8 data); INTERRUPT_GEN_MEMBER(nmi_handler); - - u8 m_led_data = 0; - u8 m_board_mux = 0; }; void smondialb_state::machine_start() diff --git a/src/mame/irem/olibochu.cpp b/src/mame/irem/olibochu.cpp index 071cb44a03b36..dcaf8350dcc52 100644 --- a/src/mame/irem/olibochu.cpp +++ b/src/mame/irem/olibochu.cpp @@ -111,6 +111,11 @@ class olibochu_state : public driver_device required_device m_cvsd; required_region_ptr m_samplerom; + tilemap_t *m_bg_tilemap = nullptr; + u16 m_soundcmd = 0; + u8 m_sample_latch = 0; + u16 m_sample_address = 0; + // video-related void videoram_w(offs_t offset, u8 data); void colorram_w(offs_t offset, u8 data); @@ -131,11 +136,6 @@ class olibochu_state : public driver_device void main_map(address_map &map); void sound_map(address_map &map); - - tilemap_t *m_bg_tilemap = nullptr; - u16 m_soundcmd = 0; - u8 m_sample_latch = 0; - u16 m_sample_address = 0; }; void olibochu_state::machine_start() diff --git a/src/mame/itech/itech8.h b/src/mame/itech/itech8.h index d8aa1a9fa42e7..d8ebdffa45862 100644 --- a/src/mame/itech/itech8.h +++ b/src/mame/itech/itech8.h @@ -219,7 +219,7 @@ class slikshot_state : public itech8_state TIMER_CALLBACK_MEMBER(delayed_z80_control_w); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); - + void mem_hi_map(address_map &map); void mem_lo_map(address_map &map); void z80_io_map(address_map &map); diff --git a/src/mame/kaneko/airbustr.cpp b/src/mame/kaneko/airbustr.cpp index 2c275f5f849c6..be50f2f636a33 100644 --- a/src/mame/kaneko/airbustr.cpp +++ b/src/mame/kaneko/airbustr.cpp @@ -436,7 +436,7 @@ void airbustr_state::screen_vblank(int state) void airbustr_state::calc1_w(offs_t offset, uint8_t data) { - offset += 0x1fe0; + offset += 0xfe0; m_devram[offset] = data; // CALC1 chip is 16-bit @@ -684,6 +684,9 @@ INPUT_PORTS_END static GFXDECODE_START( gfx_airbustr ) GFXDECODE_ENTRY( "tiles", 0, gfx_8x8x4_row_2x2_group_packed_lsb, 0, 32 ) +GFXDECODE_END + +static GFXDECODE_START( gfx_airbustr_spr ) GFXDECODE_ENTRY( "sprites", 0, gfx_8x8x4_row_2x2_group_packed_msb, 512, 16 ) GFXDECODE_END @@ -768,9 +771,7 @@ void airbustr_state::airbustrb(machine_config &config) GFXDECODE(config, m_gfxdecode, m_palette, gfx_airbustr); PALETTE(config, m_palette).set_format(palette_device::xGRB_555, 768); - KANEKO_PANDORA(config, m_pandora, 0); - m_pandora->set_gfx_region(1); - m_pandora->set_gfxdecode_tag(m_gfxdecode); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_airbustr_spr); // sound hardware SPEAKER(config, "mono").front_center(); diff --git a/src/mame/kaneko/djboy.cpp b/src/mame/kaneko/djboy.cpp index e9a669b230f1d..94b79e6e9fda1 100644 --- a/src/mame/kaneko/djboy.cpp +++ b/src/mame/kaneko/djboy.cpp @@ -283,7 +283,7 @@ TILE_GET_INFO_MEMBER(djboy_state::get_bg_tile_info) if (color & 8) code |= 0x1000; - tileinfo.set(1, code, color, 0); // no flip + tileinfo.set(0, code, color, 0); // no flip } void djboy_state::videoram_w(offs_t offset, uint8_t data) @@ -607,10 +607,13 @@ INPUT_PORTS_END static GFXDECODE_START( gfx_djboy ) - GFXDECODE_ENTRY( "sprites", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x100, 16 ) GFXDECODE_ENTRY( "bgtiles", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x000, 16 ) GFXDECODE_END +static GFXDECODE_START( gfx_djboy_spr ) + GFXDECODE_ENTRY( "sprites", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x100, 16 ) +GFXDECODE_END + /******************************************************************************/ // Main Z80 uses IM2 @@ -699,8 +702,7 @@ void djboy_state::djboy(machine_config &config) GFXDECODE(config, m_gfxdecode, m_palette, gfx_djboy); PALETTE(config, m_palette).set_entries(0x200); - KANEKO_PANDORA(config, m_pandora, 0); - m_pandora->set_gfxdecode_tag(m_gfxdecode); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_djboy_spr); SPEAKER(config, "lspeaker").front_left(); SPEAKER(config, "rspeaker").front_right(); diff --git a/src/mame/kaneko/galpanic.cpp b/src/mame/kaneko/galpanic.cpp index 29be2e8037845..a9c1033d5731d 100644 --- a/src/mame/kaneko/galpanic.cpp +++ b/src/mame/kaneko/galpanic.cpp @@ -89,7 +89,6 @@ class galpanic_state : public driver_device galpanic_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") - , m_gfxdecode(*this, "gfxdecode") , m_screen(*this, "screen") , m_palette(*this, "palette") , m_pandora(*this, "pandora") @@ -107,7 +106,6 @@ class galpanic_state : public driver_device private: required_device m_maincpu; - required_device m_gfxdecode; required_device m_screen; required_device m_palette; required_device m_pandora; @@ -326,7 +324,7 @@ static INPUT_PORTS_START( galpanica ) INPUT_PORTS_END -static GFXDECODE_START( gfx_galpanic ) +static GFXDECODE_START( gfx_galpanic_spr ) GFXDECODE_ENTRY( "sprites", 0, gfx_8x8x4_row_2x2_group_packed_msb, 256, 16 ) GFXDECODE_END @@ -350,13 +348,11 @@ void galpanic_state::galpanic(machine_config &config) m_screen->screen_vblank().set(FUNC(galpanic_state::screen_vblank)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_galpanic); // fg palette RAM, bit 0 seems to be a transparency flag for the front bitmap PALETTE(config, m_palette, FUNC(galpanic_state::palette)).set_format(palette_device::GRBx_555, 1024 + 32768); - KANEKO_PANDORA(config, m_pandora, 0); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_galpanic_spr); m_pandora->set_offsets(0, -16); - m_pandora->set_gfxdecode_tag(m_gfxdecode); // sound hardware SPEAKER(config, "mono").front_center(); diff --git a/src/mame/kaneko/hvyunit.cpp b/src/mame/kaneko/hvyunit.cpp index a93bdf81c25ed..d80bb9946e8b8 100644 --- a/src/mame/kaneko/hvyunit.cpp +++ b/src/mame/kaneko/hvyunit.cpp @@ -206,7 +206,7 @@ TILE_GET_INFO_MEMBER(hvyunit_state::get_bg_tile_info) int code = m_videoram[tile_index] + ((attr & 0x0f) << 8); int color = (attr >> 4); - tileinfo.set(1, code, color, 0); + tileinfo.set(0, code, color, 0); } void hvyunit_state::video_start() @@ -578,10 +578,13 @@ INPUT_PORTS_END *************************************/ static GFXDECODE_START( gfx_hvyunit ) - GFXDECODE_ENTRY( "gfx1", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x100, 16 ) /* sprite bank */ GFXDECODE_ENTRY( "gfx2", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x000, 16 ) /* background tiles */ GFXDECODE_END +static GFXDECODE_START( gfx_hvyunit_spr ) + GFXDECODE_ENTRY( "gfx1", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x100, 16 ) /* sprite bank */ +GFXDECODE_END + /************************************* * @@ -652,8 +655,7 @@ void hvyunit_state::hvyunit(machine_config &config) GFXDECODE(config, m_gfxdecode, m_palette, gfx_hvyunit); PALETTE(config, m_palette).set_format(palette_device::xRGB_444, 0x800); - KANEKO_PANDORA(config, m_pandora, 0); - m_pandora->set_gfxdecode_tag(m_gfxdecode); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_hvyunit_spr); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/kaneko/kan_pand.cpp b/src/mame/kaneko/kan_pand.cpp index 1359262cfea56..53d1181d49a52 100644 --- a/src/mame/kaneko/kan_pand.cpp +++ b/src/mame/kaneko/kan_pand.cpp @@ -58,10 +58,12 @@ DEFINE_DEVICE_TYPE(KANEKO_PANDORA, kaneko_pandora_device, "kaneko_pandora", "Kan kaneko_pandora_device::kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, KANEKO_PANDORA, tag, owner, clock) , device_video_interface(mconfig, *this) - , m_gfx_region(0) + , device_gfx_interface(mconfig, *this) + , m_clear_bitmap(false) + , m_bg_pen(0) , m_xoffset(0) , m_yoffset(0) - , m_gfxdecode(*this, finder_base::DUMMY_TAG) + , m_flip_screen(false) { } @@ -93,7 +95,7 @@ void kaneko_pandora_device::device_reset() { memset(m_spriteram.get(), 0x00, 0x1000); - m_clear_bitmap = 1; + m_clear_bitmap = true; } @@ -101,14 +103,14 @@ void kaneko_pandora_device::device_reset() IMPLEMENTATION *****************************************************************************/ -void kaneko_pandora_device::set_bg_pen( int pen ) +void kaneko_pandora_device::set_bg_pen(uint16_t pen) { m_bg_pen = pen; } -void kaneko_pandora_device::set_clear_bitmap( int clear ) +void kaneko_pandora_device::set_clear_bitmap(int clear) { - m_clear_bitmap = clear; + m_clear_bitmap = clear != 0; } void kaneko_pandora_device::update( bitmap_ind16 &bitmap, const rectangle &cliprect ) @@ -198,7 +200,7 @@ void kaneko_pandora_device::draw( bitmap_ind16 &bitmap, const rectangle &cliprec if (sy & 0x100) sy -= 0x200; - m_gfxdecode->gfx(m_gfx_region)->transpen(bitmap,cliprect, + gfx(0)->transpen(bitmap,cliprect, tile, (tilecolour & 0xf0) >> 4, flipx, flipy, diff --git a/src/mame/kaneko/kan_pand.h b/src/mame/kaneko/kan_pand.h index 0ca59e0f6f3ff..8f724897e5560 100644 --- a/src/mame/kaneko/kan_pand.h +++ b/src/mame/kaneko/kan_pand.h @@ -17,15 +17,22 @@ ***************************************************************************/ class kaneko_pandora_device : public device_t, - public device_video_interface + public device_video_interface, + public device_gfx_interface { public: + // constructor/destructor kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); + template kaneko_pandora_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&palette_tag, const gfx_decode_entry *gfxinfo) + : kaneko_pandora_device(mconfig, tag, owner, clock) + { + set_info(gfxinfo); + set_palette(std::forward(palette_tag)); + } // configuration - template void set_gfxdecode_tag(T &&tag) { m_gfxdecode.set_tag(std::forward(tag)); } - void set_gfx_region(int gfxregion) { m_gfx_region = gfxregion; } - void set_offsets(int x_offset, int y_offset) + void set_gfxinfo(const gfx_decode_entry *gfxinfo) { set_info(gfxinfo); } + void set_offsets(int32_t x_offset, int32_t y_offset) { m_xoffset = x_offset; m_yoffset = y_offset; @@ -36,9 +43,9 @@ class kaneko_pandora_device : public device_t, void spriteram_LSB_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0); uint16_t spriteram_LSB_r(offs_t offset); void update( bitmap_ind16 &bitmap, const rectangle &cliprect ); - void set_clear_bitmap( int clear ); + void set_clear_bitmap(int clear); void eof(); - void set_bg_pen( int pen ); + void set_bg_pen(uint16_t pen); void flip_screen_set(bool flip) { m_flip_screen = flip; } protected: @@ -50,15 +57,13 @@ class kaneko_pandora_device : public device_t, private: // internal state - std::unique_ptr m_spriteram; - std::unique_ptr m_sprites_bitmap; /* bitmap to render sprites to, Pandora seems to be frame'buffered' */ - int m_clear_bitmap = 0; - int m_bg_pen = 0; // might work some other way.. - uint8_t m_gfx_region; - int m_xoffset; - int m_yoffset; - bool m_flip_screen = false; - required_device m_gfxdecode; + std::unique_ptr m_spriteram; + std::unique_ptr m_sprites_bitmap; // bitmap to render sprites to, Pandora seems to be frame'buffered' + bool m_clear_bitmap; + uint16_t m_bg_pen; // might work some other way.. + int32_t m_xoffset; + int32_t m_yoffset; + bool m_flip_screen; }; DECLARE_DEVICE_TYPE(KANEKO_PANDORA, kaneko_pandora_device) diff --git a/src/mame/kaneko/sandscrp.cpp b/src/mame/kaneko/sandscrp.cpp index c7db7893bacc4..7518cb0ec79bd 100644 --- a/src/mame/kaneko/sandscrp.cpp +++ b/src/mame/kaneko/sandscrp.cpp @@ -420,7 +420,7 @@ static INPUT_PORTS_START( sandscrp ) INPUT_PORTS_END -static GFXDECODE_START( gfx_sandscrp ) +static GFXDECODE_START( gfx_sandscrp_spr ) GFXDECODE_ENTRY( "gfx1", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0x000, 0x10 ) // [0] Sprites GFXDECODE_END @@ -453,7 +453,6 @@ void sandscrp_state::sandscrp(machine_config &config) screen.screen_vblank().set(FUNC(sandscrp_state::screen_vblank)); screen.set_palette("palette"); - GFXDECODE(config, "gfxdecode", "palette", gfx_sandscrp); PALETTE(config, "palette").set_format(palette_device::xGRB_555, 2048); KANEKO_TMAP(config, m_view2); @@ -463,8 +462,7 @@ void sandscrp_state::sandscrp(machine_config &config) KANEKO_HIT(config, "calc1_mcu").set_type(0); - KANEKO_PANDORA(config, m_pandora, 0); - m_pandora->set_gfxdecode_tag("gfxdecode"); + KANEKO_PANDORA(config, m_pandora, 0, "palette", gfx_sandscrp_spr); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/kaneko/snowbros.cpp b/src/mame/kaneko/snowbros.cpp index 32ac95e1c06c5..4031b63521a9a 100644 --- a/src/mame/kaneko/snowbros.cpp +++ b/src/mame/kaneko/snowbros.cpp @@ -1661,7 +1661,7 @@ INPUT_PORTS_END /* SnowBros */ -static GFXDECODE_START( gfx_snowbros ) +static GFXDECODE_START( gfx_snowbros_spr ) GFXDECODE_ENTRY( "gfx1", 0, gfx_8x8x4_row_2x2_group_packed_msb, 0, 16 ) GFXDECODE_END @@ -1740,7 +1740,7 @@ static GFXDECODE_START( gfx_sb3 ) GFXDECODE_ENTRY( "gfx2", 0, sb3_tilebglayout, 0, 2 ) GFXDECODE_END -static GFXDECODE_START( gfx_hyperpac ) +static GFXDECODE_START( gfx_hyperpac_spr ) GFXDECODE_ENTRY( "gfx1", 0, hyperpac_tilelayout, 0, 16 ) GFXDECODE_END @@ -1784,11 +1784,9 @@ void snowbros_state::snowbros(machine_config &config) m_screen->screen_vblank().set(FUNC(snowbros_state::screen_vblank_snowbros)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_snowbros); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 256); - KANEKO_PANDORA(config, m_pandora, 0); - m_pandora->set_gfxdecode_tag(m_gfxdecode); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_snowbros_spr); /* sound hardware */ SPEAKER(config, "mono").front_center(); @@ -1814,7 +1812,7 @@ void snowbros_state::wintbob(machine_config &config) config.device_remove("pandora"); /* video hardware */ - m_gfxdecode->set_info(gfx_wb); + GFXDECODE(config, m_gfxdecode, m_palette, gfx_wb); m_screen->set_screen_update(FUNC(snowbros_state::screen_update_wintbob)); m_screen->screen_vblank().set_nop(); @@ -1832,7 +1830,7 @@ void snowbros_state::semicom(machine_config &config) m_soundcpu->set_addrmap(AS_PROGRAM, &snowbros_state::hyperpac_sound_map); m_soundcpu->set_addrmap(AS_IO, address_map_constructor()); - m_gfxdecode->set_info(gfx_hyperpac); + m_pandora->set_gfxinfo(gfx_hyperpac_spr); m_soundlatch->data_pending_callback().set_nop(); @@ -1987,7 +1985,7 @@ void snowbros_state::_4in1(machine_config &config) semicom(config); /* basic machine hardware */ - m_gfxdecode->set_info(gfx_snowbros); + m_pandora->set_gfxinfo(gfx_snowbros_spr); } void snowbros_state::snowbro3(machine_config &config) /* PCB has 16MHz & 12MHz OSCs */ @@ -2036,11 +2034,9 @@ void snowbros_state::yutnori(machine_config &config) m_screen->screen_vblank().set(FUNC(snowbros_state::screen_vblank_snowbros)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_hyperpac); PALETTE(config, m_palette).set_format(palette_device::xBGR_555, 256); - KANEKO_PANDORA(config, m_pandora, 0); - m_pandora->set_gfxdecode_tag(m_gfxdecode); + KANEKO_PANDORA(config, m_pandora, 0, m_palette, gfx_hyperpac_spr); /* sound hardware */ SPEAKER(config, "mono").front_center(); diff --git a/src/mame/kaneko/snowbros.h b/src/mame/kaneko/snowbros.h index bb84833b3720e..7e4c05686222d 100644 --- a/src/mame/kaneko/snowbros.h +++ b/src/mame/kaneko/snowbros.h @@ -60,7 +60,7 @@ class snowbros_state : public driver_device required_device m_maincpu; optional_device m_soundcpu; optional_device m_oki; - required_device m_gfxdecode; + optional_device m_gfxdecode; required_device m_palette; required_device m_screen; optional_device m_soundlatch; // not snowbro3 diff --git a/src/mame/konami/combatsc.cpp b/src/mame/konami/combatsc.cpp index 1743f9f71254b..7bf3056ba2740 100644 --- a/src/mame/konami/combatsc.cpp +++ b/src/mame/konami/combatsc.cpp @@ -563,17 +563,6 @@ INPUT_PORTS_END * *************************************/ -static const gfx_layout gfxlayout = -{ - 8,8, - 0x4000, - 4, - { 0,1,2,3 }, - { 0, 4, 8, 12, 16, 20, 24, 28}, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 -}; - static const gfx_layout tile_layout = { 8,8, @@ -602,9 +591,12 @@ static const gfx_layout sprite_layout = 8*8*4 }; -static GFXDECODE_START( gfx_combatsc ) - GFXDECODE_ENTRY( "gfx1", 0x00000, gfxlayout, 0, 8*16 ) - GFXDECODE_ENTRY( "gfx2", 0x00000, gfxlayout, 0, 8*16 ) +static GFXDECODE_START( gfx_combatsc_1 ) + GFXDECODE_ENTRY( "gfx1", 0x00000, gfx_8x8x4_packed_msb, 0, 8*16 ) +GFXDECODE_END + +static GFXDECODE_START( gfx_combatsc_2 ) + GFXDECODE_ENTRY( "gfx2", 0x00000, gfx_8x8x4_packed_msb, 0, 8*16 ) GFXDECODE_END static GFXDECODE_START( gfx_combatscb ) @@ -702,15 +694,12 @@ void combatsc_state::combatsc(machine_config &config) m_screen->set_screen_update(FUNC(combatsc_state::screen_update)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_combatsc); PALETTE(config, m_palette, FUNC(combatsc_state::palette)); m_palette->set_format(palette_device::xBGR_555, 8 * 16 * 16, 128); m_palette->set_endianness(ENDIANNESS_LITTLE); - K007121(config, m_k007121[0], 0); - m_k007121[0]->set_palette_tag(m_palette); - K007121(config, m_k007121[1], 0); - m_k007121[1]->set_palette_tag(m_palette); + K007121(config, m_k007121[0], 0, m_palette, gfx_combatsc_1); + K007121(config, m_k007121[1], 0, m_palette, gfx_combatsc_2); // sound hardware SPEAKER(config, "mono").front_center(); diff --git a/src/mame/konami/combatsc.h b/src/mame/konami/combatsc.h index a1c4a880124cc..92f58af614291 100644 --- a/src/mame/konami/combatsc.h +++ b/src/mame/konami/combatsc.h @@ -28,7 +28,6 @@ class combatsc_base_state : public driver_device m_maincpu(*this, "maincpu"), m_audiocpu(*this, "audiocpu"), m_screen(*this, "screen"), - m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_soundlatch(*this, "soundlatch"), m_track_ports(*this, {"TRACK0_Y", "TRACK0_X", "TRACK1_Y", "TRACK1_X"}), @@ -57,7 +56,6 @@ class combatsc_base_state : public driver_device required_device m_maincpu; required_device m_audiocpu; required_device m_screen; - required_device m_gfxdecode; required_device m_palette; required_device m_soundlatch; @@ -131,6 +129,7 @@ class combatscb_state : public combatsc_base_state public: combatscb_state(const machine_config &mconfig, device_type type, const char *tag) : combatsc_base_state(mconfig, type, tag), + m_gfxdecode(*this, "gfxdecode"), m_msm(*this, "msm"), m_soundbank(*this, "soundbank"), m_io_ram(*this, "io_ram", 0x4000, ENDIANNESS_BIG), @@ -146,6 +145,7 @@ class combatscb_state : public combatsc_base_state virtual void video_start() override; private: + optional_device m_gfxdecode; required_device m_msm; required_memory_bank m_soundbank; memory_share_creator m_io_ram; diff --git a/src/mame/konami/combatsc_v.cpp b/src/mame/konami/combatsc_v.cpp index d31bb7fded8f5..9c53da1549f8a 100644 --- a/src/mame/konami/combatsc_v.cpp +++ b/src/mame/konami/combatsc_v.cpp @@ -148,7 +148,7 @@ TILE_GET_INFO_MEMBER(combatsc_state::get_tile_info1) number = m_videoram[1][tile_index + 0x400] + 256 * bank; - tileinfo.set(1, + tileinfo.set(0, number, color, 0); @@ -250,9 +250,9 @@ TILE_GET_INFO_MEMBER(combatscb_state::get_text_info) void combatsc_state::video_start() { - m_bg_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(combatsc_state::get_tile_info0)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_bg_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(combatsc_state::get_tile_info1)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_textlayer = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(combatsc_state::get_text_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_bg_tilemap[0] = &machine().tilemap().create(*m_k007121[0], tilemap_get_info_delegate(*this, FUNC(combatsc_state::get_tile_info0)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_bg_tilemap[1] = &machine().tilemap().create(*m_k007121[1], tilemap_get_info_delegate(*this, FUNC(combatsc_state::get_tile_info1)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_textlayer = &machine().tilemap().create(*m_k007121[0], tilemap_get_info_delegate(*this, FUNC(combatsc_state::get_text_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); m_spriteram[0] = make_unique_clear(0x800); m_spriteram[1] = make_unique_clear(0x800); @@ -352,7 +352,7 @@ void combatsc_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec k007121_device *k007121 = circuit ? m_k007121[1] : m_k007121[0]; int base_color = (circuit * 4) * 16 + (k007121->ctrlram_r(6) & 0x10) * 2; - k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(circuit), *m_palette, source, base_color, 0, 0, priority_bitmap, pri_mask); + k007121->sprites_draw(bitmap, cliprect, source, base_color, 0, 0, priority_bitmap, pri_mask); } diff --git a/src/mame/konami/contra.cpp b/src/mame/konami/contra.cpp index b1c05248fa433..695ec43777183 100644 --- a/src/mame/konami/contra.cpp +++ b/src/mame/konami/contra.cpp @@ -171,7 +171,6 @@ class contra_state : public driver_device m_audiocpu(*this, "audiocpu"), m_k007121(*this, "k007121_%u", 1U), m_maincpu(*this, "maincpu"), - m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), m_palette(*this, "palette") { } @@ -198,7 +197,6 @@ class contra_state : public driver_device required_device m_audiocpu; required_device_array m_k007121; required_device m_maincpu; - required_device m_gfxdecode; required_device m_screen; required_device m_palette; @@ -289,7 +287,7 @@ TILE_GET_INFO_MEMBER(contra_state::get_tile_info) bank = (bank & ~(mask << 1)) | ((ctrl_4 & mask) << 1); - tileinfo.set(Which, + tileinfo.set(0, m_vram[Which][tile_index] + bank * 256, ((ctrl_6 & 0x30) * 2 + 16) + (attr & 7), 0); @@ -326,9 +324,9 @@ TILE_GET_INFO_MEMBER(contra_state::get_tx_tile_info) void contra_state::video_start() { - m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(contra_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(contra_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_tilemap[2] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(contra_state::get_tx_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_tilemap[0] = &machine().tilemap().create(*m_k007121[0], tilemap_get_info_delegate(*this, FUNC(contra_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_tilemap[1] = &machine().tilemap().create(*m_k007121[1], tilemap_get_info_delegate(*this, FUNC(contra_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_tilemap[2] = &machine().tilemap().create(*m_k007121[0], tilemap_get_info_delegate(*this, FUNC(contra_state::get_tx_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); m_clip[1] = m_screen->visible_area(); m_clip[1].min_x += 40; @@ -400,7 +398,7 @@ void contra_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, { int base_color = (m_k007121[Which]->ctrlram_r(6) & 0x30) * 2; - m_k007121[Which]->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(Which), *m_palette, m_buffered_spriteram[Which]->buffer(), base_color, 40, 0, priority_bitmap, (uint32_t)-1); + m_k007121[Which]->sprites_draw(bitmap, cliprect, m_buffered_spriteram[Which]->buffer(), base_color, 40, 0, priority_bitmap, (uint32_t)-1); } uint32_t contra_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) @@ -576,8 +574,11 @@ static INPUT_PORTS_START( gryzor ) INPUT_PORTS_END -static GFXDECODE_START( gfx_contra ) +static GFXDECODE_START( gfx_contra_1 ) GFXDECODE_ENTRY( "k007121_1", 0, gfx_8x8x4_packed_msb, 0, 8*16 ) +GFXDECODE_END + +static GFXDECODE_START( gfx_contra_2 ) GFXDECODE_ENTRY( "k007121_2", 0, gfx_8x8x4_packed_msb, 8*16*16, 8*16 ) GFXDECODE_END @@ -620,17 +621,13 @@ void contra_state::contra(machine_config &config) m_screen->set_screen_update(FUNC(contra_state::screen_update)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_contra); - PALETTE(config, m_palette, FUNC(contra_state::palette)); m_palette->set_format(palette_device::xBGR_555, 2 * 8 * 16 * 16); m_palette->set_indirect_entries(128); m_palette->set_endianness(ENDIANNESS_LITTLE); - K007121(config, m_k007121[0], 0); - m_k007121[0]->set_palette_tag(m_palette); - K007121(config, m_k007121[1], 0); - m_k007121[1]->set_palette_tag(m_palette); + K007121(config, m_k007121[0], 0, m_palette, gfx_contra_1); + K007121(config, m_k007121[1], 0, m_palette, gfx_contra_2); // sound hardware SPEAKER(config, "lspeaker").front_left(); diff --git a/src/mame/konami/fastlane.cpp b/src/mame/konami/fastlane.cpp index e6a804fccae80..9216fb2e7f405 100644 --- a/src/mame/konami/fastlane.cpp +++ b/src/mame/konami/fastlane.cpp @@ -42,7 +42,6 @@ class fastlane_state : public driver_device m_prgbank(*this, "prgbank"), m_k007232(*this, "k007232_%u", 1U), m_k007121(*this, "k007121"), - m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), m_palette(*this, "palette") { } @@ -69,7 +68,6 @@ class fastlane_state : public driver_device // devices required_device_array m_k007232; required_device m_k007121; - required_device m_gfxdecode; required_device m_screen; required_device m_palette; @@ -146,8 +144,8 @@ TILE_GET_INFO_MEMBER(fastlane_state::get_tile_info) void fastlane_state::video_start() { - m_layer[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(fastlane_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_layer[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(fastlane_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_layer[0] = &machine().tilemap().create(*m_k007121, tilemap_get_info_delegate(*this, FUNC(fastlane_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_layer[1] = &machine().tilemap().create(*m_k007121, tilemap_get_info_delegate(*this, FUNC(fastlane_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); m_layer[0]->set_scroll_rows(32); @@ -194,7 +192,7 @@ uint32_t fastlane_state::screen_update(screen_device &screen, bitmap_ind16 &bitm m_layer[0]->set_scrolly(0, m_k007121->ctrlram_r(2)); m_layer[0]->draw(screen, bitmap, finalclip0, 0, 0); - m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), *m_palette, m_spriteram, 0, 40, 0, screen.priority(), (uint32_t)- 1); + m_k007121->sprites_draw(bitmap, cliprect, m_spriteram, 0, 40, 0, screen.priority(), (uint32_t)- 1); m_layer[1]->draw(screen, bitmap, finalclip1, 0, 0); return 0; } @@ -332,19 +330,8 @@ static INPUT_PORTS_START( fastlane ) KONAMI8_B12_UNK(2) INPUT_PORTS_END -static const gfx_layout gfxlayout = -{ - 8,8, - 0x80000/32, - 4, - { 0, 1, 2, 3 }, - { 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 -}; - static GFXDECODE_START( gfx_fastlane ) - GFXDECODE_ENTRY( "gfx", 0, gfxlayout, 0, 64*16 ) + GFXDECODE_ENTRY( "gfx", 0, gfx_8x8x4_packed_msb, 0, 64*16 ) GFXDECODE_END /*************************************************************************** @@ -385,11 +372,9 @@ void fastlane_state::fastlane(machine_config &config) m_screen->set_screen_update(FUNC(fastlane_state::screen_update)); m_screen->set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_fastlane); PALETTE(config, m_palette, FUNC(fastlane_state::palette)).set_format(palette_device::xBGR_555, 1024*16, 0x400); - K007121(config, m_k007121, 0); - m_k007121->set_palette_tag(m_palette); + K007121(config, m_k007121, 0, m_palette, gfx_fastlane); K051733(config, "k051733", 0); @@ -420,7 +405,7 @@ ROM_START( fastlane ) ROM_LOAD( "752_e01.10h", 0x08000, 0x10000, CRC(ff4d6029) SHA1(b5c5d8654ce728300d268628bd3dd878570ba7b8) ) // banked ROM ROM_REGION( 0x80000, "gfx", 0 ) - ROM_LOAD( "752e04.2i", 0x00000, 0x80000, CRC(a126e82d) SHA1(6663230c2c36dec563969bccad8c62e3d454d240) ) // tiles + sprites + ROM_LOAD16_WORD_SWAP( "752e04.2i", 0x00000, 0x80000, CRC(a126e82d) SHA1(6663230c2c36dec563969bccad8c62e3d454d240) ) // tiles + sprites ROM_REGION( 0x0100, "proms", 0 ) ROM_LOAD( "752e03.6h", 0x0000, 0x0100, CRC(44300aeb) SHA1(580c6e88cbb3b6d8156ea0b9103834f199ec2747) ) diff --git a/src/mame/konami/flkatck.cpp b/src/mame/konami/flkatck.cpp index dadfa670a6d3e..5687419ee162e 100644 --- a/src/mame/konami/flkatck.cpp +++ b/src/mame/konami/flkatck.cpp @@ -49,7 +49,6 @@ class flkatck_state : public driver_device m_k007121(*this, "k007121"), m_k007232(*this, "k007232"), m_watchdog(*this, "watchdog"), - m_gfxdecode(*this, "gfxdecode"), m_soundlatch(*this, "soundlatch") { } @@ -82,7 +81,6 @@ class flkatck_state : public driver_device required_device m_k007121; required_device m_k007232; required_device m_watchdog; - required_device m_gfxdecode; required_device m_soundlatch; void bankswitch_w(uint8_t data); @@ -161,8 +159,8 @@ TILE_GET_INFO_MEMBER(flkatck_state::get_tile_info_b) void flkatck_state::video_start() { - m_k007121_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(flkatck_state::get_tile_info_a)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_k007121_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(flkatck_state::get_tile_info_b)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_k007121_tilemap[0] = &machine().tilemap().create(*m_k007121, tilemap_get_info_delegate(*this, FUNC(flkatck_state::get_tile_info_a)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_k007121_tilemap[1] = &machine().tilemap().create(*m_k007121, tilemap_get_info_delegate(*this, FUNC(flkatck_state::get_tile_info_b)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); } @@ -246,7 +244,7 @@ uint32_t flkatck_state::screen_update(screen_device &screen, bitmap_ind16 &bitma // draw the graphics m_k007121_tilemap[0]->draw(screen, bitmap, clip[0], 0, 0); - m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), m_gfxdecode->palette(), &m_spriteram[sprite_buffer], 0, 40, 0, screen.priority(), (uint32_t)-1, true); + m_k007121->sprites_draw(bitmap, cliprect, &m_spriteram[sprite_buffer], 0, 40, 0, screen.priority(), (uint32_t)-1, true); m_k007121_tilemap[1]->draw(screen, bitmap, clip[1], 0, 0); return 0; } @@ -383,19 +381,8 @@ static INPUT_PORTS_START( flkatck ) KONAMI8_B12_UNK(2) INPUT_PORTS_END -static const gfx_layout gfxlayout = -{ - 8,8, - 0x80000/32, - 4, - { 0, 1, 2, 3 }, - { 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 -}; - static GFXDECODE_START( gfx_flkatck ) - GFXDECODE_ENTRY( "gfx", 0, gfxlayout, 0, 32 ) + GFXDECODE_ENTRY( "gfx", 0, gfx_8x8x4_packed_msb, 0, 32 ) GFXDECODE_END void flkatck_state::volume_callback(uint8_t data) @@ -447,11 +434,9 @@ void flkatck_state::flkatck(machine_config &config) screen.set_screen_update(FUNC(flkatck_state::screen_update)); screen.set_palette("palette"); - GFXDECODE(config, m_gfxdecode, "palette", gfx_flkatck); PALETTE(config, "palette").set_format(palette_device::xBGR_555, 512).set_endianness(ENDIANNESS_LITTLE); - K007121(config, m_k007121, 0); - m_k007121->set_palette_tag("palette"); + K007121(config, m_k007121, 0, "palette", gfx_flkatck); // sound hardware SPEAKER(config, "lspeaker").front_left(); @@ -475,12 +460,11 @@ ROM_START( mx5000 ) ROM_REGION( 0x10000, "maincpu", 0 ) // 6309 code ROM_LOAD( "669_r01.16c", 0x00000, 0x10000, CRC(79b226fc) SHA1(3bc4d93717230fecd54bd08a0c3eeedc1c8f571d) ) - ROM_REGION( 0x8000, "audiocpu", 0 ) ROM_LOAD( "669_m02.16b", 0x0000, 0x8000, CRC(7e11e6b9) SHA1(7a7d65a458b15842a6345388007c8f682aec20a7) ) ROM_REGION( 0x80000, "gfx", 0 ) // tiles + sprites - ROM_LOAD( "gx669f03.5e", 0x00000, 0x80000, CRC(ff1d718b) SHA1(d44fe3ed5a3ba1b3036264e37f9cd3500b706635) ) // MASK4M + ROM_LOAD16_WORD_SWAP( "gx669f03.5e", 0x00000, 0x80000, CRC(ff1d718b) SHA1(d44fe3ed5a3ba1b3036264e37f9cd3500b706635) ) // MASK4M ROM_REGION( 0x40000, "k007232", 0 ) ROM_LOAD( "gx669f04.11a", 0x00000, 0x40000, CRC(6d1ea61c) SHA1(9e6eb9ac61838df6e1f74e74bb72f3edf1274aed) ) // MASK2M @@ -494,7 +478,7 @@ ROM_START( flkatck ) ROM_LOAD( "669_m02.16b", 0x0000, 0x8000, CRC(7e11e6b9) SHA1(7a7d65a458b15842a6345388007c8f682aec20a7) ) ROM_REGION( 0x80000, "gfx", 0 ) // tiles + sprites - ROM_LOAD( "gx669f03.5e", 0x00000, 0x80000, CRC(ff1d718b) SHA1(d44fe3ed5a3ba1b3036264e37f9cd3500b706635) ) // MASK4M + ROM_LOAD16_WORD_SWAP( "gx669f03.5e", 0x00000, 0x80000, CRC(ff1d718b) SHA1(d44fe3ed5a3ba1b3036264e37f9cd3500b706635) ) // MASK4M ROM_REGION( 0x40000, "k007232", 0 ) ROM_LOAD( "gx669f04.11a", 0x00000, 0x40000, CRC(6d1ea61c) SHA1(9e6eb9ac61838df6e1f74e74bb72f3edf1274aed) ) // MASK2M @@ -509,14 +493,14 @@ ROM_START( flkatcka ) ROM_LOAD( "669_m02.16b", 0x0000, 0x8000, CRC(7e11e6b9) SHA1(7a7d65a458b15842a6345388007c8f682aec20a7) ) ROM_REGION( 0x80000, "gfx", 0 ) // tiles + sprites, same data as above set, on PWB 450593 sub-board instead. - ROM_LOAD16_BYTE( "669_f03a.4b", 0x00001, 0x10000, CRC(f0ed4c1e) SHA1(58efe3cd81054d22de54a7d195aa3b865bde4a01) ) - ROM_LOAD16_BYTE( "669_f03e.4d", 0x00000, 0x10000, CRC(95a57a26) SHA1(c8aa30c2c734c0740630b1b04ae43c69931cc7c1) ) - ROM_LOAD16_BYTE( "669_f03b.5b", 0x20001, 0x10000, CRC(e2593f3c) SHA1(aa0f6d04015650eaef17c4a39f228eaccf9a2948) ) - ROM_LOAD16_BYTE( "669_f03f.5d", 0x20000, 0x10000, CRC(c6c9903e) SHA1(432ad6d03992499cc533273226944a666b40fa58) ) - ROM_LOAD16_BYTE( "669_f03c.6b", 0x40001, 0x10000, CRC(47be92dd) SHA1(9ccc62d7d42fccbd5ad60e35e3a0478a04405cf1) ) - ROM_LOAD16_BYTE( "669_f03g.6d", 0x40000, 0x10000, CRC(70d35fbd) SHA1(21384f738684c5da4a7a84a1c9aa173fffddf47a) ) - ROM_LOAD16_BYTE( "669_f03d.7b", 0x60001, 0x10000, CRC(18d48f9e) SHA1(b95e38aa813e0f3a0dc6bd45fdb4bf71f7e2066c) ) - ROM_LOAD16_BYTE( "669_f03h.7d", 0x60000, 0x10000, CRC(abfe76e7) SHA1(f8661f189308e83056ec442fa6c936efff67ba0a) ) + ROM_LOAD16_BYTE( "669_f03a.4b", 0x00000, 0x10000, CRC(f0ed4c1e) SHA1(58efe3cd81054d22de54a7d195aa3b865bde4a01) ) + ROM_LOAD16_BYTE( "669_f03e.4d", 0x00001, 0x10000, CRC(95a57a26) SHA1(c8aa30c2c734c0740630b1b04ae43c69931cc7c1) ) + ROM_LOAD16_BYTE( "669_f03b.5b", 0x20000, 0x10000, CRC(e2593f3c) SHA1(aa0f6d04015650eaef17c4a39f228eaccf9a2948) ) + ROM_LOAD16_BYTE( "669_f03f.5d", 0x20001, 0x10000, CRC(c6c9903e) SHA1(432ad6d03992499cc533273226944a666b40fa58) ) + ROM_LOAD16_BYTE( "669_f03c.6b", 0x40000, 0x10000, CRC(47be92dd) SHA1(9ccc62d7d42fccbd5ad60e35e3a0478a04405cf1) ) + ROM_LOAD16_BYTE( "669_f03g.6d", 0x40001, 0x10000, CRC(70d35fbd) SHA1(21384f738684c5da4a7a84a1c9aa173fffddf47a) ) + ROM_LOAD16_BYTE( "669_f03d.7b", 0x60000, 0x10000, CRC(18d48f9e) SHA1(b95e38aa813e0f3a0dc6bd45fdb4bf71f7e2066c) ) + ROM_LOAD16_BYTE( "669_f03h.7d", 0x60001, 0x10000, CRC(abfe76e7) SHA1(f8661f189308e83056ec442fa6c936efff67ba0a) ) ROM_REGION( 0x40000, "k007232", 0 ) ROM_LOAD( "gx669f04.11a", 0x00000, 0x40000, CRC(6d1ea61c) SHA1(9e6eb9ac61838df6e1f74e74bb72f3edf1274aed) ) // MASK2M diff --git a/src/mame/konami/hcastle.cpp b/src/mame/konami/hcastle.cpp index 473857e5e954f..fc9e071b752bd 100644 --- a/src/mame/konami/hcastle.cpp +++ b/src/mame/konami/hcastle.cpp @@ -36,7 +36,6 @@ class hcastle_state : public driver_device hcastle_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), m_maincpu(*this, "maincpu"), - m_gfxdecode(*this, "gfxdecode"), m_palette(*this, "palette"), m_audiocpu(*this, "audiocpu"), m_k007121(*this, "k007121_%u", 1U), @@ -58,7 +57,6 @@ class hcastle_state : public driver_device private: // devices required_device m_maincpu; - required_device m_gfxdecode; required_device m_palette; required_device m_audiocpu; required_device_array m_k007121; @@ -154,7 +152,7 @@ TILE_GET_INFO_MEMBER(hcastle_state::get_tile_info) ((attr >> (bit2 )) & 0x08) | ((attr >> (bit3 - 1)) & 0x10); - tileinfo.set(Which, + tileinfo.set(0, tile + bank * 0x100 + m_pf_bankbase[Which], ((ctrl_6 & 0x30) * 2 + 16) + color, 0); @@ -171,8 +169,8 @@ TILE_GET_INFO_MEMBER(hcastle_state::get_tile_info) void hcastle_state::video_start() { // 0 = FG, 1 = BG - m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(hcastle_state::get_tile_info<0>)), tilemap_mapper_delegate(*this, FUNC(hcastle_state::tilemap_scan)), 8, 8, 64, 32); - m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(hcastle_state::get_tile_info<1>)), tilemap_mapper_delegate(*this, FUNC(hcastle_state::tilemap_scan)), 8, 8, 64, 32); + m_tilemap[0] = &machine().tilemap().create(*m_k007121[0], tilemap_get_info_delegate(*this, FUNC(hcastle_state::get_tile_info<0>)), tilemap_mapper_delegate(*this, FUNC(hcastle_state::tilemap_scan)), 8, 8, 64, 32); + m_tilemap[1] = &machine().tilemap().create(*m_k007121[1], tilemap_get_info_delegate(*this, FUNC(hcastle_state::get_tile_info<1>)), tilemap_mapper_delegate(*this, FUNC(hcastle_state::tilemap_scan)), 8, 8, 64, 32); m_tilemap[0]->set_transparent_pen(0); } @@ -227,7 +225,7 @@ void hcastle_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect int base_color = (m_k007121[Which]->ctrlram_r(6) & 0x30) * 2; int bank_base = (Which == 0) ? 0x4000 * (m_gfx_bank & 1) : 0; - m_k007121[Which]->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(Which), *m_palette, sbank, base_color, 0, bank_base, priority_bitmap, (uint32_t)-1); + m_k007121[Which]->sprites_draw(bitmap, cliprect, sbank, base_color, 0, bank_base, priority_bitmap, (uint32_t)-1); } /*****************************************************************************/ @@ -407,20 +405,12 @@ INPUT_PORTS_END /*****************************************************************************/ -static const gfx_layout charlayout = -{ - 8,8, - 32768, - 4, - { 0, 1, 2, 3 }, - { 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 -}; +static GFXDECODE_START( gfx_hcastle_1 ) + GFXDECODE_ENTRY( "k007121_1", 0, gfx_8x8x4_packed_msb, 0, 8*16 ) +GFXDECODE_END -static GFXDECODE_START( gfx_hcastle ) - GFXDECODE_ENTRY( "k007121_1", 0, charlayout, 0, 8*16 ) - GFXDECODE_ENTRY( "k007121_2", 0, charlayout, 8*16*16, 8*16 ) +static GFXDECODE_START( gfx_hcastle_2 ) + GFXDECODE_ENTRY( "k007121_2", 0, gfx_8x8x4_packed_msb, 8*16*16, 8*16 ) GFXDECODE_END /*****************************************************************************/ @@ -476,13 +466,10 @@ void hcastle_state::hcastle(machine_config &config) screen.set_screen_update(FUNC(hcastle_state::screen_update)); screen.set_palette(m_palette); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_hcastle); PALETTE(config, m_palette, FUNC(hcastle_state::palette)).set_format(palette_device::xBGR_555, 2*8*16*16, 128); - K007121(config, m_k007121[0], 0); - m_k007121[0]->set_palette_tag(m_palette); - K007121(config, m_k007121[1], 0); - m_k007121[1]->set_palette_tag(m_palette); + K007121(config, m_k007121[0], 0, m_palette, gfx_hcastle_1); + K007121(config, m_k007121[1], 0, m_palette, gfx_hcastle_2); // sound hardware SPEAKER(config, "mono").front_center(); @@ -512,12 +499,12 @@ ROM_START( hcastle ) ROM_LOAD( "768e01.e4", 0x00000, 0x08000, CRC(b9fff184) SHA1(c55f468c0da6afdaa2af65a111583c0c42868bd1) ) ROM_REGION( 0x100000, "k007121_1", 0 ) // chars and sprites - ROM_LOAD( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) - ROM_LOAD( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) + ROM_LOAD16_WORD_SWAP( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) + ROM_LOAD16_WORD_SWAP( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) ROM_REGION( 0x100000, "k007121_2", 0 ) // chars and sprites - ROM_LOAD( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) - ROM_LOAD( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) + ROM_LOAD16_WORD_SWAP( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) + ROM_LOAD16_WORD_SWAP( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) ROM_REGION( 0x0500, "proms", 0 ) ROM_LOAD( "768c13.j21", 0x0000, 0x0100, CRC(f5de80cb) SHA1(e8cc3e14a5d23b25fb7bf790e64786c6aa2df8b7) ) // 007121 #0 sprite lookup table @@ -539,12 +526,12 @@ ROM_START( hcastlek ) ROM_LOAD( "768e01.e4", 0x00000, 0x08000, CRC(b9fff184) SHA1(c55f468c0da6afdaa2af65a111583c0c42868bd1) ) ROM_REGION( 0x100000, "k007121_1", 0 ) // chars and sprites - ROM_LOAD( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) - ROM_LOAD( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) + ROM_LOAD16_WORD_SWAP( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) + ROM_LOAD16_WORD_SWAP( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) ROM_REGION( 0x100000, "k007121_2", 0 ) // chars and sprites - ROM_LOAD( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) - ROM_LOAD( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) + ROM_LOAD16_WORD_SWAP( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) + ROM_LOAD16_WORD_SWAP( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) ROM_REGION( 0x0500, "proms", 0 ) ROM_LOAD( "768c13.j21", 0x0000, 0x0100, CRC(f5de80cb) SHA1(e8cc3e14a5d23b25fb7bf790e64786c6aa2df8b7) ) // 007121 #0 sprite lookup table @@ -566,12 +553,12 @@ ROM_START( hcastlee ) ROM_LOAD( "768e01.e4", 0x00000, 0x08000, CRC(b9fff184) SHA1(c55f468c0da6afdaa2af65a111583c0c42868bd1) ) ROM_REGION( 0x100000, "k007121_1", 0 ) // chars and sprites - ROM_LOAD( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) - ROM_LOAD( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) + ROM_LOAD16_WORD_SWAP( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) + ROM_LOAD16_WORD_SWAP( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) ROM_REGION( 0x100000, "k007121_2", 0 ) // chars and sprites - ROM_LOAD( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) - ROM_LOAD( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) + ROM_LOAD16_WORD_SWAP( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) + ROM_LOAD16_WORD_SWAP( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) ROM_REGION( 0x0500, "proms", 0 ) ROM_LOAD( "768c13.j21", 0x0000, 0x0100, CRC(f5de80cb) SHA1(e8cc3e14a5d23b25fb7bf790e64786c6aa2df8b7) ) // 007121 #0 sprite lookup table @@ -593,12 +580,12 @@ ROM_START( akumajou ) ROM_LOAD( "768e01.e4", 0x00000, 0x08000, CRC(b9fff184) SHA1(c55f468c0da6afdaa2af65a111583c0c42868bd1) ) ROM_REGION( 0x100000, "k007121_1", 0 ) // chars and sprites - ROM_LOAD( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) - ROM_LOAD( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) + ROM_LOAD16_WORD_SWAP( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) + ROM_LOAD16_WORD_SWAP( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) ROM_REGION( 0x100000, "k007121_2", 0 ) // chars and sprites - ROM_LOAD( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) - ROM_LOAD( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) + ROM_LOAD16_WORD_SWAP( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) + ROM_LOAD16_WORD_SWAP( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) ROM_REGION( 0x0500, "proms", 0 ) ROM_LOAD( "768c13.j21", 0x0000, 0x0100, CRC(f5de80cb) SHA1(e8cc3e14a5d23b25fb7bf790e64786c6aa2df8b7) ) // 007121 #0 sprite lookup table @@ -620,12 +607,12 @@ ROM_START( akumajoun ) ROM_LOAD( "768e01.e4", 0x00000, 0x08000, CRC(b9fff184) SHA1(c55f468c0da6afdaa2af65a111583c0c42868bd1) ) ROM_REGION( 0x100000, "k007121_1", 0 ) // chars and sprites - ROM_LOAD( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) - ROM_LOAD( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) + ROM_LOAD16_WORD_SWAP( "768c09.g21", 0x000000, 0x80000, CRC(e3be3fdd) SHA1(01a686af33a0a700066b1a5334d8552454ff186f) ) + ROM_LOAD16_WORD_SWAP( "768c08.g19", 0x080000, 0x80000, CRC(9633db8b) SHA1(fe1b117c2566288b88f000106c649c2fa5648ddc) ) ROM_REGION( 0x100000, "k007121_2", 0 ) // chars and sprites - ROM_LOAD( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) - ROM_LOAD( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) + ROM_LOAD16_WORD_SWAP( "768c04.j5", 0x000000, 0x80000, CRC(2960680e) SHA1(72e1f025496c907de8516e3b5f1781e73d5b2c6c) ) + ROM_LOAD16_WORD_SWAP( "768c05.j6", 0x080000, 0x80000, CRC(65a2f227) SHA1(43f368e533d6a164dc68d54130b81883e0d1bafe) ) ROM_REGION( 0x0500, "proms", 0 ) ROM_LOAD( "768c13.j21", 0x0000, 0x0100, CRC(f5de80cb) SHA1(e8cc3e14a5d23b25fb7bf790e64786c6aa2df8b7) ) // 007121 #0 sprite lookup table diff --git a/src/mame/konami/k007121.cpp b/src/mame/konami/k007121.cpp index a4c500dbf7724..d635d33483c06 100644 --- a/src/mame/konami/k007121.cpp +++ b/src/mame/konami/k007121.cpp @@ -125,8 +125,8 @@ DEFINE_DEVICE_TYPE(K007121, k007121_device, "k007121", "K007121 Sprite/Tilemap C k007121_device::k007121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock) : device_t(mconfig, K007121, tag, owner, clock) - , m_flipscreen(0) - , m_palette(*this, finder_base::DUMMY_TAG) + , device_gfx_interface(mconfig, *this) + , m_flipscreen(false) { } @@ -146,7 +146,7 @@ void k007121_device::device_start() void k007121_device::device_reset() { - m_flipscreen = 0; + m_flipscreen = false; for (int i = 0; i < 8; i++) m_ctrlram[i] = 0; @@ -177,7 +177,7 @@ void k007121_device::ctrl_w(offs_t offset, uint8_t data) machine().tilemap().mark_all_dirty(); break; case 7: - m_flipscreen = data & 0x08; + m_flipscreen = BIT(data, 3); break; } @@ -208,7 +208,7 @@ void k007121_device::ctrl_w(offs_t offset, uint8_t data) * */ -void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, device_palette_interface &palette, +void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, const uint8_t *source, int base_color, int global_x_offset, int bank_base, bitmap_ind8 &priority_bitmap, uint32_t pri_mask, bool is_flakatck ) { // TODO: sprite limit is supposed to be per-line! (check MT #00185) @@ -252,7 +252,7 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre if (is_flakatck) transparent_mask = 1 << 0; else - transparent_mask = palette.transpen_mask(*gfx, color, 0); + transparent_mask = palette().transpen_mask(*gfx(0), color, 0); number += bank_base; @@ -292,7 +292,7 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre if (pri_mask != (uint32_t)-1) { - gfx->prio_transmask(bitmap,cliprect, + gfx(0)->prio_transmask(bitmap,cliprect, number + x_offset[ex] + y_offset[ey], color, flipx,flipy, @@ -302,7 +302,7 @@ void k007121_device::sprites_draw( bitmap_ind16 &bitmap, const rectangle &clipre } else { - gfx->transmask(bitmap,cliprect, + gfx(0)->transmask(bitmap,cliprect, number + x_offset[ex] + y_offset[ey], color, flipx,flipy, diff --git a/src/mame/konami/k007121.h b/src/mame/konami/k007121.h index 0ccbb607b2520..d162fd5d5e918 100644 --- a/src/mame/konami/k007121.h +++ b/src/mame/konami/k007121.h @@ -8,19 +8,23 @@ #include "emupal.h" -class k007121_device : public device_t +class k007121_device : public device_t, public device_gfx_interface { public: k007121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); - - template void set_palette_tag(T &&tag) { m_palette.set_tag(std::forward(tag)); } + template k007121_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&palette_tag, const gfx_decode_entry *gfxinfo) + : k007121_device(mconfig, tag, owner, clock) + { + set_info(gfxinfo); + set_palette(std::forward(palette_tag)); + } uint8_t ctrlram_r(offs_t offset); void ctrl_w(offs_t offset, uint8_t data); /* shall we move source in the interface? */ /* also notice that now we directly pass *gfx[chip] instead of **gfx !! */ - void sprites_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, gfx_element *gfx, device_palette_interface &palette, const uint8_t *source, int base_color, int global_x_offset, int bank_base, bitmap_ind8 &priority_bitmap, uint32_t pri_mask, bool is_flakatck = false ); + void sprites_draw( bitmap_ind16 &bitmap, const rectangle &cliprect, const uint8_t *source, int base_color, int global_x_offset, int bank_base, bitmap_ind8 &priority_bitmap, uint32_t pri_mask, bool is_flakatck = false ); protected: // device-level overrides @@ -30,8 +34,7 @@ class k007121_device : public device_t private: // internal state uint8_t m_ctrlram[8]; - int m_flipscreen; - required_device m_palette; + bool m_flipscreen; }; DECLARE_DEVICE_TYPE(K007121, k007121_device) diff --git a/src/mame/konami/ksys573.cpp b/src/mame/konami/ksys573.cpp index dcf0c2bd67cd1..bf9656c557bfb 100644 --- a/src/mame/konami/ksys573.cpp +++ b/src/mame/konami/ksys573.cpp @@ -3817,31 +3817,34 @@ ROM_END ROM_START( ddrjb ) SYS573_BIOS_A - ROM_REGION( 0x0000224, "cassette:game:eeprom", 0 ) + ROM_REGION( 0x0000224, "cassette:game:eeprom", 0 ) // game doesn't try reading at all. not needed? ROM_LOAD( "gc845ja.u1", 0x000000, 0x000224, NO_DUMP ) ROM_REGION( 0x200000, "29f016a.31m", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.31m", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.31m", 0x000000, 0x200000, CRC(7acbc2ef) SHA1(64cd25ee3060399bf072346e4e6383f77755188b) ) ROM_REGION( 0x200000, "29f016a.27m", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.27m", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.27m", 0x000000, 0x200000, CRC(67608bb7) SHA1(42f0203342b913b6ff433bcaf6cf44a471294032) ) ROM_REGION( 0x200000, "29f016a.31l", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.31l", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.31l", 0x000000, 0x200000, CRC(c15ad83c) SHA1(79b401ff58ed84a60647531f94852b70cd86aea0) ) ROM_REGION( 0x200000, "29f016a.27l", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.27l", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.27l", 0x000000, 0x200000, CRC(4a712a01) SHA1(e9716c6750adff78bd6c85f406fa61ae2981a1c0) ) ROM_REGION( 0x200000, "29f016a.31j", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.31j", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.31j", 0x000000, 0x200000, CRC(4fb5437e) SHA1(21a892d0c63fa146a89bcc0e83244549f55fe4fb) ) ROM_REGION( 0x200000, "29f016a.27j", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.27j", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.27j", 0x000000, 0x200000, CRC(3b281fa3) SHA1(05cfa8d09d6da56e4438b6d19f9bbdb5c17b651b) ) ROM_REGION( 0x200000, "29f016a.31h", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.31h", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.31h", 0x000000, 0x200000, CRC(724b373b) SHA1(157f879fc4f4d3f4021d40aa8e2fdd464fc2b0e3) ) ROM_REGION( 0x200000, "29f016a.27h", 0 ) /* onboard flash */ - ROM_LOAD( "gc845jab.27h", 0x000000, 0x200000, NO_DUMP ) + ROM_LOAD( "gc845jab.27h", 0x000000, 0x200000, CRC(43294c4b) SHA1(ebaa32495a50c78560eb4988587220ed535d0dc2) ) DISK_REGION( "runtime" ) - DISK_IMAGE_READONLY( "845jab02", 0, SHA1(bac74acaffd9d00e4105e13f32492f5d0fc5a2e1) ) + DISK_IMAGE_READONLY( "845jab02", 0, SHA1(bfaeff41ec0dac281fd40567309e0bb1c22354fa) ) DISK_REGION( "install" ) DISK_IMAGE_READONLY( "845jab01", 0, NO_DUMP ) // if this even exists + + ROM_REGION( 0x002000, "m48t58", 0 ) // dummy file with required header to allow game to boot + ROM_LOAD( "gc845jab.22h", 0x000000, 0x002000, BAD_DUMP CRC(b20d341e) SHA1(ed423e2ec66924ac4fada83d70dda6be75e5e85c) ) ROM_END ROM_START( ddra ) @@ -6332,7 +6335,7 @@ GAME( 1999, dstagea, dstage, ddr, ddr, ddr_state, init_ddr, GAME( 1999, ddru, dstage, ddr, ddr, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution (GN845 VER. UAA)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, ddrj, dstage, ddr, ddr, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution - Internet Ranking Ver (GC845 VER. JBA)", MACHINE_IMPERFECT_SOUND ) GAME( 1998, ddrja, dstage, ddr, ddr, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution (GC845 VER. JAA)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) -GAME( 1998, ddrjb, dstage, ddr, ddr, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution (GC845 VER. JAB)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) +GAME( 1998, ddrjb, dstage, ddr, ddr, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution (GC845 VER. JAB)", MACHINE_IMPERFECT_SOUND ) GAME( 1999, ddra, dstage, ddr, ddr, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution (GN845 VER. AAA)", MACHINE_IMPERFECT_SOUND ) GAME( 1999, ddrkara, sys573, ddrk, ddrkara, ddr_state, init_ddr, ROT0, "Konami", "Dance Dance Revolution Karaoke Mix (GQ921 VER. JBB)", MACHINE_IMPERFECT_SOUND | MACHINE_NOT_WORKING ) GAME( 1998, fbait2bc, sys573, fbaitbc, fbaitbc, ksys573_state, empty_init, ROT0, "Konami", "Fisherman's Bait 2 - A Bass Challenge (GE865 VER. UAB)", MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/konami/labyrunr.cpp b/src/mame/konami/labyrunr.cpp index 8cf71f8d558f6..caef95376b76a 100644 --- a/src/mame/konami/labyrunr.cpp +++ b/src/mame/konami/labyrunr.cpp @@ -35,7 +35,6 @@ class labyrunr_state : public driver_device driver_device(mconfig, type, tag), m_maincpu(*this,"maincpu"), m_k007121(*this, "k007121"), - m_gfxdecode(*this, "gfxdecode"), m_screen(*this, "screen"), m_palette(*this, "palette"), m_scrollram(*this, "scrollram"), @@ -54,7 +53,6 @@ class labyrunr_state : public driver_device // devices required_device m_maincpu; required_device m_k007121; - required_device m_gfxdecode; required_device m_screen; required_device m_palette; @@ -153,8 +151,8 @@ TILE_GET_INFO_MEMBER(labyrunr_state::get_tile_info) void labyrunr_state::video_start() { - m_layer[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(labyrunr_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); - m_layer[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(labyrunr_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_layer[0] = &machine().tilemap().create(*m_k007121, tilemap_get_info_delegate(*this, FUNC(labyrunr_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + m_layer[1] = &machine().tilemap().create(*m_k007121, tilemap_get_info_delegate(*this, FUNC(labyrunr_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); m_layer[0]->set_transparent_pen(0); m_layer[1]->set_transparent_pen(0); @@ -221,7 +219,7 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm } m_layer[0]->draw(screen, bitmap, finalclip0, TILEMAP_DRAW_OPAQUE | TILEMAP_DRAW_CATEGORY(0), 0); - m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), *m_palette, m_spriteram, (m_k007121->ctrlram_r(6) & 0x30) * 2, 40, 0, screen.priority(), (m_k007121->ctrlram_r(3) & 0x40) >> 5); + m_k007121->sprites_draw(bitmap, cliprect, m_spriteram, (m_k007121->ctrlram_r(6) & 0x30) * 2, 40, 0, screen.priority(), (m_k007121->ctrlram_r(3) & 0x40) >> 5); m_layer[0]->draw(screen, bitmap, finalclip0, TILEMAP_DRAW_OPAQUE | TILEMAP_DRAW_CATEGORY(1), 0); // we ignore the transparency because layer1 is drawn only at the top of the screen also covering sprites m_layer[1]->draw(screen, bitmap, finalclip1, TILEMAP_DRAW_OPAQUE, 0); @@ -288,7 +286,7 @@ uint32_t labyrunr_state::screen_update(screen_device &screen, bitmap_ind16 &bitm if (use_clip3[0]) m_layer[0]->draw(screen, bitmap, finalclip3, TILEMAP_DRAW_CATEGORY(0), 0); - m_k007121->sprites_draw(bitmap, cliprect, m_gfxdecode->gfx(0), *m_palette, m_spriteram, (m_k007121->ctrlram_r(6) & 0x30) * 2,40,0,screen.priority(),(m_k007121->ctrlram_r(3) & 0x40) >> 5); + m_k007121->sprites_draw(bitmap, cliprect, m_spriteram, (m_k007121->ctrlram_r(6) & 0x30) * 2,40,0,screen.priority(),(m_k007121->ctrlram_r(3) & 0x40) >> 5); m_layer[0]->draw(screen, bitmap, finalclip0, TILEMAP_DRAW_CATEGORY(1), 0); if (use_clip3[0]) @@ -420,19 +418,8 @@ INPUT_PORTS_END -static const gfx_layout gfxlayout = -{ - 8,8, - 0x40000/32, - 4, - { 0, 1, 2, 3 }, - { 2*4, 3*4, 0*4, 1*4, 6*4, 7*4, 4*4, 5*4 }, - { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 }, - 32*8 -}; - static GFXDECODE_START( gfx_labyrunr ) - GFXDECODE_ENTRY( "gfx", 0, gfxlayout, 0, 8*16 ) + GFXDECODE_ENTRY( "gfx", 0, gfx_8x8x4_packed_msb, 0, 8*16 ) GFXDECODE_END /*************************************************************************** @@ -467,12 +454,10 @@ void labyrunr_state::labyrunr(machine_config &config) screen.set_palette(m_palette); screen.screen_vblank().set(FUNC(labyrunr_state::vblank_irq)); - GFXDECODE(config, m_gfxdecode, m_palette, gfx_labyrunr); PALETTE(config, m_palette, FUNC(labyrunr_state::palette)); m_palette->set_format(palette_device::xBGR_555, 2*8*16*16, 128); - K007121(config, m_k007121, 0); - m_k007121->set_palette_tag(m_palette); + K007121(config, m_k007121, 0, m_palette, gfx_labyrunr); K051733(config, "k051733", 0); @@ -509,10 +494,10 @@ ROM_START( tricktrp ) ROM_LOAD( "771e03", 0x18000, 0x10000, CRC(d0d68036) SHA1(8589ee07e229259341a4cc22bc64de8f06536472) ) ROM_REGION( 0x40000, "gfx", 0 ) - ROM_LOAD16_BYTE( "771e01a", 0x00000, 0x10000, CRC(103ffa0d) SHA1(1949c49ca3b243e4cfb5fb19ecd3a1e1492cfddd) ) // tiles + sprites - ROM_LOAD16_BYTE( "771e01c", 0x00001, 0x10000, CRC(cfec5be9) SHA1(2b6a32e2608a70c47d1ec9b4de38b5c3a0898cde) ) - ROM_LOAD16_BYTE( "771d01b", 0x20000, 0x10000, CRC(07f2a71c) SHA1(63c79e75e71539e69d4d9d35e629a6021124f6d0) ) - ROM_LOAD16_BYTE( "771d01d", 0x20001, 0x10000, CRC(f6810a49) SHA1(b40e9f0d0919188a05c1990347da8dc8ff12d65a) ) + ROM_LOAD16_BYTE( "771e01a", 0x00001, 0x10000, CRC(103ffa0d) SHA1(1949c49ca3b243e4cfb5fb19ecd3a1e1492cfddd) ) // tiles + sprites + ROM_LOAD16_BYTE( "771e01c", 0x00000, 0x10000, CRC(cfec5be9) SHA1(2b6a32e2608a70c47d1ec9b4de38b5c3a0898cde) ) + ROM_LOAD16_BYTE( "771d01b", 0x20001, 0x10000, CRC(07f2a71c) SHA1(63c79e75e71539e69d4d9d35e629a6021124f6d0) ) + ROM_LOAD16_BYTE( "771d01d", 0x20000, 0x10000, CRC(f6810a49) SHA1(b40e9f0d0919188a05c1990347da8dc8ff12d65a) ) ROM_REGION( 0x0100, "proms", 0 ) ROM_LOAD( "771d02.08d", 0x0000, 0x0100, CRC(3d34bb5a) SHA1(3f3c845f1197457244e7c7e4f9b2a03c278613e4) ) // sprite lookup table @@ -526,7 +511,7 @@ ROM_START( labyrunr ) ROM_LOAD( "771j03.08f", 0x18000, 0x10000, CRC(12b49044) SHA1(e9b22fb093cfb746a9767e94ef5deef98bed5b7a) ) ROM_REGION( 0x40000, "gfx", 0 ) - ROM_LOAD( "771d01.14a", 0x00000, 0x40000, CRC(15c8f5f9) SHA1(e4235e1315d0331f3ce5047834a68764ed43aa4b) ) // tiles + sprites + ROM_LOAD16_WORD_SWAP( "771d01.14a", 0x00000, 0x40000, CRC(15c8f5f9) SHA1(e4235e1315d0331f3ce5047834a68764ed43aa4b) ) // tiles + sprites ROM_REGION( 0x0100, "proms", 0 ) ROM_LOAD( "771d02.08d", 0x0000, 0x0100, CRC(3d34bb5a) SHA1(3f3c845f1197457244e7c7e4f9b2a03c278613e4) ) // sprite lookup table @@ -540,10 +525,10 @@ ROM_START( labyrunrk ) ROM_LOAD( "771k03.8f", 0x18000, 0x10000, CRC(48d732ae) SHA1(8bc7917397f32cf5f995b3763ae921725e27de05) ) ROM_REGION( 0x40000, "gfx", 0 ) - ROM_LOAD16_BYTE( "771d01a.13a", 0x00000, 0x10000, CRC(0cd1ed1a) SHA1(eac6c106de28acc54535ae1fb99f778c1ed4013e) ) // tiles + sprites - ROM_LOAD16_BYTE( "771d01c.13a", 0x00001, 0x10000, CRC(d75521fe) SHA1(72f0c4d9511bc70d77415f50be93293026305bd5) ) - ROM_LOAD16_BYTE( "771d01b", 0x20000, 0x10000, CRC(07f2a71c) SHA1(63c79e75e71539e69d4d9d35e629a6021124f6d0) ) - ROM_LOAD16_BYTE( "771d01d", 0x20001, 0x10000, CRC(f6810a49) SHA1(b40e9f0d0919188a05c1990347da8dc8ff12d65a) ) + ROM_LOAD16_BYTE( "771d01a.13a", 0x00001, 0x10000, CRC(0cd1ed1a) SHA1(eac6c106de28acc54535ae1fb99f778c1ed4013e) ) // tiles + sprites + ROM_LOAD16_BYTE( "771d01c.13a", 0x00000, 0x10000, CRC(d75521fe) SHA1(72f0c4d9511bc70d77415f50be93293026305bd5) ) + ROM_LOAD16_BYTE( "771d01b", 0x20001, 0x10000, CRC(07f2a71c) SHA1(63c79e75e71539e69d4d9d35e629a6021124f6d0) ) + ROM_LOAD16_BYTE( "771d01d", 0x20000, 0x10000, CRC(f6810a49) SHA1(b40e9f0d0919188a05c1990347da8dc8ff12d65a) ) ROM_REGION( 0x0100, "proms", 0 ) ROM_LOAD( "771d02.08d", 0x0000, 0x0100, CRC(3d34bb5a) SHA1(3f3c845f1197457244e7c7e4f9b2a03c278613e4) ) // sprite lookup table diff --git a/src/mame/konami/mystwarr.cpp b/src/mame/konami/mystwarr.cpp index 009a92f98abe0..fb12f79dea821 100644 --- a/src/mame/konami/mystwarr.cpp +++ b/src/mame/konami/mystwarr.cpp @@ -1537,6 +1537,61 @@ ROM_START( viostormub ) ROM_LOAD( "viostormub.nv", 0x0000, 0x080, CRC(b6937413) SHA1(eabc2ea661201f5ed42ab541aee765480bbdd5bc) ) ROM_END +ROM_START( viostormubbl ) // this is a bootleg conversion, running on a Metamorphic Force PCB with proto ROM PCB + /* main program */ + ROM_REGION( 0x200000, "maincpu", 0) + ROM_LOAD16_BYTE( "168_ua7_01.bin", 0x000001, 0x80000, CRC(97d3df09) SHA1(3b61409376ed4a2a9d70324c86ed170392526b70) ) + ROM_LOAD16_BYTE( "168_ua7_02.bin", 0x000000, 0x80000, CRC(2c591f92) SHA1(8bdc149e8270fdf160940fe3b8d616d8c504e985) ) + + /* sound program */ + ROM_REGION( 0x40000, "soundcpu", 0 ) + ROM_LOAD("168_a_05.bin", 0x00000, 0x20000, CRC(507fb3eb) SHA1(a4f676e3caaafe86918c76ded08d0c202969adf6) ) + ROM_RELOAD( 0x20000, 0x20000 ) + + /* tiles */ + ROM_REGION( 0x600000, "k056832", ROMREGION_ERASE00 ) + ROMX_LOAD( "168_a_09_h.bin", 0x000000, 0x80000, CRC(4ffd6e92) SHA1(f83ea4cb0248253928d0a474745da5c5d6bb1b4c), ROM_SKIP(4) ) + ROMX_LOAD( "168_a_09_l.bin", 0x000001, 0x80000, CRC(f657bddd) SHA1(89e9e857f5e3e53c4c1e46b8df51f669a1b8719a), ROM_SKIP(4) ) + ROMX_LOAD( "168_a_08_h.bin", 0x000002, 0x80000, CRC(143ce52e) SHA1(d1db5b9369ff0750da3db05868fb742bde93618e), ROM_SKIP(4) ) + ROMX_LOAD( "168_a_08_l.bin", 0x000003, 0x80000, CRC(4f656594) SHA1(675b2da642ad362ab389b52340f41959b5e723b3), ROM_SKIP(4) ) + + /* sprites */ + ROM_REGION( 0x800000, "k055673", ROMREGION_ERASE00 ) + ROM_LOAD64_BYTE( "168_a_10_al.bin", 0x000000, 0x080000, CRC(e6570da5) SHA1(b5d68ca1a4b690d11808fcaaf05e8ec12eb6a4d2) ) + ROM_LOAD64_BYTE( "168_a_10_ah.bin", 0x000001, 0x080000, CRC(e8ce69b1) SHA1(06f355120abef55403ef91f2cbbeb180e09b69ae) ) + ROM_LOAD64_BYTE( "168_a_11_al.bin", 0x000002, 0x080000, CRC(252cc0bc) SHA1(ef122f9a16863630358bdd0b6f2cfe36fa0075b2) ) + ROM_LOAD64_BYTE( "168_a_11_ah.bin", 0x000003, 0x080000, CRC(c2db121c) SHA1(39fb7b5ef13d434b84c27e7924cd27eb7863d815) ) + ROM_LOAD64_BYTE( "168_a_12_al.bin", 0x000004, 0x080000, CRC(e86258c1) SHA1(440089284962ff65e77a1b711ca3258dc6d8989e) ) + ROM_LOAD64_BYTE( "168_a_12_ah.bin", 0x000005, 0x080000, CRC(92180725) SHA1(a39715ce78773c1ea6486f7a6eebad88e5862024) ) + ROM_LOAD64_BYTE( "168_a_13_al.bin", 0x000006, 0x080000, CRC(aef49217) SHA1(e22c9ccca47950f4faf9c4d9564b2af0f433fadf) ) + ROM_LOAD64_BYTE( "168_a_13_ah.bin", 0x000007, 0x080000, CRC(9694f82b) SHA1(8f656ac0cb6809bf4314629ef25ae59edd890de1) ) + ROM_LOAD64_BYTE( "168_a_10_bl.bin", 0x400000, 0x080000, CRC(90bfdf5c) SHA1(fd24aa10ff39dbadae29efcd8774c758e7dd49e8) ) + ROM_LOAD64_BYTE( "168_a_10_bh.bin", 0x400001, 0x080000, CRC(1699d50e) SHA1(d96da93923f4469af469645fec92c2f2c6581332) ) + ROM_LOAD64_BYTE( "168_a_11_bl.bin", 0x400002, 0x080000, CRC(9b85594e) SHA1(39e34c5490c3324e1aa8f976b36f270fb8e1708c) ) + ROM_LOAD64_BYTE( "168_a_11_bh.bin", 0x400003, 0x080000, CRC(57efd95f) SHA1(1f1198892763f89b10dc4d8818805241e3a56a37) ) + ROM_LOAD64_BYTE( "168_a_12_bl.bin", 0x400004, 0x080000, CRC(3c7fde2c) SHA1(54e4612f99d916595b996f5ea5f2e1fbbaf04d5e) ) + ROM_LOAD64_BYTE( "168_a_12_bh.bin", 0x400005, 0x080000, CRC(77dbd7b0) SHA1(b71f5bd27d2fd9fef96f7f49d94804cd37822bac) ) + ROM_LOAD64_BYTE( "168_a_13_bl.bin", 0x400006, 0x080000, CRC(26326a3c) SHA1(fc7ca1716c8b2e9268c51cdcafe262cbd8e79bf6) ) + ROM_LOAD64_BYTE( "168_a_13_bh.bin", 0x400007, 0x080000, CRC(3cc402fb) SHA1(37cc7c21e59d641064b653f57b52c66c822114af) ) + + /* road generator */ + ROM_REGION( 0x40000, "gfx3", ROMREGION_ERASE00 ) + + /* sound data */ + ROM_REGION( 0x400000, "k054539", 0 ) + ROM_LOAD( "168_a_06_a.bin", 0x000000, 0x80000, CRC(bf42efc1) SHA1(585af7d15bba1c0c821029c384bd313d28814396) ) + ROM_LOAD( "168_a_06_b.bin", 0x080000, 0x80000, CRC(97c3e6d2) SHA1(097327b8d5be81fcff745dc7bf108ebcad17f5e7) ) + ROM_LOAD( "168_a_06_c.bin", 0x100000, 0x80000, CRC(b5a67bf0) SHA1(5e26120b94e6eafb755104c086b2e371a89022c1) ) + ROM_LOAD( "168_a_06_d.bin", 0x180000, 0x80000, CRC(58c407f1) SHA1(de8f050fa38a618c5e06342adec82813df230ab8) ) + ROM_LOAD( "168_a_07_a.bin", 0x200000, 0x80000, CRC(39af77b8) SHA1(0757188842a92a3a26ca7bbcb5f5020b05fa3786) ) + ROM_LOAD( "168_a_07_b.bin", 0x280000, 0x80000, CRC(0ad59b02) SHA1(9e26e161f39b780c4b496b88a2dce020160ba81b) ) + ROM_LOAD( "168_a_07_c.bin", 0x300000, 0x80000, CRC(31f2a927) SHA1(6ef363462dedf8b2e816968502956dec56d26ddb) ) + ROM_LOAD( "168_a_07_d.bin", 0x380000, 0x80000, CRC(4a2ea6f6) SHA1(fab0ec82c6a01ad49b1da09c4799fa64847d8644) ) + + ROM_REGION( 0x80, "eeprom", 0 ) // default eeprom to prevent game booting upside down with error + ROM_LOAD( "viostormub.nv", 0x0000, 0x080, CRC(b6937413) SHA1(eabc2ea661201f5ed42ab541aee765480bbdd5bc) ) +ROM_END + ROM_START( viostorma ) /* main program */ ROM_REGION( 0x200000, "maincpu", 0 ) @@ -2328,6 +2383,7 @@ GAME( 1993, viostorm, 0, viostorm, viostorm, mystwarr_state, empty_ GAME( 1993, viostormeb, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "Konami", "Violent Storm (ver EAB)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1993, viostormu, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "Konami", "Violent Storm (ver UAC)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1993, viostormub, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "Konami", "Violent Storm (ver UAB)", MACHINE_IMPERFECT_GRAPHICS ) +GAME( 1993, viostormubbl, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "bootleg (Eye Pro)", "Violent Storm (ver UAB, bootleg)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1993, viostormj, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "Konami", "Violent Storm (ver JAC)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1993, viostorma, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "Konami", "Violent Storm (ver AAC)", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1993, viostormab, viostorm, viostorm, viostorm, mystwarr_state, empty_init, ROT0, "Konami", "Violent Storm (ver AAB)", MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/konami/viper.cpp b/src/mame/konami/viper.cpp index 5b29e8d67bea5..450e8c149b445 100644 --- a/src/mame/konami/viper.cpp +++ b/src/mame/konami/viper.cpp @@ -6,8 +6,6 @@ Driver by Ville Linde - - Software notes (as per Police 911) -- VL - 01.06.2011 @@ -79,10 +77,26 @@ 0x0000c130: ScheduleTask() 0x00009d00: LoadProgram(): R3 = ptr to filename - TODO: - - needs a proper way to dump security dongles, anything but p9112 has placeholder ROM for ds2430. - - figure out why games randomly crash (IRQ related?) + - needs a proper way to dump security dongles, anything but p9112 has placeholder ROM for + ds2430. + - figure out why games randomly crash, and why it seems to happen more often with -nothrottle + (irq section makes it to die with a spurious) + - AGP interface with Voodoo 3 is definitely incorrect, and may be a cause of above; + - convert epic to use address map + - convert epic i2c to be a real i2c-complaint device, namely + for better irq driving + - convert epic irq section to be a device, make it input_merger complaint; + - (more intermediate steps for proper PCI conversions here) + - pinpoint what the i2c communicates with + - hookup adc0838 + - Understand what really enables sound irq, can't be from Voodoo PCIINT. + \- service mode scale check doesn't work in mfightc (at least); + \- tsurugi: no sound; + - jpark3: attract mode demo play acts weird, the dinosaur gets submerged + and camera doesn't really know what to do, CPU core bug? + - mocapglf, sscopefh: video flickers, are they using the Konami 30-Hz demuxer + for driving 2 screens? Other notes: - "Distribution error" means there's a region mismatch. @@ -90,7 +104,7 @@ - Hold TEST while booting (from the very start) to initialize the RTC for most games. - It seems that p911 has 3 unique regional images: U/E, K/A, and J. If you try booting, for example, U region on a K/A image, it won't find some files and will error out with "distribution error". - Game status: + Game status (potentially outdated, to be moved on top): boxingm Goes in-game. Controllers are not emulated. Various graphical glitches. jpark3 Goes in-game. Controllers are not emulated. Various graphical glitches. mocapb,j Goes in-game. Controllers are not emulated. Various graphical glitches. Random crashes. @@ -423,6 +437,7 @@ namespace { #define VIPER_DEBUG_LOG #define VIPER_DEBUG_EPIC_INTS 0 +// TODO: doesn't compile, wants attotime_string #define VIPER_DEBUG_EPIC_TIMERS 0 #define VIPER_DEBUG_EPIC_REGS 0 #define VIPER_DEBUG_EPIC_I2C 0 @@ -435,9 +450,9 @@ class viper_state : public driver_device public: viper_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag), + m_voodoo(*this, "voodoo"), m_maincpu(*this, "maincpu"), m_ata(*this, "ata"), - m_voodoo(*this, "voodoo"), m_lpci(*this, "pcibus"), m_ds2430_bit_timer(*this, "ds2430_timer2"), m_workram(*this, "workram"), @@ -462,6 +477,9 @@ class viper_state : public driver_device virtual void machine_start() override; virtual void machine_reset() override; + virtual uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + required_device m_voodoo; private: uint32_t epic_r(offs_t offset); void epic_w(offs_t offset, uint32_t data); @@ -496,7 +514,6 @@ class viper_state : public driver_device uint16_t ppp_sensor_r(offs_t offset); - uint32_t screen_update_viper(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); INTERRUPT_GEN_MEMBER(viper_vblank); void voodoo_pciint(int state); @@ -631,7 +648,6 @@ class viper_state : public driver_device required_device m_maincpu; required_device m_ata; - required_device m_voodoo; required_device m_lpci; required_device m_ds2430_bit_timer; required_shared_ptr m_workram; @@ -646,11 +662,50 @@ class viper_state : public driver_device void voodoo3_pci_w(int function, int reg, uint32_t data, uint32_t mem_mask); }; -uint32_t viper_state::screen_update_viper(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +class viper_subscreen_state : public viper_state +{ +public: + viper_subscreen_state(const machine_config &mconfig, device_type type, const char *tag) + : viper_state(mconfig, type, tag) + {} + +protected: + virtual uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) override; + virtual void video_start() override; +private: + std::unique_ptr m_voodoo_buf; + std::unique_ptr m_ttl_buf; +}; + +uint32_t viper_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { return m_voodoo->update(bitmap, cliprect) ? 0 : UPDATE_HAS_NOT_CHANGED; } +void viper_subscreen_state::video_start() +{ + m_voodoo_buf = std::make_unique(1024, 1024); + m_ttl_buf = std::make_unique(1024, 1024); +} + +// TODO: stub, pinpoint where the TTL muxer control is located +// It definitely dispatch every 30 Hz, there must be a signal for starting it up. + +// TODO: understand how even TTL manages to rearrange Voodoo source with overrides +// Generally Konami uses a readback bit for this. +// Oddly enough the Voodoo is not touched on even/odd frame setup, and it doesn't setup anything +// worth writing home in the VGA core, so a possible explaination is that TTL just pickup linear +// pixels and rearranges on its own rules? + +// TODO: we need to read the TTL for nothing atm, otherwise sscopefh (at least) will hang earlier (???) +uint32_t viper_subscreen_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +{ + m_voodoo->update(screen.frame_number() & 1 ? *m_voodoo_buf : *m_ttl_buf, cliprect); + + copybitmap(bitmap, *m_voodoo_buf, 0, 0, cliprect.min_x, cliprect.min_y, cliprect); + return 0; +} + static inline uint64_t read64be_with_32sle_device_handler(read32s_delegate handler, offs_t offset, uint64_t mem_mask) { mem_mask = swapendian_int64(mem_mask); @@ -1230,7 +1285,7 @@ void viper_state::epic_w(offs_t offset, uint32_t data) { m_epic.eicr = data; if (data & 0x08000000) - fatalerror("EPIC: serial interrupts mode not implemented\n"); + throw emu_fatalerror("EPIC: serial interrupts mode not implemented\n"); break; } case 0x10e0: // Offset 0x410E0 - Spurious Vector Register @@ -1450,7 +1505,7 @@ uint64_t viper_state::cf_card_data_r(offs_t offset, uint64_t mem_mask) default: { - fatalerror("%s:cf_card_data_r: IDE reg %02X\n", machine().describe_context().c_str(), offset & 0xf); + throw emu_fatalerror("%s:cf_card_data_r: IDE reg %02X\n", machine().describe_context().c_str(), offset & 0xf); } } } @@ -1471,7 +1526,7 @@ void viper_state::cf_card_data_w(offs_t offset, uint64_t data, uint64_t mem_mask default: { - fatalerror("%s:cf_card_data_w: IDE reg %02X, %04X\n", machine().describe_context().c_str(), offset & 0xf, (uint16_t)(data >> 16)); + throw emu_fatalerror("%s:cf_card_data_w: IDE reg %02X, %04X\n", machine().describe_context().c_str(), offset & 0xf, (uint16_t)(data >> 16)); } } } @@ -1525,7 +1580,7 @@ uint64_t viper_state::cf_card_r(offs_t offset, uint64_t mem_mask) { int reg = offset; - printf("cf_r: %04X\n", reg); + logerror("cf_r: %04X\n", reg); if ((reg >> 1) < sizeof(cf_card_tuples)) { @@ -1533,7 +1588,7 @@ uint64_t viper_state::cf_card_r(offs_t offset, uint64_t mem_mask) } else { - fatalerror("%s:compact_flash_r: reg %02X\n", machine().describe_context().c_str(), reg); + throw emu_fatalerror("%s:compact_flash_r: reg %02X\n", machine().describe_context().c_str(), reg); } } } @@ -1582,7 +1637,7 @@ void viper_state::cf_card_w(offs_t offset, uint64_t data, uint64_t mem_mask) default: { - fatalerror("%s:compact_flash_w: IDE reg %02X, data %04X\n", machine().describe_context().c_str(), offset & 0xf, (uint16_t)((data >> 16) & 0xffff)); + throw emu_fatalerror("%s:compact_flash_w: IDE reg %02X, data %04X\n", machine().describe_context().c_str(), offset & 0xf, (uint16_t)((data >> 16) & 0xffff)); } } } @@ -1602,7 +1657,7 @@ void viper_state::cf_card_w(offs_t offset, uint64_t data, uint64_t mem_mask) } default: { - fatalerror("%s:compact_flash_w: reg %02X, data %04X\n", machine().describe_context().c_str(), offset, (uint16_t)((data >> 16) & 0xffff)); + throw emu_fatalerror("%s:compact_flash_w: reg %02X, data %04X\n", machine().describe_context().c_str(), offset, (uint16_t)((data >> 16) & 0xffff)); } } } @@ -1694,7 +1749,7 @@ uint32_t viper_state::voodoo3_pci_r(int function, int reg, uint32_t mem_mask) } default: - fatalerror("voodoo3_pci_r: %08X at %08X\n", reg, m_maincpu->pc()); + throw emu_fatalerror("voodoo3_pci_r: %08X at %08X\n", reg, m_maincpu->pc()); } } @@ -1761,7 +1816,7 @@ void viper_state::voodoo3_pci_w(int function, int reg, uint32_t data, uint32_t m } default: - fatalerror("voodoo3_pci_w: %08X, %08X at %08X\n", data, reg, m_maincpu->pc()); + throw emu_fatalerror("voodoo3_pci_w: %08X, %08X at %08X\n", data, reg, m_maincpu->pc()); } } @@ -1801,7 +1856,7 @@ void viper_state::voodoo3_lfb_w(offs_t offset, uint64_t data, uint64_t mem_mask) TIMER_CALLBACK_MEMBER(viper_state::ds2430_timer_callback) { - printf("DS2430 timer callback\n"); + logerror("DS2430 timer callback\n"); if (param == 1) { @@ -1890,12 +1945,12 @@ void viper_state::DS2430_w(int bit) { if (ds2430_insert_cmd_bit(bit)) { - printf("DS2430_w: rom command %02X\n", m_ds2430_cmd); + logerror("DS2430_w: rom command %02X\n", m_ds2430_cmd); switch (m_ds2430_cmd) { case 0x33: m_ds2430_state = DS2430_STATE_READ_ROM; break; case 0xcc: m_ds2430_state = DS2430_STATE_MEM_FUNCTION; break; - default: fatalerror("DS2430_w: unimplemented rom command %02X\n", m_ds2430_cmd); + default: throw emu_fatalerror("DS2430_w: unimplemented rom command %02X\n", m_ds2430_cmd); } } break; @@ -1905,11 +1960,11 @@ void viper_state::DS2430_w(int bit) { if (ds2430_insert_cmd_bit(bit)) { - printf("DS2430_w: mem function %02X\n", m_ds2430_cmd); + logerror("DS2430_w: mem function %02X\n", m_ds2430_cmd); switch (m_ds2430_cmd) { case 0xf0: m_ds2430_state = DS2430_STATE_READ_MEM_ADDRESS; break; - default: fatalerror("DS2430_w: unimplemented mem function %02X\n", m_ds2430_cmd); + default: throw emu_fatalerror("DS2430_w: unimplemented mem function %02X\n", m_ds2430_cmd); } } break; @@ -1919,7 +1974,7 @@ void viper_state::DS2430_w(int bit) { if (ds2430_insert_cmd_bit(bit)) { - printf("DS2430_w: read mem address %02X\n", m_ds2430_cmd); + logerror("DS2430_w: read mem address %02X\n", m_ds2430_cmd); m_ds2430_addr = m_ds2430_cmd; m_ds2430_state = DS2430_STATE_READ_MEM; } @@ -1930,7 +1985,7 @@ void viper_state::DS2430_w(int bit) { m_ds2430_unk_status = (m_ds2430_rom[(m_ds2430_data_count/8)] >> (m_ds2430_data_count%8)) & 1; m_ds2430_data_count++; - printf("DS2430_w: read mem %d, bit = %d\n", m_ds2430_data_count, m_ds2430_unk_status); + logerror("DS2430_w: read mem %d, bit = %d\n", m_ds2430_data_count, m_ds2430_unk_status); if (m_ds2430_data_count >= 256) { @@ -1947,7 +2002,7 @@ void viper_state::DS2430_w(int bit) { int rombit = (m_ds2430_rom[0x20 + (m_ds2430_data_count/8)] >> (m_ds2430_data_count%8)) & 1; m_ds2430_data_count++; - printf("DS2430_w: read rom %d, bit = %d\n", m_ds2430_data_count, rombit); + logerror("DS2430_w: read rom %d, bit = %d\n", m_ds2430_data_count, rombit); m_ds2430_unk_status = rombit; @@ -1962,7 +2017,7 @@ void viper_state::DS2430_w(int bit) default: { - fatalerror("DS2430_w: unknown state %d\n", m_ds2430_cmd); + throw emu_fatalerror("DS2430_w: unknown state %d\n", m_ds2430_cmd); } } @@ -2095,7 +2150,7 @@ void viper_state::unk_serial_w(offs_t offset, uint64_t data, uint64_t mem_mask) m_unk_serial_data_r = ((data & 0x1) << 7) | ((data & 0x2) << 5) | ((data & 0x4) << 3) | ((data & 0x8) << 1) | ((data & 0x10) >> 1) | ((data & 0x20) >> 3) | ((data & 0x40) >> 5) | ((data & 0x80) >> 7); - printf("unk_serial read reg %02X: %04X\n", reg, data); + logerror("unk_serial read reg %02X: %04X\n", reg, data); } } if (m_unk_serial_bit_w == 16) @@ -2104,7 +2159,7 @@ void viper_state::unk_serial_w(offs_t offset, uint64_t data, uint64_t mem_mask) { int reg = m_unk_serial_cmd & 0x7f; m_unk_serial_regs[reg] = m_unk_serial_data; - printf("unk_serial write reg %02X: %04X\n", reg, m_unk_serial_data); + logerror("unk_serial write reg %02X: %04X\n", reg, m_unk_serial_data); } m_unk_serial_bit_w = 0; @@ -2136,7 +2191,9 @@ void viper_state::viper_map(address_map &map) map(0xffe08000, 0xffe08007).noprw(); map(0xffe10000, 0xffe10007).r(FUNC(viper_state::input_r)); map(0xffe28000, 0xffe28007).nopw(); // ppp2nd leds - map(0xffe28008, 0xffe2801f).nopw(); // boxingm reads and writes here to read the pad sensor values + // boxingm reads and writes here to read the pad sensor values, 2nd adc? + // $10 bit 7 (w) clk_write, $18 bit 7 (r) do_read + map(0xffe28008, 0xffe2801f).nopw(); map(0xffe30000, 0xffe31fff).rw("m48t58", FUNC(timekeeper_device::read), FUNC(timekeeper_device::write)); map(0xffe40000, 0xffe4000f).noprw(); map(0xffe50000, 0xffe50007).w(FUNC(viper_state::unk2_w)); @@ -2191,7 +2248,7 @@ static INPUT_PORTS_START( viper ) PORT_START("IN3") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SERVICE2 ) PORT_NAME("Test Button") + PORT_SERVICE_NO_TOGGLE( 0x02, IP_ACTIVE_LOW ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 ) @@ -2334,12 +2391,13 @@ INPUT_PORTS_START( boxingm ) PORT_DIPSETTING( 0x00, DEF_STR( No ) ) PORT_MODIFY("IN4") - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("Select L") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Select L") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Select R") - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("BodyPad L") + // as attract claims, following two are for standing up on KO count + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("BodyPad L") PORT_MODIFY("IN5") - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("BodyPad R") + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("BodyPad R") PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) // memory card check for boxingm (actually comms enable?) INPUT_PORTS_END @@ -2430,6 +2488,7 @@ INPUT_PORTS_START( sscopefh ) PORT_MODIFY("IN3") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Refill Key") + PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Hopper") // causes hopper errors if pressed, TBD PORT_MODIFY("IN4") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_COIN3 ) PORT_NAME("Credit 2 Pounds") // Currency probably changes between regions @@ -2543,7 +2602,9 @@ INTERRUPT_GEN_MEMBER(viper_state::viper_vblank) void viper_state::voodoo_vblank(int state) { if (state) + { mpc8240_interrupt(MPC8240_IRQ0); + } //mpc8240_interrupt(MPC8240_IRQ3); } @@ -2674,8 +2735,8 @@ void viper_state::machine_reset() void viper_state::viper(machine_config &config) { /* basic machine hardware */ - MPC8240(config, m_maincpu, 166666666); // Unknown - m_maincpu->set_bus_frequency(100000000); + MPC8240(config, m_maincpu, 166'666'666); // Unknown + m_maincpu->set_bus_frequency(100'000'000); m_maincpu->set_addrmap(AS_PROGRAM, &viper_state::viper_map); m_maincpu->set_vblank_int("screen", FUNC(viper_state::viper_vblank)); @@ -2699,7 +2760,7 @@ void viper_state::viper(machine_config &config) screen.set_refresh_hz(60); screen.set_size(1024, 768); screen.set_visarea(0, 1024 - 1, 0, 768 - 1); - screen.set_screen_update(FUNC(viper_state::screen_update_viper)); + screen.set_screen_update(FUNC(viper_state::screen_update)); PALETTE(config, "palette").set_entries(65536); @@ -3434,7 +3495,7 @@ GAME(2000, gticlub2, kviper, viper, gticlub2, viper_state, init_viperc GAME(2000, gticlub2ea,gticlub2, viper, gticlub2ea, viper_state, init_vipercf, ROT0, "Konami", "Driving Party: Racing in Italy (ver EAA)", MACHINE_NOT_WORKING) GAME(2001, jpark3, kviper, viper, jpark3, viper_state, init_vipercf, ROT0, "Konami", "Jurassic Park III (ver EBC)", MACHINE_NOT_WORKING) GAME(2001, jpark3u, jpark3, viper, jpark3, viper_state, init_vipercf, ROT0, "Konami", "Jurassic Park III (ver UBC)", MACHINE_NOT_WORKING) -GAME(2001, mocapglf, kviper, viper_omz, mocapglf, viper_state, init_vipercf, ROT90, "Konami", "Mocap Golf (ver UAA)", MACHINE_NOT_WORKING) +GAME(2001, mocapglf, kviper, viper_omz, mocapglf, viper_subscreen_state, init_vipercf, ROT90, "Konami", "Mocap Golf (ver UAA)", MACHINE_NOT_WORKING) GAME(2001, mocapb, kviper, viper, mocapb, viper_state, init_vipercf, ROT90, "Konami", "Mocap Boxing (ver AAB)", MACHINE_NOT_WORKING) GAME(2001, mocapbj, mocapb, viper, mocapb, viper_state, init_vipercf, ROT90, "Konami", "Mocap Boxing (ver JAA)", MACHINE_NOT_WORKING) GAME(2000, p911, kviper, viper, p911, viper_state, init_vipercf, ROT90, "Konami", "The Keisatsukan: Shinjuku 24-ji (ver AAE)", MACHINE_NOT_WORKING) @@ -3446,9 +3507,9 @@ GAME(2000, p911ed, p911, viper, p911, viper_state, init_viperc GAME(2000, p911ea, p911, viper, p911, viper_state, init_vipercf, ROT90, "Konami", "Police 24/7 (ver EAD, alt)", MACHINE_NOT_WORKING) GAME(2000, p911j, p911, viper, p911, viper_state, init_vipercf, ROT90, "Konami", "The Keisatsukan: Shinjuku 24-ji (ver JAE)", MACHINE_NOT_WORKING) GAME(2001, p9112, kviper, viper, p911, viper_state, init_vipercf, ROT90, "Konami", "Police 911 2 (VER. UAA:B)", MACHINE_NOT_WORKING) -GAME(2001, sscopex, kviper, viper, sscopex, viper_state, init_vipercf, ROT0, "Konami", "Silent Scope EX (ver UAA)", MACHINE_NOT_WORKING) -GAME(2001, sogeki, sscopex, viper, sogeki, viper_state, init_vipercf, ROT0, "Konami", "Sogeki (ver JAA)", MACHINE_NOT_WORKING) -GAME(2002, sscopefh, kviper, viper, sscopefh, viper_state, init_vipercf, ROT0, "Konami", "Silent Scope Fortune Hunter (ver EAA)", MACHINE_NOT_WORKING) +GAME(2001, sscopex, kviper, viper, sscopex, viper_subscreen_state, init_vipercf, ROT0, "Konami", "Silent Scope EX (ver UAA)", MACHINE_NOT_WORKING) +GAME(2001, sogeki, sscopex, viper, sogeki, viper_subscreen_state, init_vipercf, ROT0, "Konami", "Sogeki (ver JAA)", MACHINE_NOT_WORKING) +GAME(2002, sscopefh, kviper, viper, sscopefh, viper_subscreen_state, init_vipercf, ROT0, "Konami", "Silent Scope Fortune Hunter (ver EAA)", MACHINE_NOT_WORKING) // UK only? GAME(2001, thrild2, kviper, viper, thrild2, viper_state, init_vipercf, ROT0, "Konami", "Thrill Drive 2 (ver EBB)", MACHINE_NOT_WORKING) GAME(2001, thrild2j, thrild2, viper, thrild2, viper_state, init_vipercf, ROT0, "Konami", "Thrill Drive 2 (ver JAA)", MACHINE_NOT_WORKING) GAME(2001, thrild2a, thrild2, viper, thrild2, viper_state, init_vipercf, ROT0, "Konami", "Thrill Drive 2 (ver AAA)", MACHINE_NOT_WORKING) diff --git a/src/mame/layout/ampoker2.lay b/src/mame/layout/ampoker2.lay index b264106a56385..6668fac814090 100644 --- a/src/mame/layout/ampoker2.lay +++ b/src/mame/layout/ampoker2.lay @@ -3,137 +3,243 @@ license:CC0-1.0 --> - + + - + - + - + - + + + + + + + + + + - + - + - + - + - + - + + + + + + + + + + - + - + + + + + + + + + + - + - + - + - + - + - + - + - + - + - + - + - + - + - + + + + + + + + + + + + + + + + + + + + + + + + + + - - + + + - - + + + - - + + + - - + + + - - + + + - - + + + - - + + - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/bbombo.lay b/src/mame/layout/bbombo.lay index ee17195bcd9b2..717bb76ec9069 100644 --- a/src/mame/layout/bbombo.lay +++ b/src/mame/layout/bbombo.lay @@ -792,7 +792,7 @@ copyright-holders: Roberto Fresca, Grull Osgo - + diff --git a/src/mame/layout/cxg_enterprise.lay b/src/mame/layout/cxg_enterprise.lay index 7172231c5c084..e56806ca575aa 100644 --- a/src/mame/layout/cxg_enterprise.lay +++ b/src/mame/layout/cxg_enterprise.lay @@ -7,10 +7,6 @@ license:CC0-1.0 - - - - @@ -466,26 +462,26 @@ license:CC0-1.0 - + - - - - - - - - + + + + + + + + - - - - + + + + @@ -522,11 +518,11 @@ license:CC0-1.0 - - - - - + + + + + @@ -548,14 +544,13 @@ license:CC0-1.0 - + - - + diff --git a/src/mame/layout/cxg_galaxy.lay b/src/mame/layout/cxg_galaxy.lay index cea01dba3cdaa..bcb4c4ef2c82a 100644 --- a/src/mame/layout/cxg_galaxy.lay +++ b/src/mame/layout/cxg_galaxy.lay @@ -7,10 +7,6 @@ license:CC0-1.0 - - - - @@ -520,23 +516,23 @@ license:CC0-1.0 - - - - - - - - - - - - - - - - - + + + + + + + + + + + + + + + + + @@ -578,15 +574,15 @@ license:CC0-1.0 - - + + - - - - - - + + + + + + @@ -613,14 +609,13 @@ license:CC0-1.0 - + - - + diff --git a/src/mame/layout/cxg_senterprise.lay b/src/mame/layout/cxg_senterprise.lay new file mode 100644 index 0000000000000..b8939404ed3d1 --- /dev/null +++ b/src/mame/layout/cxg_senterprise.lay @@ -0,0 +1,593 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/cz1.lay b/src/mame/layout/cz1.lay new file mode 100644 index 0000000000000..6454435abe1fb --- /dev/null +++ b/src/mame/layout/cz1.lay @@ -0,0 +1,779 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/eibise.lay b/src/mame/layout/eibise.lay index 1061890cd6d9b..def8032e2a5ba 100644 --- a/src/mame/layout/eibise.lay +++ b/src/mame/layout/eibise.lay @@ -190,23 +190,20 @@ copyright-holders: Roberto Fresca, Grull Osgo - - + - + - - + - + - diff --git a/src/mame/layout/mz1.lay b/src/mame/layout/mz1.lay new file mode 100644 index 0000000000000..c7d39743f1dc8 --- /dev/null +++ b/src/mame/layout/mz1.lay @@ -0,0 +1,654 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + ]]> + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/src/mame/layout/novoplay.lay b/src/mame/layout/novoplay.lay index 4c11f3e31e8de..752e2445077ef 100644 --- a/src/mame/layout/novoplay.lay +++ b/src/mame/layout/novoplay.lay @@ -126,25 +126,25 @@ license:CC0-1.0 - + - + - + - + - + - + - + diff --git a/src/mame/layout/saitek_simultano.lay b/src/mame/layout/saitek_simultano.lay index 88c2d1b99df67..9e8c765bbcabb 100644 --- a/src/mame/layout/saitek_simultano.lay +++ b/src/mame/layout/saitek_simultano.lay @@ -411,7 +411,7 @@ license:CC0-1.0 - + diff --git a/src/mame/layout/saitek_tking.lay b/src/mame/layout/saitek_tking.lay index 155038e614726..4ef4d08e351e6 100644 --- a/src/mame/layout/saitek_tking.lay +++ b/src/mame/layout/saitek_tking.lay @@ -708,7 +708,7 @@ license:CC0-1.0 - + diff --git a/src/mame/mame.lst b/src/mame/mame.lst index 360a04cb91713..03e52d9194ccc 100644 --- a/src/mame/mame.lst +++ b/src/mame/mame.lst @@ -673,6 +673,13 @@ upscope // (c) 1986 Grand products @source:amirix/wxstar4000.cpp wxstar4k // 1990 Applied Microelectronics Research (Amirix) / The Weather Channel +@source:ampex/ampex.cpp +dialog80 // Ampex Dialogue 80 + +@source:ampex/ampex210.cpp +ampex210p // +ampex230p // + @source:ampro/ampro.cpp ampro // @@ -15884,6 +15891,10 @@ ctk551 // ctk601 // gz70sp // +@source:casio/cz1.cpp +cz1 // 1986 Casio +mz1 // 1986 Casio (unreleased) + @source:casio/cz101.cpp cz101 // 1984 Casio @@ -16401,6 +16412,9 @@ sgalaxyb scptchess scptchessa +@source:cxg/senterprise.cpp +senterp + @source:cxg/sphinx40.cpp sphinx40 @@ -17252,6 +17266,7 @@ rongrong // "80" (c) 1994 Nakanihon rongrongg // "80" (c) 1994 Nakanihon rongrongj // "80" (c) 1994 Nakanihon seljan2 // "557" 1996 Dynax / Face +seljan2a // "508" 1996 Dynax / Face sryudens // "502" (c) 1996 Dynax / Face ultrchmp // "104" (c) 1995 Nakanihon ultrchmph // "114" (c) 1995 Nakanihon @@ -24123,6 +24138,7 @@ viostormeb // GX168 (c) 1993 (Europe) viostormj // GX168 (c) 1993 (Japan) viostormu // GX168 (c) 1993 (US) viostormub // GX168 (c) 1993 (US) +viostormubbl // bootleg @source:konami/nemesis.cpp blkpnthr // GX604 (c) 1987 (Japan) @@ -26920,6 +26936,9 @@ tmpdoki // (c) 1998 Media Syouji @source:mg1/mg1.cpp mg1 // Whitechapel Computer Works MG-1 +@source:microcraft/dim68k.cpp +dim68k // + @source:microkey/primo.cpp primoa32 // Primo A-32 primoa48 // Primo A-48 @@ -28498,6 +28517,8 @@ magibombg // (c) 2004 Astro Corp. magibombh // (c) 2001? Astro Corp. magibombi // (c) 2001? Astro Corp. magibombj // (c) 2005 Astro Corp. +monkeyl // (c) 2005 Astro Corp. +monkeyla // (c) 2004 Astro Corp. showhanc // (c) 2000 Astro Corp. showhand // (c) 2000 Astro Corp. skilldrp // (c) 2002 Astro Corp. @@ -33157,6 +33178,9 @@ hmxpro // 1994 Network Computing Devices @source:ncd/ncdppc.cpp explorapro // 1995 Network Computing Devices +@source:ncr/dmv.cpp +dmv // + @source:nec/apc.cpp apc // @@ -33860,6 +33884,7 @@ yosimotm // (c) 1994 Nichibutsu/Yoshimoto Kougyou yosimoto // (c) 1994 Nichibutsu/Yoshimoto Kougyou @source:nichibutsu/nichild.cpp +ldmj1mbh // (c) 1991 ldquiz4 // (c) 1992 shabdama // (c) 1991 @@ -36654,7 +36679,8 @@ trailer // ufo_x // @source:pinball/recel.cpp -recel // +recel13 // +recel14 // r_alaska // r_blackm4 // r_blackmag // @@ -36668,6 +36694,7 @@ r_mrevil // r_pokrplus // r_quijote // r_screech // +r_screech4 // r_swash // r_torneo // @@ -41243,13 +41270,6 @@ asma3k // (c) 2000 AlphaSmart, Inc. @source:skeleton/am1000.cpp am1000 // (c) 1988 Alpha Micro -@source:skeleton/ampex.cpp -dialog80 // Ampex Dialogue 80 - -@source:skeleton/ampex210.cpp -ampex210p // -ampex230p // - @source:skeleton/antonelli_hd6305.cpp anto2495 // anto2614 // @@ -41391,17 +41411,11 @@ digilog400 // @source:skeleton/digitech_gsp5.cpp gsp5 // -@source:skeleton/dim68k.cpp -dim68k // - @source:skeleton/dm7000.cpp dm500 // dm5620 // dm7000 // -@source:skeleton/dmv.cpp -dmv // - @source:skeleton/dps1.cpp dps1 // @@ -41909,9 +41923,6 @@ vp60 // @source:skeleton/vsmilepro.cpp vsmilpro -@source:skeleton/wicat.cpp -wicat // - @source:skeleton/xbase09.cpp xbase09 // @@ -45707,6 +45718,12 @@ jupiter3 // @source:westinghouse/testconsole.cpp whousetc // +@source:wicat/t7000.cpp +t7000 // + +@source:wicat/wicat.cpp +wicat // + @source:wing/luckgrln.cpp 7smash // (c) 1993 Sovic luckgrln // (c) 1991 Wing Co. Ltd diff --git a/src/mame/mattel/chess.cpp b/src/mame/mattel/chess.cpp index db1f80df46fcc..be69341285f37 100644 --- a/src/mame/mattel/chess.cpp +++ b/src/mame/mattel/chess.cpp @@ -62,15 +62,15 @@ class mchess_state : public driver_device required_ioport_array<4> m_inputs; output_finder<2, 8, 22> m_out_x; + u8 m_inp_mux = 0; + u8 m_lcd_control = 0; + // I/O handlers template void lcd_output_w(offs_t offset, u32 data); void input_w(u8 data); u8 input_r(); void lcd_w(u8 data); u8 lcd_r(); - - u8 m_inp_mux = 0; - u8 m_lcd_control = 0; }; void mchess_state::machine_start() diff --git a/src/mame/merit/merit3xx.cpp b/src/mame/merit/merit3xx.cpp index 9d8b41d0f8b07..639f040d33708 100644 --- a/src/mame/merit/merit3xx.cpp +++ b/src/mame/merit/merit3xx.cpp @@ -4,6 +4,13 @@ /* The CRT-300 is an extension of CRT-250/CRT-260 boards found in meritm.cpp. +TODO: +- Hanging at UART device check (PC=5e44) +- Never initializes RAMDAC; +- Never initializes CRTC on 350 games; + +=================================================================================================== + Merit - Multi-Action 6710-13 Touchscreen game MERIT CRT-300 REV A: @@ -450,6 +457,9 @@ Dipswitch on CRT-352 MEM is labeled SW1 #include "video/bt47x.h" #include "video/mc6845.h" +#include "speaker.h" +#include "tilemap.h" + namespace { class merit3xx_state : public driver_device @@ -459,6 +469,11 @@ class merit3xx_state : public driver_device : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") , m_rombank(*this, "rombank") + , m_gfxdecode(*this, "gfxdecode") + , m_ymsnd(*this, "ymsnd") + , m_gfx(*this, "gfx1") + , m_charram(*this, "charram") + , m_attram(*this, "attrram") { } void merit300(machine_config &config); @@ -466,7 +481,7 @@ class merit3xx_state : public driver_device protected: virtual void machine_start() override; - + virtual void machine_reset() override; private: MC6845_UPDATE_ROW(update_row); @@ -480,17 +495,45 @@ class merit3xx_state : public driver_device required_device m_maincpu; required_memory_bank m_rombank; + required_device m_gfxdecode; + required_device m_ymsnd; + required_region_ptr m_gfx; + required_shared_ptr m_charram; + required_shared_ptr m_attram; }; -void merit3xx_state::machine_start() -{ - memory_region *rom = memregion("maincpu"); - m_rombank->configure_entries(0, rom->bytes() / 0x8000, rom->base(), 0x8000); - m_rombank->set_entry(0); -} - MC6845_UPDATE_ROW(merit3xx_state::update_row) { + uint16_t x = 0; + uint8_t const *const data = m_gfx; + + for (uint8_t cx = 0; cx < x_count; cx++) + { + const u32 base_addr = (ma + cx) & 0x1fff; + int const attr = m_attram[base_addr]; + // TODO: bit 0 comes from an unknown bit in attr (bit 0?), bit 1-2 used with "TOD CLOCK ERROR" / "COIN JAM" messages + u32 tile_addr = (m_charram[base_addr] << 1) | ((attr & 0x40) << 4); + tile_addr <<= 3; + tile_addr += (ra & 7); + + for (int i = 7; i >= 0; i--) + { + // TODO: may be banked, need RAMDAC colors to tell + int col = 0; + + // TODO: looks 6bpp from GFX decoding (cfr. 0x*000 - 0x*800 tiles) + col |= (BIT(data[0x00000 | tile_addr], i) << 2); + col |= (BIT(data[0x10000 | tile_addr], i) << 1); + col |= (BIT(data[0x20000 | tile_addr], i) << 0); + + // TODO: ramdac has no palette set (?) so cheating for now + const u32 pen = (BIT(col, 2) ? 0xff : 0) | (BIT(col, 1) ? 0xff00 : 0) | (BIT(col, 0) ? 0xff0000 : 0); + + bitmap.pix(y, x) = pen; + + x++; + } + } } void merit3xx_state::ppi1_pa_w(u8 data) @@ -505,8 +548,11 @@ void merit3xx_state::crt350_rombank_w(u8 data) void merit3xx_state::main_map(address_map &map) { +// map.unmap_value_high(); map(0x0000, 0x7fff).bankr("rombank"); map(0x8000, 0x9fff).ram().share("nvram"); + // definitely accesses RAM here, would drop to "RAM error" with unmap high + map(0xa000, 0xbfff).ram(); map(0xc000, 0xdfff).ram().share("charram"); map(0xe000, 0xffff).ram().share("attrram"); } @@ -520,14 +566,14 @@ void merit3xx_state::io_map(address_map &map) map(0x18, 0x1b).m("ramdac", FUNC(bt476_device::map)); map(0x40, 0x40).rw("crtc", FUNC(hd6845s_device::status_r), FUNC(hd6845s_device::address_w)); map(0x41, 0x41).rw("crtc", FUNC(hd6845s_device::register_r), FUNC(hd6845s_device::register_w)); - //map(0x80, 0x80).r("ssg", FUNC(ym2149_device::data_r)); - //map(0x80, 0x81).w("ssg", FUNC(ym2149_device::address_data_w)); + map(0x80, 0x80).r("ymsnd", FUNC(ym2149_device::data_r)); + map(0x80, 0x81).w("ymsnd", FUNC(ym2149_device::address_data_w)); } void merit3xx_state::crt350_main_map(address_map &map) { main_map(map); - map(0xa000, 0xbfff).ram(); +// map(0xa000, 0xbfff).ram(); } void merit3xx_state::crt350_io_map(address_map &map) @@ -537,18 +583,150 @@ void merit3xx_state::crt350_io_map(address_map &map) } static INPUT_PORTS_START( merit3xx ) + PORT_START("IN0") + PORT_DIPNAME( 0x01, 0x01, "IN0" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("IN1") + PORT_DIPNAME( 0x01, 0x01, "IN1" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) // "TOD clock failure" if enabled + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("IN2") + PORT_DIPNAME( 0x01, 0x01, "IN2" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("PB") + PORT_DIPNAME( 0x01, 0x01, "PB" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END +static const gfx_layout gfx_8x8x3 = +{ + 8,8, + RGN_FRAC(1, 3), + 3, + { RGN_FRAC(0, 3), RGN_FRAC(1, 3), RGN_FRAC(2, 3) }, + { STEP8(0, 1) }, + { STEP8(0, 8) }, + 8*8 +}; + +static GFXDECODE_START( gfx_merit300 ) + GFXDECODE_ENTRY( "gfx1", 0, gfx_8x8x3, 0, 1 ) +GFXDECODE_END + +void merit3xx_state::machine_start() +{ + memory_region *rom = memregion("maincpu"); + m_rombank->configure_entries(0, rom->bytes() / 0x8000, rom->base(), 0x8000); +} + +void merit3xx_state::machine_reset() +{ + m_rombank->set_entry(0); +} void merit3xx_state::merit300(machine_config &config) { Z80(config, m_maincpu, 10_MHz_XTAL / 2); m_maincpu->set_addrmap(AS_PROGRAM, &merit3xx_state::main_map); m_maincpu->set_addrmap(AS_IO, &merit3xx_state::io_map); + m_maincpu->set_vblank_int("screen", FUNC(merit3xx_state::irq0_line_hold)); - //NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); + NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0); - I8255(config, "ppi0"); + i8255_device &ppi0(I8255(config, "ppi0")); + ppi0.in_pa_callback().set_ioport("IN0"); + ppi0.in_pb_callback().set_ioport("IN1"); + ppi0.in_pc_callback().set_ioport("IN2"); i8255_device &ppi1(I8255(config, "ppi1")); ppi1.out_pa_callback().set(FUNC(merit3xx_state::ppi1_pa_w)); @@ -566,6 +744,15 @@ void merit3xx_state::merit300(machine_config &config) BT476(config, "ramdac", 10_MHz_XTAL); NS16550(config, "uart", 1.8432_MHz_XTAL); + + GFXDECODE(config, m_gfxdecode, "ramdac", gfx_merit300); + + SPEAKER(config, "speaker").front_center(); + + YM2149(config, m_ymsnd, XTAL(1'843'200)); + m_ymsnd->port_b_read_callback().set_ioport("PB"); + m_ymsnd->add_route(ALL_OUTPUTS, "speaker", 0.5); + } void merit3xx_state::merit350(machine_config &config) @@ -590,9 +777,12 @@ ROM_START( ma6710 ) ROM_LOAD( "u-47_dc-350.u47", 0x10000, 0x10000, CRC(bbcf8280) SHA1(83c6fd84bdd09dd82506d81be1cbae797fd59347) ) ROM_LOAD( "u-48_dc-350.u48", 0x20000, 0x10000, CRC(b93a0481) SHA1(df60d81fb68bd868ce94f8b313896d6d31e54ad4) ) - ROM_REGION( 0x4000, "nvram", 0 ) + ROM_REGION( 0x2000, "nvram", 0 ) ROM_LOAD( "ds1225y.u6", 0x0000, 0x2000, CRC(78fd0284) SHA1(37aa7deaafc6faad7505cd56a442913b35f54166) ) - ROM_LOAD( "bq4010.u5", 0x2000, 0x2000, CRC(003ea272) SHA1(3f464a0189af49470b33825a00905df6b156913f) ) + + // DS1216? + ROM_REGION( 0x2000, "unk", 0 ) + ROM_LOAD( "bq4010.u5", 0x0000, 0x2000, CRC(003ea272) SHA1(3f464a0189af49470b33825a00905df6b156913f) ) ROM_END @@ -612,9 +802,11 @@ ROM_START( ma7551t ) // all ROMs reads matched printed checksum ROM_LOAD( "u47_dma6_ed62.u47", 0x10000, 0x10000, CRC(4312f851) SHA1(281f0fdf5ec0519c5fbdf73f2d8d567da626b13e) ) ROM_LOAD( "u48_dma6_a382.u48", 0x20000, 0x10000, CRC(fd256128) SHA1(e32da5242a8f0c68074326336938c60991d98fdc) ) - ROM_REGION( 0xa000, "nvram", 0 ) + ROM_REGION( 0x2000, "nvram", 0 ) ROM_LOAD( "dallas_ds1225y-150.u7", 0x0000, 0x2000, CRC(d7d46736) SHA1(98c7d6905f30e351583c90103aae0ca742ba070f) ) - ROM_LOAD( "dallas_ds1230y-120.u17", 0x2000, 0x8000, CRC(6fcc7313) SHA1(6ee2dd8898e4b567a27ee5b8ed54e0cdc56f9553) ) + + ROM_REGION( 0x8000, "nvram2", 0 ) + ROM_LOAD( "dallas_ds1230y-120.u17", 0x0000, 0x8000, CRC(6fcc7313) SHA1(6ee2dd8898e4b567a27ee5b8ed54e0cdc56f9553) ) ROM_END @@ -634,9 +826,11 @@ ROM_START( ma7551p ) ROM_LOAD( "u47_nc+.u47", 0x10000, 0x10000, CRC(5f1d8ffa) SHA1(c8fe36f91ddd634e6d66434342b8dafdc1ffa332) ) ROM_LOAD( "u48_nc+.u48", 0x20000, 0x10000, CRC(1ef22a70) SHA1(f33db37dc6e2ded3a39907eb5f5ea6306fd6f8b0) ) - ROM_REGION( 0xa000, "nvram", 0 ) + ROM_REGION( 0x2000, "nvram", 0 ) ROM_LOAD( "dallas_ds1225y-150.u7", 0x0000, 0x2000, CRC(2526c25c) SHA1(fe7d54e65dc7bd93576f496160f63b3c8e8c128b) ) - ROM_LOAD( "dallas_ds1230y-120.u17", 0x2000, 0x8000, CRC(54099035) SHA1(2a8854a862bc24ff72470660e60e9e4228158b42) ) + + ROM_REGION( 0x8000, "nvram2", 0 ) + ROM_LOAD( "dallas_ds1230y-120.u17", 0x0000, 0x8000, CRC(54099035) SHA1(2a8854a862bc24ff72470660e60e9e4228158b42) ) ROM_END @@ -656,9 +850,11 @@ ROM_START( ma7556 ) // all ROMs reads matched printed checksum ROM_LOAD( "multi-action_7556-wv_u47.u47", 0x10000, 0x10000, CRC(5781bdd7) SHA1(e3f920dd1c247f92044100e28fc39d48b02b6a4b) ) // also known to be labeled: U47 MLT8 cs:0262 ROM_LOAD( "multi-action_7556-wv_u48.u48", 0x20000, 0x10000, CRC(52ac8411) SHA1(9941388b90b6b91c1dab9286db588f0032620ea4) ) // also known to be labeled: U48 MLT8 cs:9daa - ROM_REGION( 0xa000, "nvram", 0 ) + ROM_REGION( 0x2000, "nvram", 0 ) ROM_LOAD( "dallas_ds1225y-200.u7", 0x0000, 0x2000, BAD_DUMP CRC(5b635a95) SHA1(dd347258ba9e000963da75af5ac383c09b60be0b) ) - ROM_LOAD( "dallas_ds1230y-200.u17", 0x2000, 0x8000, BAD_DUMP CRC(e0c07037) SHA1(c6674a79a51f5aacca4a9e9bd19a2ce475c98b47) ) + + ROM_REGION( 0x8000, "nvram2", 0 ) + ROM_LOAD( "dallas_ds1230y-200.u17", 0x0000, 0x8000, BAD_DUMP CRC(e0c07037) SHA1(c6674a79a51f5aacca4a9e9bd19a2ce475c98b47) ) ROM_END @@ -678,9 +874,11 @@ ROM_START( ma7558 ) // all ROMs reads matched printed checksum ROM_LOAD( "multi-action_7556-wv_u47.u47", 0x10000, 0x10000, CRC(5781bdd7) SHA1(e3f920dd1c247f92044100e28fc39d48b02b6a4b) ) // also known to be labeled: U47 MLT8 cs:0262 ROM_LOAD( "multi-action_7556-wv_u48.u48", 0x20000, 0x10000, CRC(52ac8411) SHA1(9941388b90b6b91c1dab9286db588f0032620ea4) ) // also known to be labeled: U48 MLT8 cs:9daa - ROM_REGION( 0xa000, "nvram", 0 ) + ROM_REGION( 0x2000, "nvram", 0 ) ROM_LOAD( "dallas_ds1225y-200.u7", 0x0000, 0x2000, CRC(142c5cea) SHA1(39d787109e0b782fda5a18ff3a56cf8428cb2437) ) - ROM_LOAD( "dallas_ds1230y-200.u17", 0x2000, 0x8000, CRC(9d196d52) SHA1(21fd5acd7652ba10ae6b4ae520abcc7c34eb37d1) ) + + ROM_REGION( 0x8000, "nvram2", 0 ) + ROM_LOAD( "dallas_ds1230y-200.u17", 0x0000, 0x8000, CRC(9d196d52) SHA1(21fd5acd7652ba10ae6b4ae520abcc7c34eb37d1) ) ROM_END } // anonymous namespace diff --git a/src/mame/skeleton/dim68k.cpp b/src/mame/microcraft/dim68k.cpp similarity index 100% rename from src/mame/skeleton/dim68k.cpp rename to src/mame/microcraft/dim68k.cpp diff --git a/src/mame/skeleton/dim68k_kbd.cpp b/src/mame/microcraft/dim68k_kbd.cpp similarity index 100% rename from src/mame/skeleton/dim68k_kbd.cpp rename to src/mame/microcraft/dim68k_kbd.cpp diff --git a/src/mame/skeleton/dim68k_kbd.h b/src/mame/microcraft/dim68k_kbd.h similarity index 91% rename from src/mame/skeleton/dim68k_kbd.h rename to src/mame/microcraft/dim68k_kbd.h index e6b993edc92bf..b9ef32378703a 100644 --- a/src/mame/skeleton/dim68k_kbd.h +++ b/src/mame/microcraft/dim68k_kbd.h @@ -5,9 +5,8 @@ Micro Craft Dimension 68000 84-key keyboard **********************************************************************/ - -#ifndef MAME_SKELETON_DIM68K_KBD_H -#define MAME_SKELETON_DIM68K_KBD_H +#ifndef MAME_MICROCRAFT_DIM68K_KBD_H +#define MAME_MICROCRAFT_DIM68K_KBD_H #pragma once @@ -30,7 +29,7 @@ class dim68k_keyboard_device : public device_t auto txd_callback() { return m_txd_callback.bind(); } protected: - // device-level overrides + // device_t implementation virtual void device_resolve_objects() override; virtual void device_start() override; virtual ioport_constructor device_input_ports() const override; @@ -64,4 +63,4 @@ class dim68k_keyboard_device : public device_t // device type declarations DECLARE_DEVICE_TYPE(DIM68K_KEYBOARD, dim68k_keyboard_device) -#endif // MAME_SKELETON_DIM68K_KBD_H +#endif // MAME_MICROCRAFT_DIM68K_KBD_H diff --git a/src/mame/misc/39in1.cpp b/src/mame/misc/39in1.cpp index 874d17635146f..da0b1f90e94c0 100644 --- a/src/mame/misc/39in1.cpp +++ b/src/mame/misc/39in1.cpp @@ -62,6 +62,7 @@ class _39in1_state : public driver_device , m_eeprom(*this, "eeprom") , m_ram(*this, "ram") , m_mcu_ipt(*this, "MCUIPT") + , m_dsw(*this, "DSW") { } void _39in1(machine_config &config); @@ -83,49 +84,50 @@ class _39in1_state : public driver_device void init_plutus(); void init_pokrwild(); + DECLARE_INPUT_CHANGED_MEMBER(set_flip_dip); + DECLARE_INPUT_CHANGED_MEMBER(set_res_dip); + DECLARE_INPUT_CHANGED_MEMBER(set_hiscore_dip); + +protected: + virtual void machine_reset() override; + private: - uint32_t m_seed; - uint32_t m_magic; - uint32_t m_state; - uint32_t m_mcu_ipt_pc; + u32 m_seed; + u32 m_magic; + u32 m_state; + u32 m_mcu_ipt_pc; required_device m_maincpu; required_device m_pxa_periphs; - required_device m_eeprom; - required_shared_ptr m_ram; + required_device m_eeprom; + required_shared_ptr m_ram; required_ioport m_mcu_ipt; + required_ioport m_dsw; - uint32_t eeprom_r(); - void eeprom_w(uint32_t data, uint32_t mem_mask = ~0); - - uint32_t _39in1_cpld_r(offs_t offset); - void _39in1_cpld_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); - uint32_t _39in1_prot_cheater_r(); + u32 cpld_r(offs_t offset); + void cpld_w(offs_t offset, u32 data, u32 mem_mask = ~0); + u32 prot_cheater_r(); void _39in1_map(address_map &map); void base_map(address_map &map); - void decrypt(uint8_t xor00, uint8_t xor02, uint8_t xor04, uint8_t xor08, uint8_t xor10, uint8_t xor20, uint8_t xor40, uint8_t xor80, uint8_t bit7, uint8_t bit6, uint8_t bit5, uint8_t bit4, uint8_t bit3, uint8_t bit2, uint8_t bit1, uint8_t bit0); - void further_decrypt(uint8_t xor400, uint8_t xor800, uint8_t xor1000, uint8_t xor2000, uint8_t xor4000, uint8_t xor8000); + void decrypt(u8 xor00, u8 xor02, u8 xor04, u8 xor08, u8 xor10, u8 xor20, u8 xor40, u8 xor80, u8 bit7, u8 bit6, u8 bit5, u8 bit4, u8 bit3, u8 bit2, u8 bit1, u8 bit0); + void further_decrypt(u8 xor400, u8 xor800, u8 xor1000, u8 xor2000, u8 xor4000, u8 xor8000); }; - -uint32_t _39in1_state::eeprom_r() +void _39in1_state::machine_reset() { - return (m_eeprom->do_read() << 5) | (1 << 1); // Must be on. Probably a DIP switch. -} + m_pxa_periphs->gpio_in<1>(1); -void _39in1_state::eeprom_w(uint32_t data, uint32_t mem_mask) -{ - if (BIT(mem_mask, 2)) - m_eeprom->cs_write(ASSERT_LINE); - if (BIT(mem_mask, 3)) - m_eeprom->clk_write(BIT(data, 3) ? ASSERT_LINE : CLEAR_LINE); - if (BIT(mem_mask, 4)) - m_eeprom->di_write(BIT(data, 4)); + const u32 dsw = m_dsw->read(); + m_pxa_periphs->gpio_in<53>(BIT(dsw, 0)); + m_pxa_periphs->gpio_in<54>(BIT(dsw, 1)); + m_pxa_periphs->gpio_in<56>(BIT(dsw, 2)); + + m_eeprom->di_write(ASSERT_LINE); } -uint32_t _39in1_state::_39in1_cpld_r(offs_t offset) +u32 _39in1_state::cpld_r(offs_t offset) { // if (m_maincpu->pc() != m_mcu_ipt_pc) printf("CPLD read @ %x (PC %x state %d)\n", offset, m_maincpu->pc(), m_state); @@ -160,8 +162,8 @@ uint32_t _39in1_state::_39in1_cpld_r(offs_t offset) } else if (m_state == 2) // 29c0: 53 ac 0c 2b a2 07 e6 be 31 { - uint32_t seed = m_seed; - uint32_t magic = m_magic; + u32 seed = m_seed; + u32 magic = m_magic; magic = ( (((~(seed >> 16)) ^ (magic >> 1)) & 0x01) | (((~((seed >> 19) << 1)) ^ ((magic >> 5) << 1)) & 0x02) | @@ -180,7 +182,7 @@ uint32_t _39in1_state::_39in1_cpld_r(offs_t offset) return 0; } -void _39in1_state::_39in1_cpld_w(offs_t offset, uint32_t data, uint32_t mem_mask) +void _39in1_state::cpld_w(offs_t offset, u32 data, u32 mem_mask) { if (mem_mask == 0xffff) { @@ -207,7 +209,7 @@ void _39in1_state::_39in1_cpld_w(offs_t offset, uint32_t data, uint32_t mem_mask #endif } -uint32_t _39in1_state::_39in1_prot_cheater_r() +u32 _39in1_state::prot_cheater_r() { return 0x37; } @@ -216,12 +218,7 @@ void _39in1_state::base_map(address_map &map) { map(0x00000000, 0x0007ffff).rom(); map(0x00400000, 0x007fffff).rom().region("data", 0); - map(0x40000000, 0x400002ff).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::dma_r), FUNC(pxa255_periphs_device::dma_w)); - map(0x40400000, 0x40400083).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::i2s_r), FUNC(pxa255_periphs_device::i2s_w)); - map(0x40a00000, 0x40a0001f).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::ostimer_r), FUNC(pxa255_periphs_device::ostimer_w)); - map(0x40d00000, 0x40d00017).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::intc_r), FUNC(pxa255_periphs_device::intc_w)); - map(0x40e00000, 0x40e0006b).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::gpio_r), FUNC(pxa255_periphs_device::gpio_w)); - map(0x44000000, 0x4400021f).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::lcd_r), FUNC(pxa255_periphs_device::lcd_w)); + map(0x40000000, 0x47ffffff).m(m_pxa_periphs, FUNC(pxa255_periphs_device::map)); map(0xa0000000, 0xa07fffff).ram().share("ram"); } @@ -229,8 +226,8 @@ void _39in1_state::_39in1_map(address_map &map) { base_map(map); - map(0x04000000, 0x047fffff).rw(FUNC(_39in1_state::_39in1_cpld_r), FUNC(_39in1_state::_39in1_cpld_w)); - map(0xa0151648, 0xa015164b).r(FUNC(_39in1_state::_39in1_prot_cheater_r)); + map(0x04000000, 0x047fffff).rw(FUNC(_39in1_state::cpld_r), FUNC(_39in1_state::cpld_w)); + map(0xa0151648, 0xa015164b).r(FUNC(_39in1_state::prot_cheater_r)); } static INPUT_PORTS_START( 39in1 ) @@ -271,23 +268,35 @@ static INPUT_PORTS_START( 39in1 ) // The following dips apply to 39in1 and 48in1. 60in1 is the same but the last unused dipsw#4 is test mode off/on. PORT_START("DSW") // 1x 4-position DIP switch labelled SW3 - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Flip_Screen ) ) PORT_DIPLOCATION("SW3:1") PORT_CHANGED_MEMBER(DEVICE_SELF, _39in1_state, set_flip_dip, 0) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, "Display Mode" ) PORT_DIPLOCATION("SW3:2") + PORT_DIPNAME( 0x02, 0x00, "Display Mode" ) PORT_DIPLOCATION("SW3:2") PORT_CHANGED_MEMBER(DEVICE_SELF, _39in1_state, set_res_dip, 0) PORT_DIPSETTING( 0x02, "VGA 31.5kHz" ) PORT_DIPSETTING( 0x00, "CGA 15.75kHz" ) - PORT_DIPNAME( 0x04, 0x04, "High Score Saver" ) PORT_DIPLOCATION("SW3:3") + PORT_DIPNAME( 0x04, 0x04, "High Score Saver" ) PORT_DIPLOCATION("SW3:3") PORT_CHANGED_MEMBER(DEVICE_SELF, _39in1_state, set_hiscore_dip, 0) PORT_DIPSETTING( 0x04, "Disabled" ) PORT_DIPSETTING( 0x00, "Enabled" ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unused ) ) PORT_DIPLOCATION("SW3:4") - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END -void _39in1_state::decrypt(uint8_t xor00, uint8_t xor02, uint8_t xor04, uint8_t xor08, uint8_t xor10, uint8_t xor20, uint8_t xor40, uint8_t xor80, uint8_t bit7, uint8_t bit6, uint8_t bit5, uint8_t bit4, uint8_t bit3, uint8_t bit2, uint8_t bit1, uint8_t bit0) +INPUT_CHANGED_MEMBER(_39in1_state::set_flip_dip) +{ + m_pxa_periphs->gpio_in<53>(BIT(m_dsw->read(), 0)); +} + +INPUT_CHANGED_MEMBER(_39in1_state::set_res_dip) +{ + m_pxa_periphs->gpio_in<54>(BIT(m_dsw->read(), 1)); +} + +INPUT_CHANGED_MEMBER(_39in1_state::set_hiscore_dip) +{ + m_pxa_periphs->gpio_in<56>(BIT(m_dsw->read(), 2)); +} + +void _39in1_state::decrypt(u8 xor00, u8 xor02, u8 xor04, u8 xor08, u8 xor10, u8 xor20, u8 xor40, u8 xor80, u8 bit7, u8 bit6, u8 bit5, u8 bit4, u8 bit3, u8 bit2, u8 bit1, u8 bit0) { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); for (int i = 0; i < 0x80000; i += 2) { @@ -310,9 +319,9 @@ void _39in1_state::decrypt(uint8_t xor00, uint8_t xor02, uint8_t xor04, uint8_t } } -void _39in1_state::further_decrypt(uint8_t xor400, uint8_t xor800, uint8_t xor1000, uint8_t xor2000, uint8_t xor4000, uint8_t xor8000) // later versions have more conditional XORs +void _39in1_state::further_decrypt(u8 xor400, u8 xor800, u8 xor1000, u8 xor2000, u8 xor4000, u8 xor8000) // later versions have more conditional XORs { - uint8_t *rom = memregion("maincpu")->base(); + u8 *rom = memregion("maincpu")->base(); for (int i = 0; i < 0x80000; i += 2) { @@ -353,12 +362,13 @@ void _39in1_state::base(machine_config &config) PXA255(config, m_maincpu, 200'000'000); m_maincpu->set_addrmap(AS_PROGRAM, &_39in1_state::base_map); - EEPROM_93C66_16BIT(config, "eeprom"); + EEPROM_93C66_16BIT(config, m_eeprom); + m_eeprom->do_callback().set(m_pxa_periphs, FUNC(pxa255_periphs_device::gpio_in<5>)); PXA255_PERIPHERALS(config, m_pxa_periphs, 200'000'000, m_maincpu); - m_pxa_periphs->gpio0_write().set(FUNC(_39in1_state::eeprom_w)); - m_pxa_periphs->gpio0_read().set(FUNC(_39in1_state::eeprom_r)); - m_pxa_periphs->gpio1_read().set_ioport("DSW").lshift(21); + m_pxa_periphs->gpio_out<4>().set(m_eeprom, FUNC(eeprom_serial_93c66_16bit_device::di_write)); + m_pxa_periphs->gpio_out<2>().set(m_eeprom, FUNC(eeprom_serial_93c66_16bit_device::cs_write)); + m_pxa_periphs->gpio_out<3>().set(m_eeprom, FUNC(eeprom_serial_93c66_16bit_device::clk_write)); } void _39in1_state::_39in1(machine_config &config) diff --git a/src/mame/misc/amstarz80.cpp b/src/mame/misc/amstarz80.cpp index cb92ce76c971f..7a2d4c45ee9dd 100644 --- a/src/mame/misc/amstarz80.cpp +++ b/src/mame/misc/amstarz80.cpp @@ -112,8 +112,16 @@ static INPUT_PORTS_START( holddraw ) INPUT_PORTS_END +// TODO: not right, just to get a decode static const gfx_layout charlayout = { + 8,8, + RGN_FRAC(1,1), + 1, + { 0 }, + { STEP8(0, 1) }, + { STEP8(0, 1*8) }, + 8*8*1 }; static GFXDECODE_START( gfx_amstarz80 ) diff --git a/src/mame/misc/artmagic.cpp b/src/mame/misc/artmagic.cpp index 4fddb18ed63b3..555b0f0b82dcf 100644 --- a/src/mame/misc/artmagic.cpp +++ b/src/mame/misc/artmagic.cpp @@ -490,12 +490,19 @@ void artmagic_state::stonebal_tms_map(address_map &map) void artmagic_state::shtstar_subcpu_map(address_map &map) { map(0x000000, 0x03ffff).rom(); + map(0x8000c0, 0x8000c1).nopw(); // ? + map(0x800100, 0x800101).noprw(); // ? map(0x800141, 0x800141).w("aysnd", FUNC(ym2149_device::address_w)); map(0x800143, 0x800143).rw("aysnd", FUNC(ym2149_device::data_r), FUNC(ym2149_device::data_w)); map(0x800180, 0x80019f).rw("subduart", FUNC(mc68681_device::read), FUNC(mc68681_device::write)).umask16(0x00ff); map(0xffc000, 0xffffff).ram(); } +void artmagic_state::shtstar_subcpu_vector_map(address_map &map) +{ + map(0xfffff9, 0xfffff9).r("subduart", FUNC(mc68681_device::get_irq_vector)); +} + void artmagic_state::shtstar_guncpu_map(address_map &map) { map(0x0000, 0x7fff).rom(); @@ -858,13 +865,19 @@ void artmagic_state::shtstar(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &artmagic_state::shtstar_map); - MC68681(config, "mainduart", 3686400); + m_tms->output_int().set_inputline("maincpu", M68K_IRQ_4); + + mc68681_device &mainduart(MC68681(config, "mainduart", 3686400)); + mainduart.irq_cb().set_inputline("maincpu", M68K_IRQ_5); + mainduart.set_clocks(500000, 500000, 500000, 500000); // external clocking required for self-test; values probably wrong /* sub cpu*/ m68000_device &subcpu(M68000(config, "subcpu", MASTER_CLOCK_25MHz/2)); subcpu.set_addrmap(AS_PROGRAM, &artmagic_state::shtstar_subcpu_map); + subcpu.set_addrmap(m68000_device::AS_CPU_SPACE, &artmagic_state::shtstar_subcpu_vector_map); - MC68681(config, "subduart", 3686400); + mc68681_device &subduart(MC68681(config, "subduart", 3686400)); + subduart.irq_cb().set_inputline("subcpu", M68K_IRQ_4); YM2149(config, "aysnd", 3686400/2).add_route(ALL_OUTPUTS, "mono", 0.10); diff --git a/src/mame/misc/artmagic.h b/src/mame/misc/artmagic.h index e05de76380304..635dd5c294ffe 100644 --- a/src/mame/misc/artmagic.h +++ b/src/mame/misc/artmagic.h @@ -87,6 +87,7 @@ class artmagic_state : public driver_device void shtstar_guncpu_map(address_map &map); void shtstar_map(address_map &map); void shtstar_subcpu_map(address_map &map); + void shtstar_subcpu_vector_map(address_map &map); void stonebal_map(address_map &map); void stonebal_tms_map(address_map &map); void tms_map(address_map &map); diff --git a/src/mame/misc/astrcorp.cpp b/src/mame/misc/astrcorp.cpp index 221c660b27bb7..11ebd264e6133 100644 --- a/src/mame/misc/astrcorp.cpp +++ b/src/mame/misc/astrcorp.cpp @@ -15,23 +15,25 @@ OTHER: EEPROM, Battery 512 sprites, each made of N x M tiles. Tiles are 16x16x8 (16x32x8 in Stone Age) --------------------------------------------------------------------------------------------------------------------------------------------------------------------- -Year + Game PCB ID CPU Video Chips Notes +Year + Game PCB ID CPU Video Chips Notes --------------------------------------------------------------------------------------------------------------------------------------------------------------------- -00 Show Hand CHE-B50-4002A MC68HC000FN12 ASTRO V01 pLSI1016-60LJ, ASTRO 0001B MCU? (28 pins) -00 Wangpai Duijue CHE-B50-4002A MC68HC000FN12 ASTRO V01 pLSI1016, MDT2020AP MCU (28 pins) -01 Magic Bomb (NB4.5) None ASTRO V03 ASTRO V02 pLSI1016 Encrypted -02 Skill Drop GA None JX-1689F1028N ASTRO V02 pLSI1016-60LJ -02? Keno 21 ? ASTRO V102? ASTRO V05 ASTRO F02? not dumped -03 Speed Drop None JX-1689HP ASTRO V05 pLSI1016-60LJ -04 Zoo M1.1 ASTRO V102PX-005? ASTRO V06 ASTRO F02 2005-02-18 Encrypted -04 Magic Bomb (NB6.1) J (CS350P001 + CS350P033) ASTRO V102PX-014? ASTRO V07 ?, Encrypted, select CGA / VGA via jumper -04 Go & Stop K2 (CS350P011) no markings ASTRO V05 ASTRO F01 2007-06-03 Encrypted -04 Magic Bomb (AA.72C) M1.1 ASTRO V102PX-014? ASTRO V05 ASTRO F02 2005-02-18 Encrypted -05 Dino Dino T-3802A ASTRO V102PX-010? ASTRO V05 ASTRO F02 2003-03-12 Encrypted -05 Stone Age L1 ASTRO V102PX-012? ASTRO V05(x2) ASTRO F02 2004-09-04 Encrypted -05? Hacher (hack) M1.2 ? ? ASTRO F02 2005-02-18 Encrypted -06 Win Win Bingo M1.2 ASTRO V102PX-006? ASTRO V06 ASTRO F02 2005-09-17 Encrypted -07? Western Venture O (CS350P032) ASTRO V102? ASTRO V07 ASTRO F01 2007-06-03 Encrypted +00 Show Hand CHE-B50-4002A MC68HC000FN12 ASTRO V01 pLSI1016-60LJ, ASTRO 0001B MCU? (28 pins) +00 Wangpai Duijue CHE-B50-4002A MC68HC000FN12 ASTRO V01 pLSI1016, MDT2020AP MCU (28 pins) +01 Magic Bomb (NB4.5) None ASTRO V03 ASTRO V02 pLSI1016 Encrypted +02 Skill Drop GA None JX-1689F1028N ASTRO V02 pLSI1016-60LJ +02? Keno 21 ? ASTRO V102? ASTRO V05 ASTRO F02? not dumped +03 Speed Drop None JX-1689HP ASTRO V05 pLSI1016-60LJ +04 Zoo M1.1 ASTRO V102PX-005? ASTRO V06 ASTRO F02 2005-02-18 Encrypted +04 Magic Bomb (NB6.1) J (CS350P001 + CS350P033) ASTRO V102PX-014? ASTRO V07 ?, Encrypted, select CGA / VGA via jumper +04 Go & Stop K2 (CS350P011) no markings ASTRO V05 ASTRO F01 2007-06-03 Encrypted +04 Magic Bomb (AA.72C) M1.1 ASTRO V102PX-014? ASTRO V05 ASTRO F02 2005-02-18 Encrypted +05 Monkey Land (AA.13B) M1 ASTRO V102PX-005? ASTRO V06 ASTRO F02 2004-05-18 Encrypted +05 Monkey Land (AA.21A) M1.1 ASTRO V102PX-005? ASTRO V06 ASTRO F02 2004-12-04 Encrypted +05 Dino Dino T-3802A ASTRO V102PX-010? ASTRO V05 ASTRO F02 2003-03-12 Encrypted +05 Stone Age L1 ASTRO V102PX-012? ASTRO V05(x2) ASTRO F02 2004-09-04 Encrypted +05? Hacher (hack) M1.2 ? ? ASTRO F02 2005-02-18 Encrypted +06 Win Win Bingo M1.2 ASTRO V102PX-006? ASTRO V06 ASTRO F02 2005-09-17 Encrypted +07? Western Venture O (CS350P032) ASTRO V102? ASTRO V07 ASTRO F01 2007-06-03 Encrypted ---------------------------------------------------------------------------------------------------------------------------------------------------------------------- - astoneag, magibomb, winbingo, etc.: to initialize EEPROM (and self test in some games), keep keyout (W) pressed during boot. @@ -59,6 +61,7 @@ Year + Game PCB ID CPU Video - astoneag, dinodino, magibombd, magibombg: exiting from test menu goes haywire (requires a soft-reset with F3). - magibombg: needs RE of the CPU code and correct EEPROM. - gostopac: stops with 'S4' message during boot. Needs RE of the CPU code and emulation of its peculiarities. +- monkeyl,a: Needs RE of the CPU code, inputs and layout. After reset it initializes. *************************************************************************************************************/ @@ -285,6 +288,7 @@ class zoo_state : public astrocorp_state void gostop(machine_config &config); void magibombd(machine_config &config); void magibombg(machine_config &config); + void monkeyl(machine_config &config); void winbingo(machine_config &config); void zoo(machine_config &config); @@ -293,6 +297,8 @@ class zoo_state : public astrocorp_state void init_hacher(); void init_magibombd(); void init_magibombg(); + void init_monkeyl(); + void init_monkeyla(); void init_winbingo(); void init_winbingoa(); void init_zoo(); @@ -330,12 +336,14 @@ class zoo_state : public astrocorp_state void hacher_map(address_map &map); void magibombd_map(address_map &map); void magibombg_map(address_map &map); + void monkeyl_map(address_map &map); void winbingo_map(address_map &map); void zoo_map(address_map &map); static const decryption_info dinodino_table; static const decryption_info gostop_table; static const decryption_info magibombd_table; + static const decryption_info monkeyl_table; static const decryption_info winbingo_table; static const decryption_info zoo_table; }; @@ -892,6 +900,22 @@ void zoo_state::gostop_map(address_map &map) // map(0xc00000, 0xc00001).nopr().w(FUNC(zoo_state::screen_enable_w)).umask16(0x00ff); // unknown location } +void zoo_state::monkeyl_map(address_map &map) +{ + map(0x000000, 0x03ffff).rom().mirror(0x800000); // POST checks for ROM checksum at mirror + map(0xa00000, 0xa00fff).ram().share("spriteram"); + map(0xa02000, 0xa02001).nopr().w(FUNC(zoo_state::draw_sprites_w)); + map(0xa04000, 0xa04001).portr("INPUTS"); + map(0xa08001, 0xa08001).w(FUNC(zoo_state::eeprom_w)); + map(0xa0a000, 0xa0a001).w(FUNC(zoo_state::magibomb_outputs_w)); + map(0xa0e000, 0xa0e001).portr("EEPROM_IN"); + map(0xa80000, 0xa83fff).ram().share("nvram"); // battery + map(0xb80000, 0xb80001).portr("CPUCODE_IN"); + map(0xd00000, 0xd001ff).ram().w(m_palette, FUNC(palette_device::write16)).share("palette"); + map(0xd80001, 0xd80001).w(FUNC(zoo_state::oki_bank_w)); + map(0xe80001, 0xe80001).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write)); +} + void astoneag_state::astoneag_map(address_map &map) { map(0x000000, 0x03ffff).rom().mirror(0x800000); // POST checks for ROM checksum at mirror @@ -1315,6 +1339,12 @@ void zoo_state::gostop(machine_config &config) TIMER(config.replace(), "scantimer").configure_scanline(FUNC(zoo_state::irq_2_4_scanline_cb), "screen", 0, 1); } +void zoo_state::monkeyl(machine_config &config) +{ + winbingo(config); + m_maincpu->set_addrmap(AS_PROGRAM, &zoo_state::monkeyl_map); +} + void astoneag_state::ramdac_map(address_map &map) { map(0x000, 0x2ff).rw(m_ramdac, FUNC(ramdac_device::ramdac_pal_r), FUNC(ramdac_device::ramdac_rgb666_w)); @@ -1671,7 +1701,7 @@ ROM_START( magibombd ) ROM_LOAD( "magibombd_cpucode.key", 0x00, 0x02, CRC(ee980d67) SHA1(f3bdb8a14701ec01828f7c92f18e9bba4c56a4e0) ) ROM_END -ROM_START( magibombe ) +ROM_START( magibombe ) // no Bin Laden GFX, supports 8 and 16 min bet ROM_REGION( 0x20000, "maincpu", 0 ) ROM_LOAD16_BYTE( "rom1", 0x00000, 0x10000, CRC(d564fac4) SHA1(ac236a5760be6c4f518a8eb2af708f433e0fb899) ) ROM_LOAD16_BYTE( "rom2", 0x00001, 0x10000, CRC(ee212839) SHA1(e6175b27f3c510e98bc85e04be2fdde6e0289dfb) ) @@ -2203,6 +2233,62 @@ ROM_START( gostopac ) ROM_LOAD( "gostopac_cpucode.key", 0x00, 0x02, NO_DUMP ) ROM_END +/*************************************************************************** + +Monkey Land +Astro Corp. + +***************************************************************************/ + +ROM_START( monkeyl ) + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "1_m.l._aa.21.a.u26", 0x00000, 0x20000, CRC(2286237f) SHA1(cbf6589fe3eedd9482f8ba01c4510a5699085e69) ) // F29C51001T + ROM_LOAD16_BYTE( "1_m.l._aa.21.a.u25", 0x00001, 0x20000, CRC(0612f893) SHA1(6300d9defc75b1b09fad31f719c841c728fe3ff6) ) // F29C51001T + + ROM_REGION( 0x1000000, "sprites", 0 ) + ROM_LOAD( "mx29f1610mc.u26", 0x000000, 0x200000, CRC(dfa57e8f) SHA1(b24849825324695117ceea2d85412f06df96efcf) ) // the "U26" marking is present twice (should have been U31?) + ROM_LOAD( "mx29f1610mc.u30", 0x200000, 0x200000, CRC(9d26fa05) SHA1(571f5515411e504bf7661b8b5d358dc6c55e6fbe) ) + ROM_RELOAD( 0x400000, 0x200000 ) + ROM_RELOAD( 0x600000, 0x200000 ) + ROM_RELOAD( 0x800000, 0x200000 ) + ROM_RELOAD( 0xa00000, 0x200000 ) + ROM_RELOAD( 0xc00000, 0x200000 ) + ROM_RELOAD( 0xe00000, 0x200000 ) + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "5_m.l._e1.0.u33", 0x00000, 0x80000, CRC(62122100) SHA1(519df7825ab62f0648192e6b1760dd9cc5ec7f9f) ) + + ROM_REGION16_LE( 0x80, "eeprom", 0 ) + ROM_LOAD( "93c46.u10", 0x0000, 0x0080, CRC(eab965cc) SHA1(258358c89faaf643b526d1014946e14567cba88d) ) + + ROM_REGION16_LE( 0x02, "astro_cpucode", 0 ) + ROM_LOAD( "monkeyl_cpucode.key", 0x00, 0x02, NO_DUMP ) +ROM_END + +ROM_START( monkeyla ) // MIN BET 1-XXX, % = LEVELS 1-8 + ROM_REGION( 0x40000, "maincpu", 0 ) + ROM_LOAD16_BYTE( "1_m.l._aa.13.b.u26", 0x00000, 0x20000, CRC(0ff56936) SHA1(70f9cf3b6b71514b2401b7a516ae85ad86b5321f) ) // F29C51001T + ROM_LOAD16_BYTE( "1_m.l._aa.13.b.u25", 0x00001, 0x20000, CRC(d261b6ed) SHA1(347feb51b67cd0e0faeff98fa023b3f4a8cb9c32) ) // F29C51001T + + ROM_REGION( 0x1000000, "sprites", 0 ) + ROM_LOAD( "mx29f1610mc.u26", 0x000000, 0x200000, CRC(dfa57e8f) SHA1(b24849825324695117ceea2d85412f06df96efcf) ) // the "U26" marking is present twice (should have been U31?) + ROM_LOAD( "mx29f1610mc.u30", 0x200000, 0x200000, CRC(9d26fa05) SHA1(571f5515411e504bf7661b8b5d358dc6c55e6fbe) ) + ROM_RELOAD( 0x400000, 0x200000 ) + ROM_RELOAD( 0x600000, 0x200000 ) + ROM_RELOAD( 0x800000, 0x200000 ) + ROM_RELOAD( 0xa00000, 0x200000 ) + ROM_RELOAD( 0xc00000, 0x200000 ) + ROM_RELOAD( 0xe00000, 0x200000 ) + + ROM_REGION( 0x80000, "oki", 0 ) + ROM_LOAD( "5_m.l._e1.0.u33", 0x00000, 0x80000, CRC(62122100) SHA1(519df7825ab62f0648192e6b1760dd9cc5ec7f9f) ) + + ROM_REGION16_LE( 0x80, "eeprom", 0 ) + ROM_LOAD( "93c46.u10", 0x0000, 0x0080, CRC(28e861d6) SHA1(4faa4d62954fd9a263d24caa6214353a109ec4f1) ) + + ROM_REGION16_LE( 0x02, "astro_cpucode", 0 ) + ROM_LOAD( "monkeyl_cpucode.key", 0x00, 0x02, NO_DUMP ) +ROM_END void astrocorp_state::init_showhand() { @@ -2592,6 +2678,70 @@ void zoo_state::init_gostop() #endif } +const zoo_state::decryption_info zoo_state::monkeyl_table = { + { + { + { 8, 9, 10 }, + { + { { 7, 5, 4, 6, 0, 3, 2, 1 }, 0x00 }, + { { 1, 4, 6, 0, 2, 5, 3, 7 }, 0xd0 }, + { { 1, 7, 4, 3, 6, 5, 0, 2 }, 0x88 }, + { { 6, 5, 2, 3, 7, 1, 0, 4 }, 0xd1 }, + { { 6, 1, 7, 2, 4, 0, 3, 5 }, 0x64 }, + { { 1, 7, 2, 6, 5, 4, 3, 0 }, 0x83 }, + { { 6, 7, 4, 2, 5, 0, 1, 3 }, 0x81 }, + { { 7, 5, 1, 0, 2, 4, 6, 3 }, 0xea }, + } + }, + { + { 12, 9, 11 }, + { + { { 6, 5, 4, 3, 2, 1, 0, 7 }, 0x90 }, + { { 2, 4, 0, 7, 5, 6, 3, 1 }, 0x32 }, + { { 7, 1, 0, 6, 5, 2, 3, 4 }, 0xa9 }, + { { 2, 0, 3, 5, 1, 4, 6, 7 }, 0xa2 }, + { { 3, 0, 6, 5, 2, 1, 4, 7 }, 0x02 }, + { { 0, 1, 6, 4, 5, 2, 7, 3 }, 0x30 }, + { { 3, 5, 2, 7, 6, 1, 4, 0 }, 0x0a }, + { { 0, 6, 4, 2, 7, 3, 1, 5 }, 0x81 }, + } + } + }, + { 12, 10, 8, 11, 9, 7, 5, 3, 6, 2, 4 } +}; + +void zoo_state::init_monkeyl() +{ + decrypt_rom(monkeyl_table); +#if 1 + // TODO: There's more stuff happening for addresses < 0x400... + // override reset vector for now + u16 * const rom = (u16 *)memregion("maincpu")->base(); + rom[0x00004/2] = 0x0000; + rom[0x00006/2] = 0x0470; + + rom[0x00400/2] = 0x4e75; // overlay!? + + rom[0x01352/2] = 0x4e75; // Mirror ROM word checksum (it expects 0) +#endif +} + +void zoo_state::init_monkeyla() +{ + decrypt_rom(monkeyl_table); +#if 1 + // TODO: There's more stuff happening for addresses < 0x400... + // override reset vector for now + u16 * const rom = (u16 *)memregion("maincpu")->base(); + rom[0x00004/2] = 0x0000; + rom[0x00006/2] = 0x0470; + + rom[0x00400/2] = 0x4e75; // overlay!? + + rom[0x01334/2] = 0x4e75; // Mirror ROM word checksum (it expects 0) +#endif +} + const astoneag_state::decryption_info astoneag_state::astoneag_table = { { { @@ -2677,6 +2827,8 @@ GAMEL( 2004, zoo, 0, zoo, magibombd, zoo_state, init_z GAME( 2004, gostopac, 0, gostop, dinodino, zoo_state, init_gostop, ROT0, "Astro Corp.", "Go & Stop", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING ) GAMEL( 2005, dinodino, 0, dinodino, dinodino, zoo_state, init_dinodino, ROT0, "Astro Corp.", "Dino Dino (Ver. A1.1, 01/13/2005)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION, layout_dinodino ) // 13/01.2005 10:59 GAMEL( 2005, astoneag, 0, astoneag, astoneag, astoneag_state, init_astoneag, ROT0, "Astro Corp.", "Stone Age (Astro, Ver. EN.03.A, 2005/02/21)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION, layout_astoneag ) +GAME( 2005, monkeyl, 0, monkeyl, magibombd, zoo_state, init_monkeyl, ROT0, "Astro Corp.", "Monkey Land (Ver. AA.21.A)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING ) // 18/02/2005 15:47 +GAME( 2004, monkeyla, monkeyl, monkeyl, magibombd, zoo_state, init_monkeyla, ROT0, "Astro Corp.", "Monkey Land (Ver. AA.13.B)", MACHINE_SUPPORTS_SAVE | MACHINE_UNEMULATED_PROTECTION | MACHINE_NOT_WORKING ) // 23/04/2004 14:57 GAMEL( 2005, magibombd, magibomb, magibombd, magibombd, zoo_state, init_magibombd, ROT0, "Astro Corp.", "Magic Bomb (Ver. AA.72.D, 14/11/05)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING, layout_magibombb ) // 15/11/05 09:31 GAMEL( 2005, magibombj, magibomb, magibombd, magibombd, zoo_state, init_magibombd, ROT0, "Astro Corp.", "Magic Bomb (Ver. AA.72.C, 25/05/05)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING, layout_magibombb ) // 25/05/05 11:26 GAMEL( 2004, magibombg, magibomb, magibombg, magibombg, zoo_state, init_magibombg, ROT0, "Astro Corp.", "Magic Bomb (Ver. NB6.1, 26/04/04)", MACHINE_SUPPORTS_SAVE | MACHINE_NOT_WORKING, layout_magibomb ) // 26/04/04. Undumped sprite ROM diff --git a/src/mame/misc/changyu.cpp b/src/mame/misc/changyu.cpp index bf3c140f7f2a2..3a8117fda9475 100644 --- a/src/mame/misc/changyu.cpp +++ b/src/mame/misc/changyu.cpp @@ -132,7 +132,7 @@ void changyu_state::video_start() { m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(changyu_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); -// m_bg_tilemap->set_transparent_pen(0); +// m_bg_tilemap->set_transparent_pen(0); } uint32_t changyu_state::screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect) @@ -229,7 +229,7 @@ void changyu_state::changyu(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &changyu_state::main_map); I8751(config, m_mcu, XTAL(8'000'000)); -// m_mcu->set_disable(); +// m_mcu->set_disable(); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); @@ -261,7 +261,7 @@ void changyu_state::changyu2(machine_config &config) m_maincpu->set_addrmap(AS_PROGRAM, &changyu_state::main2_map); I87C51(config.replace(), m_mcu, XTAL(8'000'000)); -// m_mcu->set_disable(); +// m_mcu->set_disable(); YM2413(config, "ymsnd", 3.579545_MHz_XTAL).add_route(ALL_OUTPUTS, "mono", 1.0); } diff --git a/src/mame/misc/cowtipping.cpp b/src/mame/misc/cowtipping.cpp index a9f42873bdb4d..fab09811389d2 100644 --- a/src/mame/misc/cowtipping.cpp +++ b/src/mame/misc/cowtipping.cpp @@ -89,7 +89,7 @@ void cowtipping_state::cowtipping(machine_config &config) PIC16C56(config, "pic", 4000000); // Actually PIC12C508/P, clock not verified -// TODO: AMD_29LV640MB (64 MBit with Boot Sector) +// TODO: AMD_29LV640MB (64 MBit with Boot Sector) screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); // wrong screen.set_refresh_hz(60); diff --git a/src/mame/misc/eva.cpp b/src/mame/misc/eva.cpp index 010f485063caf..6064989a77c17 100644 --- a/src/mame/misc/eva.cpp +++ b/src/mame/misc/eva.cpp @@ -86,11 +86,11 @@ class eva24_state : public base_state // devices required_device m_maincpu; + u8 m_g = 0; + u8 read_g(); void write_g(u8 data); void write_d(u8 data); - - u8 m_g = 0; }; void eva24_state::machine_start() diff --git a/src/mame/misc/istellar.cpp b/src/mame/misc/istellar.cpp index 6ae99e681abdc..abdbeab2fa4a3 100644 --- a/src/mame/misc/istellar.cpp +++ b/src/mame/misc/istellar.cpp @@ -12,12 +12,12 @@ Driver by Andrew Gardner with help from Daphne Source 6-pin dip switches with odd handling inverted DIP logic? CPU2 maps RAM over where its ROM lives + To skip LD boot: bp 4458,1,{pc=0x447a;g} + Then fill $a074 with 1 to go in attract mode Todo: How does one best make one DIP switch bit from address 0x02 tie to two bits from address 0x03? Get real ROM labels! The current labels are unfortunately a bit odd. - Add sprite drawing. - Convert to tilemaps. Make it work - this one should be close right now :/. istellar2 fails test for all the main CPU ROMs. Maybe because it's a prototype? */ @@ -30,7 +30,7 @@ Driver by Andrew Gardner with help from Daphne Source #include "emupal.h" #include "speaker.h" - +#include "tilemap.h" // configurable logging #define LOG_CPU2 (1U << 1) @@ -61,8 +61,11 @@ class istellar_state : public driver_device void init_istellar(); void istellar(machine_config &config); + DECLARE_INPUT_CHANGED_MEMBER(coin_inserted); + protected: virtual void machine_start() override; + virtual void video_start() override; private: required_device m_maincpu; @@ -75,6 +78,15 @@ class istellar_state : public driver_device required_shared_ptr m_tile_control_ram; required_shared_ptr m_sprite_ram; + tilemap_t *m_fg_tilemap = nullptr; + TILE_GET_INFO_MEMBER(get_tile_info); + + void tile_w(offs_t offset, uint8_t data); + void attr_w(offs_t offset, uint8_t data); + void overlay_control_w(uint8_t data); + + u8 m_overlay_ctrl = 0; + uint8_t z80_2_ldp_read(); uint8_t z80_2_unknown_read(); void z80_2_ldp_write(uint8_t data); @@ -88,27 +100,64 @@ class istellar_state : public driver_device void z80_2_mem(address_map &map); }; +void istellar_state::tile_w(offs_t offset, uint8_t data) +{ + m_tile_ram[offset] = data; + m_fg_tilemap->mark_tile_dirty(offset); +} + +void istellar_state::attr_w(offs_t offset, uint8_t data) +{ + m_tile_control_ram[offset] = data; + m_fg_tilemap->mark_tile_dirty(offset); +} + + +TILE_GET_INFO_MEMBER(istellar_state::get_tile_info) +{ + const u8 code = m_tile_ram[tile_index]; + const u8 color = m_tile_control_ram[tile_index] & 0xf; + tileinfo.set(0, code, color, 0); +} + +void istellar_state::video_start() +{ + m_fg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(istellar_state::get_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 32, 32); + + m_fg_tilemap->set_transparent_pen(0); +} -// VIDEO GOODS uint32_t istellar_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - // clear - bitmap.fill(0, cliprect); + // TODO: should really draw transparent when bit 7 disabled, also gradient to be verified. + // (May actually be an opaque flag for tilemap + pal bank?) + bitmap.fill(BIT(m_overlay_ctrl, 7) ? rgb_t(0x00, 0x00, 0xff) : rgb_t(0, 0, 0), cliprect); - // Draw tiles - for (int y = 0; y < 32; y++) - { - for (int x = 0; x < 32; x++) - { - int tile = m_tile_ram[x + y * 32]; - int attr = m_tile_control_ram[x + y * 32]; + m_fg_tilemap->draw(screen, bitmap, cliprect, 0, 0); - m_gfxdecode->gfx(0)->transpen(bitmap, cliprect, tile, attr & 0x0f, 0, 0, x * 8, y * 8, 0); - } + // sprites, above tilemap according to PCB refs for both games + // (Daphne is wrong and draws below, unless a bit is set for enemy sprites?) + for (int i = 0; i < m_sprite_ram.bytes(); i += 4) + { + u8 const attr = m_sprite_ram[i + 2]; + // FIXME: any of the unused bits disables drawing + if (attr == 0xff) + continue; + int y = 0xf0 - m_sprite_ram[i + 0]; + int x = m_sprite_ram[i + 3]; + u8 const code = m_sprite_ram[i + 1]; + u8 const color = attr & 0x1f; + int flipx = attr & 0x40; + + m_gfxdecode->gfx(1)->transpen( + bitmap, cliprect, + code, color, + flipx, 0, + x, y, + 0 + ); } - // TODO: Draw sprites - return 0; } @@ -145,16 +194,21 @@ void istellar_state::z80_2_ldp_write(uint8_t data) m_laserdisc->data_w(data); } - +void istellar_state::overlay_control_w(uint8_t data) +{ + m_overlay_ctrl = data; + if (data & 0x7f) + logerror("overlay_control_w: %02x\n", data); +} // PROGRAM MAPS void istellar_state::z80_0_mem(address_map &map) { map(0x0000, 0x9fff).rom(); map(0xa000, 0xa7ff).ram(); - map(0xa800, 0xabff).ram().share(m_tile_ram); - map(0xac00, 0xafff).ram().share(m_tile_control_ram); - map(0xb000, 0xb3ff).ram().share(m_sprite_ram); + map(0xa800, 0xabff).ram().w(FUNC(istellar_state::tile_w)).share(m_tile_ram); + map(0xac00, 0xafff).ram().w(FUNC(istellar_state::attr_w)).share(m_tile_control_ram); + map(0xb000, 0xb1ff).ram().share(m_sprite_ram); } void istellar_state::z80_1_mem(address_map &map) @@ -178,7 +232,7 @@ void istellar_state::z80_0_io(address_map &map) map(0x00, 0x00).portr("IN0"); map(0x02, 0x02).portr("DSW1"); map(0x03, 0x03).portr("DSW2"); -// map(0x04, 0x04).w(FUNC(istellar_state::volatile_palette_write)); + map(0x04, 0x04).w(FUNC(istellar_state::overlay_control_w)); map(0x05, 0x05).r("latch1", FUNC(generic_latch_8_device::read)).w("latch2", FUNC(generic_latch_8_device::write)); } @@ -199,6 +253,10 @@ void istellar_state::z80_2_io(address_map &map) // map(0x03, 0x03).w(FUNC(istellar_state::z80_2_ldtrans_write)); } +INPUT_CHANGED_MEMBER(istellar_state::coin_inserted) +{ + m_maincpu->set_input_line(INPUT_LINE_NMI, newval ? CLEAR_LINE : ASSERT_LINE); +} // PORTS static INPUT_PORTS_START( istellar ) @@ -241,8 +299,8 @@ static INPUT_PORTS_START( istellar ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_SERVICE_NO_TOGGLE( 0x08, IP_ACTIVE_HIGH ) - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_COIN2 ) PORT_CHANGED_MEMBER(DEVICE_SELF, istellar_state, coin_inserted, 0) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_CHANGED_MEMBER(DEVICE_SELF, istellar_state, coin_inserted, 0) PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START2 ) PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_START1 ) @@ -256,19 +314,31 @@ static INPUT_PORTS_START( istellar ) // SERVICE might be hanging out back here INPUT_PORTS_END -static const gfx_layout istellar_gfx_layout = +static const gfx_layout layout_8x8 = { 8,8, RGN_FRAC(1,3), 3, { RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) }, - { 0,1,2,3,4,5,6,7 }, - { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8 }, + { STEP8(0, 1) }, + { STEP8(0, 8) }, 8*8 }; +static const gfx_layout layout_16x16 = +{ + 16, 16, + RGN_FRAC(1,3), + 3, + { RGN_FRAC(0,3), RGN_FRAC(1,3), RGN_FRAC(2,3) }, + { STEP8(0, 1), STEP8(8*8, 1) }, + { STEP8(0, 8), STEP8(8*8*2, 8) }, + 16*16 +}; + static GFXDECODE_START( gfx_istellar ) - GFXDECODE_ENTRY( "tiles", 0, istellar_gfx_layout, 0x0, 0x20 ) + GFXDECODE_ENTRY( "tiles", 0, layout_8x8, 0x0, 0x20 ) + GFXDECODE_ENTRY( "tiles", 0, layout_16x16, 0x0, 0x20 ) GFXDECODE_END void istellar_state::vblank_irq(int state) diff --git a/src/mame/misc/mirderby.cpp b/src/mame/misc/mirderby.cpp index a9ca9d312a5ed..ea77e56c62fed 100644 --- a/src/mame/misc/mirderby.cpp +++ b/src/mame/misc/mirderby.cpp @@ -27,7 +27,7 @@ actually a CPU. Is this a bootleg of an Home Data original? Notes from Stefan Lindberg: -Eprom "x70_a04.5g" had wires attached to it, pin 2 and 16 was joined and pin 1,32,31,30 was joined, +Eprom "x70_a04.5g" had wires attached to it, pin 2 and 16 was joined and pin 1,32,31,30 was joined, i removed them and read the eprom as the type it was (D27c1000D). Measured frequencies: @@ -89,7 +89,7 @@ class mirderby_state : public driver_device , m_subcpu(*this, "subcpu") , m_x70coincpu(*this, "audiocpu") , m_ymsnd(*this, "ymsnd") -// , m_vreg(*this, "vreg") +// , m_vreg(*this, "vreg") , m_screen(*this, "screen") , m_videoram(*this, "videoram") , m_spriteram(*this, "spriteram") @@ -107,13 +107,13 @@ class mirderby_state : public driver_device void mirderby(machine_config &config); private: -// optional_region_ptr m_blit_rom; +// optional_region_ptr m_blit_rom; required_device m_maincpu; required_device m_subcpu; required_device m_x70coincpu; optional_device m_ymsnd; -// optional_shared_ptr m_vreg; +// optional_shared_ptr m_vreg; required_device m_screen; required_shared_ptr m_videoram; required_shared_ptr m_spriteram; @@ -150,9 +150,9 @@ class mirderby_state : public driver_device void x70coin_io(address_map &map); tilemap_t *m_bg_tilemap{}; -// int m_visible_page = 0; -// int m_priority = 0; -// [[maybe_unused]] int m_flipscreen = 0; +// int m_visible_page = 0; +// int m_priority = 0; +// [[maybe_unused]] int m_flipscreen = 0; u8 m_prot_data = 0; u8 m_latch = 0; u16 m_gfx_flip = 0; @@ -191,7 +191,7 @@ void mirderby_state::video_start() { m_bg_tilemap = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(mirderby_state::get_bg_tile_info)), TILEMAP_SCAN_ROWS, 8, 8, 64, 32); -// m_bg_tilemap->set_transparent_pen(0); +// m_bg_tilemap->set_transparent_pen(0); } TILE_GET_INFO_MEMBER(mirderby_state::get_bg_tile_info) @@ -233,7 +233,7 @@ void mirderby_state::draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprec // TODO: missing sprites (signed wraparound?) //if (attr == 0) - // continue; + // continue; // draws in block strips of 16x16 const u8 tile_offs[4] = { 0, 1, 0x10, 0x11 }; @@ -319,7 +319,7 @@ void mirderby_state::shared_map(address_map &map) map(0x7000, 0x77ff).ram().share("nvram"); map(0x7800, 0x7800).rw(FUNC(mirderby_state::prot_r), FUNC(mirderby_state::prot_w)); //0x7ff0 onward seems CRTC -// map(0x7ff0, 0x7ff?).writeonly().share("vreg"); +// map(0x7ff0, 0x7ff?).writeonly().share("vreg"); map(0x7ff2, 0x7ff2).portr("SYSTEM"); map(0x7ff9, 0x7ffa).lr8( NAME([this] (offs_t offset) { @@ -372,7 +372,7 @@ void mirderby_state::shared_map(address_map &map) ); map(0x7fff, 0x7fff).lrw8( NAME([this] () { - // 0x7fff $e / $f writes -> DSW reads + // 0x7fff $e / $f writes -> DSW reads return m_ymsnd->read(1); }), NAME([this] (u8 data) { @@ -635,11 +635,11 @@ void mirderby_state::mirderby(machine_config &config) /* basic machine hardware */ MC6809E(config, m_maincpu, 16000000/8); /* MBL68B09E 2 Mhz */ m_maincpu->set_addrmap(AS_PROGRAM, &mirderby_state::main_map); -// m_maincpu->set_vblank_int("screen", FUNC(mirderby_state::homedata_irq)); +// m_maincpu->set_vblank_int("screen", FUNC(mirderby_state::homedata_irq)); MC6809E(config, m_subcpu, 16000000/8); /* MBL68B09E 2 Mhz */ m_subcpu->set_addrmap(AS_PROGRAM, &mirderby_state::sub_map); -// m_subcpu->set_vblank_int("screen", FUNC(mirderby_state::homedata_irq)); +// m_subcpu->set_vblank_int("screen", FUNC(mirderby_state::homedata_irq)); // im 0, doesn't bother in setting a vector table, // should just require a NMI from somewhere ... @@ -657,11 +657,11 @@ void mirderby_state::mirderby(machine_config &config) PIT8253(config, m_coin_pit, 0); m_coin_pit->set_clk<0>(XTAL(16'000'000) / 8); m_coin_pit->out_handler<0>().set_inputline(m_x70coincpu, INPUT_LINE_NMI); -// m_coin_pit->set_clk<1>(XTAL(16'000'000) / 8); -// m_coin_pit->set_clk<2>(XTAL(16'000'000) / 8); +// m_coin_pit->set_clk<1>(XTAL(16'000'000) / 8); +// m_coin_pit->set_clk<2>(XTAL(16'000'000) / 8); NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_1); -// config.set_maximum_quantum(attotime::from_hz(6000)); +// config.set_maximum_quantum(attotime::from_hz(6000)); config.set_perfect_quantum("maincpu"); SCREEN(config, m_screen, SCREEN_TYPE_RASTER); diff --git a/src/mame/misc/poker72.cpp b/src/mame/misc/poker72.cpp index 6897d31494c89..ed3e9650ad9af 100644 --- a/src/mame/misc/poker72.cpp +++ b/src/mame/misc/poker72.cpp @@ -1,22 +1,33 @@ // license:BSD-3-Clause // copyright-holders:David Haywood, Angelo Salese -/************************************************************************************************ - Poker Monarch +/************************************************************************************************** - GFX ROMs contain - 'Extrema Systems International Ltd' - as well as a logo for the company. +Poker Monarch - There are also 'Lucky Boy' graphics in various places. +GFX ROMs contain +'Extrema Systems International Ltd' +as well as a logo for the company. - * Turn on all the dips of SW1 - * Restart game - * If it says ERROR OF RAM GAME STOP, press F2 - * When you get a blank blue screen Press Alt+2 - * This gives a setup screen. Press F2 to see cards and logo (and it beeps) - * Depending on settings of SW1, you can get other cards, or other test screens. +There are also 'Lucky Boy' graphics in various places. -*************************************************************************************************/ +TODO: +- NVRAM; +- Doesn't initialize properly, cfr. 892314112 for total out and coins out in Analyzer, + not even with "clear page" button; +- Coin in doesn't work, accepts key-in from IPT_SERVICE1 only + (hold it then press any of the IPT_POKER_HOLD); +- Crashes or starts corrupting graphics after some time of gameplay; +- $fe08-$fe0b looks PPI? +- Reads at $ffff are very suspicious, joins value with R register and puts it to $c3ff (!?) +- Requires ROM patch to avoid a tight loop at boot; +- Demo Sound enabled doesn't produce any sound (?) + +Notes: +- On first boot it will moan about uninitailized RAM, enable service mode then + press all five hold buttons at same time + (game is fussy on being exactly pressed together) + +**************************************************************************************************/ #include "emu.h" @@ -137,12 +148,12 @@ void poker72_state::prg_map(address_map &map) map(0xe000, 0xefff).ram().share(m_vram); map(0xf000, 0xfbff).ram().w(FUNC(poker72_state::paletteram_w)).share(m_pal); map(0xfc00, 0xfdff).ram(); //??? - map(0xfe08, 0xfe08).portr("SW1"); + map(0xfe08, 0xfe08).portr("DSW1"); map(0xfe09, 0xfe09).portr("IN1"); map(0xfe0a, 0xfe0a).portr("IN2"); - map(0xfe0c, 0xfe0c).portr("SW4"); - map(0xfe0d, 0xfe0d).portr("SW5"); - map(0xfe0e, 0xfe0e).portr("SW6"); + map(0xfe0c, 0xfe0c).portr("DSW4"); + map(0xfe0d, 0xfe0d).portr("DSW5"); + map(0xfe0e, 0xfe0e).portr("DSW6"); map(0xfe17, 0xfe17).nopr(); //irq ack map(0xfe20, 0xfe20).w(FUNC(poker72_state::output_w)); //output, irq enable? @@ -166,181 +177,155 @@ fe24 w static INPUT_PORTS_START( poker72 ) - PORT_START("SW1") - PORT_DIPNAME( 0x01, 0x00, "SW1" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - PORT_START("IN1") - PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_POKER_HOLD1 ) // Z - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_POKER_HOLD2 ) // X - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_POKER_HOLD3 ) // C - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_POKER_HOLD4 ) // V - PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_POKER_HOLD5 ) // B - PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON3 ) PORT_NAME("M. Bet") - PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_COIN1 ) - PORT_BIT( 0x0080, IP_ACTIVE_HIGH, IPT_BUTTON1 ) PORT_NAME("Black") - + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) // Z + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) // X + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) // C + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) // V + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) // B + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("M. Bet") + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("Black") PORT_START("IN2") - PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_BUTTON2 ) PORT_NAME("Red") - PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_GAMBLE_D_UP ) - PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_GAMBLE_TAKE ) - PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_GAMBLE_DEAL ) // '2' - PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_GAMBLE_BET ) // M - PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_COIN2 ) - PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_SERVICE1 ) // '9' - PORT_SERVICE( 0x0080, IP_ACTIVE_HIGH ) // F2 - - PORT_START("SW4") - PORT_DIPNAME( 0x01, 0x00, "SW4" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - PORT_START("SW5") - PORT_DIPNAME( 0x01, 0x00, "SW5" ) + PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("Red") + PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) + PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) + PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) // '2' + PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) // M + PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_COIN2 ) + PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_SERVICE1 ) // '9' + PORT_SERVICE( 0x0080, IP_ACTIVE_LOW ) // F2 + + // FIXME: defaults from manual + PORT_START("DSW1") + PORT_DIPNAME( 0x03, 0x03, "Operation Mode" ) PORT_DIPLOCATION("SW1:1,2") + PORT_DIPSETTING( 0x00, "Input Test" ) + PORT_DIPSETTING( 0x01, "Cross Hatch" ) + PORT_DIPSETTING( 0x02, "Color Test" ) + PORT_DIPSETTING( 0x03, "Game / Analyzer" ) // latter enables with Service Mode + PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:3") + PORT_DIPNAME( 0x08, 0x08, "Auto Hold" ) PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING( 0x08, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW1:5") + PORT_DIPNAME( 0x60, 0x60, "Back of Cards" ) PORT_DIPLOCATION("SW1:6,7") + PORT_DIPSETTING( 0x00, "Type 1" ) + PORT_DIPSETTING( 0x20, "Type 2" ) + PORT_DIPSETTING( 0x40, "Type 3" ) + PORT_DIPSETTING( 0x60, "Type 4" ) + PORT_DIPNAME( 0x80, 0x80, "Keyboard" ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x80, "A" ) // input type extended + PORT_DIPSETTING( 0x00, "B" ) + + PORT_START("DSW2") + PORT_DIPNAME( 0x07, 0x07, "Minimal Bet" ) PORT_DIPLOCATION("SW2:1,2,3") + PORT_DIPSETTING( 0x07, "1" ) + PORT_DIPSETTING( 0x06, "2" ) + PORT_DIPSETTING( 0x05, "5" ) + PORT_DIPSETTING( 0x04, "10" ) + PORT_DIPSETTING( 0x03, "20" ) + PORT_DIPSETTING( 0x02, "30" ) + PORT_DIPSETTING( 0x01, "50" ) + PORT_DIPSETTING( 0x00, "100" ) + PORT_DIPNAME( 0x08, 0x08, "Maximum Bet" ) PORT_DIPLOCATION("SW2:4") + PORT_DIPSETTING( 0x08, "100" ) + PORT_DIPSETTING( 0x00, "500" ) + PORT_DIPNAME( 0x30, 0x30, "Main Game" ) PORT_DIPLOCATION("SW2:5,6") + PORT_DIPSETTING( 0x30, "Type 1" ) + PORT_DIPSETTING( 0x20, "Type 2" ) + PORT_DIPSETTING( 0x10, "Type 3" ) + PORT_DIPSETTING( 0x00, "Type 4" ) + PORT_DIPUNUSED_DIPLOC( 0x40, 0x40, "SW2:7") + PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW2:8") + + PORT_START("DSW3") + PORT_DIPNAME( 0x01, 0x01, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("SW3:1") PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - PORT_START("SW6") - PORT_DIPNAME( 0x01, 0x00, "SW6" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - - - PORT_START("SW2") - PORT_DIPNAME( 0x01, 0x00, "SW2" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - - PORT_START("SW3") - PORT_DIPNAME( 0x01, 0x00, "SW3" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, "Erotic Mode" ) PORT_DIPLOCATION("SW3:2") + PORT_DIPSETTING( 0x02, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW3:3") + PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW3:4") + PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW3:5") + PORT_DIPUNUSED_DIPLOC( 0x20, 0x20, "SW3:6") + PORT_DIPNAME( 0xc0, 0xc0, "Background Color" ) PORT_DIPLOCATION("SW3:7,8") + PORT_DIPSETTING( 0x00, "Type 1" ) + PORT_DIPSETTING( 0x40, "Type 2" ) + PORT_DIPSETTING( 0x80, "Type 3" ) + PORT_DIPSETTING( 0xc0, "Type 4" ) + + PORT_START("DSW4") + PORT_DIPNAME( 0x03, 0x03, "Super Jackpot Percent" ) PORT_DIPLOCATION("SW4:1,2") + PORT_DIPSETTING( 0x03, "0%" ) + PORT_DIPSETTING( 0x02, "2%" ) + PORT_DIPSETTING( 0x01, "5%" ) + PORT_DIPSETTING( 0x00, "10%" ) + PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW4:3") + PORT_DIPUNUSED_DIPLOC( 0x08, 0x08, "SW4:4") + PORT_DIPUNUSED_DIPLOC( 0x10, 0x10, "SW4:5") + PORT_DIPNAME( 0xe0, 0xe0, "Credit Limit" ) PORT_DIPLOCATION("SW4:6,7,8") + PORT_DIPSETTING( 0x00, DEF_STR( None ) ) + PORT_DIPSETTING( 0x20, "500000" ) + PORT_DIPSETTING( 0x40, "200000" ) + PORT_DIPSETTING( 0x60, "100000" ) + PORT_DIPSETTING( 0x80, "50000" ) + PORT_DIPSETTING( 0xa0, "20000" ) + PORT_DIPSETTING( 0xc0, "10000" ) + PORT_DIPSETTING( 0xe0, "5000" ) + + PORT_START("DSW5") + PORT_DIPNAME( 0x07, 0x07, "Coin In Rate" ) PORT_DIPLOCATION("SW5:1,2,3") + PORT_DIPSETTING( 0x07, "1" ) + PORT_DIPSETTING( 0x06, "2" ) + PORT_DIPSETTING( 0x05, "5" ) + PORT_DIPSETTING( 0x04, "10" ) + PORT_DIPSETTING( 0x03, "20" ) + PORT_DIPSETTING( 0x02, "50" ) + PORT_DIPSETTING( 0x01, "100" ) + PORT_DIPSETTING( 0x00, "200" ) + PORT_DIPNAME( 0x08, 0x08, "Coin In Level" ) PORT_DIPLOCATION("SW5:4") + PORT_DIPSETTING( 0x08, "Low" ) + PORT_DIPSETTING( 0x00, "High" ) + PORT_DIPNAME( 0x10, 0x10, "Hopper Switch Level" ) PORT_DIPLOCATION("SW5:5") + PORT_DIPSETTING( 0x10, "Low" ) + PORT_DIPSETTING( 0x00, "High" ) + PORT_DIPNAME( 0x60, 0x60, "Hopper Limit" ) PORT_DIPLOCATION("SW5:6,7") + PORT_DIPSETTING( 0x00, "400" ) + PORT_DIPSETTING( 0x20, "800" ) + PORT_DIPSETTING( 0x40, "1200" ) + PORT_DIPSETTING( 0x60, DEF_STR( None ) ) + PORT_DIPNAME( 0x80, 0x80, "Pay Out Mode" ) PORT_DIPLOCATION("SW5:8") + PORT_DIPSETTING( 0x80, "Manual" ) + PORT_DIPSETTING( 0x00, "Automatic" ) + + PORT_START("DSW6") + // TODO: following takes the full SW6 bank for ID! + PORT_DIPNAME( 0x01, 0x01, "Network Number ID" ) PORT_DIPLOCATION("SW6:1") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:2") + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:3") + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:4") + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:5") + PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:6") + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:7") + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPLOCATION("SW6:8") + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) INPUT_PORTS_END static const gfx_layout tiles8x8_layout = @@ -390,8 +375,8 @@ void poker72_state::poker72(machine_config &config) SPEAKER(config, "mono").front_center(); ay8910_device &ay(AY8910(config, "ay", 8000000 / 8)); // ? Mhz - ay.port_a_read_callback().set_ioport("SW2"); - ay.port_b_read_callback().set_ioport("SW3"); + ay.port_a_read_callback().set_ioport("DSW2"); + ay.port_b_read_callback().set_ioport("DSW3"); ay.add_route(ALL_OUTPUTS, "mono", 0.50); } diff --git a/src/mame/misc/rfslots8085.cpp b/src/mame/misc/rfslots8085.cpp index 9163c7e75f6a7..75b3cafb1d36f 100644 --- a/src/mame/misc/rfslots8085.cpp +++ b/src/mame/misc/rfslots8085.cpp @@ -671,7 +671,7 @@ u8 rfslots8085_state::kbd_rl_r() { m_lamps[18] = 109 * (1 + ( sin( (m_reel->get_pos() * 0.0628) - 1.57079))); // layout scale m_lamps[19] = m_reel->get_pos() % 3; -// logerror("%s: Anim. Bingo Roller: L18:%d - L19:%02x - pos:%d\n", machine().time().as_string(), m_lamps[18], m_lamps[19], m_reel->get_pos()); +// logerror("%s: Anim. Bingo Roller: L18:%d - L19:%02x - pos:%d\n", machine().time().as_string(), m_lamps[18], m_lamps[19], m_reel->get_pos()); } // Keyboard read (only scan line 0 is used) diff --git a/src/mame/misc/rfslotsmcs48.cpp b/src/mame/misc/rfslotsmcs48.cpp index 46abf9ca4fa37..2795c75774500 100644 --- a/src/mame/misc/rfslotsmcs48.cpp +++ b/src/mame/misc/rfslotsmcs48.cpp @@ -41,7 +41,7 @@ - Discover and emulate 100 Pts. coin in action, done by an owner hack in mainboard with a 74ls164. This 100 Pts. hack accepts this coin and gives back three 25 Pts. - coins as change, then only plays 25 Pts. as bet. + coins as change, then only plays 25 Pts. as bet. - Complete Baby Fruits 25 pts. emulation, partially emulated due to a bad dump of the main CPU ROM. @@ -745,26 +745,26 @@ void rfslotsmcs48_state::babyfrts(machine_config &config) m_sndbfcpu->p1_out_cb().set(FUNC(rfslotsmcs48_state::sound_p1_w)); m_sndbfcpu->p2_in_cb().set(FUNC(rfslotsmcs48_state::sound_p2_r)); -// I8243, m_ioexp[0]; PIA 1: fruits projectors +// I8243, m_ioexp[0]; PIA 1: fruits projectors m_ioexp[0]->p4_out_cb().set(FUNC(rfslotsmcs48_state::proy_1_w)); // left m_ioexp[0]->p5_out_cb().set(FUNC(rfslotsmcs48_state::proy_2_w)); // center m_ioexp[0]->p6_out_cb().set(FUNC(rfslotsmcs48_state::proy_3_w)); // right m_ioexp[0]->p7_out_cb().set(FUNC(rfslotsmcs48_state::exp1_p7_w)); // sound Reset + Int -// I8243, m_ioexp[1]; PIA 2 +// I8243, m_ioexp[1]; PIA 2 m_ioexp[1]->p4_out_cb().set(FUNC(rfslotsmcs48_state::exp2_p4_w)); // coils and EM counters m_ioexp[1]->p5_out_cb().set(FUNC(rfslotsmcs48_state::exp2_p5_w)); // game lights m_ioexp[1]->p6_out_cb().set(FUNC(rfslotsmcs48_state::exp2_p6_w)); // push buttons lights m_ioexp[1]->p7_out_cb().set(FUNC(rfslotsmcs48_state::exp2_p7_w)); // sound codes m_ioexp[1]->p7_in_cb().set(FUNC(rfslotsmcs48_state::exp2_p7_r)); // sound handshake -// I8243, m_ioexp[3]; PIA 4 +// I8243, m_ioexp[3]; PIA 4 m_ioexp[3]->p4_in_cb().set_ioport("IN0"); m_ioexp[3]->p5_in_cb().set_ioport("IN1"); m_ioexp[3]->p6_in_cb().set_ioport("IN4"); // SWA m_ioexp[3]->p7_in_cb().set_ioport("IN2"); -// I8243, m_ioexp[4]; PIA 5 +// I8243, m_ioexp[4]; PIA 5 m_ioexp[4]->p4_out_cb().set(FUNC(rfslotsmcs48_state::exp5_p4_w)); // Selector 1-16 m_ioexp[4]->p5_in_cb().set_ioport("IN5"); // SWB m_ioexp[4]->p7_in_cb().set_ioport("IN3"); @@ -787,26 +787,26 @@ void rfslotsmcs48_state::ajofrin(machine_config &config) m_sndajcpu->p1_out_cb().set("dac", FUNC(dac_byte_interface::data_w)); m_sndajcpu->p2_in_cb().set(FUNC(rfslotsmcs48_state::sound_p2_r)); -// I8243, m_ioexp[0]; PIA 1 +// I8243, m_ioexp[0]; PIA 1 m_ioexp[0]->p4_out_cb().set(FUNC(rfslotsmcs48_state::proy_1_w)); // to verify left projector m_ioexp[0]->p5_out_cb().set(FUNC(rfslotsmcs48_state::proy_2_w)); // to verify center projector m_ioexp[0]->p6_out_cb().set(FUNC(rfslotsmcs48_state::proy_3_w)); // to verify right projector - There is an extra projector. To be found. m_ioexp[0]->p7_out_cb().set(FUNC(rfslotsmcs48_state::aj_exp1_p7_w)); // sound + int to verify -// I8243, m_ioexp[1]; PIA 2 +// I8243, m_ioexp[1]; PIA 2 m_ioexp[1]->p4_out_cb().set(FUNC(rfslotsmcs48_state::exp2_p4_w)); // coils and EM counters - idem bfr m_ioexp[1]->p5_out_cb().set(FUNC(rfslotsmcs48_state::exp2_p5_w)); // game lights - idem bfr -// I8243, m_ioexp[2]; PIA 3 +// I8243, m_ioexp[2]; PIA 3 m_ioexp[2]->p7_in_cb().set_ioport("IN0"); -// I8243, m_ioexp[3]; PIA 4 +// I8243, m_ioexp[3]; PIA 4 m_ioexp[3]->p4_in_cb().set_ioport("IN1"); m_ioexp[3]->p5_in_cb().set_ioport("IN2"); m_ioexp[3]->p6_in_cb().set_ioport("IN3"); m_ioexp[3]->p7_in_cb().set_ioport("IN4"); -// I8243, m_ioexp[4]; PIA 5 +// I8243, m_ioexp[4]; PIA 5 m_ioexp[4]->p5_in_cb().set_ioport("IN5"); m_ioexp[4]->p6_out_cb().set(FUNC(rfslotsmcs48_state::aj_exp5_p6_w)); diff --git a/src/mame/misc/rgum.cpp b/src/mame/misc/rgum.cpp index 239df0452ccd9..52f40ac3ba45d 100644 --- a/src/mame/misc/rgum.cpp +++ b/src/mame/misc/rgum.cpp @@ -17,6 +17,8 @@ Main components TODO: - stuck at the play screen with 'attendere' (wait) message after coining up; +- Pressing "pin's switch" causes a "Micro Palline Err" (micro balls error), + is this some kind of pachinko-like machine? - some devices aren't mapped and others may be mapped wrong. */ @@ -194,17 +196,17 @@ int rgum_state::heartbeat_r() static INPUT_PORTS_START( rgum ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SLOT_STOP1 ) - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_SLOT_STOP2 ) - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_SLOT_STOP3 ) - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_SLOT_STOP4 ) - PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // "PIN'S SW." + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) PORT_NAME("Stop Reel 1") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) PORT_NAME("Stop Reel 2") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) PORT_NAME("Stop Reel 3") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) PORT_NAME("Stop Reel 4") + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Pin's Switch") PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_MEMBER(rgum_state, heartbeat_r) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) - PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Stop Reel 5") PORT_CODE(KEYCODE_N) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) PORT_NAME("Stop Reel 5") PORT_START("IN1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) // "GUM SW." + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Gum Switch") PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_START1 ) PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) // "PAY LOT" PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) @@ -358,4 +360,4 @@ ROM_END } // Anonymous namespace -GAME( 1993, rgum, 0, rgum, rgum, rgum_state, empty_init, ROT0, "", "Royal Gum (Italy)", MACHINE_NOT_WORKING ) +GAME( 1993, rgum, 0, rgum, rgum, rgum_state, empty_init, ROT0, "", "Royal Gum (Italy)", MACHINE_NOT_WORKING | MACHINE_MECHANICAL ) diff --git a/src/mame/misc/video21.cpp b/src/mame/misc/video21.cpp index e7da712bcf4b6..d4260b5e16dc1 100644 --- a/src/mame/misc/video21.cpp +++ b/src/mame/misc/video21.cpp @@ -54,24 +54,25 @@ class video21_state : public driver_device virtual void machine_start() override; private: - void sound_w(uint8_t data); - void lamp1_w(uint8_t data); - void lamp2_w(uint8_t data); + required_device m_maincpu; + required_shared_ptr m_p_videoram; + required_region_ptr m_p_chargen; + required_device m_beeper; + output_finder<6> m_lamps; int m_hopper_motor = 0; int m_hopper_coin = 0; emu_timer *m_hopper_timer = nullptr; - TIMER_CALLBACK_MEMBER(hopper_coinout); - uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void mem_map(address_map &map); void io_map(address_map &map); + uint32_t screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); - required_device m_maincpu; - required_shared_ptr m_p_videoram; - required_region_ptr m_p_chargen; - required_device m_beeper; - output_finder<6> m_lamps; + void sound_w(uint8_t data); + void lamp1_w(uint8_t data); + void lamp2_w(uint8_t data); + + TIMER_CALLBACK_MEMBER(hopper_coinout); }; diff --git a/src/mame/misc/videoart.cpp b/src/mame/misc/videoart.cpp index a5fae1a4b32dd..2cfa7c4577250 100644 --- a/src/mame/misc/videoart.cpp +++ b/src/mame/misc/videoart.cpp @@ -76,6 +76,16 @@ class videoart_state : public driver_device required_ioport_array<4> m_inputs; output_finder<> m_led; + u8 m_porta = 0xff; + u8 m_portb = 0xff; + u8 m_portc = 0xff; + u8 m_efdata = 0xff; + u8 m_romlatch = 0; + u8 m_ccount = 0; + u8 m_command = 0; + u8 m_pixel_offset = 0; + u8 m_vramdata = 0; + DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); TIMER_DEVICE_CALLBACK_MEMBER(scanline) { m_ef9367->update_scanline(param); } @@ -92,16 +102,6 @@ class videoart_state : public driver_device void portb_w(u8 data); void portc_w(u8 data); u8 portd_r(); - - u8 m_porta = 0xff; - u8 m_portb = 0xff; - u8 m_portc = 0xff; - u8 m_efdata = 0xff; - u8 m_romlatch = 0; - u8 m_ccount = 0; - u8 m_command = 0; - u8 m_pixel_offset = 0; - u8 m_vramdata = 0; }; diff --git a/src/mame/skeleton/dmv.cpp b/src/mame/ncr/dmv.cpp similarity index 100% rename from src/mame/skeleton/dmv.cpp rename to src/mame/ncr/dmv.cpp diff --git a/src/mame/skeleton/dmv_keyb.cpp b/src/mame/ncr/dmv_keyb.cpp similarity index 99% rename from src/mame/skeleton/dmv_keyb.cpp rename to src/mame/ncr/dmv_keyb.cpp index 60e3adf2c5b52..7a6215cb62381 100644 --- a/src/mame/skeleton/dmv_keyb.cpp +++ b/src/mame/ncr/dmv_keyb.cpp @@ -200,6 +200,9 @@ dmv_keyboard_device::dmv_keyboard_device(const machine_config &mconfig, const ch : device_t(mconfig, DMV_KEYBOARD, tag, owner, clock) , m_maincpu(*this, "mcu") , m_keyboard(*this, "COL.%u", 0) + , m_col(0) + , m_sd_data_state(0) + , m_sd_poll_state(0) { } diff --git a/src/mame/skeleton/dmv_keyb.h b/src/mame/ncr/dmv_keyb.h similarity index 82% rename from src/mame/skeleton/dmv_keyb.h rename to src/mame/ncr/dmv_keyb.h index c3ef650889a99..b21a6e229d214 100644 --- a/src/mame/skeleton/dmv_keyb.h +++ b/src/mame/ncr/dmv_keyb.h @@ -5,13 +5,11 @@ Decision Mate V keyboard emulation *********************************************************************/ - -#ifndef MAME_SKELETON_DMV_KEYB_H -#define MAME_SKELETON_DMV_KEYB_H +#ifndef MAME_NCR_DMV_KEYB_H +#define MAME_NCR_DMV_KEYB_H #pragma once - #include "cpu/mcs48/mcs48.h" @@ -31,22 +29,20 @@ class dmv_keyboard_device : public device_t int sd_poll_r(); protected: - // device-level overrides - virtual void device_start() override; - virtual void device_reset() override; - - // optional information overrides + // device_t implementation virtual const tiny_rom_entry *device_rom_region() const override; virtual void device_add_mconfig(machine_config &config) override; virtual ioport_constructor device_input_ports() const override; + virtual void device_start() override; + virtual void device_reset() override; private: required_device m_maincpu; required_ioport_array<16> m_keyboard; - uint8_t m_col = 0; - int m_sd_data_state = 0; - int m_sd_poll_state = 0; + uint8_t m_col; + int m_sd_data_state; + int m_sd_poll_state; uint8_t port1_r(); uint8_t port2_r(); @@ -54,8 +50,8 @@ class dmv_keyboard_device : public device_t }; -// device type definition +// device type declaration DECLARE_DEVICE_TYPE(DMV_KEYBOARD, dmv_keyboard_device) -#endif // MAME_SKELETON_DMV_KEYB_H +#endif // MAME_NCR_DMV_KEYB_H diff --git a/src/mame/nec/pc9801.cpp b/src/mame/nec/pc9801.cpp index ad0bd6d470932..675bd1f878509 100644 --- a/src/mame/nec/pc9801.cpp +++ b/src/mame/nec/pc9801.cpp @@ -648,7 +648,7 @@ void pc9801_state::pc9801_common_io(address_map &map) // (can be accessed only thru the $3fdb alias) map(0x0070, 0x0077).rw(m_pit, FUNC(pit8253_device::read), FUNC(pit8253_device::write)).umask16(0xff00); map(0x0070, 0x007f).rw(FUNC(pc9801_state::txt_scrl_r), FUNC(pc9801_state::txt_scrl_w)).umask16(0x00ff); //display registers / i8253 pit -// map(0x0090, 0x0093).rw(m_sio, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0xff00); // CMT SIO (optional, C-Bus) +// map(0x0090, 0x0093).rw(m_sio, FUNC(i8251_device::read), FUNC(i8251_device::write)).umask16(0xff00); // CMT SIO (optional, C-Bus) map(0x7fd8, 0x7fdf).rw(m_ppi_mouse, FUNC(i8255_device::read), FUNC(i8255_device::write)).umask16(0xff00); } diff --git a/src/mame/nec/pc_h98.cpp b/src/mame/nec/pc_h98.cpp index 11be65ef5f1c9..aa4539da71e91 100644 --- a/src/mame/nec/pc_h98.cpp +++ b/src/mame/nec/pc_h98.cpp @@ -33,7 +33,7 @@ class pc_hyper98_state : public pc9801bx_state void pc_hyper98_state::pc_h98_map(address_map &map) { pc_hyper98_state::pc9801bx2_map(map); -// map(0x080000, 0x0bffff).unmaprw(); // RAM window +// map(0x080000, 0x0bffff).unmaprw(); // RAM window // TODO: bigger, needs fn mods map(0x0c0000, 0x0dffff).rw(FUNC(pc_hyper98_state::grcg_gvram0_r), FUNC(pc_hyper98_state::grcg_gvram0_w)); map(0x0e0000, 0x0e3fff).rw(FUNC(pc_hyper98_state::tvram_r), FUNC(pc_hyper98_state::tvram_w)); @@ -204,7 +204,7 @@ ROM_START( pc_h98s ) ROM_LOAD( "font.rom", 0x00000, 0x46800, BAD_DUMP CRC(a61c0649) SHA1(554b87377d176830d21bd03964dc71f8e98676b1) ) LOAD_KANJI_ROMS -// LOAD_IDE_ROM +// LOAD_IDE_ROM ROM_END COMP( 1991, pc_h98s, 0, 0, pc_h98s, pc_h98, pc_hyper98_state, init_pc9801_kanji, "NEC", "PC-H98S model 8/U8", MACHINE_IS_SKELETON ) diff --git a/src/mame/nichibutsu/hrdvd.cpp b/src/mame/nichibutsu/hrdvd.cpp index d92836e1bd6d1..a55151111accc 100644 --- a/src/mame/nichibutsu/hrdvd.cpp +++ b/src/mame/nichibutsu/hrdvd.cpp @@ -34,17 +34,19 @@ ***********************************************************************************************************/ #include "emu.h" + #include "bus/ata/atadev.h" #include "bus/ata/atapicdr.h" #include "bus/ata/ataintf.h" #include "cpu/h8/h83002.h" #include "cpu/m68000/tmp68301.h" #include "machine/nvram.h" +#include "machine/tc9223.h" #include "machine/timer.h" #include "sound/nn71003f.h" #include "video/v9938.h" #include "video/zr36110.h" -#include "machine/tc9223.h" + #include "nichisnd.h" class hrdvd_ata_controller_device : public abstract_ata_interface_device diff --git a/src/mame/nichibutsu/nichild.cpp b/src/mame/nichibutsu/nichild.cpp index 140c7c45c811c..0f617d861aeac 100644 --- a/src/mame/nichibutsu/nichild.cpp +++ b/src/mame/nichibutsu/nichild.cpp @@ -1,44 +1,65 @@ // license:LGPL-2.1+ // copyright-holders:Angelo Salese -/*************************************************************************** - - 'Nichibutsu LD' HW (c) 199? Nichibutsu - - TODO: - - Understand how MMU works (both games jumps to invalid areas, probably - port A remaps memory for the whole space!); - - (if ld check patched) memory error printed by ldquiz4, most likely - related to above; - - Unknown LaserDisc type; - - Verify irq vector for vblank irq, and make it work with daisy chain; - - Unknown irq vector for LaserDisc strobe (ldquiz4 sets a flag at $f014, - the only place it clears it is at snippet 0x0ED6); - - hookup audio CPU (same as niyanpai HW?) - -============================================================================= - - 1 x TMPZ84C011AF-6 main CPU - 1 x 21.47727MHz OSC - 1 x Z0840004PSC audio CPU - 1 x 4.000MHz OSC - 1 x Yamaha V9938 - 1 x uPC1352C - 1 x Yamaha YM3812 - 2 x 8 dip switch banks - -***************************************************************************/ +/************************************************************************************************** + +'Nichibutsu LD' HW (c) 1990? Nichibutsu + +TODO: +- ldquiz4: spins on "memory test error 13", implying a missing ROM dump + (other GFXs will return further errors if missing, returning the label there). + To bypass: bp 18d,1,{hl=34bf;g} + or alternatively patch location $40 in ROM with a 0x00 (which looks a debug switch) +- Unknown LaserDisc type; +- Unknown irq vector for LaserDisc strobe, unless it's really supposed to execute code with trg0 + irq service (which spins for nothing in both games) +- V9938 has issues with layer clears, has an hard time sending a vblank irq (the only one enabled) + at the right time. Removing the invert() from the int_cb will "fix" it at the expense of being + excruciatingly slow. +- Document meaning of remaining DIP switches + +Notes: +- In service mode, press KAN/PON for the sound test and CHI/REACH for the voice test +- Push START to continue after the RGB test screen is shown + +=================================================================================================== + +1 x TMPZ84C011AF-6 main CPU +1 x 12.000MHz OSC +1 x 21.47727MHz OSC +1 x Z0840004PSC audio CPU +1 x 4.000MHz OSC +1 x Yamaha V9938 +1 x uPC1352C (NTSC decoder) +1 x Yamaha YM3812 +2 x 8 dip switch banks + +A red/white RCA connector near the uPC, labeled video/audio respectively +A LDC labeled 2 pin connector +6 x potentiometers for LD decoder section, 5 of them aligned as VR1-VR5, + the 6th one (VR6) is near LDC +1 x potentiometer labeled VR7, near the sound section +1 x VOL for LD decoder section + +**************************************************************************************************/ #include "emu.h" + #include "cpu/z80/tmpz84c011.h" +#include "machine/74166.h" +#include "machine/gen_latch.h" +#include "sound/dac.h" +#include "sound/ymopl.h" #include "video/v9938.h" + #include "screen.h" #include "speaker.h" namespace { -#define MAIN_CLOCK XTAL(21'477'272) +#define MAIN_CLOCK XTAL(12'000'000) +#define VDP_CLOCK XTAL(21'477'272) #define SOUND_CLOCK XTAL(4'000'000) class nichild_state : public driver_device @@ -47,34 +68,61 @@ class nichild_state : public driver_device nichild_state(const machine_config &mconfig, device_type type, const char *tag) : driver_device(mconfig, type, tag) , m_maincpu(*this, "maincpu") + , m_audiocpu(*this, "audiocpu") , m_v9938(*this, "v9938") , m_gfxrom(*this, "gfx") + , m_p1_keymatrix(*this, { "P1_KEY0", "P1_KEY1", "P1_KEY2", "P1_KEY3", "P1_KEY4" }) + , m_p2_keymatrix(*this, { "P2_KEY0", "P2_KEY1", "P2_KEY2", "P2_KEY3", "P2_KEY4" }) + , m_dsw_shifter(*this, "ttl166_%u", 1U) + , m_sound_rom(*this, "audiorom") + , m_soundbank(*this, "soundbank") + , m_soundlatch(*this, "soundlatch") { } void nichild(machine_config &config); private: + required_device m_maincpu; + required_device m_audiocpu; + required_device m_v9938; + required_region_ptr m_gfxrom; + + required_ioport_array<5> m_p1_keymatrix; + required_ioport_array<5> m_p2_keymatrix; + required_device_array m_dsw_shifter; + + required_region_ptr m_sound_rom; + required_memory_bank m_soundbank; + required_device m_soundlatch; + uint8_t gfx_r(offs_t offset); - uint8_t mux_r(); - void mux_w(uint8_t data); + uint8_t p1_keymatrix_r(); + uint8_t p2_keymatrix_r(); + void key_select_w(uint8_t data); + uint8_t porta_r(); void porta_w(uint8_t data); void portb_w(uint8_t data); void portc_w(uint8_t data); void portd_w(uint8_t data); void gfxbank_w(uint8_t data); - void nichild_io(address_map &map); - void nichild_map(address_map &map); + void main_map(address_map &map); + void main_io(address_map &map); + + void soundbank_w(uint8_t data); + + void audio_map(address_map &map); + void audio_io(address_map &map); // driver_device overrides virtual void machine_start() override; virtual void machine_reset() override; - required_device m_maincpu; - required_device m_v9938; - required_region_ptr m_gfxrom; uint32_t m_gfx_bank = 0; + uint8_t m_key_select = 0; + uint8_t m_soundlatch_ack = 0; + int m_dsw_data = 0; }; @@ -86,32 +134,47 @@ uint8_t nichild_state::gfx_r(offs_t offset) gfx_offset |= ((offset & 0xff00) >> 8); gfx_offset |= m_gfx_bank; - //printf("%08x %02x\n",gfx_offset,m_gfx_bank); + //logerror("%08x %02x\n",gfx_offset,m_gfx_bank); return m_gfxrom[gfx_offset]; } -//#include "debugger.h" +uint8_t nichild_state::porta_r() +{ + // 7------- dipswitch 74166 qh + // -6543210 output (see below) + + return m_dsw_data << 7; +} void nichild_state::porta_w(uint8_t data) { - printf("PORTA %02x\n",data); -// machine().debug_break(); + // 7------- input (see above) + // -6------ dipswitch 74166 clock + // --5----- dipswitch 74166 shift/load + // ---43210 unknown + + logerror("PORTA %02x\n",data); + + m_dsw_shifter[0]->shift_load_w(BIT(data, 5)); + m_dsw_shifter[1]->shift_load_w(BIT(data, 5)); + m_dsw_shifter[0]->clock_w(BIT(data, 6)); + m_dsw_shifter[1]->clock_w(BIT(data, 6)); } void nichild_state::portb_w(uint8_t data) { - printf("PORTB %02x\n",data); + logerror("PORTB %02x\n",data); } void nichild_state::portc_w(uint8_t data) { - printf("PORTC %02x\n",data); + logerror("PORTC %02x\n",data); } void nichild_state::portd_w(uint8_t data) { - printf("PORTD %02x\n",data); + logerror("PORTD %02x\n",data); } void nichild_state::gfxbank_w(uint8_t data) @@ -120,69 +183,186 @@ void nichild_state::gfxbank_w(uint8_t data) m_gfx_bank = data * 0x8000; } -uint8_t nichild_state::mux_r() +uint8_t nichild_state::p1_keymatrix_r() { - // TODO - return 0xff; + uint8_t result = 0xff; + for (unsigned i = 0; m_p1_keymatrix.size() > i; ++i) + { + if (!BIT(m_key_select, i)) + result &= m_p1_keymatrix[i]->read(); + } + return result; +} + +uint8_t nichild_state::p2_keymatrix_r() +{ + uint8_t result = 0xff; + for (unsigned i = 0; m_p2_keymatrix.size() > i; ++i) + { + if (!BIT(m_key_select, i)) + result &= m_p2_keymatrix[i]->read(); + } + return result; } -void nichild_state::mux_w(uint8_t data) +void nichild_state::key_select_w(uint8_t data) { - // ... + m_key_select = (data & 0x1f); } -void nichild_state::nichild_map(address_map &map) +void nichild_state::main_map(address_map &map) { - // TODO: MMU :/ - map(0x0000, 0x1fff).rom().region("ipl", 0x0000); - map(0x2000, 0x3fff).rom().region("ipl", 0x2000); - map(0x4000, 0x5fff).rom().region("ipl", 0x4000); - map(0x6000, 0x7fff).rom().region("ipl", 0x6000); + map(0x0000, 0x7fff).rom().region("ipl", 0x0000); map(0x8000, 0x9fff).rom().region("ipl", 0x8000); - map(0xc000, 0xdfff).rom().region("ipl", 0x0000); map(0xe000, 0xffff).ram(); } -void nichild_state::nichild_io(address_map &map) +void nichild_state::main_io(address_map &map) { // map.global_mask(0xff); - map(0x60, 0x60).mirror(0xff00).w(FUNC(nichild_state::mux_w)); + map(0x60, 0x60).mirror(0xff00).w(FUNC(nichild_state::key_select_w)); + map(0x64, 0x64).mirror(0xff00).w(m_soundlatch, FUNC(generic_latch_8_device::write)); // shabdama accesses 0x70-0x73, ldquiz4 0x7c-0x7f map(0x70, 0x73).mirror(0xff0c).rw(m_v9938, FUNC(v9938_device::read), FUNC(v9938_device::write)); map(0x80, 0xff).select(0xff00).r(FUNC(nichild_state::gfx_r)); } -static INPUT_PORTS_START( nichild ) - /* dummy active high structure */ - PORT_START("SYSA") - PORT_DIPNAME( 0x01, 0x00, "SYSA" ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x01, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x02, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x04, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x08, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x10, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x20, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x40, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x80, DEF_STR( On ) ) - - /* dummy active low structure */ - PORT_START("DSWA") - PORT_DIPNAME( 0x01, 0x01, "DSWA" ) +void nichild_state::soundbank_w(uint8_t data) +{ + m_soundbank->set_entry(data & 0x03); + // 1 -> 0 -> 1 transitions clears the soundlatch + if (!BIT(data, 7) && BIT(m_soundlatch_ack, 7)) + m_soundlatch->clear_w(); + + m_soundlatch_ack = data & 0x80; + + if (data & 0x7c) + logerror("soundbank_w: %02x\n", data); +} + +// Sound design looks a link between armedf.cpp and nichisnd +void nichild_state::audio_map(address_map &map) +{ + map(0x0000, 0x77ff).rom().region("audiorom", 0); + map(0x7800, 0x7fff).ram(); + map(0x8000, 0xffff).bankr(m_soundbank); +} + +void nichild_state::audio_io(address_map &map) +{ + map.global_mask(0xff); + map(0x00, 0x00).r(m_soundlatch, FUNC(generic_latch_8_device::read)).nopw(); + map(0x02, 0x02).w("dac", FUNC(dac_byte_interface::data_w)); + map(0x04, 0x04).w(FUNC(nichild_state::soundbank_w)); + map(0x06, 0x06).nopw(); // irq ack + map(0x80, 0x81).w("ymsnd", FUNC(ym3812_device::write)); +} + + +static INPUT_PORTS_START( nichild_mj ) + // mahjong panels are virtually identical to nb1413m3 + PORT_START("P1_KEY0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_M ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_I ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_E ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_A ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P1_KEY1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_N ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_J ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_F ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_B ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P1_KEY2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_K ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_G ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_C ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P1_KEY3") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_L ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_H ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_D ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P1_KEY4") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P2_KEY0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_KAN ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_M ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_I ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_E ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_A ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P2_KEY1") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_BET ) PORT_PLAYER(2) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_REACH ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_N ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_J ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_F ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_B ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P2_KEY2") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_RON ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_CHI ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_K ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_G ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_C ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P2_KEY3") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_PON ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_L ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_H ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_D ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P2_KEY4") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_MAHJONG_SMALL ) PORT_PLAYER(2) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_MAHJONG_BIG ) PORT_PLAYER(2) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_MAHJONG_FLIP_FLOP ) PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_MAHJONG_DOUBLE_UP ) PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_MAHJONG_SCORE ) PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_MAHJONG_LAST_CHANCE ) PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("PORTD") + PORT_DIPNAME( 0x01, 0x01, "PORTD" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) @@ -194,23 +374,142 @@ static INPUT_PORTS_START( nichild ) PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) + PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSWA") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "DSWA:8") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "DSWA:7") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "DSWA:6") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "DSWA:5") + PORT_DIPNAME(0x10, 0x10, DEF_STR( Coinage )) PORT_DIPLOCATION("DSWA:4") + PORT_DIPSETTING(0x10, DEF_STR( 1C_1C )) + PORT_DIPSETTING(0x00, DEF_STR( 1C_2C )) + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "DSWA:3") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "DSWA:2") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "DSWA:1") + + PORT_START("DSWB") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "DSWB:8") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "DSWB:7") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "DSWB:6") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "DSWB:5") + PORT_DIPUNKNOWN_DIPLOC(0x10, 0x10, "DSWB:4") + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "DSWB:3") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "DSWB:2") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "DSWB:1") +INPUT_PORTS_END + +static INPUT_PORTS_START( nichild_quiz ) + // the quiz game(s) accesses the matrix with 0x00 writes, so that any of these works + PORT_START("P1_KEY0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START1 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("D Button") PORT_PLAYER(1) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("C Button") PORT_PLAYER(1) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("B Button") PORT_PLAYER(1) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("A Button") PORT_PLAYER(1) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P1_KEY1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P1_KEY2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P1_KEY3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P1_KEY4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P2_KEY0") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_START2 ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON4 ) PORT_NAME("D Button") PORT_PLAYER(2) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_NAME("C Button") PORT_PLAYER(2) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_NAME("B Button") PORT_PLAYER(2) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_NAME("A Button") PORT_PLAYER(2) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNKNOWN ) + + PORT_START("P2_KEY1") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P2_KEY2") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P2_KEY3") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("P2_KEY4") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("PORTD") + PORT_DIPNAME( 0x01, 0x01, "PORTD" ) + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) + PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_SERVICE( 0x10, IP_ACTIVE_LOW ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + + PORT_START("DSWA") + PORT_DIPNAME( 0x01, 0x00, "RGB Test Screen" ) PORT_DIPLOCATION("DSWA:8") + PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "DSWA:7") // ld video inserted into attract mode? + // at least for ldquiz4, to be verified for other games + // (definitely don't affect sound in shabdama unless it expects attract mode audio from LD player) + PORT_DIPNAME( 0x04, 0x00, DEF_STR( Demo_Sounds ) ) PORT_DIPLOCATION("DSWA:6") + PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "DSWA:5") + PORT_DIPNAME(0x10, 0x10, DEF_STR( Lives )) PORT_DIPLOCATION("DSWA:4") + PORT_DIPSETTING(0x10, "3") + PORT_DIPSETTING(0x00, "5") + PORT_DIPNAME(0x20, 0x20, DEF_STR( Coinage )) PORT_DIPLOCATION("DSWA:3") + PORT_DIPSETTING(0x20, DEF_STR( 1C_1C )) + PORT_DIPSETTING(0x00, DEF_STR( 1C_2C )) + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "DSWA:2") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "DSWA:1") + + PORT_START("DSWB") + PORT_DIPUNKNOWN_DIPLOC(0x01, 0x01, "DSWB:8") + PORT_DIPUNKNOWN_DIPLOC(0x02, 0x02, "DSWB:7") + PORT_DIPUNKNOWN_DIPLOC(0x04, 0x04, "DSWB:6") + PORT_DIPUNKNOWN_DIPLOC(0x08, 0x08, "DSWB:5") + PORT_DIPUNKNOWN_DIPLOC(0x10, 0x10, "DSWB:4") + PORT_DIPUNKNOWN_DIPLOC(0x20, 0x20, "DSWB:3") + PORT_DIPUNKNOWN_DIPLOC(0x40, 0x40, "DSWB:2") + PORT_DIPUNKNOWN_DIPLOC(0x80, 0x80, "DSWB:1") INPUT_PORTS_END void nichild_state::machine_start() { + m_soundbank->configure_entries(0, 3, m_sound_rom + 0x8000, 0x8000); + m_soundbank->set_entry(0); } void nichild_state::machine_reset() @@ -226,29 +525,48 @@ static const z80_daisy_config daisy_chain_main[] = void nichild_state::nichild(machine_config &config) { - /* basic machine hardware */ - TMPZ84C011(config, m_maincpu, MAIN_CLOCK/4); + TMPZ84C011(config, m_maincpu, MAIN_CLOCK/2); m_maincpu->set_daisy_config(daisy_chain_main); - m_maincpu->set_addrmap(AS_PROGRAM, &nichild_state::nichild_map); - m_maincpu->set_addrmap(AS_IO, &nichild_state::nichild_io); - m_maincpu->in_pb_callback().set(FUNC(nichild_state::mux_r)); + m_maincpu->set_addrmap(AS_PROGRAM, &nichild_state::main_map); + m_maincpu->set_addrmap(AS_IO, &nichild_state::main_io); + m_maincpu->in_pa_callback().set(FUNC(nichild_state::porta_r)); + m_maincpu->in_pb_callback().set(FUNC(nichild_state::p1_keymatrix_r)); + m_maincpu->in_pc_callback().set(FUNC(nichild_state::p2_keymatrix_r)); + m_maincpu->in_pd_callback().set_ioport("PORTD"); m_maincpu->out_pa_callback().set(FUNC(nichild_state::porta_w)); m_maincpu->out_pb_callback().set(FUNC(nichild_state::portb_w)); m_maincpu->out_pc_callback().set(FUNC(nichild_state::portc_w)); m_maincpu->out_pd_callback().set(FUNC(nichild_state::portd_w)); m_maincpu->out_pe_callback().set(FUNC(nichild_state::gfxbank_w)); - /* video hardware */ - V9938(config, m_v9938, MAIN_CLOCK); + Z80(config, m_audiocpu, SOUND_CLOCK); + m_audiocpu->set_addrmap(AS_PROGRAM, &nichild_state::audio_map); + m_audiocpu->set_addrmap(AS_IO, &nichild_state::audio_io); + m_audiocpu->set_periodic_int(FUNC(nichild_state::irq0_line_hold), attotime::from_hz(XTAL(SOUND_CLOCK)/512)); // ? + + TTL166(config, m_dsw_shifter[0]); + m_dsw_shifter[0]->data_callback().set_ioport("DSWB"); + m_dsw_shifter[0]->qh_callback().set(m_dsw_shifter[1], FUNC(ttl166_device::serial_w)); + + TTL166(config, m_dsw_shifter[1]); + m_dsw_shifter[1]->data_callback().set_ioport("DSWA"); + m_dsw_shifter[1]->qh_callback().set([this](int state) { m_dsw_data = state; }); + + V9938(config, m_v9938, VDP_CLOCK); m_v9938->set_screen_ntsc("screen"); m_v9938->set_vram_size(0x40000); m_v9938->int_cb().set(m_maincpu, FUNC(tmpz84c011_device::trg3)).invert(); SCREEN(config, "screen", SCREEN_TYPE_RASTER); - /* sound hardware */ - SPEAKER(config, "mono").front_center(); -// YM3812(config, "fmsnd", SOUND_CLOCK).add_route(ALL_OUTPUTS, "speaker", 0.7); + // TODO: mixing with LD player + SPEAKER(config, "speaker").front_center(); + + GENERIC_LATCH_8(config, m_soundlatch); + + YM3812(config, "ymsnd", SOUND_CLOCK).add_route(ALL_OUTPUTS, "speaker", 0.5); + + DAC_8BIT_R2R(config, "dac", 0).add_route(ALL_OUTPUTS, "speaker", 1.0); // unknown DAC } @@ -258,22 +576,56 @@ void nichild_state::nichild(machine_config &config) ***************************************************************************/ -ROM_START( shabdama ) +// NOTE: identical to shabdama below +ROM_START( ldmj1mbh ) ROM_REGION( 0x10000, "ipl", ROMREGION_ERASE00 ) ROM_LOAD( "1.bin", 0x000000, 0x010000, CRC(e49e3d73) SHA1(6d17d60e1b6f8aee96f7a09f45113030064d3bdb) ) - ROM_REGION( 0x20000, "audiocpu", ROMREGION_ERASE00 ) + ROM_REGION( 0x20000, "audiorom", ROMREGION_ERASE00 ) ROM_LOAD( "3.bin", 0x000000, 0x010000, CRC(e8233c6e) SHA1(fbfdb03dc9f4e3e80e161b8522b676485ffb1c95) ) ROM_LOAD( "2.bin", 0x010000, 0x010000, CRC(3e0b5344) SHA1(eeae36fc4fca091065c1d51f05c2d11f44fe6d13) ) ROM_REGION( 0x200000, "gfx", ROMREGION_ERASE00 ) - ROM_LOAD( "10.bin", 0x060000, 0x010000, CRC(5da10b82) SHA1(72974d083110fc6c583bfa1c22ce3abe02ba86f6) ) - ROM_LOAD( "9.bin", 0x050000, 0x010000, CRC(1afdc5bf) SHA1(b07b32656ffc96b7f7d4bd242b2a6e0e105ab67a) ) - ROM_LOAD( "8.bin", 0x040000, 0x010000, CRC(3e75423e) SHA1(62e24849ddeb004ed8570d2884afa4ab257cdf07) ) - ROM_LOAD( "7.bin", 0x030000, 0x010000, CRC(7f08e3a6) SHA1(127018442183332175c9e1f558274cd2cb5f0147) ) - ROM_LOAD( "6.bin", 0x020000, 0x010000, CRC(0fece809) SHA1(1fe8436af8ead02a3b517b6306f9824cd64b2d26) ) + ROM_LOAD( "4.bin", 0x000000, 0x010000, CRC(199e2127) SHA1(2514d51cb06438b312d1f328c72baa739280416a) ) ROM_LOAD( "5.bin", 0x010000, 0x010000, CRC(0706386a) SHA1(29eee363775869dcc9c46285632e8bf745c9110b) ) + ROM_LOAD( "6.bin", 0x020000, 0x010000, CRC(0fece809) SHA1(1fe8436af8ead02a3b517b6306f9824cd64b2d26) ) + ROM_LOAD( "7.bin", 0x030000, 0x010000, CRC(7f08e3a6) SHA1(127018442183332175c9e1f558274cd2cb5f0147) ) + ROM_LOAD( "8.bin", 0x040000, 0x010000, CRC(3e75423e) SHA1(62e24849ddeb004ed8570d2884afa4ab257cdf07) ) + ROM_LOAD( "9.bin", 0x050000, 0x010000, CRC(1afdc5bf) SHA1(b07b32656ffc96b7f7d4bd242b2a6e0e105ab67a) ) + ROM_LOAD( "10.bin", 0x060000, 0x010000, CRC(5da10b82) SHA1(72974d083110fc6c583bfa1c22ce3abe02ba86f6) ) + + ROM_REGION( 0x800, "plds", 0 ) // all protected + ROM_LOAD( "pal16l8.0", 0x000, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.1", 0x200, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.2", 0x400, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.3", 0x600, 0x104, NO_DUMP ) + + DISK_REGION( "laserdisc" ) + DISK_IMAGE_READONLY( "ldmj1mbh", 0, NO_DUMP ) +ROM_END + +ROM_START( shabdama ) + ROM_REGION( 0x10000, "ipl", ROMREGION_ERASE00 ) + ROM_LOAD( "1.bin", 0x000000, 0x010000, CRC(e49e3d73) SHA1(6d17d60e1b6f8aee96f7a09f45113030064d3bdb) ) + + ROM_REGION( 0x20000, "audiorom", ROMREGION_ERASE00 ) + ROM_LOAD( "3.bin", 0x000000, 0x010000, CRC(e8233c6e) SHA1(fbfdb03dc9f4e3e80e161b8522b676485ffb1c95) ) + ROM_LOAD( "2.bin", 0x010000, 0x010000, CRC(3e0b5344) SHA1(eeae36fc4fca091065c1d51f05c2d11f44fe6d13) ) + + ROM_REGION( 0x200000, "gfx", ROMREGION_ERASE00 ) ROM_LOAD( "4.bin", 0x000000, 0x010000, CRC(199e2127) SHA1(2514d51cb06438b312d1f328c72baa739280416a) ) + ROM_LOAD( "5.bin", 0x010000, 0x010000, CRC(0706386a) SHA1(29eee363775869dcc9c46285632e8bf745c9110b) ) + ROM_LOAD( "6.bin", 0x020000, 0x010000, CRC(0fece809) SHA1(1fe8436af8ead02a3b517b6306f9824cd64b2d26) ) + ROM_LOAD( "7.bin", 0x030000, 0x010000, CRC(7f08e3a6) SHA1(127018442183332175c9e1f558274cd2cb5f0147) ) + ROM_LOAD( "8.bin", 0x040000, 0x010000, CRC(3e75423e) SHA1(62e24849ddeb004ed8570d2884afa4ab257cdf07) ) + ROM_LOAD( "9.bin", 0x050000, 0x010000, CRC(1afdc5bf) SHA1(b07b32656ffc96b7f7d4bd242b2a6e0e105ab67a) ) + ROM_LOAD( "10.bin", 0x060000, 0x010000, CRC(5da10b82) SHA1(72974d083110fc6c583bfa1c22ce3abe02ba86f6) ) + + ROM_REGION( 0x800, "plds", 0 ) // all protected + ROM_LOAD( "pal16l8.0", 0x000, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.1", 0x200, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.2", 0x400, 0x104, NO_DUMP ) + ROM_LOAD( "pal16l8.3", 0x600, 0x104, NO_DUMP ) DISK_REGION( "laserdisc" ) DISK_IMAGE_READONLY( "shabdama", 0, NO_DUMP ) @@ -286,7 +638,7 @@ ROM_START( ldquiz4 ) ROM_REGION( 0x10000, "ipl", 0 ) // 27512 ROM_LOAD( "1.e3", 0x00000, 0x10000, CRC(49255f66) SHA1(bdd01987331c2aadea7f588d39c48c70cd43fc71) ) - ROM_REGION( 0x20000, "audiocpu", 0 ) // 27512 + ROM_REGION( 0x20000, "audiorom", 0 ) // 27512 ROM_LOAD( "3.e7", 0x00000, 0x10000, CRC(b033eb6a) SHA1(2c11b2b998117f68a1fbbd110d3f67ab472e133d) ) ROM_LOAD( "2.e6", 0x10000, 0x10000, CRC(6c83cad6) SHA1(c38f60fb4fdbda76ea3459644bf491cc305a7ae6) ) @@ -300,6 +652,7 @@ ROM_START( ldquiz4 ) ROM_LOAD( "10.k8", 0x0c0000, 0x20000, CRC(c7437125) SHA1(55b161ce2432d04531ed0afab973f892b571ef88) ) ROM_LOAD( "11.k9", 0x0e0000, 0x20000, CRC(6feeab93) SHA1(d77325c1eecb677c48d11bf8d5f73b238f2896e6) ) ROM_LOAD( "12.k10", 0x100000, 0x20000, CRC(c7f9bf98) SHA1(103b78b0e126ea4249982bf114010f57e5ffa70a) ) + ROM_LOAD( "13", 0x180000, 0x08000, NO_DUMP ) ROM_REGION( 0x800, "plds", 0 ) // all protected ROM_LOAD( "pal16l8.0", 0x000, 0x104, NO_DUMP ) @@ -313,6 +666,24 @@ ROM_END } // anonymous namespace - -GAME( 1991, shabdama, 0, nichild, nichild, nichild_state, empty_init, ROT0, "Nichibutsu", "LD Mahjong #4 Shabon-Dama (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) -GAME( 1992, ldquiz4, 0, nichild, nichild, nichild_state, empty_init, ROT0, "Nichibutsu", "LD Quiz dai 4-dan - Kotaetamon Gachi! (Japan)", MACHINE_NOT_WORKING | MACHINE_NO_SOUND ) +// 1990 +// LD花札 花のクリスマスイブ (LD version of nbmj8891.cpp hnxmasev?) +// 1991 +GAME( 1991, ldmj1mbh, 0, nichild, nichild_mj, nichild_state, empty_init, ROT0, "Nichibutsu / AV Japan", "LD Mahjong #1 Marine Blue no Hitomi (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) // LD麻雀 第1弾 マリンブルーの瞳 +// LD麻雀 第2弾 マリンブルーの瞳2 +// LD麻雀 第3弾 泊まりにおいでよ +GAME( 1991, shabdama, 0, nichild, nichild_mj, nichild_state, empty_init, ROT0, "Nichibutsu / AV Japan", "LD Mahjong #4 Shabon-Dama (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) // LD麻雀 第4弾 シャボン玉 +// LDQUIZ クイズDEデート +// LDQUIZ ミラクルQ 日本物産 +// LDQUIZ もう答えずにはいられない +// 1992 +GAME( 1992, ldquiz4, 0, nichild, nichild_quiz, nichild_state, empty_init, ROT0, "Nichibutsu / AV Japan", "LD Quiz dai 4-dan - Kotaetamon Gachi! (Japan)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_SOUND ) // LDQUIZ 答えたもん勝ち +// LD麻雀 第5弾 夜明けのカフェテラス +// LD麻雀 第6弾 ティファニー +// 1993 +// LD麻雀 第7弾 ジェラシー +// LD麻雀 第8弾 ブルセラ +// 1994 +// LD麻雀 第9弾 ポケベル1919 +// LD麻雀 第10弾 ボディコン総集編 +// LD麻雀 第11弾 エロスの館 diff --git a/src/mame/nichibutsu/nichisnd.cpp b/src/mame/nichibutsu/nichisnd.cpp index f68eede8f1427..f272f1e2599b9 100644 --- a/src/mame/nichibutsu/nichisnd.cpp +++ b/src/mame/nichibutsu/nichisnd.cpp @@ -9,7 +9,8 @@ Uses a TMPZ84C011 with YM3812 and two DACs TODO: - - DVD sound routing in here + - DVD sound routing in here; + - Pinpoint actual subboard name; ***************************************************************************/ diff --git a/src/mame/nichibutsu/nightgal.cpp b/src/mame/nichibutsu/nightgal.cpp index 9a4fcb907108e..c1c8da34530f3 100644 --- a/src/mame/nichibutsu/nightgal.cpp +++ b/src/mame/nichibutsu/nightgal.cpp @@ -1,14 +1,12 @@ // license:BSD-3-Clause // copyright-holders:Angelo Salese, David Haywood +// thanks-to: Charles MacDonald /******************************************************************************************* Night Gal (c) 1984 Nichibutsu a.k.a. same Jangou blitter but with NCS CPU for displaying graphics as protection. -driver by David Haywood & Angelo Salese -many thanks to Charles MacDonald for the schematics / documentation of this HW. - TODO: - Fix Sweet Gal/Sexy Gal/Sexy Gal Tropical layer clearances (more protection?); - Sexy Gal uses an additional NCS for a sample player, understand how to make it play anything (tries to read port $00 but it's always zero); @@ -787,7 +785,6 @@ void nightgal_state::machine_reset() void nightgal_state::royalqn(machine_config &config) { - /* basic machine hardware */ Z80(config, m_maincpu, MASTER_CLOCK / 8); /* ? MHz */ m_maincpu->set_addrmap(AS_PROGRAM, &nightgal_state::royalqn_map); m_maincpu->set_addrmap(AS_IO, &nightgal_state::royalqn_io); @@ -800,7 +797,6 @@ void nightgal_state::royalqn(machine_config &config) JANGOU_BLITTER(config, m_blitter, MASTER_CLOCK/4); - /* video hardware */ screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_raw(MASTER_CLOCK/4,320,0,256,264,16,240); screen.set_screen_update(FUNC(nightgal_state::screen_update_nightgal)); @@ -808,7 +804,6 @@ void nightgal_state::royalqn(machine_config &config) PALETTE(config, m_palette, FUNC(nightgal_state::nightgal_palette), 0x20); - /* sound hardware */ SPEAKER(config, "mono").front_center(); ay8910_device &aysnd(AY8910(config, "aysnd", MASTER_CLOCK / 8)); @@ -821,7 +816,6 @@ void nightgal_state::sexygal(machine_config &config) { royalqn(config); - /* basic machine hardware */ m_maincpu->set_addrmap(AS_PROGRAM, &nightgal_state::sexygal_map); m_maincpu->set_addrmap(AS_IO, &nightgal_state::sexygal_io); @@ -1336,6 +1330,6 @@ GAME( 1984, royalqn, 0, royalqn, sexygal, nightgal_state, init_royalqn, GAME( 1985, sexygal, 0, sexygal, sexygal, nightgal_state, empty_init, ROT0, "Nichibutsu", "Sexy Gal (Japan 850501 SXG 1-00)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) GAME( 1985, sweetgal, sexygal, sweetgal, sexygal, nightgal_state, empty_init, ROT0, "Nichibutsu", "Sweet Gal (Japan 850510 SWG 1-02)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) /* Type 3 HW */ -GAME( 1985, ngalsumr, 0, ngalsumr, sexygal, nightgal_state, init_ngalsumr, ROT0, "Nichibutsu", "Night Gal Summer [BET] (Japan 850702 NGS 0-01)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) // protection +GAME( 1985, ngalsumr, 0, ngalsumr, sexygal, nightgal_state, init_ngalsumr, ROT0, "Nichibutsu", "Night Gal Summer [BET] (Japan 850702 NGS 0-01)", MACHINE_IMPERFECT_GRAPHICS | MACHINE_UNEMULATED_PROTECTION | MACHINE_SUPPORTS_SAVE ) /* Type 4 HW */ GAME( 1985, sgaltrop, 0, sgaltrop, sexygal, nightgal_state, empty_init, ROT0, "Nichibutsu", "Sexy Gal Tropical [BET] (Japan 850805 SXG T-02)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/nintendo/aleck64.cpp b/src/mame/nintendo/aleck64.cpp index a3c9fbb607301..0c7a7043c9b4c 100644 --- a/src/mame/nintendo/aleck64.cpp +++ b/src/mame/nintendo/aleck64.cpp @@ -1417,7 +1417,7 @@ GAME( 1998, aleck64, 0, aleck64, aleck64, aleck64_state, init_aleck64, R // games GAME( 1998, 11beat, aleck64, aleck64, 11beat, aleck64_state, init_aleck64, ROT0, "Hudson", "Eleven Beat", MACHINE_IMPERFECT_GRAPHICS ) // crashes at kick off / during attract with DRC -GAME( 1998, mtetrisc, aleck64, a64_e90, mtetrisc, aleck64_state, init_aleck64, ROT0, "Capcom", "Magical Tetris Challenge (981009 Japan)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) // missing E90 gfxs (playfield) +GAME( 1998, mtetrisc, aleck64, a64_e90, mtetrisc, aleck64_state, init_aleck64, ROT0, "Capcom", "Magical Tetris Challenge (981009 Japan)", MACHINE_NOT_WORKING|MACHINE_IMPERFECT_GRAPHICS ) // incomplete E90 gfxs (playfield), playable otherwise GAME( 1998, starsldr, aleck64, aleck64, starsldr, aleck64_state, init_aleck64, ROT0, "Hudson / Seta", "Star Soldier: Vanishing Earth", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1998, vivdolls, aleck64, aleck64, vivdolls, aleck64_state, init_aleck64, ROT0, "Visco", "Vivid Dolls", MACHINE_IMPERFECT_GRAPHICS ) GAME( 1999, srmvs, aleck64, aleck64, srmvs, aleck64_state, init_aleck64, ROT0, "Seta", "Super Real Mahjong VS (Rev A)", MACHINE_IMPERFECT_GRAPHICS ) diff --git a/src/mame/nintendo/compmahj.cpp b/src/mame/nintendo/compmahj.cpp index bea3f03c2ee87..ca72e43314b3b 100644 --- a/src/mame/nintendo/compmahj.cpp +++ b/src/mame/nintendo/compmahj.cpp @@ -52,11 +52,11 @@ class compmahj_state : public driver_device void compmahj(machine_config &config); private: + required_device m_maincpu; + void main_map(address_map &map); void io_map(address_map &map); - required_device m_maincpu; - u8 ita_r(); }; diff --git a/src/mame/nintendo/cothello.cpp b/src/mame/nintendo/cothello.cpp index 35eb902523c0d..c63b40357f426 100644 --- a/src/mame/nintendo/cothello.cpp +++ b/src/mame/nintendo/cothello.cpp @@ -77,6 +77,11 @@ class cothello_state : public driver_device required_ioport_array<4> m_inputs; output_finder<3> m_digits; + u16 m_counter = 0; + u8 m_sound_data = 0; + emu_timer *m_counter_timer; + emu_timer *m_beeper_off; + void main_map(address_map &map); u32 screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); @@ -87,11 +92,6 @@ class cothello_state : public driver_device TIMER_CALLBACK_MEMBER(counter_tick); TIMER_CALLBACK_MEMBER(beeper_off) { m_beeper->set_state(0); } - - u16 m_counter = 0; - u8 m_sound_data = 0; - emu_timer *m_counter_timer; - emu_timer *m_beeper_off; }; void cothello_state::machine_start() diff --git a/src/mame/nintendo/nes_clone.cpp b/src/mame/nintendo/nes_clone.cpp index ce5ff86718ec3..4b3a7364f3203 100644 --- a/src/mame/nintendo/nes_clone.cpp +++ b/src/mame/nintendo/nes_clone.cpp @@ -741,8 +741,8 @@ void nes_clone_afbm7800_state::handle_mmc3chr_banks(uint16_t* selected_chrbanks) /* not correct? desert falcon if (m_extraregs[0] & 0x80) { - bankmask = 0x0f; - outerchrbank = (m_extraregs[0] & 0x38) << 1; + bankmask = 0x0f; + outerchrbank = (m_extraregs[0] & 0x38) << 1; } else */ @@ -809,7 +809,7 @@ void nes_clone_taikee_new_state::handle_mmc3chr_banks(uint16_t* selected_chrbank else if (m_extraregs[0] == 0xe8) outerchrbank = 0x80; // 1f mask, but no sprites?? (hot racing) // 1111 0010 - else if (m_extraregs[0] == 0xf2) + else if (m_extraregs[0] == 0xf2) outerchrbank = 0x100; // (winter race) // 1111 1011 else if (m_extraregs[0] == 0xfb) diff --git a/src/mame/nintendo/nes_vt02_vt03.cpp b/src/mame/nintendo/nes_vt02_vt03.cpp index 9e7785a864d43..bc6604f7dc68d 100644 --- a/src/mame/nintendo/nes_vt02_vt03.cpp +++ b/src/mame/nintendo/nes_vt02_vt03.cpp @@ -1498,7 +1498,7 @@ CONS( 2004, vsmaxxvd, 0, 0, nes_vt_vh2009_8mb, nes_vt, nes_vt_swap_op_ CONS( 200?, vsmaxx77, 0, 0, nes_vt_vh2009_8mb, nes_vt, nes_vt_swap_op_d5_d6_state, empty_init, "Senario / JungleTac", "Vs Maxx Wireless 77-in-1", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) CONS( 200?, joysti30, 0, 0, nes_vt_vh2009_4mb, nes_vt, nes_vt_swap_op_d5_d6_state, empty_init, "WinFun / JungleTac", "Joystick 30", MACHINE_IMPERFECT_GRAPHICS | MACHINE_IMPERFECT_SOUND ) // doesn't show WinFun onscreen, but packaging does -// has no audio, is there extra hardware, or is it just using unemulated VT features? +// has no audio, is there extra hardware, or is it just using unemulated VT features? CONS( 2005, lxnoddy, 0, 0, nes_vt_vh2009_pal_2mb, lxnoddy, nes_vt_swap_op_d5_d6_state, empty_init, "Lexibook", "Noddy's TV Console", MACHINE_IMPERFECT_GRAPHICS | MACHINE_NO_SOUND ) diff --git a/src/mame/novag/cexpert.cpp b/src/mame/novag/cexpert.cpp index 776f621899aea..d16041ed674af 100644 --- a/src/mame/novag/cexpert.cpp +++ b/src/mame/novag/cexpert.cpp @@ -67,6 +67,9 @@ class cexpert_state : public driver_device required_device m_beeper; required_ioport_array<8> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_select = 0; + void set_cpu_freq(); // address maps @@ -78,9 +81,6 @@ class cexpert_state : public driver_device void control_w(u8 data); u8 input1_r(); u8 input2_r(); - - u8 m_inp_mux = 0; - u8 m_led_select = 0; }; void cexpert_state::machine_start() diff --git a/src/mame/novag/cforte.cpp b/src/mame/novag/cforte.cpp index 9bbfe1eec5c74..670f901171b35 100644 --- a/src/mame/novag/cforte.cpp +++ b/src/mame/novag/cforte.cpp @@ -65,6 +65,9 @@ class cforte_state : public driver_device required_device m_beeper; required_ioport_array<8> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_select = 0; + // address maps void main_map(address_map &map); @@ -75,9 +78,6 @@ class cforte_state : public driver_device void control_w(u8 data); u8 input1_r(); u8 input2_r(); - - u8 m_inp_mux = 0; - u8 m_led_select = 0; }; void cforte_state::machine_start() diff --git a/src/mame/novag/const.cpp b/src/mame/novag/const.cpp index 4233abbbe2571..12b4be636e595 100644 --- a/src/mame/novag/const.cpp +++ b/src/mame/novag/const.cpp @@ -127,6 +127,10 @@ class const_state : public driver_device required_device m_beeper; required_ioport_array<8> m_inputs; + bool m_power = false; + u8 m_inp_mux = 0; + u8 m_led_select = 0; + // address maps void const_map(address_map &map); void ssensor4_map(address_map &map); @@ -138,10 +142,6 @@ class const_state : public driver_device void control_w(u8 data); u8 input1_r(); u8 input2_r(); - - bool m_power = false; - u8 m_inp_mux = 0; - u8 m_led_select = 0; }; void const_state::machine_start() diff --git a/src/mame/novag/diablo.cpp b/src/mame/novag/diablo.cpp index 3042b71d6ad1e..a3260d6ae3b8b 100644 --- a/src/mame/novag/diablo.cpp +++ b/src/mame/novag/diablo.cpp @@ -76,6 +76,12 @@ class diablo_state : public driver_device required_device m_beeper; required_ioport_array<8> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + u8 m_led_side = 0; + u8 m_lcd_control = 0; + u8 m_lcd_data = 0; + // address maps void diablo68k_map(address_map &map); void scorpio68k_map(address_map &map); @@ -90,12 +96,6 @@ class diablo_state : public driver_device HD44780_PIXEL_UPDATE(lcd_pixel_update); void lcd_palette(palette_device &palette) const; - - u8 m_inp_mux = 0; - u8 m_led_data = 0; - u8 m_led_side = 0; - u8 m_lcd_control = 0; - u8 m_lcd_data = 0; }; void diablo_state::machine_start() diff --git a/src/mame/novag/micro.cpp b/src/mame/novag/micro.cpp index 4ca52f8e869e3..c4c94da04a651 100644 --- a/src/mame/novag/micro.cpp +++ b/src/mame/novag/micro.cpp @@ -59,6 +59,10 @@ class micro_state : public driver_device required_device m_dac; required_ioport m_inputs; + u8 m_led_data = 0; + u8 m_control = 0; + u8 m_inp_mux = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -70,10 +74,6 @@ class micro_state : public driver_device void control_w(u8 data); u8 control_r(); void led_w(u8 data); - - u8 m_led_data = 0; - u8 m_control = 0; - u8 m_inp_mux = 0; }; void micro_state::machine_start() diff --git a/src/mame/novag/micro2.cpp b/src/mame/novag/micro2.cpp index c7db34842c4b7..2ff3132b130a0 100644 --- a/src/mame/novag/micro2.cpp +++ b/src/mame/novag/micro2.cpp @@ -84,6 +84,10 @@ class micro2_state : public driver_device required_device m_dac; required_ioport m_inputs; + bool m_kp_select = false; + u8 m_inp_mux = 0; + u8 m_led_select = 0; + // I/O handlers void update_display(); void mux_w(u8 data); @@ -91,10 +95,6 @@ class micro2_state : public driver_device u8 input_r(); void set_cpu_freq(); - - bool m_kp_select = false; - u8 m_inp_mux = 0; - u8 m_led_select = 0; }; void micro2_state::machine_start() diff --git a/src/mame/novag/robotadv.cpp b/src/mame/novag/robotadv.cpp index 99ad9a3922b3c..6eb82da7eb8f8 100644 --- a/src/mame/novag/robotadv.cpp +++ b/src/mame/novag/robotadv.cpp @@ -83,6 +83,16 @@ class robotadv_state : public driver_device output_finder<6> m_out_motor; output_finder<2> m_out_pos; + u8 m_control1 = 0; + u8 m_control2 = 0; + u8 m_latch = 0; + u8 m_motor_on = 0; + u8 m_motor_dir = 0; + u8 m_limits = 0; + s32 m_counter[4] = { }; + attotime m_pwm_accum[4]; + attotime m_pwm_last; + void main_map(address_map &map); void io_map(address_map &map); @@ -100,16 +110,6 @@ class robotadv_state : public driver_device void update_limits(); void update_clawpos(double *x, double *y); void update_piece(double x, double y); - - u8 m_control1 = 0; - u8 m_control2 = 0; - u8 m_latch = 0; - u8 m_motor_on = 0; - u8 m_motor_dir = 0; - u8 m_limits = 0; - s32 m_counter[4] = { }; - attotime m_pwm_accum[4]; - attotime m_pwm_last; }; diff --git a/src/mame/novag/savant.cpp b/src/mame/novag/savant.cpp index 0a15cc70d3b1d..4f30e5a21f696 100644 --- a/src/mame/novag/savant.cpp +++ b/src/mame/novag/savant.cpp @@ -82,6 +82,12 @@ class savant_state : public driver_device required_shared_ptr m_nvram; required_ioport_array<3> m_inputs; + bool m_wait_in = false; + u8 m_inp_mux = 0; + u8 m_databus = 0; + u8 m_control = 0; + u64 m_lcd_data = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -104,12 +110,6 @@ class savant_state : public driver_device void control_w(u8 data); void lcd_w(u8 data); u8 input_r(); - - bool m_wait_in = false; - u8 m_inp_mux = 0; - u8 m_databus = 0; - u8 m_control = 0; - u64 m_lcd_data = 0; }; void savant_state::machine_start() diff --git a/src/mame/novag/sexpert.cpp b/src/mame/novag/sexpert.cpp index ec753f84e6d6c..a5ca8e10296c6 100644 --- a/src/mame/novag/sexpert.cpp +++ b/src/mame/novag/sexpert.cpp @@ -102,6 +102,11 @@ class sexpert_state : public driver_device required_device m_beeper; required_ioport_array<8> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + u8 m_lcd_control = 0; + u8 m_lcd_data = 0; + void sexpert_set_cpu_freq(); // address maps @@ -118,11 +123,6 @@ class sexpert_state : public driver_device HD44780_PIXEL_UPDATE(lcd_pixel_update); void lcd_palette(palette_device &palette) const; - - u8 m_inp_mux = 0; - u8 m_led_data = 0; - u8 m_lcd_control = 0; - u8 m_lcd_data = 0; }; void sexpert_state::machine_start() @@ -168,6 +168,8 @@ class sforte_state : public sexpert_state virtual void machine_start() override; private: + emu_timer *m_beeptimer = nullptr; + // address maps void sforte_map(address_map &map); @@ -176,7 +178,6 @@ class sforte_state : public sexpert_state virtual void lcd_data_w(u8 data) override; TIMER_CALLBACK_MEMBER(beep) { m_beeper->set_state(param); } - emu_timer *m_beeptimer = nullptr; }; void sforte_state::machine_start() @@ -500,96 +501,96 @@ void sforte_state::sforteb(machine_config &config) ROM Definitions *******************************************************************************/ -ROM_START( sexperta ) // from model 886 +ROM_START( sexperta ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_lo_608.u3", 0x0000, 0x8000, CRC(5c98264c) SHA1(fbbe0d0cf64944fd3a90a7e9711b1deef8b9b51d) ) - ROM_LOAD("se_hi1_608.u1", 0x8000, 0x8000, CRC(68009cb4) SHA1(ae8d1b5058eff72d3fcfd6a011608ae7b3de5060) ) + ROM_LOAD("se_lo_608.u3", 0x00000, 0x8000, CRC(5c98264c) SHA1(fbbe0d0cf64944fd3a90a7e9711b1deef8b9b51d) ) + ROM_LOAD("se_hi1_608.u1", 0x08000, 0x8000, CRC(68009cb4) SHA1(ae8d1b5058eff72d3fcfd6a011608ae7b3de5060) ) ROM_LOAD("se_sf_hi0_c22.u2", 0x10000, 0x8000, CRC(3e42cf7c) SHA1(b2faa36a127e08e5755167a25ed4a07f12d62957) ) ROM_END -ROM_START( sexperta1 ) // from model 878 +ROM_START( sexperta1 ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_202_l.u3", 0x0000, 0x8000, CRC(d51fed16) SHA1(01aaddab36a721a4b9efde94979256d397cd1953) ) // NEC D27C256AD-12 - ROM_LOAD("se_202_h1.u1", 0x8000, 0x8000, CRC(933eafa8) SHA1(293f63a5bc7d760ad675522c98f9f0a49e61aef5) ) // " + ROM_LOAD("se_202_l.u3", 0x00000, 0x8000, CRC(d51fed16) SHA1(01aaddab36a721a4b9efde94979256d397cd1953) ) // NEC D27C256AD-12 + ROM_LOAD("se_202_h1.u1", 0x08000, 0x8000, CRC(933eafa8) SHA1(293f63a5bc7d760ad675522c98f9f0a49e61aef5) ) // " ROM_LOAD("se_c22_h0.u2", 0x10000, 0x8000, CRC(3e42cf7c) SHA1(b2faa36a127e08e5755167a25ed4a07f12d62957) ) // " ROM_END -ROM_START( sexperta2 ) // from model 878 +ROM_START( sexperta2 ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_lo_b15.u3", 0x0000, 0x8000, CRC(6cc9527c) SHA1(29bab809399f2863a88a9c41535ecec0a4fd65ea) ) - ROM_LOAD("se_hi1_b15.u1", 0x8000, 0x8000, CRC(6e57f0c0) SHA1(ea44769a6f54721fd4543366bda932e86e497d43) ) + ROM_LOAD("se_lo_b15.u3", 0x00000, 0x8000, CRC(6cc9527c) SHA1(29bab809399f2863a88a9c41535ecec0a4fd65ea) ) + ROM_LOAD("se_hi1_b15.u1", 0x08000, 0x8000, CRC(6e57f0c0) SHA1(ea44769a6f54721fd4543366bda932e86e497d43) ) ROM_LOAD("se_sf_hi0_a23.u2", 0x10000, 0x8000, CRC(7d4e1528) SHA1(53c7d458a5571afae402f00ae3d0f5066634b068) ) ROM_END -ROM_START( sexpertb ) // from model 887 +ROM_START( sexpertb ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_lo_619.u3", 0x0000, 0x8000, CRC(92002eb6) SHA1(ed8ca16701e00b48fa55c856fa4a8c6613079c02) ) - ROM_LOAD("se_hi1_619.u1", 0x8000, 0x8000, CRC(814b4420) SHA1(c553e6a8c048dcc1cf48d410111a86e06b99d356) ) + ROM_LOAD("se_lo_619.u3", 0x00000, 0x8000, CRC(92002eb6) SHA1(ed8ca16701e00b48fa55c856fa4a8c6613079c02) ) + ROM_LOAD("se_hi1_619.u1", 0x08000, 0x8000, CRC(814b4420) SHA1(c553e6a8c048dcc1cf48d410111a86e06b99d356) ) ROM_LOAD("se_f_hi0_605.u2", 0x10000, 0x8000, CRC(bb07ad52) SHA1(30cf9005021ab2d7b03facdf2d3588bc94dc68a6) ) ROM_END ROM_START( sexpertc ) // ID = E3.6 ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_lo_v3.6.u3", 0x0000, 0x8000, CRC(5a29105e) SHA1(be37bb29b530dbba847a5e8d27d81b36525e47f7) ) - ROM_LOAD("se_hi1.u1", 0x8000, 0x8000, CRC(0085c2c4) SHA1(d84bf4afb022575db09dd9dc12e9b330acce35fa) ) - ROM_LOAD("se_hi0.u2", 0x10000, 0x8000, CRC(2d085064) SHA1(76162322aa7d23a5c07e8356d0bbbb33816419af) ) + ROM_LOAD("se_lo_v3.6.u3", 0x00000, 0x8000, CRC(5a29105e) SHA1(be37bb29b530dbba847a5e8d27d81b36525e47f7) ) + ROM_LOAD("se_hi1.u1", 0x08000, 0x8000, CRC(0085c2c4) SHA1(d84bf4afb022575db09dd9dc12e9b330acce35fa) ) + ROM_LOAD("se_hi0.u2", 0x10000, 0x8000, CRC(2d085064) SHA1(76162322aa7d23a5c07e8356d0bbbb33816419af) ) ROM_END -ROM_START( sexpertc1 ) // from model 902, ID = E3.0 +ROM_START( sexpertc1 ) // ID = E3.0 ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_c24_l.u3", 0x0000, 0x8000, CRC(43ed7a9e) SHA1(273c485e5be6b107b6c5c448003ba7686d4a6d06) ) - ROM_LOAD("se_c23_h1.u1", 0x8000, 0x8000, CRC(0085c2c4) SHA1(d84bf4afb022575db09dd9dc12e9b330acce35fa) ) + ROM_LOAD("se_c24_l.u3", 0x00000, 0x8000, CRC(43ed7a9e) SHA1(273c485e5be6b107b6c5c448003ba7686d4a6d06) ) + ROM_LOAD("se_c23_h1.u1", 0x08000, 0x8000, CRC(0085c2c4) SHA1(d84bf4afb022575db09dd9dc12e9b330acce35fa) ) ROM_LOAD("se_c22_h0.u2", 0x10000, 0x8000, CRC(2d085064) SHA1(76162322aa7d23a5c07e8356d0bbbb33816419af) ) ROM_END ROM_START( sexpertc2 ) // ID = E1.2 ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("se_l_corfix.u3", 0x0000, 0x8000, CRC(d0f65341) SHA1(e8ebbfdbcf8ad613cc68acdb0db011eed855cb9f) ) // NEC D27C256AD-12 - ROM_LOAD("se_h_corfix.u1", 0x8000, 0x8000, CRC(59dc112b) SHA1(e1031648da8fc9479d1134d3fd205af254610c1d) ) // Toshiba TC57256AD-12 - ROM_LOAD("sef_h0_corfix.u2", 0x10000, 0x8000, CRC(c6a1419a) SHA1(017a0ffa9aa59438c879624a7ddea2071d1524b8) ) // Toshiba TC57256AD-15 + ROM_LOAD("e_111_black.u3", 0x00000, 0x8000, CRC(d0f65341) SHA1(e8ebbfdbcf8ad613cc68acdb0db011eed855cb9f) ) // Toshiba TC57256AD-12 + ROM_LOAD("e_111_red.u1", 0x08000, 0x8000, CRC(59dc112b) SHA1(e1031648da8fc9479d1134d3fd205af254610c1d) ) // " + ROM_LOAD("c26_green.u2", 0x10000, 0x8000, CRC(c6a1419a) SHA1(017a0ffa9aa59438c879624a7ddea2071d1524b8) ) // " ROM_END ROM_START( sfortea ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("sf_lo_609.u13", 0x0000, 0x8000, CRC(88138075) SHA1(bc1f3a2829f7299c81b48202c651cde9b8831157) ) - ROM_LOAD("sf_hi1_609.u11", 0x8000, 0x8000, CRC(ccd35d09) SHA1(9101cbdecdec00aa4de6d72c96ecdffbcf3359f6) ) + ROM_LOAD("sf_lo_609.u13", 0x00000, 0x8000, CRC(88138075) SHA1(bc1f3a2829f7299c81b48202c651cde9b8831157) ) + ROM_LOAD("sf_hi1_609.u11", 0x08000, 0x8000, CRC(ccd35d09) SHA1(9101cbdecdec00aa4de6d72c96ecdffbcf3359f6) ) ROM_LOAD("se_f_hi0_c22.u12", 0x10000, 0x8000, CRC(3e42cf7c) SHA1(b2faa36a127e08e5755167a25ed4a07f12d62957) ) ROM_END ROM_START( sfortea1 ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("sfa_lo_204.u13", 0x0000, 0x8000, CRC(78734bfd) SHA1(b6d8e9efccee6f6d0b0cd257a82162bf8ccec719) ) - ROM_LOAD("sfa_hi1_204.u11", 0x8000, 0x8000, CRC(e5e84580) SHA1(bae55c3da7b720bf6ccfb450e383c53cebd5e9ef) ) + ROM_LOAD("sfa_lo_204.u13", 0x00000, 0x8000, CRC(78734bfd) SHA1(b6d8e9efccee6f6d0b0cd257a82162bf8ccec719) ) + ROM_LOAD("sfa_hi1_204.u11", 0x08000, 0x8000, CRC(e5e84580) SHA1(bae55c3da7b720bf6ccfb450e383c53cebd5e9ef) ) ROM_LOAD("sfa_hi0_c22.u12", 0x10000, 0x8000, CRC(3e42cf7c) SHA1(b2faa36a127e08e5755167a25ed4a07f12d62957) ) ROM_END ROM_START( sfortea2 ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("sfalo.u13", 0x0000, 0x8000, CRC(86e0230a) SHA1(0d6e18a17e636b8c7292c8f331349d361892d1a8) ) - ROM_LOAD("sfahi.u11", 0x8000, 0x8000, CRC(81c02746) SHA1(0bf68b68ade5a3263bead88da0a8965fc71483c1) ) + ROM_LOAD("sfalo.u13", 0x00000, 0x8000, CRC(86e0230a) SHA1(0d6e18a17e636b8c7292c8f331349d361892d1a8) ) + ROM_LOAD("sfahi.u11", 0x08000, 0x8000, CRC(81c02746) SHA1(0bf68b68ade5a3263bead88da0a8965fc71483c1) ) ROM_LOAD("sfabook.u12", 0x10000, 0x8000, CRC(3e42cf7c) SHA1(b2faa36a127e08e5755167a25ed4a07f12d62957) ) ROM_END ROM_START( sforteb ) ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("forte_b_lo.u13", 0x0000, 0x8000, CRC(48bfe5d6) SHA1(323642686b6d2fb8db2b7d50c6cd431058078ce1) ) - ROM_LOAD("forte_b_hi1.u11", 0x8000, 0x8000, CRC(9778ca2c) SHA1(d8b88b9768a1a9171c68cbb0892b817d68d78351) ) + ROM_LOAD("forte_b_lo.u13", 0x00000, 0x8000, CRC(48bfe5d6) SHA1(323642686b6d2fb8db2b7d50c6cd431058078ce1) ) + ROM_LOAD("forte_b_hi1.u11", 0x08000, 0x8000, CRC(9778ca2c) SHA1(d8b88b9768a1a9171c68cbb0892b817d68d78351) ) ROM_LOAD("forte_b_hi0.u12", 0x10000, 0x8000, CRC(bb07ad52) SHA1(30cf9005021ab2d7b03facdf2d3588bc94dc68a6) ) ROM_END ROM_START( sfortec ) // ID = F3.6 ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("sfl_124.u13", 0x0000, 0x8000, CRC(c0cba797) SHA1(c630c3552178854a46275c18b0741b0ad1ae3c75) ) // Toshiba TC57256AD-12 - ROM_LOAD("sfh_b15.u11", 0x8000, 0x8000, CRC(e129ec69) SHA1(76feb0d3110a1c7746233cd89c0b2aaae9d0e427) ) // " + ROM_LOAD("sfl_124.u13", 0x00000, 0x8000, CRC(c0cba797) SHA1(c630c3552178854a46275c18b0741b0ad1ae3c75) ) // Toshiba TC57256AD-12 + ROM_LOAD("sfh_b15.u11", 0x08000, 0x8000, CRC(e129ec69) SHA1(76feb0d3110a1c7746233cd89c0b2aaae9d0e427) ) // " ROM_LOAD("sef_b07.u12", 0x10000, 0x8000, CRC(2d085064) SHA1(76162322aa7d23a5c07e8356d0bbbb33816419af) ) // NEC D27C256AD-12 ROM_END ROM_START( sfortec1 ) // ID = F1.2 ROM_REGION( 0x18000, "maincpu", 0 ) - ROM_LOAD("sfl_c_111.u13", 0x0000, 0x8000, CRC(f040cf30) SHA1(1fc1220b8ed67cdffa3866d230ce001721cf684f) ) // Toshiba TC57256AD-12 - ROM_LOAD("sfh_c_111.u11", 0x8000, 0x8000, CRC(0f926b32) SHA1(9c7270ecb3f41dd9172a9a7928e6e04e64b2a340) ) // NEC D27C256AD-12 - ROM_LOAD("h0_c_c26.u12", 0x10000, 0x8000, CRC(c6a1419a) SHA1(017a0ffa9aa59438c879624a7ddea2071d1524b8) ) // Toshiba TC57256AD-12 + ROM_LOAD("sfl_c_111.u13", 0x00000, 0x8000, CRC(f040cf30) SHA1(1fc1220b8ed67cdffa3866d230ce001721cf684f) ) // Toshiba TC57256AD-12 + ROM_LOAD("sfh_c_111.u11", 0x08000, 0x8000, CRC(0f926b32) SHA1(9c7270ecb3f41dd9172a9a7928e6e04e64b2a340) ) // NEC D27C256AD-12 + ROM_LOAD("h0_c_c26.u12", 0x10000, 0x8000, CRC(c6a1419a) SHA1(017a0ffa9aa59438c879624a7ddea2071d1524b8) ) // Toshiba TC57256AD-12 ROM_END } // anonymous namespace @@ -605,9 +606,9 @@ SYST( 1988, sexperta, 0, 0, sexpert, sexpert, sexpert_state, init SYST( 1987, sexperta1, sexperta, 0, sexpert, sexpert, sexpert_state, init_sexpert, "Novag", "Super Expert (version A, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // 878 SYST( 1987, sexperta2, sexperta, 0, sexpert, sexpert, sexpert_state, init_sexpert, "Novag", "Super Expert (version A, set 3)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // 878 SYST( 1988, sexpertb, sexperta, 0, sexpertb, sexpertb, sexpert_state, init_sexpert, "Novag", "Super Expert (version B)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // 887 -SYST( 1990, sexpertc, sexperta, 0, sexpertb, sexpertb, sexpert_state, init_sexpert, "Novag", "Super Expert (version C, v3.6)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) +SYST( 1990, sexpertc, sexperta, 0, sexpertb, sexpertb, sexpert_state, init_sexpert, "Novag", "Super Expert (version C, v3.6)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // 902 SYST( 1990, sexpertc1, sexperta, 0, sexpertb, sexpertb, sexpert_state, init_sexpert, "Novag", "Super Expert (version C, v3.0)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // 902 -SYST( 1990, sexpertc2, sexperta, 0, sexpertb, sexpertb, sexpert_state, init_sexpert, "Novag", "Super Expert (version C, v1.2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) +SYST( 1990, sexpertc2, sexperta, 0, sexpertb, sexpertb, sexpert_state, init_sexpert, "Novag", "Super Expert (version C, v1.2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) // 902 SYST( 1987, sfortea, 0, 0, sforte, sexpert, sforte_state, init_sexpert, "Novag", "Super Forte (version A, set 1)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) SYST( 1987, sfortea1, sfortea, 0, sforte, sexpert, sforte_state, init_sexpert, "Novag", "Super Forte (version A, set 2)", MACHINE_SUPPORTS_SAVE | MACHINE_CLICKABLE_ARTWORK ) diff --git a/src/mame/novag/snova.cpp b/src/mame/novag/snova.cpp index 6c4250aa7fb06..d6b39d73b250f 100644 --- a/src/mame/novag/snova.cpp +++ b/src/mame/novag/snova.cpp @@ -102,6 +102,11 @@ class snova_state : public driver_device required_ioport_array<2> m_inputs; output_finder<4, 10> m_out_lcd; + bool m_lcd_strobe = false; + u8 m_inp_mux = 0; + u8 m_select = 0; + u8 m_led_data = 0; + void snova_map(address_map &map); void supremo_map(address_map &map); @@ -113,11 +118,6 @@ class snova_state : public driver_device void p2_w(u8 data); void p5_w(u8 data); void p6_w(u8 data); - - bool m_lcd_strobe = false; - u8 m_inp_mux = 0; - u8 m_select = 0; - u8 m_led_data = 0; }; void snova_state::machine_start() diff --git a/src/mame/pc/teradrive.cpp b/src/mame/pc/teradrive.cpp index 56809da637e82..adbade52c99c8 100644 --- a/src/mame/pc/teradrive.cpp +++ b/src/mame/pc/teradrive.cpp @@ -54,12 +54,12 @@ void teradrive_state::at_softlists(machine_config &config) { SOFTWARE_LIST(config, "pc_disk_list").set_original("ibm5150"); SOFTWARE_LIST(config, "at_disk_list").set_original("ibm5170"); -// SOFTWARE_LIST(config, "at_cdrom_list").set_original("ibm5170_cdrom"); +// SOFTWARE_LIST(config, "at_cdrom_list").set_original("ibm5170_cdrom"); SOFTWARE_LIST(config, "at_hdd_list").set_original("ibm5170_hdd"); SOFTWARE_LIST(config, "midi_disk_list").set_compatible("midi_flop"); -// TODO: MD portion -// TODO: Teradrive SW list +// TODO: MD portion +// TODO: Teradrive SW list } void teradrive_state::teradrive_map(address_map &map) diff --git a/src/mame/philips/odyssey2.cpp b/src/mame/philips/odyssey2.cpp index 0ea05a216c42f..5ed177a1ff325 100644 --- a/src/mame/philips/odyssey2.cpp +++ b/src/mame/philips/odyssey2.cpp @@ -161,6 +161,10 @@ class odyssey2_state : public driver_device required_ioport_array<8> m_keyboard; required_ioport_array<2> m_joysticks; + u8 m_ram[0x80]; + u8 m_p1 = 0xff; + u8 m_p2 = 0xff; + virtual void machine_start() override; virtual void machine_reset() override; @@ -177,10 +181,6 @@ class odyssey2_state : public driver_device void odyssey2_io(address_map &map); void odyssey2_mem(address_map &map); - u8 m_ram[0x80]; - u8 m_p1 = 0xff; - u8 m_p2 = 0xff; - private: u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); }; @@ -208,6 +208,10 @@ class vpp_state : public odyssey2_state required_device m_i8243; required_device m_ef934x; + u8 m_mix_i8244 = 0xff; + u8 m_mix_ef934x = 0xff; + u8 m_ef934x_extram[0x800]; + u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); void p2_write(u8 data); @@ -217,10 +221,6 @@ class vpp_state : public odyssey2_state inline offs_t ef934x_extram_address(offs_t offset); u8 ef934x_extram_r(offs_t offset); void ef934x_extram_w(offs_t offset, u8 data); - - u8 m_mix_i8244 = 0xff; - u8 m_mix_ef934x = 0xff; - u8 m_ef934x_extram[0x800]; }; void odyssey2_state::machine_start() diff --git a/src/mame/pinball/recel.cpp b/src/mame/pinball/recel.cpp index 00c7ae114985a..191c0405a8fd6 100644 --- a/src/mame/pinball/recel.cpp +++ b/src/mame/pinball/recel.cpp @@ -383,146 +383,170 @@ void recel_state::recel(machine_config & config) genpin_audio(config); } -// Is this the correct order? -#define RECEL_BIOS \ +/* There are two different BIOS sets: + -13: For machines with personality PROM 1702. + -14: For machines with 2716 EPROM. +*/ + +#define RECEL_BIOS_13 \ + ROM_REGION( 0x0800, "maincpu", ROMREGION_ERASEFF ) \ + ROM_LOAD("a2361_13.b1", 0x0000, 0x0400, NO_DUMP ) \ + ROM_LOAD("a2362_13.b2", 0x0400, 0x0400, NO_DUMP ) + +#define RECEL_BIOS_14 \ ROM_REGION( 0x0800, "maincpu", ROMREGION_ERASEFF ) \ - ROM_LOAD("a2362.b2", 0x0000, 0x0400, NO_DUMP ) \ - ROM_LOAD("a2361.b1", 0x0400, 0x0400, NO_DUMP ) + ROM_LOAD("a2361_14.b1", 0x0000, 0x0400, NO_DUMP ) \ + ROM_LOAD("a2362_14.b2", 0x0400, 0x0400, NO_DUMP ) -ROM_START( recel ) - RECEL_BIOS +ROM_START( recel13 ) + RECEL_BIOS_13 + + ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) +ROM_END + +ROM_START( recel14 ) + RECEL_BIOS_14 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) ROM_END ROM_START(r_alaska) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("al.c5", 0x0000, 0x0100, CRC(905ef624) SHA1(ab0bb2e7262650b670524ce9f88bd1f14ffd749a) ) + ROM_LOAD("al.c5", 0x0000, 0x0100, CRC(905ef624) SHA1(ab0bb2e7262650b670524ce9f88bd1f14ffd749a) ) ROM_END ROM_START(r_hotcold) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("hc.c5", 0x0000, 0x0100, CRC(f58d0c05) SHA1(54ecf9f67ce3a5264bfd9c063353705f9202d524) ) + ROM_LOAD("hc.c5", 0x0000, 0x0100, CRC(f58d0c05) SHA1(54ecf9f67ce3a5264bfd9c063353705f9202d524) ) ROM_END ROM_START(r_screech) - RECEL_BIOS + RECEL_BIOS_13 + + ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) + ROM_LOAD("sc_1_1702.bin", 0x0000, 0x0100, CRC(c9185ef3) SHA1(3ace6cccc96375c5eab3d43f86f52bf52124334e) ) +ROM_END + +ROM_START(r_screech4) + RECEL_BIOS_14 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("sc.c5", 0x0000, 0x0800, CRC(ddf2beac) SHA1(2ce67e2679bf7d545434a90209c462ad53c50e01) ) + ROM_LOAD("sc.c5", 0x0000, 0x0800, CRC(ddf2beac) SHA1(2ce67e2679bf7d545434a90209c462ad53c50e01) ) ROM_END ROM_START(r_mrevil) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD( "me.c5", 0x0000, 0x0100, CRC(53ce24a0) SHA1(42d376e3e7a4e94a09db2f974af8d4869579d0f5) ) + ROM_LOAD( "me.c5", 0x0000, 0x0100, CRC(53ce24a0) SHA1(42d376e3e7a4e94a09db2f974af8d4869579d0f5) ) ROM_END ROM_START(r_torneo) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("to.c5", 0x0000, 0x0100, CRC(06518bca) SHA1(6e8d4dba3cc5713208794aafc40cad6aca558aa6) ) + ROM_LOAD("to.c5", 0x0000, 0x0100, CRC(06518bca) SHA1(6e8d4dba3cc5713208794aafc40cad6aca558aa6) ) ROM_END ROM_START(r_crzyrace) - RECEL_BIOS + RECEL_BIOS_14 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("cr.c5", 0x0000, 0x0800, CRC(60088804) SHA1(a73a7f8a0583a79588f9823a5e65ed28edad96a3) ) + ROM_LOAD("cr.c5", 0x0000, 0x0800, CRC(60088804) SHA1(a73a7f8a0583a79588f9823a5e65ed28edad96a3) ) ROM_END ROM_START(r_fairfght) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("fa.c5", 0x0000, 0x0100, CRC(5d3694da) SHA1(4d0a8033acb6ef2e2af107f76540fd19b4a39b12) ) + ROM_LOAD("fa.c5", 0x0000, 0x0100, CRC(5d3694da) SHA1(4d0a8033acb6ef2e2af107f76540fd19b4a39b12) ) ROM_END ROM_START(r_pokrplus) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("po.c5", 0x0000, 0x0100, CRC(60a199a8) SHA1(045d61f56ea03a694722da810d465ab65d85cbfd) ) - //ROM_LOAD( "po2.c5", 0x0000, 0x0100, CRC(571ee27b) SHA1(482a3ba18eff05bce4cab073b1f13fc2f145bb2b) ) - //ROM_LOAD( "po3.c5", 0x0000, 0x0800, CRC(fadd715a) SHA1(6c5b6e8fcf77be2b0b7076dc1139760f7e4d5688) ) + ROM_LOAD("po.c5", 0x0000, 0x0100, CRC(60a199a8) SHA1(045d61f56ea03a694722da810d465ab65d85cbfd) ) + //ROM_LOAD( "po2.c5", 0x0000, 0x0100, CRC(571ee27b) SHA1(482a3ba18eff05bce4cab073b1f13fc2f145bb2b) ) + //ROM_LOAD( "po3.c5", 0x0000, 0x0800, CRC(fadd715a) SHA1(6c5b6e8fcf77be2b0b7076dc1139760f7e4d5688) ) ROM_END ROM_START(r_mrdoom) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("md.c5", 0x0000, 0x0100, CRC(ca679a69) SHA1(f08f0cfe646f08882473dcd5d23889fffe4a03c8) ) + ROM_LOAD("md.c5", 0x0000, 0x0100, CRC(ca679a69) SHA1(f08f0cfe646f08882473dcd5d23889fffe4a03c8) ) ROM_END ROM_START(r_cavalier) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("ca.c5", 0x0000, 0x0100, CRC(dc2e865f) SHA1(3f15f90dafa9d5e42381605044b6c9b529afd3af) ) - //ROM_LOAD( "ca2.c5", 0x0000, 0x0100, CRC(dc2e865f) SHA1(3f15f90dafa9d5e42381605044b6c9b529afd3af) ) - //ROM_LOAD( "ca3.c5", 0x0000, 0x0800, CRC(fddd2373) SHA1(d0c79aefd2806066455c721a1361d11d6dab7d5f) ) + ROM_LOAD("ca.c5", 0x0000, 0x0100, CRC(dc2e865f) SHA1(3f15f90dafa9d5e42381605044b6c9b529afd3af) ) + //ROM_LOAD( "ca2.c5", 0x0000, 0x0100, CRC(dc2e865f) SHA1(3f15f90dafa9d5e42381605044b6c9b529afd3af) ) + //ROM_LOAD( "ca3.c5", 0x0000, 0x0800, CRC(fddd2373) SHA1(d0c79aefd2806066455c721a1361d11d6dab7d5f) ) ROM_END ROM_START(r_swash) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("sw.c5", 0x0000, 0x0100, CRC(69326f5f) SHA1(f0bb4251f579ccf97c1cabb63254ba466ccd141e) ) + ROM_LOAD("sw.c5", 0x0000, 0x0100, CRC(69326f5f) SHA1(f0bb4251f579ccf97c1cabb63254ba466ccd141e) ) ROM_END ROM_START(r_quijote) - RECEL_BIOS + RECEL_BIOS_13 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("qu.c5", 0x0000, 0x0100, CRC(1fd535d0) SHA1(a9c9a72881d195a0de751f10fa54fb181523a33f) ) - //ROM_LOAD( "qu2.c5", 0x0000, 0x0100, CRC(a88224ee) SHA1(cb85edcacc6001a9d865ef7e22711d6f62f1fdc1) ) - //ROM_LOAD( "qu3.c5", 0x0000, 0x0800, CRC(6eb5a08d) SHA1(3bfec2c0fdd1d8e1b03a5c189d2f37e1a52d065b) ) + ROM_LOAD("qu.c5", 0x0000, 0x0100, CRC(1fd535d0) SHA1(a9c9a72881d195a0de751f10fa54fb181523a33f) ) + //ROM_LOAD( "qu2.c5", 0x0000, 0x0100, CRC(a88224ee) SHA1(cb85edcacc6001a9d865ef7e22711d6f62f1fdc1) ) + //ROM_LOAD( "qu3.c5", 0x0000, 0x0800, CRC(6eb5a08d) SHA1(3bfec2c0fdd1d8e1b03a5c189d2f37e1a52d065b) ) ROM_END ROM_START(r_flipper) - RECEL_BIOS + RECEL_BIOS_14 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("fl.c5", 0x0000, 0x0800, CRC(76ee0370) SHA1(f2a835a0b76f7258d5e65390c239f5456e30e87a) ) + ROM_LOAD("fl.c5", 0x0000, 0x0800, CRC(76ee0370) SHA1(f2a835a0b76f7258d5e65390c239f5456e30e87a) ) ROM_END ROM_START(r_blackmag) - RECEL_BIOS + RECEL_BIOS_14 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) ROM_LOAD("bm_1065_1.bin", 0x0000, 0x0800, CRC(a917718c) SHA1(0b4fdf270560df902e95b34c25cca20e91f1071c) ) ROM_END ROM_START(r_blackm4) - RECEL_BIOS + RECEL_BIOS_14 ROM_REGION( 0x0800, "module", ROMREGION_ERASEFF ) - ROM_LOAD("b4.c5", 0x0000, 0x0800, CRC(cd383f5b) SHA1(c38acaae46e5fd2660efbd0e2d35e295892e60a5) ) + ROM_LOAD("b4.c5", 0x0000, 0x0800, CRC(cd383f5b) SHA1(c38acaae46e5fd2660efbd0e2d35e295892e60a5) ) ROM_END } // anonymous namespace -GAME(1977, recel, 0, recel, recel, recel_state, empty_init, ROT0, "Recel", "Recel BIOS", MACHINE_IS_BIOS_ROOT | MACHINE_NOT_WORKING) - -GAME(1978, r_alaska, recel, recel, recel, recel_state, empty_init, ROT0, "Interflip", "Alaska", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_hotcold, recel, recel, recel, recel_state, empty_init, ROT0, "Inder", "Hot & Cold", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_screech, recel, recel, recel, recel_state, empty_init, ROT0, "Inder", "Screech", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_mrevil, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Mr. Evil", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_torneo, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Torneo", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_crzyrace, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Crazy Race", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_fairfght, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Fair Fight", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1978, r_pokrplus, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Poker Plus", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1979, r_mrdoom, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Mr. Doom", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1979, r_cavalier, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Cavalier", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1979, r_swash, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "SwashBuckler", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1979, r_quijote, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Don Quijote", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1980, r_flipper, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "The Flipper Game", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1980, r_blackmag, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Black Magic", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) -GAME(1980, r_blackm4, recel, recel, recel, recel_state, empty_init, ROT0, "Recel", "Black Magic 4", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1977, recel13, 0, recel, recel, recel_state, empty_init, ROT0, "Recel", "Recel BIOS (for 1702)", MACHINE_IS_BIOS_ROOT | MACHINE_NOT_WORKING) +GAME(1977, recel14, 0, recel, recel, recel_state, empty_init, ROT0, "Recel", "Recel BIOS (for 2716)", MACHINE_IS_BIOS_ROOT | MACHINE_NOT_WORKING) + +GAME(1978, r_alaska, recel13, recel, recel, recel_state, empty_init, ROT0, "Interflip", "Alaska", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_hotcold, recel13, recel, recel, recel_state, empty_init, ROT0, "Inder", "Hot & Cold", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_screech, recel13, recel, recel, recel_state, empty_init, ROT0, "Inder", "Screech (1 player)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_screech4, recel14, recel, recel, recel_state, empty_init, ROT0, "Inder", "Screech (4 players)", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_mrevil, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Mr. Evil", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_torneo, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Torneo", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_crzyrace, recel14, recel, recel, recel_state, empty_init, ROT0, "Recel", "Crazy Race", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_fairfght, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Fair Fight", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1978, r_pokrplus, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Poker Plus", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1979, r_mrdoom, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Mr. Doom", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1979, r_cavalier, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Cavalier", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1979, r_swash, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "SwashBuckler", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1979, r_quijote, recel13, recel, recel, recel_state, empty_init, ROT0, "Recel", "Don Quijote", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1980, r_flipper, recel14, recel, recel, recel_state, empty_init, ROT0, "Recel", "The Flipper Game", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1980, r_blackmag, recel14, recel, recel, recel_state, empty_init, ROT0, "Recel", "Black Magic", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) +GAME(1980, r_blackm4, recel14, recel, recel, recel_state, empty_init, ROT0, "Recel", "Black Magic 4", MACHINE_IS_SKELETON_MECHANICAL | MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/saitek/chesstrv.cpp b/src/mame/saitek/chesstrv.cpp index aaf03634e2f9a..b5f64a0aae3a7 100644 --- a/src/mame/saitek/chesstrv.cpp +++ b/src/mame/saitek/chesstrv.cpp @@ -85,6 +85,11 @@ class chesstrv_state : public driver_device output_finder<> m_computing; required_ioport_array<4> m_inputs; + std::unique_ptr m_ram; + u8 m_ram_address = 0; + u8 m_inp_mux = 0; + u8 m_7seg_data = 0; + void chesstrv_mem(address_map &map); void chesstrv_io(address_map &map); @@ -100,11 +105,6 @@ class chesstrv_state : public driver_device void ram_address_w(u8 data) { m_ram_address = data; } u8 ram_data_r() { return m_ram[m_ram_address]; } void ram_data_w(u8 data) { m_ram[m_ram_address] = data; } - - std::unique_ptr m_ram; - u8 m_ram_address = 0; - u8 m_inp_mux = 0; - u8 m_7seg_data = 0; }; void chesstrv_state::machine_start() diff --git a/src/mame/saitek/companion.cpp b/src/mame/saitek/companion.cpp index 1416e2590c2f4..f44957660ff95 100644 --- a/src/mame/saitek/companion.cpp +++ b/src/mame/saitek/companion.cpp @@ -61,6 +61,10 @@ class compan_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + u8 m_led_direct = 0; + // address maps void main_map(address_map &map); @@ -70,10 +74,6 @@ class compan_state : public driver_device u8 input_r(); void sled_w(int state); void cled_w(int state); - - u8 m_inp_mux = 0; - u8 m_led_data = 0; - u8 m_led_direct = 0; }; void compan_state::machine_start() diff --git a/src/mame/saitek/companion2.cpp b/src/mame/saitek/companion2.cpp index 510a2b6088ecb..4891b01fdc0a0 100644 --- a/src/mame/saitek/companion2.cpp +++ b/src/mame/saitek/companion2.cpp @@ -61,12 +61,12 @@ Hardware notes: - port 2 I/O is changed a bit, rest is same as compan2 HD6301V1C42P MCU is used in: -- CXG Enterprise "S" (black/brown/blue) -- CXG Star Chess (black/gray) -- CXG Computachess III -- CXG Super Computachess -- CXG Crown -- CXG Sphinx Galaxy 2 (suspected) +- CXG Enterprise "S" (model 208, black/brown/blue) +- CXG Star Chess (model 209, black/gray) +- CXG Computachess III (model 008) +- CXG Super Computachess (model 009) +- CXG Crown (model 228) +- CXG Sphinx Galaxy 2 (model 628, suspected) - Fidelity Genesis (Fidelity brand Computachess III) - Mephisto Merlin 4K (H+G brand Computachess III) - Multitech Enterprise (Multitech brand Super Computachess) @@ -120,6 +120,11 @@ class compan2_state : public driver_device required_device m_display; required_ioport_array<3> m_inputs; + emu_timer *m_standbytimer; + emu_timer *m_nmitimer; + bool m_power = false; + u8 m_inp_mux = 0; + // I/O handlers u8 input1_r(); u8 input2_r(); @@ -130,11 +135,6 @@ class compan2_state : public driver_device void set_cpu_freq(); TIMER_CALLBACK_MEMBER(set_pin); - - emu_timer *m_standbytimer; - emu_timer *m_nmitimer; - bool m_power = false; - u8 m_inp_mux = 0; }; void compan2_state::machine_start() @@ -226,7 +226,7 @@ u8 compan2_state::input2_r() void compan2_state::mux_w(u8 data) { // P30-P37: input mux, led data - m_inp_mux = data ^ 0xff; + m_inp_mux = ~data; m_display->write_mx(m_inp_mux); } @@ -278,7 +278,7 @@ static INPUT_PORTS_START( enterp ) PORT_BIT(0x04, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_M) PORT_NAME("Multi Move") PORT_BIT(0x08, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_2) PORT_CODE(KEYCODE_2_PAD) PORT_NAME("Queen") PORT_BIT(0x10, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_L) PORT_NAME("Level") - PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_S) PORT_NAME("Sound/Color") + PORT_BIT(0x20, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_S) PORT_CODE(KEYCODE_C) PORT_NAME("Sound/Color") PORT_BIT(0x40, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_T) PORT_NAME("Take Back") PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_KEYPAD) PORT_CODE(KEYCODE_N) PORT_NAME("New Game") diff --git a/src/mame/saitek/corona.cpp b/src/mame/saitek/corona.cpp index 1401ba3c94df2..450d5d3ed0d4c 100644 --- a/src/mame/saitek/corona.cpp +++ b/src/mame/saitek/corona.cpp @@ -56,6 +56,13 @@ class corona_state : public saitek_stratos_state required_device m_dac; required_ioport_array<8+1> m_inputs; + u8 m_control1 = 0; + u8 m_control2 = 0; + u8 m_select1 = 0; + u8 m_select2 = 0; + u8 m_led_data1 = 0; + u8 m_led_data2 = 0; + void main_map(address_map &map); // I/O handlers @@ -70,13 +77,6 @@ class corona_state : public saitek_stratos_state u8 control2_r(); u8 chessboard_r(); void lcd_reset_w(u8 data); - - u8 m_control1 = 0; - u8 m_control2 = 0; - u8 m_select1 = 0; - u8 m_select2 = 0; - u8 m_led_data1 = 0; - u8 m_led_data2 = 0; }; void corona_state::machine_start() diff --git a/src/mame/saitek/cp2000.cpp b/src/mame/saitek/cp2000.cpp index 6d9c175a7125a..627d260c65f9e 100644 --- a/src/mame/saitek/cp2000.cpp +++ b/src/mame/saitek/cp2000.cpp @@ -67,6 +67,10 @@ class cp2000_state : public driver_device required_device m_dac; required_ioport_array<4> m_inputs; + u16 m_inp_mux = 0; + u8 m_select = 0; + u8 m_7seg_data = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -76,10 +80,6 @@ class cp2000_state : public driver_device void control_w(u8 data); void digit_w(u8 data); u8 input_r(); - - u16 m_inp_mux = 0; - u8 m_select = 0; - u8 m_7seg_data = 0; }; void cp2000_state::machine_start() diff --git a/src/mame/saitek/delta1.cpp b/src/mame/saitek/delta1.cpp index 27778de589ae2..859335aac2d38 100644 --- a/src/mame/saitek/delta1.cpp +++ b/src/mame/saitek/delta1.cpp @@ -67,6 +67,13 @@ class delta1_state : public driver_device required_device m_display; required_ioport_array<5> m_inputs; + u8 m_mux_data = 0; + u8 m_led_select = 0; + u8 m_inp_mux = 0; + u8 m_7seg_data = 0; + bool m_7seg_rc = false; + bool m_blink = false; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -78,13 +85,6 @@ class delta1_state : public driver_device void mux_w(u8 data); void digit_w(u8 data); u8 input_r(); - - u8 m_mux_data = 0; - u8 m_led_select = 0; - u8 m_inp_mux = 0; - u8 m_7seg_data = 0; - bool m_7seg_rc = false; - bool m_blink = false; }; void delta1_state::machine_start() diff --git a/src/mame/saitek/exechess.cpp b/src/mame/saitek/exechess.cpp index f68b83f72a374..779d782913572 100644 --- a/src/mame/saitek/exechess.cpp +++ b/src/mame/saitek/exechess.cpp @@ -58,6 +58,10 @@ class exechess_state : public driver_device output_finder<> m_battery; required_ioport_array<4> m_inputs; + std::unique_ptr m_ram; + u8 m_ram_address[2] = { }; + u64 m_lcd_data[2] = { }; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -71,10 +75,6 @@ class exechess_state : public driver_device template void ram_address_w(u8 data); u8 ram_data_r(); void ram_data_w(u8 data); - - std::unique_ptr m_ram; - u8 m_ram_address[2] = { }; - u64 m_lcd_data[2] = { }; }; void exechess_state::machine_start() diff --git a/src/mame/saitek/intchess.cpp b/src/mame/saitek/intchess.cpp index 2feba38489483..677bfa485face 100644 --- a/src/mame/saitek/intchess.cpp +++ b/src/mame/saitek/intchess.cpp @@ -81,6 +81,9 @@ class intchess_state : public driver_device required_device m_palette; required_device m_cass; + u8 m_select = 0; + u8 m_7seg_data = 0; + // address maps void main_map(address_map &map); @@ -95,9 +98,6 @@ class intchess_state : public driver_device void vram_w(offs_t offset, u8 data); TIMER_DEVICE_CALLBACK_MEMBER(cass_input); - - u8 m_select = 0; - u8 m_7seg_data = 0; }; void intchess_state::machine_start() diff --git a/src/mame/saitek/leonardo.cpp b/src/mame/saitek/leonardo.cpp index 4e4c2fdfb4b87..035aa7521de7c 100644 --- a/src/mame/saitek/leonardo.cpp +++ b/src/mame/saitek/leonardo.cpp @@ -27,10 +27,10 @@ Leonardo (1986): - 8KB RAM(M5M5165P-15 or compatible) - magnet sensors chessboard with 16 leds -The 6301Y0 was seen with internal maskrom serial A96 and B40. It appears to be -running in mode 1 (expanded mode): the internal ROM is disabled and the MCU can -be emulated as if it's a HD6303Y. It's not known what's on the internal ROM, -it could even be from another SciSys chesscomputer. +The 6301Y0 was seen with internal maskrom serial A96 and B40. It is actually +one from another SciSys chesscomputer (Turbo 16K or Turbo S-24K). It appears to +be running in mode 1 (expanded mode): the internal ROM is disabled and the MCU +can be emulated as if it's a HD6303Y. Galileo (1988): - HD6303YP MCU @ 12MHz @@ -111,6 +111,11 @@ class leo_state : public driver_device required_device m_dac; required_ioport_array<9> m_inputs; + int m_ack_state = 0; + int m_rts_state = 0; + u8 m_inp_mux = 0; + u8 m_led_data[2] = { }; + void main_map(address_map &map); void update_display(); @@ -126,11 +131,6 @@ class leo_state : public driver_device void p5_w(u8 data); u8 p5_r(); void p6_w(u8 data); - - int m_ack_state = 0; - int m_rts_state = 0; - u8 m_inp_mux = 0; - u8 m_led_data[2] = { }; }; void leo_state::machine_start() diff --git a/src/mame/saitek/mark5.cpp b/src/mame/saitek/mark5.cpp index ab72a1a0ea0e9..510a36b99c49f 100644 --- a/src/mame/saitek/mark5.cpp +++ b/src/mame/saitek/mark5.cpp @@ -101,6 +101,13 @@ class mark5_state : public driver_device required_ioport_array<7+2> m_inputs; output_finder<3, 8, 34> m_out_x; + u8 m_dac_data = 0; + u8 m_lcd_lcd = 0; + u8 m_lcd_rowsel = 0; + u8 m_cb_mux = 0; + + emu_timer *m_irqtimer = nullptr; + // address maps void mark5_map(address_map &map); void mark6_map(address_map &map); @@ -121,12 +128,6 @@ class mark5_state : public driver_device template void pwm_output_w(offs_t offset, u8 data); template void lcd_output_w(u64 data); - u8 m_dac_data = 0; - u8 m_lcd_lcd = 0; - u8 m_lcd_rowsel = 0; - u8 m_cb_mux = 0; - - emu_timer *m_irqtimer = nullptr; TIMER_CALLBACK_MEMBER(interrupt); void write_lcd(int state); }; diff --git a/src/mame/saitek/minichess.cpp b/src/mame/saitek/minichess.cpp index 07e820d0e2cbf..7fe5827bfadb4 100644 --- a/src/mame/saitek/minichess.cpp +++ b/src/mame/saitek/minichess.cpp @@ -63,16 +63,16 @@ class mini_state : public driver_device output_finder<> m_computing; required_ioport_array<5> m_inputs; + u8 m_inp_mux = 0; + u8 m_lcd_select = 0; + u8 m_lcd_data = 0; + TIMER_DEVICE_CALLBACK_MEMBER(computing) { m_computing = 1; } void update_display(); template void seg_w(u8 data); void mux_w(u16 data); u16 input_r(); - - u8 m_inp_mux = 0; - u8 m_lcd_select = 0; - u8 m_lcd_data = 0; }; void mini_state::machine_start() diff --git a/src/mame/saitek/prschess.cpp b/src/mame/saitek/prschess.cpp index 71bb6b9d2ec11..03b9ee4d16b6f 100644 --- a/src/mame/saitek/prschess.cpp +++ b/src/mame/saitek/prschess.cpp @@ -62,6 +62,9 @@ class prschess_state : public driver_device required_device m_dac; required_ioport_array<3> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data[2] = { }; + // address maps void main_map(address_map &map); @@ -70,9 +73,6 @@ class prschess_state : public driver_device void leds_w(offs_t offset, u8 data); void control_w(u8 data); u8 input_r(); - - u8 m_inp_mux = 0; - u8 m_led_data[2] = { }; }; void prschess_state::machine_start() diff --git a/src/mame/saitek/renaissance.cpp b/src/mame/saitek/renaissance.cpp index c880d617d6f32..094bf5ea0ed4f 100644 --- a/src/mame/saitek/renaissance.cpp +++ b/src/mame/saitek/renaissance.cpp @@ -94,6 +94,11 @@ class ren_state : public driver_device required_ioport_array<8+1> m_inputs; output_finder<16, 34> m_out_lcd; + int m_ack_state = 0; + int m_rts_state = 0; + u8 m_inp_mux = 0; + u8 m_led_data[2] = { }; + void main_map(address_map &map); void lcd_pwm_w(offs_t offset, u8 data); @@ -113,11 +118,6 @@ class ren_state : public driver_device void p5_w(u8 data); u8 p6_r(); void p6_w(u8 data); - - int m_ack_state = 0; - int m_rts_state = 0; - u8 m_inp_mux = 0; - u8 m_led_data[2] = { }; }; void ren_state::machine_start() diff --git a/src/mame/saitek/risc2500.cpp b/src/mame/saitek/risc2500.cpp index 05abb17c19428..2224b8166426e 100644 --- a/src/mame/saitek/risc2500.cpp +++ b/src/mame/saitek/risc2500.cpp @@ -105,6 +105,13 @@ class risc2500_state : public driver_device output_finder<14> m_syms; output_finder<16> m_leds; + bool m_power = false; + u32 m_control = 0; + u32 m_prev_pc = 0; + u64 m_prev_cycle = 0; + + bool m_bootrom_enabled = false; + void risc2500_mem(address_map &map); void lcd_palette(palette_device &palette) const; @@ -117,12 +124,6 @@ class risc2500_state : public driver_device u32 disable_boot_rom_r(); void install_bootrom(bool enable); TIMER_DEVICE_CALLBACK_MEMBER(disable_bootrom) { install_bootrom(false); } - bool m_bootrom_enabled = false; - - bool m_power = false; - u32 m_control = 0; - u32 m_prev_pc = 0; - u64 m_prev_cycle = 0; }; void risc2500_state::machine_start() diff --git a/src/mame/saitek/schess.cpp b/src/mame/saitek/schess.cpp index 8d67e2f7e5828..16dcd9e7da490 100644 --- a/src/mame/saitek/schess.cpp +++ b/src/mame/saitek/schess.cpp @@ -76,6 +76,9 @@ class schess_state : public driver_device required_device m_dac; required_ioport_array<3> m_inputs; + u8 m_inp_mux = 0; + u8 m_led_data = 0; + // address maps void main_map(address_map &map); @@ -85,9 +88,6 @@ class schess_state : public driver_device void leds2_w(offs_t offset, u8 data); void control_w(u8 data); u8 input_r(); - - u8 m_inp_mux = 0; - u8 m_led_data = 0; }; void schess_state::machine_start() diff --git a/src/mame/saitek/simultano.cpp b/src/mame/saitek/simultano.cpp index 5b38a0ca4cdf9..5308efa9d937c 100644 --- a/src/mame/saitek/simultano.cpp +++ b/src/mame/saitek/simultano.cpp @@ -86,6 +86,10 @@ class simultano_state : public driver_device required_ioport_array<8+1> m_inputs; output_finder<16, 34> m_out_lcd; + bool m_power = false; + u8 m_select = 0; + u8 m_control = 0; + void simultano_map(address_map &map); void cc2150_map(address_map &map); @@ -98,10 +102,6 @@ class simultano_state : public driver_device void sound_w(u8 data); u8 control_r(); void control_w(u8 data); - - bool m_power = false; - u8 m_select = 0; - u8 m_control = 0; }; void simultano_state::machine_start() diff --git a/src/mame/saitek/ssystem3.cpp b/src/mame/saitek/ssystem3.cpp index cd767d175e138..bc283315a7405 100644 --- a/src/mame/saitek/ssystem3.cpp +++ b/src/mame/saitek/ssystem3.cpp @@ -128,6 +128,15 @@ class ssystem3_state : public driver_device optional_ioport_array<4+3> m_inputs; output_finder<8, 48> m_out_lcd2; + u8 m_inp_mux = 0; + u8 m_control = 0; + u8 m_shift = 0; + u32 m_lcd1_data = 0; + u64 m_lcd2_data = 0; + u8 m_lcd2_select = 0; + + bool m_xor_kludge = false; + // address maps void ssystem3_map(address_map &map); void ssystem4_map(address_map &map); @@ -150,14 +159,6 @@ class ssystem3_state : public driver_device u8 cu_pia_a_r(); void cu_pia_b_w(u8 data); u8 cu_pia_b_r(); - - u8 m_inp_mux = 0; - u8 m_control = 0; - u8 m_shift = 0; - u32 m_lcd1_data = 0; - u64 m_lcd2_data = 0; - u8 m_lcd2_select = 0; - bool m_xor_kludge = false; }; void ssystem3_state::machine_start() diff --git a/src/mame/saitek/stratos.cpp b/src/mame/saitek/stratos.cpp index 8a81ff76ec110..ad2cd5f235b33 100644 --- a/src/mame/saitek/stratos.cpp +++ b/src/mame/saitek/stratos.cpp @@ -104,6 +104,10 @@ class stratos_state : public saitek_stratos_state required_device m_dac; required_ioport_array<8+2> m_inputs; + u8 m_select = 0; + u8 m_control = 0; + u8 m_led_data = 0; + void main_map(address_map &map); // I/O handlers @@ -116,10 +120,6 @@ class stratos_state : public saitek_stratos_state void control_w(u8 data); u8 lcd_data_r(); u8 extrom_r(offs_t offset); - - u8 m_select = 0; - u8 m_control = 0; - u8 m_led_data = 0; }; // saitek_stratos_state diff --git a/src/mame/saitek/stratos.h b/src/mame/saitek/stratos.h index 131098c25955f..78d475d27cb63 100644 --- a/src/mame/saitek/stratos.h +++ b/src/mame/saitek/stratos.h @@ -36,6 +36,12 @@ class saitek_stratos_state : public driver_device virtual void machine_reset() override; virtual void device_post_load() override { update_lcd(); } + bool m_power = false; + bool m_lcd_ready = false; + u8 m_lcd_count = 0; + u8 m_lcd_command = 0; + u8 m_lcd_data[0x40] = { }; + // devices/pointers required_device m_maincpu; required_device m_display; @@ -48,12 +54,6 @@ class saitek_stratos_state : public driver_device void power_off(); void set_cpu_freq(); void lcd_data_w(u8 data); - - bool m_power = false; - bool m_lcd_ready = false; - u8 m_lcd_count = 0; - u8 m_lcd_command = 0; - u8 m_lcd_data[0x40]; }; INPUT_PORTS_EXTERN( saitek_stratos ); diff --git a/src/mame/saitek/superstar.cpp b/src/mame/saitek/superstar.cpp index 0e8931920ca77..d5183dc6258de 100644 --- a/src/mame/saitek/superstar.cpp +++ b/src/mame/saitek/superstar.cpp @@ -88,6 +88,8 @@ class star_state : public driver_device required_device m_dac; required_ioport_array<2> m_inputs; + u8 m_inp_mux = 0; + // address maps void sstar28k_map(address_map &map); void tstar432_map(address_map &map); @@ -95,8 +97,6 @@ class star_state : public driver_device // I/O handlers void control_w(u8 data); u8 input_r(); - - u8 m_inp_mux = 0; }; void star_state::machine_start() diff --git a/src/mame/sega/chihiro.cpp b/src/mame/sega/chihiro.cpp index 1567f32671aef..1dc0df3ed6cb0 100644 --- a/src/mame/sega/chihiro.cpp +++ b/src/mame/sega/chihiro.cpp @@ -1779,7 +1779,7 @@ void chihiro_state::chihiro_map_io(address_map &map) map(0x4000, 0x40ff).rw(FUNC(chihiro_state::mediaboard_r), FUNC(chihiro_state::mediaboard_w)); } -static INPUT_PORTS_START(chihiro) +static INPUT_PORTS_START( chihiro ) PORT_START("TILT") PORT_BIT(0x80, IP_ACTIVE_HIGH, IPT_TILT) PORT_BIT(0x7f, IP_ACTIVE_HIGH, IPT_UNUSED) @@ -1836,7 +1836,7 @@ static INPUT_PORTS_START(chihiro) PORT_START("A7") PORT_BIT(0x87ff, IP_ACTIVE_LOW, IPT_UNUSED) - INPUT_PORTS_END +INPUT_PORTS_END void chihiro_state::machine_start() { diff --git a/src/mame/sega/sega_beena.cpp b/src/mame/sega/sega_beena.cpp index daad7124a1f7e..e08b00868e74a 100644 --- a/src/mame/sega/sega_beena.cpp +++ b/src/mame/sega/sega_beena.cpp @@ -2229,4 +2229,4 @@ ROM_END // year, name, parent, compat, machine, input, class, init, company, fullname, flags CONS( 2005, beena, 0, 0, sega_beena, sega_beena, sega_beena_state, empty_init, "Sega", "Advanced Pico BEENA", MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_TIMING|MACHINE_IMPERFECT_SOUND ) -CONS( 2005, tvochken, 0, 0, sega_9h0_0008, tvochken, tvochken_state, empty_init, "Sega", "TV Ocha-Ken", MACHINE_REQUIRES_ARTWORK|MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_TIMING|MACHINE_IMPERFECT_SOUND ) +CONS( 2005, tvochken, 0, 0, sega_9h0_0008, tvochken, tvochken_state, empty_init, "Sega", "TV Ocha-Ken", MACHINE_NOT_WORKING|MACHINE_REQUIRES_ARTWORK|MACHINE_IMPERFECT_GRAPHICS|MACHINE_IMPERFECT_TIMING|MACHINE_IMPERFECT_SOUND ) diff --git a/src/mame/sega/segas16b.cpp b/src/mame/sega/segas16b.cpp index 100377688e300..42166fd3e45f7 100644 --- a/src/mame/sega/segas16b.cpp +++ b/src/mame/sega/segas16b.cpp @@ -9084,12 +9084,12 @@ ROM_END // ROM_START( timescan3 ) ROM_REGION( 0x30000, "maincpu", 0 ) // 68000 code - ROM_LOAD16_BYTE( "epr-10559.a4", 0x00000, 0x8000, CRC(7be282cfb) SHA1(e95a3e9edf5a5db10197fa4f8e0cdf8ed2da5071) ) - ROM_LOAD16_BYTE( "epr-10556.a1", 0x00001, 0x8000, CRC(f8bc7db82) SHA1(efa6ecb9b377e6def2e24c450014db13f00a1297) ) - ROM_LOAD16_BYTE( "epr-10560.a5", 0x10000, 0x8000, CRC(f4c38aa17) SHA1(d5b35e6343f342de5cf45c0c1569927b68ad5818) ) - ROM_LOAD16_BYTE( "epr-10557.a2", 0x10001, 0x8000, CRC(cbf8dbeab) SHA1(5caa36be75f3cfedbeb814d1e570ad15157478ec) ) - ROM_LOAD16_BYTE( "epr-10561.a6", 0x20000, 0x8000, CRC(cb45981f3) SHA1(17e950cf5e108c34d6cdb25d7c182bc0575f770e) ) - ROM_LOAD16_BYTE( "epr-10558.a3", 0x20001, 0x8000, CRC(d63c8eb7b) SHA1(233b05cf24d675193ed11ef75a26af231dc8c13f) ) + ROM_LOAD16_BYTE( "epr-10559.a4", 0x00000, 0x8000, CRC(7be282cf) SHA1(e95a3e9edf5a5db10197fa4f8e0cdf8ed2da5071) ) + ROM_LOAD16_BYTE( "epr-10556.a1", 0x00001, 0x8000, CRC(f8bc7db8) SHA1(efa6ecb9b377e6def2e24c450014db13f00a1297) ) + ROM_LOAD16_BYTE( "epr-10560.a5", 0x10000, 0x8000, CRC(f4c38aa1) SHA1(d5b35e6343f342de5cf45c0c1569927b68ad5818) ) + ROM_LOAD16_BYTE( "epr-10557.a2", 0x10001, 0x8000, CRC(cbf8dbea) SHA1(5caa36be75f3cfedbeb814d1e570ad15157478ec) ) + ROM_LOAD16_BYTE( "epr-10561.a6", 0x20000, 0x8000, CRC(cb45981f) SHA1(17e950cf5e108c34d6cdb25d7c182bc0575f770e) ) + ROM_LOAD16_BYTE( "epr-10558.a3", 0x20001, 0x8000, CRC(d63c8eb7) SHA1(233b05cf24d675193ed11ef75a26af231dc8c13f) ) ROM_REGION( 0x18000, "gfx1", 0 ) // tiles ROM_LOAD( "epr-10543.b9", 0x00000, 0x8000, CRC(07dccc37) SHA1(544cc6a3b3ef64727ecf5098b84ade2dd5330614) ) diff --git a/src/mame/sega/segasm1.cpp b/src/mame/sega/segasm1.cpp index e8a217e7ec708..6420fe309f465 100644 --- a/src/mame/sega/segasm1.cpp +++ b/src/mame/sega/segasm1.cpp @@ -19,10 +19,11 @@ To get past the boot error on Tinker Bell, F1 is mapped to the cabinet reset switch. TODO: - - Inputs (inserting a coin freezes some of the text on screen, what's next?) - - Verify sound latch location on Tinker Bell vs. the comms games + - Hopper + - tinkerbl, blicks: throws with "RAM data is BAD" at each soft reset, EEPROM? - Bingo Party puts up a message about ROM version mismatch with the RAM and says to press the reset switch. However, when this is done, the code simply locks up (BRA to itself) and doesn't initialize the RAM. + - Verify sound latch locations on Tinker Bell vs. the comms games Network version notes: Based on Caribbean Boule the following hardware setup is used: @@ -72,6 +73,7 @@ class systemm1_state : public driver_device , m_io1(*this, "io1") , m_io2(*this, "io2") , m_soundlatch(*this, "soundlatch") + , m_soundlatch2(*this, "soundlatch2") { } @@ -97,6 +99,7 @@ class systemm1_state : public driver_device required_device m_ym; required_device m_io1, m_io2; required_device m_soundlatch; + required_device m_soundlatch2; void machine_start() override; @@ -165,17 +168,19 @@ u32 systemm1_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, c return 0; } +// NOTE: both irqs calls tas to work RAM buffers prior to SR flag disable TIMER_DEVICE_CALLBACK_MEMBER(systemm1_state::scan_irq) { const int scanline = param; if (scanline == 384) { - m_maincpu->set_input_line(M68K_IRQ_4, ASSERT_LINE); + m_maincpu->set_input_line(M68K_IRQ_4, HOLD_LINE); } else if (scanline == 0) { - m_maincpu->set_input_line(M68K_IRQ_4, CLEAR_LINE); + // TODO: unchecked source + m_maincpu->set_input_line(M68K_IRQ_2, HOLD_LINE); } } @@ -240,7 +245,7 @@ void systemm1_state::mem_map(address_map &map) map(0xe00000, 0xe0003f).rw(m_io1, FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff); map(0xe40000, 0xe40001).portr("DIP1"); - map(0xe40005, 0xe40005).w(m_soundlatch, FUNC(generic_latch_8_device::write)); + map(0xe40005, 0xe40005).r(m_soundlatch2, FUNC(generic_latch_8_device::read)).w(m_soundlatch, FUNC(generic_latch_8_device::write)); map(0xe80000, 0xe8003f).rw(m_io2, FUNC(sega_315_5296_device::read), FUNC(sega_315_5296_device::write)).umask16(0x00ff); map(0xf00000, 0xf03fff).mirror(0x0fc000).ram().share("nvram"); @@ -270,7 +275,7 @@ void systemm1_state::z80_io_map(address_map &map) map.global_mask(0xff); map(0x80, 0x83).mirror(0x0c).rw(m_ym, FUNC(ym3438_device::read), FUNC(ym3438_device::write)); map(0xa0, 0xa0).w(FUNC(systemm1_state::sound_bank_w)); - map(0xc0, 0xc0).r(m_soundlatch, FUNC(generic_latch_8_device::read)); + map(0xc0, 0xc0).r(m_soundlatch, FUNC(generic_latch_8_device::read)).w(m_soundlatch2, FUNC(generic_latch_8_device::write)); } void systemm1_state::machine_start() @@ -292,32 +297,128 @@ void systemm1_state::comm_map(address_map &map) map(0xe003, 0xe003).nopw(); // ??? } -static INPUT_PORTS_START(tinkerbl) - PORT_START("PC") +static INPUT_PORTS_START( tinkerbl ) + PORT_START("IN1_PA") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_GAMBLE_PAYOUT ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_HIGH ) PORT_NAME("Big") + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_GAMBLE_LOW ) PORT_NAME("Small") + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_GAMBLE_D_UP ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_GAMBLE_TAKE ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_GAMBLE_DEAL ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_GAMBLE_BET ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN1_PB") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_POKER_HOLD1 ) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_POKER_HOLD2 ) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_POKER_HOLD3 ) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_POKER_HOLD4 ) + PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_POKER_HOLD5 ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_DOOR ) + + PORT_START("IN1_PC") + PORT_BIT( 0x1f, IP_ACTIVE_LOW, IPT_UNUSED ) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Reset Switch") PORT_CODE(KEYCODE_F1) - PORT_DIPNAME( 0x01, 0x01, "DIPC1" ) + PORT_SERVICE_NO_TOGGLE( 0x40, IP_ACTIVE_LOW ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_GAMBLE_BOOK ) PORT_NAME("Analyzer") + + PORT_START("IN1_PD") + // Following can't be IPT_SERVICE1, it will collide with IPT_GAMBLE_SERVICE + // TODO: verify what's for (doesn't increment credits) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE3 ) PORT_NAME("Service Switch") + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_GAMBLE_SERVICE ) PORT_NAME("All Reset") + PORT_BIT( 0x38, IP_ACTIVE_LOW, IPT_UNUSED ) + PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) + PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN1_PE") + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper") + PORT_BIT( 0xfe, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("IN1_PF") + PORT_BIT( 0xff, IP_ACTIVE_LOW, IPT_UNUSED ) + + PORT_START("DIP1") + PORT_DIPNAME( 0x03, 0x03, "Expected Payout" ) PORT_DIPLOCATION("SW1:1,2") + PORT_DIPSETTING( 0x02, "86%" ) + PORT_DIPSETTING( 0x01, "89%" ) + PORT_DIPSETTING( 0x03, "92%" ) + PORT_DIPSETTING( 0x00, "96%" ) + PORT_DIPNAME( 0x04, 0x04, "10 Bet Royal" ) PORT_DIPLOCATION("SW1:3") + PORT_DIPSETTING( 0x04, "5000" ) + PORT_DIPSETTING( 0x00, "3000" ) + PORT_DIPNAME( 0x08, 0x08, "Double Up Limit" ) PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING( 0x08, "10000" ) + PORT_DIPSETTING( 0x00, "5000" ) + PORT_DIPNAME( 0x10, 0x10, "Hopper" ) PORT_DIPLOCATION("SW1:5") + PORT_DIPSETTING( 0x10, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPNAME( 0x20, 0x20, "Hopper Pay Max" ) PORT_DIPLOCATION("SW1:6") + PORT_DIPSETTING( 0x20, "400" ) + PORT_DIPSETTING( 0x00, "800" ) + PORT_DIPNAME( 0x40, 0x40, "Credit Max" ) PORT_DIPLOCATION("SW1:7") + PORT_DIPSETTING( 0x40, "5000" ) + PORT_DIPSETTING( 0x00, "100000" ) + PORT_DIPNAME( 0x80, 0x80, "Use Joker" ) PORT_DIPLOCATION("SW1:8") + PORT_DIPSETTING( 0x80, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) +INPUT_PORTS_END + +static INPUT_PORTS_START( blicks ) + PORT_INCLUDE( tinkerbl ) + + PORT_MODIFY("DIP1") + PORT_DIPNAME( 0x03, 0x03, "Set Payout Ratio" ) PORT_DIPLOCATION("SW1:1,2") + PORT_DIPSETTING( 0x02, "84%" ) + PORT_DIPSETTING( 0x01, "88%" ) + PORT_DIPSETTING( 0x03, "92%" ) + PORT_DIPSETTING( 0x00, "96%" ) + PORT_DIPUNUSED_DIPLOC( 0x04, 0x04, "SW1:3") + PORT_DIPNAME( 0x08, 0x08, "Double Up Limit" ) PORT_DIPLOCATION("SW1:4") + PORT_DIPSETTING( 0x08, "10000" ) + PORT_DIPSETTING( 0x00, "5000" ) + PORT_DIPNAME( 0x10, 0x10, "Hopper" ) PORT_DIPLOCATION("SW1:5") + PORT_DIPSETTING( 0x10, DEF_STR( Yes ) ) + PORT_DIPSETTING( 0x00, DEF_STR( No ) ) + PORT_DIPNAME( 0x20, 0x20, "Hopper Pay Max" ) PORT_DIPLOCATION("SW1:6") + PORT_DIPSETTING( 0x20, "400" ) + PORT_DIPSETTING( 0x00, "800" ) + PORT_DIPNAME( 0x40, 0x40, "Credit Max" ) PORT_DIPLOCATION("SW1:7") + PORT_DIPSETTING( 0x40, "2000" ) + PORT_DIPSETTING( 0x00, "10000" ) + PORT_DIPUNUSED_DIPLOC( 0x80, 0x80, "SW1:8") +INPUT_PORTS_END + +static INPUT_PORTS_START( bingpty ) + PORT_START("IN1_PA") + PORT_DIPNAME( 0x01, 0x01, "DIPA1" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "DIPC2" ) + PORT_DIPNAME( 0x02, 0x02, "DIPA2" ) PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "DIPC3" ) + PORT_DIPNAME( 0x04, 0x04, "DIPA3" ) PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "DIPC4" ) + PORT_DIPNAME( 0x08, 0x08, "DIPA4" ) PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, "DIPC5" ) + PORT_DIPNAME( 0x10, 0x10, "DIPA5" ) PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "DIPC7" ) + PORT_DIPNAME( 0x20, 0x20, "DIPA6" ) + PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) + PORT_DIPSETTING( 0x00, DEF_STR( On ) ) + PORT_DIPNAME( 0x40, 0x40, "DIPA7" ) PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "DIPC8" ) + PORT_DIPNAME( 0x80, 0x80, "DIPA8" ) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("PB") + PORT_START("IN1_PB") PORT_DIPNAME( 0x01, 0x01, "DIPB1" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -343,113 +444,7 @@ static INPUT_PORTS_START(tinkerbl) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("PD") - PORT_DIPNAME( 0x01, 0x01, "DIPD1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "DIPD2" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "DIPD3" ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "DIPD4" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, "DIPD5" ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "DIPD6" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_IMPULSE(1) - - PORT_DIPNAME( 0x80, 0x80, "DIPD8" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("PE") - PORT_DIPNAME( 0x01, 0x01, "DIPE1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "DIPE2" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "DIPE3" ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "DIPE4" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, "DIPE5" ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "DIPE6" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "DIPE7" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "DIPE8" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("PF") - PORT_DIPNAME( 0x01, 0x01, "DIPF1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "DIPF2" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "DIPF3" ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "DIPF4" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, "DIPF5" ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "DIPF6" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "DIPF7" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "DIPF8" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("DIP1") - PORT_DIPNAME( 0x01, 0x01, "DIP1-1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "DIP1-2" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "DIP1-3" ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "DIP1-4" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, "DIP1-5" ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "DIP1-6" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "DIP1-7" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "DIP1-8" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) -INPUT_PORTS_END - -static INPUT_PORTS_START(bingpty) - PORT_START("PC") + PORT_START("IN1_PC") PORT_DIPNAME( 0x01, 0x01, "DIPC1" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -475,33 +470,7 @@ static INPUT_PORTS_START(bingpty) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("PB") - PORT_DIPNAME( 0x01, 0x01, "DIPB1" ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, "DIPB2" ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, "DIPB3" ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, "DIPB4" ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, "DIPB5" ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, "DIPB6" ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, "DIPB7" ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, "DIPB8" ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("PD") + PORT_START("IN1_PD") PORT_DIPNAME( 0x01, 0x01, "DIPD1" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -527,7 +496,7 @@ static INPUT_PORTS_START(bingpty) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("PE") + PORT_START("IN1_PE") PORT_DIPNAME( 0x01, 0x01, "DIPE1" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -553,7 +522,7 @@ static INPUT_PORTS_START(bingpty) PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_START("PF") + PORT_START("IN1_PF") PORT_DIPNAME( 0x01, 0x01, "DIPF1" ) PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) PORT_DIPSETTING( 0x00, DEF_STR( On ) ) @@ -647,17 +616,20 @@ void systemm1_state::m1base(machine_config &config) m_ym->add_route(1, "rspeaker", 0.40); SEGA_315_5296(config, m_io1, XTAL(16'000'000)); - m_io1->in_pb_callback().set_ioport("PB"); - m_io1->in_pc_callback().set_ioport("PC"); - m_io1->in_pd_callback().set_ioport("PD"); - m_io1->in_pe_callback().set_ioport("PE"); - m_io1->in_pf_callback().set_ioport("PF"); + m_io1->in_pa_callback().set_ioport("IN1_PA"); + m_io1->in_pb_callback().set_ioport("IN1_PB"); + m_io1->in_pc_callback().set_ioport("IN1_PC"); + m_io1->in_pd_callback().set_ioport("IN1_PD"); + m_io1->in_pe_callback().set_ioport("IN1_PE"); + m_io1->in_pf_callback().set_ioport("IN1_PF"); SEGA_315_5296(config, m_io2, XTAL(16'000'000)); GENERIC_LATCH_8(config, m_soundlatch); m_soundlatch->data_pending_callback().set_inputline(m_soundcpu, INPUT_LINE_NMI); m_soundlatch->set_separate_acknowledge(false); + + GENERIC_LATCH_8(config, m_soundlatch2); } void systemm1_state::m1comm(machine_config &config) @@ -675,7 +647,7 @@ void systemm1_state::m1comm(machine_config &config) dpram.intl_callback().set_inputline("m1comm", 0); } -ROM_START(tinkerbl) +ROM_START( tinkerbl ) ROM_REGION(0x100000, "maincpu", 0) ROM_LOAD16_BYTE("epr-a13637.ic8", 0x000000, 0x040000, CRC(de270e16) SHA1(e77fedbd11a698b1f7ed03feec64204f712c3cad)) ROM_LOAD16_BYTE("epr-a13639.ic7", 0x000001, 0x040000, CRC(56ade038) SHA1(c807b63e1ff7cc9577dc45689ebc67ede396f7b6)) @@ -689,6 +661,21 @@ ROM_START(tinkerbl) ROM_LOAD("gal18v8a_315-5391.ic103", 0x000000, 0x040000, CRC(29480530) SHA1(d3d629fb4c2a4ae851f14b1d9e5b72b37b567f0b)) ROM_END +ROM_START( blicks ) + ROM_REGION(0x100000, "maincpu", 0) + ROM_LOAD16_BYTE("epr-14163.ic8", 0x000000, 0x040000, CRC(19bc94fa) SHA1(b81a61394a853dda6ed157cfcb3cb40ecd103c3d) ) + ROM_LOAD16_BYTE("epr-14165.ic7", 0x000001, 0x040000, CRC(61b8d395) SHA1(452b718d7ce9cbec913eeb6f2758e8dbecced6b1) ) + ROM_LOAD16_BYTE("epr.14164.ic10", 0x080000, 0x040000, CRC(5d3ccf3b) SHA1(31db63c87bf8417d58ae829759d2014ef140e891)) + ROM_LOAD16_BYTE("epr-14166.ic9", 0x080001, 0x040000, CRC(5e63db91) SHA1(1d754675a2ca9d4e945c314ce2a42e7ed86a9ecf) ) + + ROM_REGION(0x20000, "soundcpu", 0) + ROM_LOAD( "epr-14167.ic104", 0x000000, 0x020000, CRC(305a9afe) SHA1(5b27d50797c6048e92b86f3748dfff3c873bbf13) ) + + ROM_REGION(0x40000, "gals", 0) + ROM_LOAD( "gal18v8a_315-5391.ic103", 0x000000, 0x040000, CRC(29480530) SHA1(d3d629fb4c2a4ae851f14b1d9e5b72b37b567f0b) ) + ROM_LOAD( "315-5391.jed", 0x000000, 0x00038e, CRC(9918d5c8) SHA1(2d599573c716ec840b98dff44c167a15117ba824) ) +ROM_END + ROM_START( bingpty ) // 1994/05/01 string ROM_REGION( 0x100000, "maincpu", 0 ) /* 68000 Code */ ROM_LOAD16_BYTE( "epr-16648b.bin", 0x00000, 0x20000, CRC(e4fceb4c) SHA1(0a248bb328d2f6d72d540baefbe62838f4b76585) ) @@ -719,26 +706,11 @@ ROM_START( carboule ) // 1992.01.31 string // dumps of the X-Board part, and the LINK PCB are missing. ROM_END -ROM_START( blicks ) - ROM_REGION(0x100000, "maincpu", 0) - ROM_LOAD16_BYTE("epr-14163.ic8", 0x000000, 0x040000, CRC(19bc94fa) SHA1(b81a61394a853dda6ed157cfcb3cb40ecd103c3d) ) - ROM_LOAD16_BYTE("epr-14165.ic7", 0x000001, 0x040000, CRC(61b8d395) SHA1(452b718d7ce9cbec913eeb6f2758e8dbecced6b1) ) - ROM_LOAD16_BYTE("epr.14164.ic10", 0x080000, 0x040000, CRC(5d3ccf3b) SHA1(31db63c87bf8417d58ae829759d2014ef140e891)) - ROM_LOAD16_BYTE("epr-14166.ic9", 0x080001, 0x040000, CRC(5e63db91) SHA1(1d754675a2ca9d4e945c314ce2a42e7ed86a9ecf) ) - - ROM_REGION(0x20000, "soundcpu", 0) - ROM_LOAD( "epr-14167.ic104", 0x000000, 0x020000, CRC(305a9afe) SHA1(5b27d50797c6048e92b86f3748dfff3c873bbf13) ) - - ROM_REGION(0x40000, "gals", 0) - ROM_LOAD( "gal18v8a_315-5391.ic103", 0x000000, 0x040000, CRC(29480530) SHA1(d3d629fb4c2a4ae851f14b1d9e5b72b37b567f0b) ) - ROM_LOAD( "315-5391.jed", 0x000000, 0x00038e, CRC(9918d5c8) SHA1(2d599573c716ec840b98dff44c167a15117ba824) ) -ROM_END - } // anonymous namespace // Standalone M1 games GAME(1990, tinkerbl, 0, m1base, tinkerbl, systemm1_state, empty_init, ROT0, "Sega", "Tinker Bell", MACHINE_NOT_WORKING) -GAME(1990, blicks, 0, m1base, tinkerbl, systemm1_state, empty_init, ROT0, "Sega", "Blicks", MACHINE_NOT_WORKING) +GAME(1990, blicks, 0, m1base, blicks, systemm1_state, empty_init, ROT0, "Sega", "Blicks (Japan)", MACHINE_NOT_WORKING) // M1 comm multi-board games GAME(1994, bingpty, 0, m1comm, bingpty, systemm1_state, empty_init, ROT0, "Sega", "Bingo Party Multicart (Rev B) (M1 Satellite board)", MACHINE_NOT_WORKING) diff --git a/src/mame/sega/shtzone.cpp b/src/mame/sega/shtzone.cpp index 8318d5ef9e9b1..6e9455c6334aa 100644 --- a/src/mame/sega/shtzone.cpp +++ b/src/mame/sega/shtzone.cpp @@ -84,6 +84,9 @@ class shtzone_state : public sms_state void shtzone(machine_config &config); + DECLARE_CUSTOM_INPUT_MEMBER(gun_tl_p1_r); + DECLARE_CUSTOM_INPUT_MEMBER(gun_tl_p2_r); + protected: virtual void machine_start() override; virtual void machine_reset() override; @@ -191,25 +194,35 @@ void shtzone_state::prg_map(address_map &map) map(0xdc00, 0xdc00).portr("IN1"); } +CUSTOM_INPUT_MEMBER(shtzone_state::gun_tl_p1_r) +{ + return BIT(m_port_ctrl1->in_r(), 4); +} + +CUSTOM_INPUT_MEMBER(shtzone_state::gun_tl_p2_r) +{ + return BIT(m_port_ctrl2->in_r(), 4); +} static INPUT_PORTS_START( shtzone ) PORT_START("IN0") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_BUTTON1 ) // called Select button 1 in test mode - PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_BUTTON2 ) // " 2 - PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_BUTTON3 ) // " 3 - PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_BUTTON4 ) // " 4 - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON5 ) // " 5 + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Select Game 1") PORT_CODE(KEYCODE_Z) + PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Select Game 2") PORT_CODE(KEYCODE_X) + PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Select Game 3") PORT_CODE(KEYCODE_C) + PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Select Game 4") PORT_CODE(KEYCODE_V) + PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Select Game 5") PORT_CODE(KEYCODE_B) PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_COIN1 ) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_COIN2 ) - PORT_SERVICE_NO_TOGGLE(0x80, IP_ACTIVE_LOW) + PORT_SERVICE_NO_TOGGLE(0x80, IP_ACTIVE_LOW ) PORT_START("IN1") - PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) + PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_SERVICE1 ) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_UNKNOWN ) // does nothing in test mode PORT_BIT( 0x04, IP_ACTIVE_LOW, IPT_UNKNOWN ) // " PORT_BIT( 0x08, IP_ACTIVE_LOW, IPT_UNKNOWN ) // " - PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_BUTTON6 ) // called gun 1 in test mode - PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_BUTTON7 ) // " 2 + // directly tied from Light Phaser TL pins + PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(shtzone_state, gun_tl_p1_r) + PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_CUSTOM_MEMBER(shtzone_state, gun_tl_p2_r) PORT_BIT( 0x40, IP_ACTIVE_LOW, IPT_UNKNOWN ) // does nothing in test mode PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNKNOWN ) // active high or nothing on screen (?) @@ -340,6 +353,9 @@ void shtzone_state::shtzone(machine_config &config) for (int i = 1; i < 5; i++) SMS_CART_SLOT(config, m_slots[i], sms_cart, nullptr); + m_port_ctrl1->set_default_option("lphaser"); + m_port_ctrl2->set_default_option("lphaser"); + m_has_bios_full = false; m_has_pwr_led = false; } diff --git a/src/mame/sega/sms.cpp b/src/mame/sega/sms.cpp index 01879e0c62f83..212f311bd9325 100644 --- a/src/mame/sega/sms.cpp +++ b/src/mame/sega/sms.cpp @@ -1261,19 +1261,19 @@ ROM_END /* YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS */ CONS( 1985, sg1000m3, sms, 0, sg1000m3, sg1000m3, sg1000m3_state, empty_init, "Sega", "Mark III", MACHINE_SUPPORTS_SAVE ) -CONS( 1986, sms1, sms, 0, sms1_ntsc, sms1, sms1_state, empty_init, "Sega", "Master System I", MACHINE_SUPPORTS_SAVE ) -CONS( 1986, sms1pal, sms, 0, sms1_pal, sms1, sms1_state, empty_init, "Sega", "Master System I (PAL)" , MACHINE_SUPPORTS_SAVE ) +CONS( 1986, sms1, sms, 0, sms1_ntsc, sms1, sms1_state, empty_init, "Sega", "Master System", MACHINE_SUPPORTS_SAVE ) +CONS( 1986, sms1pal, sms, 0, sms1_pal, sms1, sms1_state, empty_init, "Sega", "Master System (PAL)" , MACHINE_SUPPORTS_SAVE ) CONS( 1986, smssdisp, sms, 0, sms_sdisp, smssdisp, smssdisp_state, empty_init, "Sega", "Master System Store Display Unit", MACHINE_SUPPORTS_SAVE ) CONS( 1987, smsj, sms, 0, smsj, smsj, sms1_state, empty_init, "Sega", "Master System (Japan)", MACHINE_SUPPORTS_SAVE ) CONS( 1990, sms, 0, 0, sms2_ntsc, sms, sms_state, empty_init, "Sega", "Master System II", MACHINE_SUPPORTS_SAVE ) CONS( 1990, smspal, sms, 0, sms2_pal, sms, sms_state, empty_init, "Sega", "Master System II (PAL)", MACHINE_SUPPORTS_SAVE ) -CONS( 1989, sms1krfm, sms, 0, smsj, smsj, sms1_state, empty_init, "Samsung", "Gam*Boy I (Korea) (FM)", MACHINE_SUPPORTS_SAVE ) -CONS( 19??, sms1kr, sms, 0, sms1_kr, smsj, sms1_state, empty_init, "Samsung", "Gam*Boy I (Korea)", MACHINE_SUPPORTS_SAVE ) +CONS( 1989, sms1krfm, sms, 0, smsj, smsj, sms1_state, empty_init, "Samsung", "Gam*Boy (Korea) (FM)", MACHINE_SUPPORTS_SAVE ) +CONS( 19??, sms1kr, sms, 0, sms1_kr, smsj, sms1_state, empty_init, "Samsung", "Gam*Boy (Korea)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, smskr, sms, 0, sms2_kr, sms, sms_state, empty_init, "Samsung", "Gam*Boy II (Korea)", MACHINE_SUPPORTS_SAVE ) -CONS( 1989, sms1br, sms, 0, sms1_br, sms1, sms1_state, empty_init, "Tec Toy", "Master System I (Brazil)", MACHINE_SUPPORTS_SAVE ) +CONS( 1989, sms1br, sms, 0, sms1_br, sms1, sms1_state, empty_init, "Tec Toy", "Master System (Brazil)", MACHINE_SUPPORTS_SAVE ) CONS( 1991, sms2br, sms, 0, sms1_br, sms1, sms1_state, empty_init, "Tec Toy", "Master System II (Brazil)", MACHINE_SUPPORTS_SAVE ) CONS( 1992, smsbr, sms, 0, sms3_br, sms, sms_state, empty_init, "Tec Toy", "Master System III Compact (Brazil)", MACHINE_SUPPORTS_SAVE ) -CONS( 19??, sms1paln, sms, 0, sms1_paln, sms1, sms1_state, empty_init, "Tec Toy", "Master System I (PAL-N)", MACHINE_SUPPORTS_SAVE ) +CONS( 19??, sms1paln, sms, 0, sms1_paln, sms1, sms1_state, empty_init, "Tec Toy", "Master System (PAL-N)", MACHINE_SUPPORTS_SAVE ) CONS( 19??, sms2paln, sms, 0, sms1_paln, sms1, sms1_state, empty_init, "Tec Toy", "Master System II (PAL-N)", MACHINE_SUPPORTS_SAVE ) CONS( 19??, smspaln, sms, 0, sms3_paln, sms, sms_state, empty_init, "Tec Toy", "Master System III Compact (PAL-N)", MACHINE_SUPPORTS_SAVE ) diff --git a/src/mame/sega/sms_bootleg.cpp b/src/mame/sega/sms_bootleg.cpp index 8c1809b884fdf..e25f26229068c 100644 --- a/src/mame/sega/sms_bootleg.cpp +++ b/src/mame/sega/sms_bootleg.cpp @@ -14,12 +14,16 @@ cfr. ALex Kidd with autofire or Solomon's Key title (that actually hasn't been r TODO: smssgame -- 05 Super Mario: crashes, seemingly expects $8000-$bfff to be a copy of $0000-$3fff, open bus? btanb? -- 29 Goonies: either boots (with bad title screen GFXs) or outright crashes (similar to Super Mario?) -- SG-1000 "newer" conversions all sports dimmed main sprite, cfr. 15 Bomb Jack or 20 Pitfall II +- 05 Super Mario: crashes, seemingly expects $8000-$bfff to be a copy of $0000-$3fff, + extra MCU control? btanb? +- 29 Goonies: either boots (with bad title screen GFXs) or outright crashes again btanb? +- SG-1000 "newer" conversions all sports dimmed main sprite + cfr. 15 Bomb Jack or 20 Pitfall II; +- 03 Wonder Boy: minor GFX glitch on stage start screen for a split second, + is the MCU also capable of VDP reset? smssgamea -- Different banking, TBD +- Same issues as smssgame there are also empty k9/k10/k11/k12 positions, but they were clearly never used. @@ -258,7 +262,6 @@ class smsbootleg_state : public sms_state public: smsbootleg_state(const machine_config &mconfig, device_type type, const char *tag) : sms_state(mconfig, type, tag) - , m_rom_view(*this, "rom_view") , m_game_bank(*this, "game_bank%u", 1U) , m_game_data(*this, "game_data") {} @@ -272,13 +275,13 @@ class smsbootleg_state : public sms_state virtual void machine_reset() override; virtual void refresh_banks(); - memory_view m_rom_view; required_memory_bank_array<3> m_game_bank; required_memory_region m_game_data; u8 m_rom_select = 0; - u8 m_main_bank_mailbox = 0; - u8 m_sub_bank_mailbox = 0; + u8 m_bank_mailbox[2] = { 0, 0 }; + // menu bank is presumed to initialize with bank 1 on this set (from MCU?) + virtual u16 menu_bank() { return 1; } private: void port08_w(uint8_t data); @@ -288,6 +291,17 @@ class smsbootleg_state : public sms_state void sms_supergame_map(address_map &map); }; +class smsbootleg_a_state : public smsbootleg_state +{ +public: + smsbootleg_a_state(const machine_config &mconfig, device_type type, const char *tag) + : smsbootleg_state(mconfig, type, tag) + {} + +protected: + virtual u16 menu_bank() override { return 0; } +}; + void smsbootleg_state::machine_start() { sms_state::machine_start(); @@ -298,18 +312,17 @@ void smsbootleg_state::machine_start() void smsbootleg_state::machine_reset() { sms_state::machine_reset(); - m_rom_view.select(0); - for (auto &bank : m_game_bank) - bank->set_entry(0); - m_sub_bank_mailbox = 0; + m_bank_mailbox[0] = 1; + m_bank_mailbox[1] = 2; + m_rom_select = menu_bank(); + refresh_banks(); } -// TODO: different for smssgamea, to be virtualized later void smsbootleg_state::refresh_banks() { const u16 base_rom_bank = ((m_rom_select & 0xf) << 5) + ((m_rom_select & 0xf0) >> 3); - const u8 main_bank = (m_main_bank_mailbox & 0x7) + ((m_main_bank_mailbox & 8) << 2); - const u8 sub_bank = (m_sub_bank_mailbox & 0x7) + ((m_sub_bank_mailbox & 8) << 2); + const u8 main_bank = (m_bank_mailbox[0] & 0xf); + const u8 sub_bank = (m_bank_mailbox[1] & 0xf); LOG("$0000-$3fff %08x $4000-$7fff %08x $8000-$bfff %08x\n" , base_rom_bank * 0x4000 @@ -319,34 +332,38 @@ void smsbootleg_state::refresh_banks() m_game_bank[0]->set_entry(base_rom_bank); // Final Bubble Bobble uses $fffe to bank this area, all other games sets 0x01 m_game_bank[1]->set_entry(base_rom_bank + main_bank); - // TODO: Goonies and Super Mario - // (expects a default bank of 0 here, is bit 7 set a signal for bank unlock?) + // TODO: Super Mario + // (expects a default bank of 0 here?) + // TODO: some games sets bit 7 for ROM write enable, doesn't seem to make a difference? m_game_bank[2]->set_entry(base_rom_bank + sub_bank); } void smsbootleg_state::sms_supergame_map(address_map &map) { map.unmap_value_high(); - map(0x0000, 0xfff7).view(m_rom_view); - m_rom_view[0](0x0000, 0xbfff).rom().region("maincpu", 0); - m_rom_view[1](0x0000, 0x3fff).bankr("game_bank1"); - m_rom_view[1](0x4000, 0x7fff).bankr("game_bank2"); - m_rom_view[1](0x8000, 0xbfff).bankr("game_bank3"); + map(0x0000, 0x3fff).bankr("game_bank1"); + map(0x4000, 0x7fff).bankr("game_bank2"); + map(0x8000, 0xbfff).bankr("game_bank3"); map(0xc000, 0xfff7).ram(); // map(0xfffc, 0xffff).rw(FUNC(smsbootleg_state::sms_mapper_r), FUNC(smsbootleg_state::sms_mapper_w)); // Bankswitch control - map(0xfffe, 0xfffe).lw8( + // This is basically identical to the base SMS HW + // https://www.smspower.org/Development/Mappers#TheSegaMapper + map(0xfffe, 0xfffe).lrw8( + NAME([this] () { + return m_bank_mailbox[0]; + }), NAME([this] (u8 data) { - m_main_bank_mailbox = data; + m_bank_mailbox[0] = data; LOG("map $fffe: %02x\n", data); refresh_banks(); }) ); map(0xffff, 0xffff).lrw8( NAME([this] () { - return m_sub_bank_mailbox; + return m_bank_mailbox[1]; }), NAME([this] (u8 data) { - m_sub_bank_mailbox = data; + m_bank_mailbox[1] = data; LOG("map $ffff: %02x\n", data); refresh_banks(); }) @@ -356,7 +373,6 @@ void smsbootleg_state::sms_supergame_map(address_map &map) void smsbootleg_state::port08_w(uint8_t data) { // TODO: the MCU definitely controls this, including switch back to attract menu once timer expires - m_rom_view.select(1); m_rom_select = data; LOG("I/O $08: %02x\n", data); refresh_banks(); @@ -389,60 +405,9 @@ void smsbootleg_state::sms_supergame_io(address_map &map) static INPUT_PORTS_START( sms_supergame ) PORT_START("PAUSE") PORT_BIT( 0x7f, IP_ACTIVE_LOW, IPT_UNUSED ) + // TODO: are games really supposed to not have a way to pause? PORT_BIT( 0x80, IP_ACTIVE_LOW, IPT_UNUSED )// PORT_NAME(DEF_STR(Pause)) PORT_CODE(KEYCODE_1) PORT_WRITE_LINE_DEVICE_MEMBER("sms_vdp", sega315_5124_device, n_nmi_in_write) -#if 0 - PORT_START("IN0") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - - PORT_START("IN1") - PORT_DIPNAME( 0x01, 0x01, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x01, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x02, 0x02, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x02, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x04, 0x04, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x04, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x08, 0x08, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x10, 0x10, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x10, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x20, 0x20, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x20, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x40, 0x40, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x40, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) - PORT_DIPNAME( 0x80, 0x80, DEF_STR( Unknown ) ) - PORT_DIPSETTING( 0x80, DEF_STR( Off ) ) - PORT_DIPSETTING( 0x00, DEF_STR( On ) ) -#endif + PORT_START("IN2") PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_JOYSTICK_UP ) PORT_8WAY PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_JOYSTICK_DOWN ) PORT_8WAY @@ -485,17 +450,9 @@ void smsbootleg_state::sms_supergame(machine_config &config) void smsbootleg_state::init_sms_supergame() { - uint8_t* rom = memregion("maincpu")->base(); uint8_t* game_roms = memregion("game_data")->base(); + size_t size = memregion("game_data")->bytes(); - size_t size = memregion("maincpu")->bytes(); - - for (int i = 0; i < size; i++) - { - rom[i] ^= 0x80; - } - - size = memregion("game_data")->bytes(); for (int i = 0; i < size; i++) { game_roms[i] ^= 0x80; @@ -504,12 +461,15 @@ void smsbootleg_state::init_sms_supergame() ROM_START( smssgame ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "rom1.bin", 0x00000, 0x10000, CRC(0e1f258e) SHA1(9240dc0d01e3061c0c8807c07c0a1d033ebe9116) ) // yes, this rom is smaller (menu rom) + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) + + ROM_REGION( 0x8000, "mcu", ROMREGION_ERASEFF ) + ROM_LOAD( "mcu.bin", 0x0000, 0x8000, NO_DUMP ) ROM_REGION( 0x800000, "game_data", ROMREGION_ERASEFF ) ROM_LOAD( "k2.bin", 0x000000, 0x20000, CRC(a12439f4) SHA1(e957d4fe275e982bedef28af8cc2957da27dc512) ) // Final Bubble Bobble (1/2) - ROM_LOAD( "k1.bin", 0x080000, 0x20000, CRC(dadffecd) SHA1(68ebb968539049a9e193da5200856b9f956f7e02) ) // Final Bubble Bobble (2/2) + ROM_LOAD( "k1.bin", 0x020000, 0x20000, CRC(dadffecd) SHA1(68ebb968539049a9e193da5200856b9f956f7e02) ) // Final Bubble Bobble (2/2) + ROM_LOAD( "rom1.bin", 0x80000, 0x10000, CRC(0e1f258e) SHA1(9240dc0d01e3061c0c8807c07c0a1d033ebe9116) ) // yes, this rom is smaller (menu rom) ROM_LOAD( "k3.bin", 0x100000, 0x20000, CRC(9bb92096) SHA1(3ca17b7a9aa20b97cac1f78ba13f70bed1b37463) ) // Solomon's Key ROM_LOAD( "k4.bin", 0x180000, 0x20000, CRC(e5903942) SHA1(d0c02f4b37c8a02142868459af14ba8ed0340ccd) ) // Magical Tree / Chustle Chumy / Congo Bongo / Charlie Circus ROM_LOAD( "k5.bin", 0x200000, 0x20000, CRC(a7b64d1c) SHA1(7c37ac3f37699c49492d4f4ea4e213670413041c) ) // Flicky / Galaxian / King's Valley / Pippos @@ -526,38 +486,42 @@ ROM_START( smssgame ) ROM_LOAD( "sg11004a 79st0086end 9045.rom4",0x600000, 0x080000, CRC(cdbfe86e) SHA1(83d6f261471dca20f8d2e33b9807d670e9b4eb9c) ) // Invaders, Astro, Super Mario, Ghost House, Bomb Jack, Galaga, Goonies, Road Runner I, Road Fighter, Tetris, Wonder Boy ROM_LOAD( "rom3.bin",0x680000, 0x20000, CRC(96c8705d) SHA1(ba4f4af0cfdad1d63a08201ed186c79aea062b95) ) // ? Kung Fu game (Hello Kang Si?) ROM_LOAD( "rom2.bin",0x700000, 0x20000, CRC(c1478323) SHA1(27b524a234f072e81ef41fb89a5fff5617e9b951) ) // Buk Doo Sun - - // there seems to be some kind of MCU for the timer? ROM_END +// On this version some games gets loaded from space mirrors (particularly the ones that were using mask roms on the other set) ROM_START( smssgamea ) - ROM_REGION( 0x10000, "maincpu", 0 ) - ROM_LOAD( "02.k2", 0x000000, 0x10000, CRC(66ed320e) SHA1(e838cb98fbd295259707f8f7ce433b28baa846e3) ) // menu is here on this one + ROM_REGION( 0x10000, "maincpu", ROMREGION_ERASEFF ) + + ROM_REGION( 0x8000, "mcu", ROMREGION_ERASEFF ) + ROM_LOAD( "mcu.bin", 0x0000, 0x8000, NO_DUMP ) ROM_REGION( 0x800000, "game_data", ROMREGION_ERASEFF ) - ROM_LOAD( "01.k1", 0x000000, 0x20000, CRC(18fd8607) SHA1(f24fbe863e19b513369858bf1260355e92444071) ) // Tri-Formation - ROM_LOAD( "03.k3", 0x080000, 0x20000, CRC(9bb92096) SHA1(3ca17b7a9aa20b97cac1f78ba13f70bed1b37463) ) // Solomon's Key - ROM_LOAD( "04.k4", 0x100000, 0x20000, CRC(28f6f4a9) SHA1(87809d93b8393b3186672c217fa1dec8b152af16) ) // Maisc Tree, Mouse, Invaders, Astro - ROM_LOAD( "05.k5", 0x180000, 0x20000, CRC(350591a4) SHA1(ceb3c4a0fc85c5fbc5a045e9c83c3e7ec4d535cc) ) // Congo Bongo, Circus, Super Mario, Ghost House - ROM_LOAD( "06.k6", 0x200000, 0x20000, CRC(9c5e7cc7) SHA1(4613928e30b7faaa41d550fa41906e13a6059513) ) // Flicky, Galaxian, Bomb Jack, Galaga - ROM_LOAD( "07.k7", 0x280000, 0x20000, CRC(8046a2c0) SHA1(c80298dd56db8c09cac5263e4c01a627ab1a4cda) ) // Kings Vally, Pippols, Goonies, Road Runner I - ROM_LOAD( "08.k8", 0x300000, 0x20000, CRC(ee366e0f) SHA1(3770aa71372e7dbdfd357b239a0fbdf8880dc135) ) // Dragon Story, Spy Vs Spy, Road Fighter - ROM_LOAD( "09.k9", 0x380000, 0x20000, CRC(50a66ef6) SHA1(8eb8d1a7ecca99d1722534be269a6264d49b9dd4) ) // Tetris, Teddy Boy, Pitfall 2 - ROM_LOAD( "10.k10", 0x400000, 0x10000, CRC(ca7ab2df) SHA1(11a85f03ec21d481c5cdfcfb749da20b8569d09a) ) // Drol, Pit Pot - ROM_LOAD( "11.k11", 0x480000, 0x10000, CRC(b03b612f) SHA1(537b7d72e1e06e17db6206a37f2480c14f46b9fc) ) // Hyper Sports, Super Tank - ROM_LOAD( "12.k12", 0x500000, 0x20000, CRC(eb1e8693) SHA1(3283cdcfc25f34a43f317093cd39e10a52bc3ae7) ) // Alex Kidd - ROM_LOAD( "13.rom4", 0x580000, 0x20000, CRC(8767f1c9) SHA1(683cedb001e859c2c7ccde2571104f1eb9f09c2f) ) // Wonderboy - ROM_LOAD( "14.rom3", 0x600000, 0x20000, CRC(889bb269) SHA1(0a92b339c19240bfea29ee24fee3e7d780b0cd5c) ) // Hello Kang Si - ROM_LOAD( "15.rom2", 0x680000, 0x20000, CRC(c1478323) SHA1(27b524a234f072e81ef41fb89a5fff5617e9b951) ) // Buk Doo Gun -// ROM_FILL( 0x200000, 0x80000, 0xff) // ROM1 position not populated - - // there seems to be some kind of MCU for the timer? + ROM_LOAD( "02.k2", 0x000000, 0x10000, CRC(66ed320e) SHA1(e838cb98fbd295259707f8f7ce433b28baa846e3) ) // menu is here on this one + + ROM_LOAD( "01.k1", 0x080000, 0x20000, CRC(18fd8607) SHA1(f24fbe863e19b513369858bf1260355e92444071) ) // Tri-Formation + ROM_LOAD( "03.k3", 0x100000, 0x20000, CRC(9bb92096) SHA1(3ca17b7a9aa20b97cac1f78ba13f70bed1b37463) ) // Solomon's Key + ROM_LOAD( "04.k4", 0x1a0000, 0x20000, CRC(28f6f4a9) SHA1(87809d93b8393b3186672c217fa1dec8b152af16) ) // Masic Tree, Mouse, Invaders, Astro + ROM_LOAD( "05.k5", 0x220000, 0x20000, CRC(350591a4) SHA1(ceb3c4a0fc85c5fbc5a045e9c83c3e7ec4d535cc) ) // Congo Bongo, Circus, Super Mario, Ghost House + ROM_LOAD( "06.k6", 0x2a0000, 0x20000, CRC(9c5e7cc7) SHA1(4613928e30b7faaa41d550fa41906e13a6059513) ) // Flicky, Galaxian, Bomb Jack, Galaga + ROM_LOAD( "07.k7", 0x320000, 0x20000, CRC(8046a2c0) SHA1(c80298dd56db8c09cac5263e4c01a627ab1a4cda) ) // Kings Vally, Pippols, Goonies, Road Runner I + ROM_LOAD( "08.k8", 0x380000, 0x20000, CRC(ee366e0f) SHA1(3770aa71372e7dbdfd357b239a0fbdf8880dc135) ) // Dragon Story, Spy Vs Spy, Road Fighter + ROM_RELOAD( 0x3a0000, 0x20000 ) + ROM_LOAD( "09.k9", 0x400000, 0x20000, CRC(50a66ef6) SHA1(8eb8d1a7ecca99d1722534be269a6264d49b9dd4) ) // Tetris, Teddy Boy, Pitfall 2 + ROM_RELOAD( 0x420000, 0x20000 ) + ROM_LOAD( "10.k10", 0x480000, 0x10000, CRC(ca7ab2df) SHA1(11a85f03ec21d481c5cdfcfb749da20b8569d09a) ) // Drol, Pit Pot + ROM_RELOAD( 0x4a0000, 0x10000 ) + ROM_LOAD( "11.k11", 0x500000, 0x10000, CRC(b03b612f) SHA1(537b7d72e1e06e17db6206a37f2480c14f46b9fc) ) // Hyper Sports, Super Tank + ROM_RELOAD( 0x520000, 0x10000 ) + ROM_LOAD( "12.k12", 0x580000, 0x20000, CRC(eb1e8693) SHA1(3283cdcfc25f34a43f317093cd39e10a52bc3ae7) ) // Alex Kidd + ROM_LOAD( "13.rom4", 0x600000, 0x20000, CRC(8767f1c9) SHA1(683cedb001e859c2c7ccde2571104f1eb9f09c2f) ) // Wonderboy + ROM_LOAD( "14.rom3", 0x680000, 0x20000, CRC(889bb269) SHA1(0a92b339c19240bfea29ee24fee3e7d780b0cd5c) ) // Hello Kang Si + ROM_LOAD( "15.rom2", 0x700000, 0x20000, CRC(c1478323) SHA1(27b524a234f072e81ef41fb89a5fff5617e9b951) ) // Buk Doo Gun +// ROM_FILL( 0x780000, 0x80000, 0xff) // ROM1 position not populated ROM_END } // Anonymous namespace -// these haven't been set as clones because they contain different games -GAME( 199?, smssgame, 0, sms_supergame, sms_supergame, smsbootleg_state, init_sms_supergame, ROT0, "Sono Corp Japan", "Super Game (Sega Master System Multi-game bootleg)", MACHINE_NOT_WORKING ) -GAME( 1990, smssgamea, 0, sms_supergame, sms_supergame, smsbootleg_state, init_sms_supergame, ROT0, "Seo Jin (TV-Tuning license)", "Super Game (Sega Master System Multi-game bootleg) (alt games)", MACHINE_NOT_WORKING ) // for German market? +GAME( 199?, smssgame, 0, sms_supergame, sms_supergame, smsbootleg_state, init_sms_supergame, ROT0, "Sono Corp Japan", "Super Game (Sega Master System Multi-game bootleg, 01 Final Bubble Bobble)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) +GAME( 1990, smssgamea, smssgame, sms_supergame, sms_supergame, smsbootleg_a_state, init_sms_supergame, ROT0, "Seo Jin (TV-Tuning license)", "Super Game (Sega Master System Multi-game bootleg, 01 Tri Formation)", MACHINE_NOT_WORKING | MACHINE_UNEMULATED_PROTECTION ) // for German market? diff --git a/src/mame/seibu/goodejan.cpp b/src/mame/seibu/goodejan.cpp index df600b03edd0d..39ffa3472539d 100644 --- a/src/mame/seibu/goodejan.cpp +++ b/src/mame/seibu/goodejan.cpp @@ -324,7 +324,7 @@ void goodejan_state::draw_sprites(screen_device &screen, bitmap_ind16 &bitmap, c m_gfxdecode->gfx(0)->prio_transpen(bitmap, cliprect, sprite++, color, - fx, fy, + fx, fy, x + (dx - 1 - ax) * 16, y + ay * 16, screen.priority(), pri, 15); diff --git a/src/mame/sharp/zaurus.cpp b/src/mame/sharp/zaurus.cpp index 0f1661f8eb1dd..2e75ee639ab56 100644 --- a/src/mame/sharp/zaurus.cpp +++ b/src/mame/sharp/zaurus.cpp @@ -1505,15 +1505,7 @@ void zaurus_sa_state::main_map(address_map &map) void zaurus_pxa_state::main_map(address_map &map) { map(0x00000000, 0x001fffff).rom().region("firmware", 0); - map(0x40000000, 0x400002ff).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::dma_r), FUNC(pxa255_periphs_device::dma_w)); - map(0x40400000, 0x40400083).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::i2s_r), FUNC(pxa255_periphs_device::i2s_w)); - map(0x40900000, 0x4090000f).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::rtc_r), FUNC(pxa255_periphs_device::rtc_w)); - map(0x40a00000, 0x40a0001f).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::ostimer_r), FUNC(pxa255_periphs_device::ostimer_w)); - map(0x40d00000, 0x40d00017).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::intc_r), FUNC(pxa255_periphs_device::intc_w)); - map(0x40e00000, 0x40e0006b).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::gpio_r), FUNC(pxa255_periphs_device::gpio_w)); - map(0x40f00000, 0x40f00037).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::power_r), FUNC(pxa255_periphs_device::power_w)); - map(0x41300000, 0x4130000b).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::clocks_r), FUNC(pxa255_periphs_device::clocks_w)); - map(0x44000000, 0x4400021f).rw(m_pxa_periphs, FUNC(pxa255_periphs_device::lcd_r), FUNC(pxa255_periphs_device::lcd_w)); + map(0x40000000, 0x47ffffff).m(m_pxa_periphs, FUNC(pxa255_periphs_device::map)); map(0xa0000000, 0xa07fffff).ram().share("ram"); } @@ -1527,7 +1519,7 @@ void zaurus_sa_state::device_reset_after_children() INPUT_CHANGED_MEMBER( zaurus_pxa_state::system_start ) { - m_pxa_periphs->gpio_bit_w(10, m_power->read()); + m_pxa_periphs->gpio_in<10>(BIT(m_power->read(), 0)); } static INPUT_PORTS_START( zaurus_sa ) diff --git a/src/mame/skeleton/alphasma3k.cpp b/src/mame/skeleton/alphasma3k.cpp index 9c26782f25e2a..7457cf56044e8 100644 --- a/src/mame/skeleton/alphasma3k.cpp +++ b/src/mame/skeleton/alphasma3k.cpp @@ -59,7 +59,7 @@ class alphasmart3k_state : public driver_device , m_lcdc0(*this, "ks0066_0") , m_lcdc1(*this, "ks0066_1") , m_ram(*this, RAM_TAG) - , m_ipl(*this, "ipl") + , m_ipl(*this, "ipl") { } @@ -78,7 +78,7 @@ class alphasmart3k_state : public driver_device virtual void machine_reset() override; private: - void main_map(address_map &map); + void main_map(address_map &map); }; void alphasmart3k_state::machine_start() @@ -97,7 +97,7 @@ void alphasmart3k_state::machine_reset() void alphasmart3k_state::main_map(address_map &map) { // map(0x0000'0000, 0x0003'ffff).ram().share("ram"); - map(0x0040'0000, 0x004f'ffff).rom().region("ipl", 0); + map(0x0040'0000, 0x004f'ffff).rom().region("ipl", 0); } static INPUT_PORTS_START( alphasmart3k ) @@ -109,7 +109,7 @@ void alphasmart3k_state::alphasmart3k(machine_config &config) { // Basic machine hardware MC68EZ328(config, m_maincpu, 16'000'000); // MC68EZ328PU16V, clock unverified - m_maincpu->set_addrmap(AS_PROGRAM, &alphasmart3k_state::main_map); + m_maincpu->set_addrmap(AS_PROGRAM, &alphasmart3k_state::main_map); // Values from AlphaSmart 2000, not confirmed for AlphaSmart 3000 // AlphaSmart 3000 uses a Data Image CM4040 LCD display, LCD is 40x4 according to ref diff --git a/src/mame/skeleton/evolution_handheld.cpp b/src/mame/skeleton/evolution_handheld.cpp index ef3691d2e1b1d..32adb8ef4d314 100644 --- a/src/mame/skeleton/evolution_handheld.cpp +++ b/src/mame/skeleton/evolution_handheld.cpp @@ -53,13 +53,13 @@ uint32_t evolution_handheldgame_state::screen_update(screen_device &screen, bitm void evolution_handheldgame_state::evolution_map(address_map &map) { - map(0x400000, 0x41ffff).rom().region("maincpu", 0x00000); + map(0x400000, 0x41ffff).rom().region("maincpu", 0x00000); } void evolution_handheldgame_state::evolhh(machine_config &config) { - EVOLUTION_CPU(config, m_maincpu, XTAL(16'000'000)); + EVOLUTION_CPU(config, m_maincpu, XTAL(16'000'000)); m_maincpu->set_addrmap(AS_PROGRAM, &evolution_handheldgame_state::evolution_map); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); diff --git a/src/mame/skeleton/fc100.cpp b/src/mame/skeleton/fc100.cpp index 353e3196d21aa..324fd1aefd27b 100644 --- a/src/mame/skeleton/fc100.cpp +++ b/src/mame/skeleton/fc100.cpp @@ -136,7 +136,7 @@ void fc100_state::io_map(address_map &map) { map.unmap_value_high(); map.global_mask(0xff); - map(0x00, 0x0F).r(FUNC(fc100_state::port00_r)); + map(0x00, 0x0f).r(FUNC(fc100_state::port00_r)); // map(0x10, 0x10).w(FUNC(fc100_state::port10_w)); // vdg, unknown effects map(0x21, 0x21).w("psg", FUNC(ay8910_device::data_w)); map(0x22, 0x22).r("psg", FUNC(ay8910_device::data_r)); @@ -579,6 +579,9 @@ ROM_START( fc100 ) ROM_LOAD( "08-02.u49", 0x2000, 0x2000, CRC(e14fc7e9) SHA1(9c5821e65c1efe698e25668d24c36929ea4c3ad7) ) ROM_LOAD( "06-03.u50", 0x4000, 0x2000, CRC(d783c84e) SHA1(6d1bf53995e08724d5ecc24198cdda4442eb2eb9) ) + ROM_REGION( 0x800, "mcu", ROMREGION_ERASE00 ) + ROM_LOAD( "mcu.bin", 0x000, 0x800, NO_DUMP ) + ROM_REGION( 0x800, "ram", ROMREGION_ERASE00 ) ROM_REGION( 0x1000, "chargen", 0 ) diff --git a/src/mame/skeleton/hudson_poems.cpp b/src/mame/skeleton/hudson_poems.cpp index e0617978461f3..c599085826719 100644 --- a/src/mame/skeleton/hudson_poems.cpp +++ b/src/mame/skeleton/hudson_poems.cpp @@ -27,57 +27,74 @@ #include "emu.h" +#include "cpu/xtensa/xtensa.h" + #include "screen.h" #include "speaker.h" namespace { -class hudsom_poems : public driver_device +class hudson_poems_state : public driver_device { public: - hudsom_poems(const machine_config &mconfig, device_type type, const char *tag) : - driver_device(mconfig, type, tag) + hudson_poems_state(const machine_config &mconfig, device_type type, const char *tag) : + driver_device(mconfig, type, tag), + m_maincpu(*this, "maincpu") { } void hudson_poems(machine_config &config); -private: +protected: virtual void machine_start() override; virtual void machine_reset() override; +private: uint32_t screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect); + + void mem_map(address_map &map); + + required_device m_maincpu; }; -void hudsom_poems::machine_start() +void hudson_poems_state::machine_start() { } -void hudsom_poems::machine_reset() +void hudson_poems_state::machine_reset() { + m_maincpu->set_pc(0x20010058); } static INPUT_PORTS_START( hudson_poems ) INPUT_PORTS_END -uint32_t hudsom_poems::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) +uint32_t hudson_poems_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { return 0; } -void hudsom_poems::hudson_poems(machine_config &config) +void hudson_poems_state::mem_map(address_map &map) +{ + map(0x20000000, 0x207fffff).rom().region("maincpu", 0); + map(0x2c000000, 0x2c7fffff).ram(); +} + +void hudson_poems_state::hudson_poems(machine_config &config) { // 27Mhz XTAL // Xtensa based CPU? + XTENSA(config, m_maincpu, 27_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &hudson_poems_state::mem_map); screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); screen.set_refresh_hz(60); screen.set_vblank_time(ATTOSECONDS_IN_USEC(0)); screen.set_size(320, 240); // resolution not confirmed screen.set_visarea(0, 320-1, 0, 240-1); - screen.set_screen_update(FUNC(hudsom_poems::screen_update)); + screen.set_screen_update(FUNC(hudson_poems_state::screen_update)); SPEAKER(config, "speaker").front_center(); } @@ -93,4 +110,4 @@ ROM_END } // anonymous namespace -CONS( 2005, marimba, 0, 0, hudson_poems, hudson_poems, hudsom_poems, empty_init, "Konami", "Marimba Tengoku (Japan)", MACHINE_IS_SKELETON ) +CONS( 2005, marimba, 0, 0, hudson_poems, hudson_poems, hudson_poems_state, empty_init, "Konami", "Marimba Tengoku (Japan)", MACHINE_IS_SKELETON ) diff --git a/src/mame/snk/miconkit.cpp b/src/mame/snk/miconkit.cpp index 1b0571415dca3..6787965a2d493 100644 --- a/src/mame/snk/miconkit.cpp +++ b/src/mame/snk/miconkit.cpp @@ -84,6 +84,8 @@ class miconkit_state : public driver_device required_ioport_array<5> m_inputs; output_finder<2> m_lamps; + u8 m_select = 0; + void main_map(address_map &map); void io_map(address_map &map); void smiconk_main_map(address_map &map); @@ -96,8 +98,6 @@ class miconkit_state : public driver_device u8 vblank_r(); void select_w(u8 data); u8 input_r(); - - u8 m_select = 0; }; void miconkit_state::machine_start() diff --git a/src/mame/subsino/subsino.cpp b/src/mame/subsino/subsino.cpp index acb704b3b1bea..32be2cfd7001b 100644 --- a/src/mame/subsino/subsino.cpp +++ b/src/mame/subsino/subsino.cpp @@ -3287,7 +3287,7 @@ ROM_END - TI TPC1020AFN-084C. - Unpopulated locations on the PCB for a battery and a reset switch. */ ROM_START( newhunter ) - ROM_REGION( 0x4000, "maincpu", 0 ) // The MCU had its surface scratched out, but almost sure it's an HD647180X0CP8L + ROM_REGION( 0x4000, "maincpu", 0 ) // The MCU had its surface scratched out, but almost sure it's an HD647180X0CP8L ROM_LOAD( "hd647180.bin", 0x00000, 0x04000, NO_DUMP ) HD647180X_FAKE_INTERNAL_ROM diff --git a/src/mame/sunelectronics/blockch.cpp b/src/mame/sunelectronics/blockch.cpp index c515b71e8b3b4..bc1bd49c086e6 100644 --- a/src/mame/sunelectronics/blockch.cpp +++ b/src/mame/sunelectronics/blockch.cpp @@ -75,6 +75,11 @@ class blockch_state : public driver_device required_shared_ptr m_vram; required_ioport_array<5> m_inputs; + u8 m_sound = 0; + u8 m_ball_x = 0; + u8 m_ball_y = 0; + u8 m_vctrl = 0; + void main_map(address_map &map); void io_map(address_map &map); @@ -86,11 +91,6 @@ class blockch_state : public driver_device void ppi1_b_w(u8 data); void ppi1_c_w(u8 data); u8 ppi1_c_r(); - - u8 m_sound = 0; - u8 m_ball_x = 0; - u8 m_ball_y = 0; - u8 m_vctrl = 0; }; void blockch_state::machine_start() diff --git a/src/mame/taito/cchance.cpp b/src/mame/taito/cchance.cpp index bd6afb897e0f7..bfefa20a413b6 100644 --- a/src/mame/taito/cchance.cpp +++ b/src/mame/taito/cchance.cpp @@ -2,15 +2,13 @@ // copyright-holders:David Haywood, Angelo Salese /*************************************************************************************************************************** -Cherry Chance (c) 1987 Taito Corporation? +Cherry Chance / チェリーチャンス (c) 1987 Taito Corporation -driver by David Haywood & Angelo Salese - -A cherry-type game that uses the tnzs video chip,might be a modified board as well. +A cherry-type game that uses the tnzs video chip. TODO: -- hopper emulation, similar to the other Taito gamblers; - Undumped color proms -> ugly colors; +- Complete I/O, requires manual for DIPs and (likely non-)JAMMA pinout; - Verify clock dividers for Z80 and YM2149; ============================================================================================================================ @@ -38,6 +36,7 @@ cha3 $10d8 #include "tnzs_video.h" #include "cpu/z80/z80.h" +#include "machine/ticket.h" #include "machine/timer.h" #include "sound/ay8910.h" @@ -54,6 +53,7 @@ class cchance_state : public tnzs_video_state_base cchance_state(const machine_config &mconfig, device_type type, const char *tag) : tnzs_video_state_base(mconfig, type, tag) , m_opto(*this, "opto") + , m_hopper(*this, "hopper") , m_dswc(*this, "DSWC") { } @@ -65,6 +65,7 @@ class cchance_state : public tnzs_video_state_base private: required_device m_opto; + required_device m_hopper; required_ioport m_dswc; void output_0_w(uint8_t data); @@ -72,9 +73,6 @@ class cchance_state : public tnzs_video_state_base void main_map(address_map &map) ATTR_COLD; -// uint8_t m_hop_io = 0; -// uint8_t m_bell_io = 0; - bool m_vblank_irq = false, m_io_irq = false; uint8_t m_irq_ack = 0; TIMER_DEVICE_CALLBACK_MEMBER(scanline_cb); @@ -83,15 +81,18 @@ class cchance_state : public tnzs_video_state_base void cchance_state::output_0_w(uint8_t data) { - //---- --x- divider? -// machine().bookkeeping().coin_lockout_w(0, ~data & 1); + // -x-- ---- slottle sol[enoid] + // ---- x--- Enabled on payout, untested by service mode + // ---- -x-- Coin counter + // ---- --x- divider / diverter +// machine().bookkeeping().coin_lockout_w(0, BIT(data, 0)); -// machine().bookkeeping().coin_counter_w(0, ~data & 1); + machine().bookkeeping().coin_counter_w(0, BIT(data, 2)); } void cchance_state::output_1_w(uint8_t data) { -// m_hop_io = (data & 0x40) >>4; + m_hopper->motor_w(BIT(data, 6)); // m_bell_io = (data & 0x80) >>4; } @@ -145,7 +146,7 @@ static INPUT_PORTS_START( cchance ) PORT_BIT( 0x01, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("opto", taitoio_opto_device, opto_h_r) PORT_BIT( 0x02, IP_ACTIVE_LOW, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("opto", taitoio_opto_device, opto_l_r) // Hopper related? Goes "hopper time out" if IP_ACTIVE_LOW as suggested by service mode (buggy?) - PORT_BIT (0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Pay Out") + PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_CUSTOM ) PORT_READ_LINE_DEVICE_MEMBER("hopper", ticket_dispenser_device, line_r) PORT_BIT (0x08, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Hopper Over") // "Hop Over"? PORT_BIT( 0x10, IP_ACTIVE_LOW, IPT_START1 ) PORT_NAME("Slottle") PORT_BIT( 0x20, IP_ACTIVE_LOW, IPT_OTHER ) PORT_NAME("Drop SW") // "Coin Drop SW" as per other Taito gamblers? @@ -284,6 +285,7 @@ void cchance_state::cchance(machine_config &config) TIMER(config, "scantimer").configure_scanline(FUNC(cchance_state::scanline_cb), "screen", 0, 1); TAITOIO_OPTO(config, "opto", 0); + HOPPER(config, m_hopper, attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); X1_001(config, m_spritegen, 12_MHz_XTAL, m_palette, gfx_cchance); m_spritegen->set_fg_yoffsets(-0x12, 0x0e); @@ -327,4 +329,4 @@ ROM_END } // anonymous namespace -GAME( 1987?, cchance, 0, cchance, cchance, cchance_state, empty_init, ROT0, "Taito Corporation?", "Cherry Chance", MACHINE_NOT_WORKING | MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // year/manufacturer assumed from GFX dump (not displayed) +GAME( 1987, cchance, 0, cchance, cchance, cchance_state, empty_init, ROT0, "Taito Corporation", "Cherry Chance", MACHINE_WRONG_COLORS | MACHINE_SUPPORTS_SAVE ) // year/manufacturer confirmed from Taito old "Arcade Game History" page diff --git a/src/mame/taito/taito_f3.cpp b/src/mame/taito/taito_f3.cpp index 6c81b91df4c48..87b9ec8f21109 100644 --- a/src/mame/taito/taito_f3.cpp +++ b/src/mame/taito/taito_f3.cpp @@ -1,5 +1,6 @@ // license:BSD-3-Clause // copyright-holders:Bryan McPhail +// thanks-to: Shiriru /*************************************************************************** Taito F3 Package System (aka F3 Cybercore System) @@ -9,25 +10,16 @@ Major thanks to Aaron Giles for sound info, figuring out the 68K/ES5505 rom interface and ES5505 emulator! Thanks to Acho A. Tang for Kirameki Star Road sound banking info! - Thank you to Shiriru for the scanline rendering (including alpha blending), - sprite sync fixes, sprite zoom fixes and others! Other Issues: - - Various hacks in video core that needs squashing; - - When playing space invaders dx in original mode, t.t. with overlay, the - alpha blending effect is wrong (see Taito B version of game) - - Bubble Symphony has an alpha transition effect that doesn't appear in Mame - - Various other missing blending effects (see Mametesters) - - Find how this HW drives the CRTC, and convert video timings to use screen raw params; - - Feel free to report any other issues to me. + - Find how this HW drives the CRTC and verify timing of interrupts Taito custom chips on motherboard: - TC0630FDP - Playfield generator? (Nearest tile roms) - TC0640FIO - I/O & watchdog? - TC0650FDA - Priority mixer? (Near paletteram & video output) - TC0660FCM - Sprites? (Nearest sprite roms) + TC0630FDP "Display Processor" - Graphics (sprites, playfields, prio, lineram...) + TC0640FIO "I/O" - I/O ports (buttons, eeprom, and watchdog) + TC0650FDA "Digital to Analog" - Blending and RGB output + TC0660FCM "Control Module?" - Misc. control/comm.? ***************************************************************************/ @@ -66,40 +58,36 @@ u32 taito_f3_state::f3_control_r(offs_t offset) void taito_f3_state::f3_control_w(offs_t offset, u32 data, u32 mem_mask) { - switch (offset) - { - case 0x00: /* Watchdog */ - m_watchdog->watchdog_reset(); - return; - - case 0x01: /* Coin counters & lockouts */ - if (ACCESSING_BITS_24_31) - { - machine().bookkeeping().coin_lockout_w(0,~data & 0x01000000); - machine().bookkeeping().coin_lockout_w(1,~data & 0x02000000); - machine().bookkeeping().coin_counter_w(0, data & 0x04000000); - machine().bookkeeping().coin_counter_w(1, data & 0x08000000); - m_coin_word[0]=(data>>16)&0xffff; - } - return; + switch (offset) { + case 0x00: /* Watchdog */ + m_watchdog->watchdog_reset(); + return; + + case 0x01: /* Coin counters & lockouts */ + if (ACCESSING_BITS_24_31) { + machine().bookkeeping().coin_lockout_w(0,~data & 0x01000000); + machine().bookkeeping().coin_lockout_w(1,~data & 0x02000000); + machine().bookkeeping().coin_counter_w(0, data & 0x04000000); + machine().bookkeeping().coin_counter_w(1, data & 0x08000000); + m_coin_word[0]=(data>>16)&0xffff; + } + return; - case 0x04: /* Eeprom */ - if (ACCESSING_BITS_0_7) - { - m_eepromout->write(data, 0xff); - } - return; - - case 0x05: /* Player 3 & 4 coin counters */ - if (ACCESSING_BITS_24_31) - { - machine().bookkeeping().coin_lockout_w(2,~data & 0x01000000); - machine().bookkeeping().coin_lockout_w(3,~data & 0x02000000); - machine().bookkeeping().coin_counter_w(2, data & 0x04000000); - machine().bookkeeping().coin_counter_w(3, data & 0x08000000); - m_coin_word[1]=(data>>16)&0xffff; - } - return; + case 0x04: /* Eeprom */ + if (ACCESSING_BITS_0_7) { + m_eepromout->write(data, 0xff); + } + return; + + case 0x05: /* Player 3 & 4 coin counters */ + if (ACCESSING_BITS_24_31) { + machine().bookkeeping().coin_lockout_w(2,~data & 0x01000000); + machine().bookkeeping().coin_lockout_w(3,~data & 0x02000000); + machine().bookkeeping().coin_counter_w(2, data & 0x04000000); + machine().bookkeeping().coin_counter_w(3, data & 0x08000000); + m_coin_word[1]=(data>>16)&0xffff; + } + return; } logerror("CPU #0 PC %06x: warning - write unmapped control address %06x %08x\n",m_maincpu->pc(),offset,data); } @@ -116,8 +104,7 @@ void taito_f3_state::sound_reset_1_w(u32 data) void taito_f3_state::sound_bankswitch_w(offs_t offset, u32 data, u32 mem_mask) { - if (m_game == KIRAMEKI) - { + if (m_game == KIRAMEKI) { int idx = (offset << 1) & 0x1e; if (ACCESSING_BITS_0_15) idx += 1; @@ -126,19 +113,17 @@ void taito_f3_state::sound_bankswitch_w(offs_t offset, u32 data, u32 mem_mask) idx -= 8; /* Banks are 0x20000 bytes each, divide by two to get data16 - pointer rather than byte pointer */ + pointer rather than byte pointer */ m_taito_en->set_bank(1, idx); - } - else - { + } else { logerror("Sound bankswitch in unsupported game\n"); } } -void taito_f3_state::f3_unk_w(offs_t offset, u16 data) +void taito_f3_state::f3_timer_control_w(offs_t offset, u16 data) { /* - Several games writes a value here at POST, dunno what kind of config this is ... + TODO: Several games configure timer-based pseudo-hblank int5 here at POST ringrage: 0x0000 arabianm: 0x0000 ridingf: (no init) @@ -188,7 +173,7 @@ void taito_f3_state::f3_map(address_map &map) map(0x400000, 0x41ffff).mirror(0x20000).ram(); map(0x440000, 0x447fff).ram().w(FUNC(taito_f3_state::palette_24bit_w)).share("paletteram"); map(0x4a0000, 0x4a001f).rw(FUNC(taito_f3_state::f3_control_r), FUNC(taito_f3_state::f3_control_w)); - map(0x4c0000, 0x4c0003).w(FUNC(taito_f3_state::f3_unk_w)); + map(0x4c0000, 0x4c0003).w(FUNC(taito_f3_state::f3_timer_control_w)); map(0x600000, 0x60ffff).rw(FUNC(taito_f3_state::spriteram_r), FUNC(taito_f3_state::spriteram_w)); map(0x610000, 0x61bfff).rw(FUNC(taito_f3_state::pf_ram_r), FUNC(taito_f3_state::pf_ram_w)); map(0x61c000, 0x61dfff).rw(FUNC(taito_f3_state::textram_r), FUNC(taito_f3_state::textram_w)); @@ -206,12 +191,9 @@ void taito_f3_state::bubsympb_oki_w(u8 data) // TODO: this is wrong. PCB referen { //printf("write %08x %08x\n",data,mem_mask); const u8 bank = data & 0xf; - if (data < 5) - { + if (data < 5) { m_okibank->set_entry(bank); - } - else - { + } else { logerror("unknown oki bank write %02x at %08x\n", bank, m_maincpu->pc()); } //printf("oki bank w %08x\n",data); @@ -226,7 +208,7 @@ void taito_f3_state::bubsympb_map(address_map &map) map(0x4a0000, 0x4a001b).rw(FUNC(taito_f3_state::f3_control_r), FUNC(taito_f3_state::f3_control_w)); map(0x4a001d, 0x4a001d).w(FUNC(taito_f3_state::bubsympb_oki_w)); map(0x4a001f, 0x4a001f).rw(m_oki, FUNC(okim6295_device::read), FUNC(okim6295_device::write)); - map(0x4c0000, 0x4c0003).w(FUNC(taito_f3_state::f3_unk_w)); + map(0x4c0000, 0x4c0003).w(FUNC(taito_f3_state::f3_timer_control_w)); map(0x600000, 0x60ffff).rw(FUNC(taito_f3_state::spriteram_r), FUNC(taito_f3_state::spriteram_w)); map(0x610000, 0x61bfff).rw(FUNC(taito_f3_state::pf_ram_r), FUNC(taito_f3_state::pf_ram_w)); map(0x61c000, 0x61dfff).rw(FUNC(taito_f3_state::textram_r), FUNC(taito_f3_state::textram_w)); @@ -368,8 +350,7 @@ INPUT_PORTS_END /******************************************************************************/ -static const gfx_layout charlayout = -{ +static const gfx_layout charlayout = { 8,8, 256, 4, @@ -379,8 +360,7 @@ static const gfx_layout charlayout = 32*8 }; -static const gfx_layout pivotlayout = -{ +static const gfx_layout pivotlayout = { 8,8, 2048, 4, @@ -390,8 +370,7 @@ static const gfx_layout pivotlayout = 32*8 }; -static const gfx_layout layout_6bpp_sprite_hi = -{ +static const gfx_layout layout_6bpp_sprite_hi = { 16,16, RGN_FRAC(1,1), 6, @@ -401,8 +380,7 @@ static const gfx_layout layout_6bpp_sprite_hi = 16*16*2 }; -static const gfx_layout layout_6bpp_tile_hi = -{ +static const gfx_layout layout_6bpp_tile_hi = { 16,16, RGN_FRAC(1,1), 6, @@ -425,7 +403,9 @@ GFXDECODE_END TIMER_CALLBACK_MEMBER(taito_f3_state::trigger_int3) { - m_maincpu->set_input_line(3, HOLD_LINE); // some signal from video hardware? + // some signal from video hardware? + // vblank handler will wait until approximately end of vblank for it + m_maincpu->set_input_line(3, HOLD_LINE); } INTERRUPT_GEN_MEMBER(taito_f3_state::interrupt2) @@ -451,7 +431,7 @@ void taito_f3_state::machine_reset() void taito_f3_state::f3(machine_config &config) { /* basic machine hardware */ - M68EC020(config, m_maincpu, XTAL(16'000'000)); + M68EC020(config, m_maincpu, F3_MAIN_CLK); m_maincpu->set_addrmap(AS_PROGRAM, &taito_f3_state::f3_map); m_maincpu->set_vblank_int("screen", FUNC(taito_f3_state::interrupt2)); @@ -461,10 +441,15 @@ void taito_f3_state::f3(machine_config &config) /* video hardware */ SCREEN(config, m_screen, SCREEN_TYPE_RASTER); - m_screen->set_refresh_hz(58.97); - m_screen->set_vblank_time(ATTOSECONDS_IN_USEC(624)); /* 58.97 Hz, 624us vblank time */ - m_screen->set_size(40*8+48*2, 32*8); - m_screen->set_visarea(46, 40*8-1 + 46, 24, 24+232-1); + // from taito z system and crystal on board + // and measurements from https://www.arcade-projects.com/threads/the-taito-f3-sync.12343/ + m_screen->set_raw( + 26.686_MHz_XTAL / 4, + 432, 46, 320 + 46, + 262, 24, 232 + 24 + ); + // refresh rate = 26686000/4/432/262 = 58.94.. + m_screen->set_screen_update(FUNC(taito_f3_state::screen_update)); m_screen->screen_vblank().set(FUNC(taito_f3_state::screen_vblank)); @@ -503,8 +488,7 @@ void taito_f3_state::f3_224c(machine_config &config) m_screen->set_visarea(46, 40*8-1 + 46, 24, 24+224-1); } -static const gfx_layout bubsympb_sprite_layout = -{ +static const gfx_layout bubsympb_sprite_layout = { 16,16, RGN_FRAC(1,6), 6, @@ -514,8 +498,7 @@ static const gfx_layout bubsympb_sprite_layout = 16*16 }; -static const gfx_layout bubsympb_layout_5bpp_tile_hi = -{ +static const gfx_layout bubsympb_layout_5bpp_tile_hi = { 16,16, RGN_FRAC(1,1), 5, @@ -538,7 +521,7 @@ GFXDECODE_END void taito_f3_state::bubsympb(machine_config &config) { /* basic machine hardware */ - M68EC020(config, m_maincpu, XTAL(16'000'000)); + M68EC020(config, m_maincpu, F3_MAIN_CLK); m_maincpu->set_addrmap(AS_PROGRAM, &taito_f3_state::bubsympb_map); m_maincpu->set_vblank_int("screen", FUNC(taito_f3_state::interrupt2)); @@ -4335,8 +4318,7 @@ void taito_f3_state::tile_decode() u8 *dest; // all but bubsymphb (bootleg board with different sprite gfx layout), 2mindril (no sprite gfx roms) - if (m_gfxdecode->gfx(5) != nullptr) - { + if (m_gfxdecode->gfx(5) != nullptr) { gfx_element *spr_gfx = m_gfxdecode->gfx(2); gfx_element *spr_gfx_hi = m_gfxdecode->gfx(5); @@ -4345,14 +4327,12 @@ void taito_f3_state::tile_decode() // loop over elements dest = m_decoded_gfx5.get(); - for (int c = 0; c < spr_gfx->elements(); c++) - { + for (int c = 0; c < spr_gfx->elements(); c++) { const u8 *c1base = spr_gfx->get_data(c); const u8 *c3base = spr_gfx_hi->get_data(c); // loop over height - for (int y = 0; y < spr_gfx->height(); y++) - { + for (int y = 0; y < spr_gfx->height(); y++) { const u8 *c1 = c1base; const u8 *c3 = c3base; @@ -4369,8 +4349,7 @@ void taito_f3_state::tile_decode() m_gfxdecode->set_gfx(5, nullptr); } - if (m_gfxdecode->gfx(4) != nullptr) - { + if (m_gfxdecode->gfx(4) != nullptr) { gfx_element *pf_gfx = m_gfxdecode->gfx(3); gfx_element *pf_gfx_hi = m_gfxdecode->gfx(4); @@ -4379,14 +4358,12 @@ void taito_f3_state::tile_decode() // loop over elements dest = m_decoded_gfx4.get(); - for (int c = 0; c < pf_gfx->elements(); c++) - { + for (int c = 0; c < pf_gfx->elements(); c++) { const u8 *c0base = pf_gfx->get_data(c); const u8 *c2base = pf_gfx_hi->get_data(c); // loop over height - for (int y = 0; y < pf_gfx->height(); y++) - { + for (int y = 0; y < pf_gfx->height(); y++) { const u8 *c0 = c0base; const u8 *c2 = c2base; @@ -4722,7 +4699,7 @@ GAME( 1995, spcinv95, 0, f3_224a, f3, taito_f3_state, init_spcinv95, RO GAME( 1995, spcinv95u, spcinv95, f3_224a, f3, taito_f3_state, init_spcinv95, ROT270, "Taito America Corporation", "Space Invaders '95: The Attack Of Lunar Loonies (Ver 2.5A 1995/06/14)", 0 ) GAME( 1995, akkanvdr, spcinv95, f3_224a, f3, taito_f3_state, init_spcinv95, ROT270, "Taito Corporation", "Akkanbeder (Ver 2.5J 1995/06/14)", 0 ) GAME( 1995, twinqix, 0, f3_224a, f3, taito_f3_state, init_twinqix, ROT0, "Taito America Corporation", "Twin Qix (Ver 1.0A 1995/01/17, prototype)", 0 ) -GAME( 1995, quizhuhu, 0, f3, f3, taito_f3_state, init_quizhuhu, ROT0, "Taito Corporation", "Moriguchi Hiroko no Quiz de Hyuu!Hyuu! (Ver 2.2J 1995/05/25)", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS ) // quiz text positioning, heavy sprite window usage +GAME( 1995, quizhuhu, 0, f3, f3, taito_f3_state, init_quizhuhu, ROT0, "Taito Corporation", "Moriguchi Hiroko no Quiz de Hyuu!Hyuu! (Ver 2.2J 1995/05/25)", 0 ) GAME( 1995, pbobble2, 0, f3, f3, taito_f3_state, init_pbobbl2p, ROT0, "Taito Corporation Japan", "Puzzle Bobble 2 (Ver 2.3O 1995/07/31)", 0 ) GAME( 1995, pbobble2o, pbobble2, f3, f3, taito_f3_state, init_pbobble2, ROT0, "Taito Corporation Japan", "Puzzle Bobble 2 (Ver 2.2O 1995/07/20)", 0 ) GAME( 1995, pbobble2j, pbobble2, f3, f3, taito_f3_state, init_pbobble2, ROT0, "Taito Corporation", "Puzzle Bobble 2 (Ver 2.2J 1995/07/20)", 0 ) diff --git a/src/mame/taito/taito_f3.h b/src/mame/taito/taito_f3.h index fca440cf85589..c2a0264ddcf5e 100644 --- a/src/mame/taito/taito_f3.h +++ b/src/mame/taito/taito_f3.h @@ -1,5 +1,5 @@ // license:BSD-3-Clause -// copyright-holders:Bryan McPhail +// copyright-holders:Bryan McPhail, ywy, 12Me21 #ifndef MAME_TAITO_TAITO_F3_H #define MAME_TAITO_TAITO_F3_H @@ -12,6 +12,7 @@ #include "emupal.h" #include "screen.h" #include "tilemap.h" +#include class taito_f3_state : public driver_device { @@ -24,11 +25,11 @@ class taito_f3_state : public driver_device m_screen(*this, "screen"), m_palette(*this, "palette"), m_eeprom(*this, "eeprom"), - m_textram(*this, "textram", 0x2000, ENDIANNESS_BIG), m_spriteram(*this, "spriteram", 0x10000, ENDIANNESS_BIG), + m_pf_ram(*this, "pf_ram", 0xc000, ENDIANNESS_BIG), + m_textram(*this, "textram", 0x2000, ENDIANNESS_BIG), m_charram(*this, "charram", 0x2000, ENDIANNESS_BIG), m_line_ram(*this, "line_ram", 0x10000, ENDIANNESS_BIG), - m_pf_ram(*this, "pf_ram", 0xc000, ENDIANNESS_BIG), m_pivot_ram(*this, "pivot_ram", 0x10000, ENDIANNESS_BIG), m_input(*this, "IN.%u", 0), m_dial(*this, "DIAL.%u", 0), @@ -90,8 +91,24 @@ class taito_f3_state : public driver_device DECLARE_CUSTOM_INPUT_MEMBER(eeprom_read); protected: - struct F3config; + using fixed8 = s32; + + // should be 30.47618_MHz_XTAL / 2 + static inline constexpr XTAL F3_MAIN_CLK = 16_MHz_XTAL; + static inline constexpr int H_TOTAL = 432; + static inline constexpr int H_VIS = 320; + static inline constexpr int H_START = 46; + static inline constexpr int V_TOTAL = 262; + static inline constexpr int V_VIS = 232; + static inline constexpr int V_START = 24; + + static inline constexpr int NUM_PLAYFIELDS = 4; + static inline constexpr int NUM_TILEMAPS = 5; + static inline constexpr int NUM_SPRITEGROUPS = 4; // high 2 bits of color + static inline constexpr int NUM_CLIPPLANES = 4; + + struct F3config; /* This it the best way to allow game specific kludges until the system is fully understood */ enum { /* Early F3 class games, these are not cartridge games and system features may be different */ @@ -150,12 +167,14 @@ class taito_f3_state : public driver_device required_device m_palette; optional_device m_eeprom; - memory_share_creator m_textram; memory_share_creator m_spriteram; + memory_share_creator m_pf_ram; + memory_share_creator m_textram; memory_share_creator m_charram; memory_share_creator m_line_ram; - memory_share_creator m_pf_ram; memory_share_creator m_pivot_ram; + u16 m_control_0[8]{}; + u16 m_control_1[8]{}; optional_ioport_array<6> m_input; optional_ioport_array<2> m_dial; @@ -167,136 +186,213 @@ class taito_f3_state : public driver_device std::unique_ptr m_decoded_gfx4; std::unique_ptr m_decoded_gfx5; - struct tempsprite - { - int code = 0; - u8 color = 0; - bool flipx = 0, flipy = 0; - int x = 0, y = 0; - u16 zoomx = 0, zoomy = 0; - u8 pri = 0; + struct tempsprite { + int code; // 17 bits + u8 color; + bool flip_x, flip_y; + fixed8 x, y; + fixed8 scale_x, scale_y; + u8 pri; + }; + + struct clip_plane_inf { + s16 l; + s16 r; + + clip_plane_inf() { l = 0; r = 0; } + clip_plane_inf(s16 left, s16 right) + { + l = left; + r = right; + } + clip_plane_inf& set_upper(s8 left, s8 right) + { + l = (l & 0xff) | left<<8; + r = (r & 0xff) | right<<8; + return *this; + } + clip_plane_inf& set_lower(u8 left, u8 right) + { + l = (l & 0x100) | left; + r = (r & 0x100) | right; + return *this; + } + }; + + struct draw_source { + draw_source() { }; + draw_source(bitmap_ind16 *bitmap) + { + src = bitmap; + flags = nullptr; + } + draw_source(tilemap_t *tilemap) + { + if (!tilemap) + return; + src = &tilemap->pixmap(); + flags = &tilemap->flagsmap(); + }; + bitmap_ind16 *src{nullptr}; + bitmap_ind8 *flags{nullptr}; + }; + + struct mix_pix { // per-pixel information for the blending circuit + u16 src_pal[H_TOTAL]; + u16 dst_pal[H_TOTAL]; + u8 src_blend[H_TOTAL]; + u8 dst_blend[H_TOTAL]; + }; + + struct f3_line_inf; + + struct mixable {// layer compositing information + draw_source bitmap; + bool x_sample_enable{false}; + u16 mix_value{0}; + u8 prio{0}; + u8 blend_mode; + void set_mix(u16 v) { mix_value = v; prio = v & 0xf; blend_mode = BIT(mix_value, 14, 2); }; + void set_prio(u8 p) { mix_value = (mix_value & 0xfff0) | p; prio = p; }; + void set_blend(u8 b) { mix_value = (mix_value & 0x3fff) | (b << 14); blend_mode = b; }; + auto clip_inv() const { return std::bitset<4>(mix_value >> 4); }; + auto clip_enable() const { return std::bitset<4>(mix_value >> 8); }; + bool clip_inv_mode() const { return mix_value & 0x1000; }; + inline bool layer_enable() const; + bool blend_a() const { return mix_value & 0x4000; }; + bool blend_b() const { return mix_value & 0x8000; }; + + inline bool operator<(const mixable &rhs) const noexcept { return this->prio < rhs.prio; }; + inline bool operator>(const mixable &rhs) const noexcept { return this->prio > rhs.prio; }; + + u16 palette_adjust(u16 pal) const { return pal; }; + inline int y_index(int y) const; + inline int x_index(int x) const; + bool blend_select(const u8 *line_flags, int x) const { return false; }; + + u8 index{0}; + const char *debug_name() const { return "MX"; }; }; - struct f3_playfield_line_inf - { - u8 alpha_mode[256]{}; - u16 pri[256]{}; - - /* use for draw_scanlines */ - u16 *src[256]{}, *src_s[256]{}, *src_e[256]{}; - u8 *tsrc[256]{}, *tsrc_s[256]{}; - int x_count[256]{}; - u32 x_zoom[256]{}; - u32 clip_in[256]{}; - u32 clip_ex[256]{}; - u16 pal_add[256]{}; + struct sprite_inf : mixable { + // alpha mode in 6000 + // mosaic enable in 6400 + // line enable, clip settings in 7400 + // priority in 7600 + bool blend_select_v{false}; // 7400 0xf000 + bool blend_select(const u8 *line_flags, int x) const { return blend_select_v; }; + inline bool layer_enable() const; + + const char *debug_name() const { return "SP"; }; + }; + + struct pivot_inf : mixable { + u8 pivot_control{0}; // 6000 + bool blend_select_v{false}; + bool blend_select(const u8 *line_flags, int x) const { return blend_select_v; }; + // mosaic enable in 6400 + u16 pivot_enable{0}; // 7000 - what is in this word ? + // mix info from 7200 + bool use_pix() const { return pivot_control & 0xa0; }; + + u16 reg_sx{0}; + u16 reg_sy{0}; + inline int y_index(int y) const; + inline int x_index(int x) const; + const char *debug_name() const { return "PV"; }; + }; + + struct playfield_inf : mixable { + u16 colscroll{0}; // 4000 + bool alt_tilemap{false}; // 4000 + // mosaic enable in 6400 + fixed8 x_scale{0x80}; // 8000 + fixed8 y_scale{0}; // 8000 + u16 pal_add{0}; // 9000 + fixed8 rowscroll{0}; // a000 + + fixed8 reg_sx{0}; + fixed8 reg_sy{0}; + fixed8 reg_fx_y{0}; + fixed8 reg_fx_x{0}; + + u16 width_mask{0}; + + inline u16 palette_adjust(u16 pal) const; + inline int y_index(int y) const; + inline int x_index(int x) const; + bool blend_select(const u8 *line_flags, int x) const { return BIT(line_flags[x], 0); }; + const char *debug_name() const { return "PF"; }; + }; + + struct pri_mode { + u8 src_prio[H_TOTAL]{}; + u8 dst_prio[H_TOTAL]{}; + u8 src_blendmode[H_TOTAL]{}; + u8 dst_blendmode[H_TOTAL]{}; }; - struct f3_spritealpha_line_inf - { - u16 alpha_level[256]{}; - u16 spri[256]{}; - u16 sprite_alpha[256]{}; - u32 sprite_clip_in[256]{}; - u32 sprite_clip_ex[256]{}; - s16 clip_l[4][256]{}; - s16 clip_r[4][256]{}; + struct f3_line_inf { + int y{0}; + int screen_y{0}; + pri_mode pri_alp{}; + // 5000/4000 + clip_plane_inf clip[NUM_CLIPPLANES]; + // 6000 - pivot_control, sprite alpha + u16 maybe_sync_reg{0}; + bool no_opaque_dest{false}; + // 6200 + u8 blend[4]{}; // less 0 - 8 more + // 6400 + u8 x_sample{16 - 0}; // mosaic effect + u8 fx_6400{0}; // unemulated other effects (palette interpretation + unused bits) + // 6600 + u16 bg_palette{0}; // always palette 0 in existing games + // 7200 + pivot_inf pivot; + sprite_inf sp[NUM_SPRITEGROUPS]; + playfield_inf pf[NUM_PLAYFIELDS]; }; int m_game = 0; - tilemap_t *m_tilemap[8]{}; + tilemap_t *m_tilemap[8] = {nullptr}; tilemap_t *m_pixel_layer = nullptr; tilemap_t *m_vram_layer = nullptr; - std::unique_ptr m_spriteram16_buffered; - u16 m_control_0[8]{}; - u16 m_control_1[8]{}; bool m_flipscreen = false; + bool m_extend = false; u8 m_sprite_extra_planes = 0; u8 m_sprite_pen_mask = 0; + bool m_sprite_trails = false; u16 *m_pf_data[8]{}; int m_sprite_lag = 0; - u8 m_sprite_pri_usage = 0; + u8 m_textram_row_usage[64]{}; + u8 m_sprite_pri_row_usage[256]{}; + u8 m_tilemap_row_usage[32][8]{}; bitmap_ind8 m_pri_alp_bitmap; - u8 m_alpha_level_2as = 0; - u8 m_alpha_level_2ad = 0; - u8 m_alpha_level_3as = 0; - u8 m_alpha_level_3ad = 0; - u8 m_alpha_level_2bs = 0; - u8 m_alpha_level_2bd = 0; - u8 m_alpha_level_3bs = 0; - u8 m_alpha_level_3bd = 0; - u16 m_alpha_level_last = 0; + bitmap_ind16 m_sprite_framebuffer{}; u16 m_width_mask = 0; u8 m_twidth_mask = 0; u8 m_twidth_mask_bit = 0; - std::unique_ptr m_tile_opaque_sp; - std::unique_ptr m_tile_opaque_pf[8]; - int m_alpha_s_1_1 = 0; - int m_alpha_s_1_2 = 0; - int m_alpha_s_1_4 = 0; - int m_alpha_s_1_5 = 0; - int m_alpha_s_1_6 = 0; - int m_alpha_s_1_8 = 0; - int m_alpha_s_1_9 = 0; - int m_alpha_s_1_a = 0; - int m_alpha_s_2a_0 = 0; - int m_alpha_s_2a_4 = 0; - int m_alpha_s_2a_8 = 0; - int m_alpha_s_2b_0 = 0; - int m_alpha_s_2b_4 = 0; - int m_alpha_s_2b_8 = 0; - int m_alpha_s_3a_0 = 0; - int m_alpha_s_3a_1 = 0; - int m_alpha_s_3a_2 = 0; - int m_alpha_s_3b_0 = 0; - int m_alpha_s_3b_1 = 0; - int m_alpha_s_3b_2 = 0; - u32 m_dval = 0; - u8 m_pval = 0; - u8 m_tval = 0; - u8 m_pdest_2a = 0; - u8 m_pdest_2b = 0; - s8 m_tr_2a = 0; - s8 m_tr_2b = 0; - u8 m_pdest_3a = 0; - u8 m_pdest_3b = 0; - s8 m_tr_3a = 0; - s8 m_tr_3b = 0; - u16 *m_src[5]{}; - u16 *m_src_s[5]{}; - u16 *m_src_e[5]{}; - u16 m_clip_al[5]{}; - u16 m_clip_ar[5]{}; - u16 m_clip_bl[5]{}; - u16 m_clip_br[5]{}; - u8 *m_tsrc[5]{}; - u8 *m_tsrc_s[5]{}; - u32 m_x_count[5]{}; - u32 m_x_zoom[5]{}; - u16 m_pal_add[5]{}; std::unique_ptr m_spritelist; const tempsprite *m_sprite_end = nullptr; - std::unique_ptr m_pf_line_inf; - std::unique_ptr m_sa_line_inf; + bool m_sprite_bank = 0; + //f3_line_inf m_line_data{}; const F3config *m_game_config = nullptr; - bool (taito_f3_state::*m_dpix_n[8][16])(u32 s_pix); - bool (taito_f3_state::**m_dpix_lp[5])(u32 s_pix); - bool (taito_f3_state::**m_dpix_sp[9])(u32 s_pix); - u16 pf_ram_r(offs_t offset); - void pf_ram_w(offs_t offset, u16 data, u16 mem_mask = ~0); - void control_0_w(offs_t offset, u16 data, u16 mem_mask = ~0); - void control_1_w(offs_t offset, u16 data, u16 mem_mask = ~0); u16 spriteram_r(offs_t offset); void spriteram_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 pf_ram_r(offs_t offset); + void pf_ram_w(offs_t offset, u16 data, u16 mem_mask = ~0); u16 textram_r(offs_t offset); void textram_w(offs_t offset, u16 data, u16 mem_mask = ~0); u16 charram_r(offs_t offset); void charram_w(offs_t offset, u16 data, u16 mem_mask = ~0); - u16 pivot_r(offs_t offset); - void pivot_w(offs_t offset, u16 data, u16 mem_mask = ~0); u16 lineram_r(offs_t offset); void lineram_w(offs_t offset, u16 data, u16 mem_mask = ~0); + u16 pivot_r(offs_t offset); + void pivot_w(offs_t offset, u16 data, u16 mem_mask = ~0); + void control_0_w(offs_t offset, u16 data, u16 mem_mask = ~0); + void control_1_w(offs_t offset, u16 data, u16 mem_mask = ~0); template TILE_GET_INFO_MEMBER(get_tile_info); TILE_GET_INFO_MEMBER(get_tile_info_text); @@ -309,74 +405,23 @@ class taito_f3_state : public driver_device void tile_decode(); - inline void f3_drawgfx(bitmap_rgb32 &dest_bmp, const rectangle &clip, gfx_element *gfx, int code, u8 color, bool flipx, bool flipy, int sx, int sy, u16 scalex, u16 scaley, u8 pri_dst); - void draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect); - void get_sprite_info(const u16 *spriteram16_ptr); - void print_debug_info(bitmap_rgb32 &bitmap); - inline void alpha_set_level(); - inline void alpha_blend32_s(int alphas, u32 s); - inline void alpha_blend32_d(int alphas, u32 s); - inline void alpha_blend_1_1(u32 s); - inline void alpha_blend_1_2(u32 s); - inline void alpha_blend_1_4(u32 s); - inline void alpha_blend_1_5(u32 s); - inline void alpha_blend_1_6(u32 s); - inline void alpha_blend_1_8(u32 s); - inline void alpha_blend_1_9(u32 s); - inline void alpha_blend_1_a(u32 s); - inline void alpha_blend_2a_0(u32 s); - inline void alpha_blend_2a_4(u32 s); - inline void alpha_blend_2a_8(u32 s); - inline void alpha_blend_2b_0(u32 s); - inline void alpha_blend_2b_4(u32 s); - inline void alpha_blend_2b_8(u32 s); - inline void alpha_blend_3a_0(u32 s); - inline void alpha_blend_3a_1(u32 s); - inline void alpha_blend_3a_2(u32 s); - inline void alpha_blend_3b_0(u32 s); - inline void alpha_blend_3b_1(u32 s); - inline void alpha_blend_3b_2(u32 s); - bool dpix_1_noalpha(u32 s_pix); - inline bool dpix_ret1(u32 s_pix); - inline bool dpix_ret0(u32 s_pix); - bool dpix_1_1(u32 s_pix); - bool dpix_1_2(u32 s_pix); - bool dpix_1_4(u32 s_pix); - bool dpix_1_5(u32 s_pix); - bool dpix_1_6(u32 s_pix); - bool dpix_1_8(u32 s_pix); - bool dpix_1_9(u32 s_pix); - bool dpix_1_a(u32 s_pix); - bool dpix_2a_0(u32 s_pix); - bool dpix_2a_4(u32 s_pix); - bool dpix_2a_8(u32 s_pix); - bool dpix_3a_0(u32 s_pix); - bool dpix_3a_1(u32 s_pix); - bool dpix_3a_2(u32 s_pix); - bool dpix_2b_0(u32 s_pix); - bool dpix_2b_4(u32 s_pix); - bool dpix_2b_8(u32 s_pix); - bool dpix_3b_0(u32 s_pix); - bool dpix_3b_1(u32 s_pix); - bool dpix_3b_2(u32 s_pix); - bool dpix_2_0(u32 s_pix); - bool dpix_2_4(u32 s_pix); - bool dpix_2_8(u32 s_pix); - bool dpix_3_0(u32 s_pix); - bool dpix_3_1(u32 s_pix); - bool dpix_3_2(u32 s_pix); - void dpix_1_sprite(u32 s_pix); - void dpix_bg(u32 bgcolor); - void init_alpha_blend_func(); - void get_pixmap_pointer(int skip_layer_num, const f3_playfield_line_inf **line_t, int y); - void culc_pixmap_pointer(int skip_layer_num); - void draw_scanlines(bitmap_rgb32 &bitmap, int xsize, s16 *draw_line_num, const f3_playfield_line_inf **line_t, const u8 *sprite, u32 orient, int skip_layer_num); - void visible_tile_check(f3_playfield_line_inf *line_t, int line, u32 x_index_fx, u32 y_index, const u16 *pf_data_n); - void calculate_clip(int y, u16 pri, u32 &clip_in, u32 &clip_ex, u8 &line_enable); - void get_spritealphaclip_info(); - void get_line_ram_info(tilemap_t *tmap, int sx, int sy, int pos, const u16 *pf_data_n); - void get_vram_info(tilemap_t *vram_tilemap, tilemap_t *pixel_tilemap, int sx, int sy); + void create_tilemaps(bool extend); + + inline void f3_drawgfx(const tempsprite &sprite, const rectangle &cliprect); + void get_sprite_info(); + void draw_sprites(const rectangle &cliprect); + void get_pf_scroll(int pf_num, fixed8 ®_sx, fixed8 ®_sy); + void read_line_ram(f3_line_inf &line, int y); + void render_line(pen_t *dst, const mix_pix &z); void scanline_draw(bitmap_rgb32 &bitmap, const rectangle &cliprect); + template + std::vector calc_clip(const clip_plane_inf (&clip)[NUM_CLIPPLANES], const Mix &layer); + inline bool used(const pivot_inf &layer, int y) const; + inline bool used(const sprite_inf &layer, int y) const; + inline bool used(const playfield_inf &layer, int y) const; + template + bool mix_line(const Mix &gfx, mix_pix &z, pri_mode &pri, const f3_line_inf &line, const clip_plane_inf &range); + private: optional_device m_taito_en; @@ -388,7 +433,7 @@ class taito_f3_state : public driver_device void bubsympb_oki_w(u8 data); u32 f3_control_r(offs_t offset); void f3_control_w(offs_t offset, u32 data, u32 mem_mask = ~0); - void f3_unk_w(offs_t offset, u16 data); + void f3_timer_control_w(offs_t offset, u16 data); void sound_reset_0_w(u32 data); void sound_reset_1_w(u32 data); void sound_bankswitch_w(offs_t offset, u32 data, u32 mem_mask = ~0); diff --git a/src/mame/taito/taito_f3_v.cpp b/src/mame/taito/taito_f3_v.cpp index 9839aec6ead13..00ee41052a41f 100644 --- a/src/mame/taito/taito_f3_v.cpp +++ b/src/mame/taito/taito_f3_v.cpp @@ -1,23 +1,26 @@ // license:BSD-3-Clause -// copyright-holders:Bryan McPhail, David Haywood +// copyright-holders:Bryan McPhail, ywy, 12Me21 /*************************************************************************** - Taito F3 Video emulation - Bryan McPhail, mish@tendril.co.uk + Taito F3 Video emulation + Thanks to original driver and research by Bryan McPhail (2001) + and additional information from David Haywood and others + + (2024) major rewrite and updates by ywy and 12 **************************************************************************** Brief overview: - 4 scrolling layers (512x512 or 1024x512) of 4/5/6 bpp tiles. + 4 scrolling layers (512x512 or 1024x512) of 4, 5, or 6 bpp tiles. 1 scrolling text layer (512x512, characters generated in vram), 4bpp chars. 1 scrolling pixel layer (512x256 pixels generated in pivot ram), 4bpp pixels. 2 sprite banks (for double buffering of sprites) Sprites can be 4, 5 or 6 bpp Sprite scaling. - Rowscroll on all playfields - Line by line zoom on all playfields - Column scroll on all playfields - Line by line sprite and playfield priority mixing + Line by line effects on all playfields + Line by line control of priority/mixing on sprites and text/pixel layer + 2 of the 4 playfields have (line by line) access to alternate tilemaps Notes: All special effects are controlled by an area in 'line ram'. Typically @@ -27,14 +30,13 @@ Brief overview: is the scale control for that line in the destination bitmap (screen). Therefore each line can have a different zoom value for special effects. - This also applies to playfield priority, rowscroll, column scroll, sprite - priority and VRAM/pivot layers. + This also applies to playfield priority, rowscroll, column scroll, clipping, + palette interpretation, sprite priority, VRAM/pivot layers, and so on... However - at the start of line ram there are also sets of 256 values - controlling each effect - effects can be selectively applied to individual - playfields or only certain lines out of the 256 can be active - in which - case the last allowed value can be latched (typically used so a game can - use one zoom or row value over the whole playfield). + with bits controlling each effect subsection, which cause the last allowed + value to be latched (typically used so a game can use one zoom or row value + over the whole playfield). The programmers of some of these games made strange use of flipscreen - some games have all their graphics flipped in ROM, and use the flipscreen @@ -49,153 +51,199 @@ Line ram memory map: Here 'playfield 1' refers to the first playfield in memory, etc - 0x0000: Column line control ram (256 lines) - 100x: Where bit 0 of x enables effect on playfield 1 - Where bit 1 of x enables effect on playfield 2 - Where bit 2 of x enables effect on playfield 3 - Where bit 3 of x enables effect on playfield 4 - 0x0200: Line control ram for 0x5000 section. - 0x0400: Line control ram for 0x6000 section. - 180x: Where bit 0 of x latches sprite alpha value - Where bit 1 of x latches tilemap alpha value - 0x0600: Sprite control ram - 1c0x: Where x enables sprite control word for that line - 0x0800: Zoom line control ram (256 lines) - 200x: Where bit 0 of x enables effect on playfield 1 - Where bit 1 of x enables effect on playfield 2 - Where bit 2 of x enables effect on playfield 3 - Where bit 3 of x enables effect on playfield 4 - 0x0a00: Palette add line control ram (256 lines) - 0x0c00: Rowscroll line control ram (256 lines) - 280x: Where bit 0 of x enables effect on playfield 1 - Where bit 1 of x enables effect on playfield 2 - Where bit 2 of x enables effect on playfield 3 - Where bit 3 of x enables effect on playfield 4 - 0x0e00: Priority line control ram (256 lines) - 2c0x: Where bit 0 of x enables effect on playfield 1 - Where bit 1 of x enables effect on playfield 2 - Where bit 2 of x enables effect on playfield 3 - Where bit 3 of x enables effect on playfield 4 - + Line set ram: (one word per line, 256 lines per section) + Each enable bit corresponds to a subsection, e.g. bit 0 sets/latches + a line in 0x...000-1fe, bit 1 latches a line in 0x...200-3fe, etc. + In rare cases (e.g. bubblem), the second set of subsections + is latched on using bits 4,5,6,7 for ..800,a00,c00,e00, respectively. + + 0x0000: Line set ram for 4000 (column scroll, alt tilemap, clip) section + 10xx + 0x0200: Line set ram for 5000 (clip planes) section + 14xx + 0x0400: Line set ram for 6000 (blending) section + 18xx + 0x0600: Line set ram for 7000 (pivot and sprite layer mixing) section + 1cxx + 0x0800: Line set ram for 8000 (zoom) section + 20xx + 0x0a00: Line set ram for 9000 (palette add) section + 24xx + 0x0c00: Line set ram for a000 (row scroll) section + 28xx + 0x0e00: Line set ram for b000 (playfield mixing info) section + 2cxx + + "Pivot port" (0x1000-2fff) has only one known used address. 0x1000: Unknown control word? (usually 0x00f0; gseeker, spcinvdj, twinqix, puchicar set 0x0000) - 0x4000: Column scroll & clipping info + + Line data ram (8 sections, 4 normal and 4 alt subsections of 256 lines each): + + 0x4000: Column scroll (playfield 3/4) & clipping 4400 Bits: RLrl --Ts ssss ssss - s = playfield 3 column scroll (0-511) - T = use alternate tilemap (+0x2000) - kirameki, kaiserkn, hthero - - = unused? - l = clip 0 left high bit - r = clip 0 right high bit - L = clip 1 left high bit - R = clip 1 right high bit + s = playfield 3 column scroll (0-511) + T = use alternate tilemap (+0x2000) - kirameki, kaiserkn, hthero + - = unused? + l = clip 0 left high bit + r = clip 0 right high bit + L = clip 1 left high bit + R = clip 1 right high bit 4600: as 4400, for playfield 4 / clip plane 2 and 3 0x5000: Clip plane 0 (low bits (high in 4400)) - 0x5200: Clip plane 1 (low bits (high in 4400)) - 0x5400: Clip plane 2 (low bits (high in 4600)) - 0x5600: Clip plane 3 (low bits (high in 4600)) + 5200: Clip plane 1 (low bits (high in 4400)) + 5400: Clip plane 2 (low bits (high in 4600)) + 5600: Clip plane 3 (low bits (high in 4600)) + Bits: rrrr rrrr llll llll 0x6000: Sync register - 0x6004: Sprite alpha control + 0x6004: Sprite alpha control (+ pivot-related bits?) 0xff00: VRAM/Pixel layer control - 0xa000 enables pixel layer for this line (Disables VRAM layer) - 0x2000 enables garbage pixels for this line (maybe another pixel bank?) [unemulated] - 0x0800 seems to set the vram layer to be opaque [unemulated] - Effect of other bits is unknown. - 0x00c0: Alpha mode for sprites with pri value 0x00 - 0x0030: Alpha mode for sprites with pri value 0x00 - 0x000c: Alpha mode for sprites with pri value 0x00 - 0x0003: Alpha mode for sprites with pri value 0x00 - 0x6200: Alpha blending control - - 0x6400 - controls X zoom of tile - each tile collapses to 16 single colour lines - xxx1 - affects bottom playfield - xxx2 - - xxx4 - - xxx8 - affects top playfield - xxfx - x zoom - 0 = 1st pixel 16 times - 1 = 1st pixel 8, then 2nd 8 - 8 = 2 per pixel - - (these effects only known to be used on spcinvdj title screen and riding fight - not emulated) - - 1xxx = interpret palette ram for this playfield line as 15 bit and bilinear filter framebuffer(??) - 3xxx = interpret palette ram for this playfield line as 15 bit - 7xxx = interpret palette ram for this playfield line as 24 bit palette - 8xxx = interpret palette ram for this playfield line as 21 bit palette - - (effect not emulated) + Bits: B?p? o?A? + A = alpha blend value select + o = ? + "0x0800 seems to set the vram layer to be opaque [unemulated]" + p = enable pixel layer + "0x2000 enables garbage pixels for this line (maybe another pixel bank?) [unemulated]" + B = pixel bank ? + ? = unknown + 0x00ff: Bits: DdCc BbAa + Dd = Alpha mode for sprites with pri value 0xc0 + Cc = Alpha mode for sprites with pri value 0x80 + Bb = Alpha mode for sprites with pri value 0x40 + Aa = Alpha mode for sprites with pri value 0x00 + + 0x6200: Alpha blend values + Bits: BBBB AAAA bbbb aaaa + A = contribution (alpha) value A for SOURCE when alpha mode is not reversed + B = contribution (alpha) value B for SOURCE when alpha mode is not reversed + a = contribution (alpha) value A for DEST when alpha mode is not reversed + b = contribution (alpha) value B for DEST when alpha mode is not reversed + + 0x6400: forward repeat and palette + 0x03ff: x repeat / mosaic - each tile collapses to 16 single colour lines + Bits: ??ps mmmm 4321 + 4321 = enable effect for respective playfield + mmmm = x repeat - 0 = repeat 1st pixel 16 times (sample every 16) + 1 = repeat 1st pixel 15 times (sample every 15) + f = repeat 1st pixel 1 times (sample every pixel) + s = enable effect for sprites + p = enable effect for pivot layer + (spcinvdj title screen, riding fight, command war) + + x4xx = ??? seems to display garbage pixels on the pivot layer (unused?) + x8xx = ??? seems to affect the palette of a single layer(??) (gunlock) + + 0xf000: palette ram format? [unemulated] + Bits: ?wBu + ? = ? possibly "interpret palette ram for this as 21-bit palette" + w = 1 = interpret palette entries as 12-bit RGB + B = 0 = enable horizontal forward blur (1 = don't blur) + u = ??? (normally 1) 0x6600: Background - background palette entry (under all tilemaps) (takes part in alpha blending) - (effect not emulated) - - 0x7000: Pivot/vram layer enable - 0x7200: Cram layer priority - 0x7400: Sprite clipping (like playfield priority clip bits but shifted) + 0x7000: ? [unemulated] + "Pivot/vram layer enable" ? + 0x7200: VRAM layer mixing info (incl. priority) + Bits: BAEI cccc iiii pppp (see 0xb000) + 0x7400: Sprite mixing info (without priority, like playfield priority clip bits but shifted) + Bits: AAAA ??EI cccc iiii + | ^^ ^^^^ ^^^^ line enable/clip/inverse clip (see 0xb000) + ^ 0x0800 set by arabianm, bubsymph, bubblem, cleopatr, commandw, cupfinal, gseeker, spcinv95, twinqix, kirameki... + A = Alpha blend value select for sprites with pri value 0xc0/80/40/00 0x7600: Sprite priority values 0xf000: Relative priority for sprites with pri value 0xc0 0x0f00: Relative priority for sprites with pri value 0x80 0x00f0: Relative priority for sprites with pri value 0x40 0x000f: Relative priority for sprites with pri value 0x00 - 0x8000: Playfield 1 scale (1 word per line, 256 lines, 0x80 = default no scale) + 0x8000: Playfield 1 scale (1 word per line, 256 lines, 0x0080 = default no scale) 0x8200: Playfield 2/4 scale 0x8400: Playfield 3 scale 0x8600: Playfield 2/4 scale 0x00ff = Y scale (0x80 = no scale, > 0x80 is zoom in, < 0x80 is zoom out [0xc0 is half height of 0x80]) - 0xff00 = X scale (0 = no scale, > 0 = zoom in, [0x8000 would be double length]) + source pixels per screen pixel in fixed1.7 + 0xff00 = X scale (0 = no scale, > 0 = zoom in, [0x8000 = double length, i.e., 0.5 src step per screen px]) + 1.0 − fixed0.8 source pixels per screen pixel? Playfield 2 & 4 registers seem to be interleaved, playfield 2 Y zoom is stored where you would expect playfield 4 y zoom to be and vice versa. - 0x9000: Palette add (can affect opacity) + 0x9000: Palette add (can affect blend output) + 9200: Playfield 2 palette add + 9400: Playfield 3 palette add + 9600: Playfield 4 palette add 0xa000: Playfield 1 rowscroll (1 word per line, 256 lines) - 0xa200: Playfield 2 rowscroll - 0xa400: Playfield 3 rowscroll - 0xa600: Playfield 4 rowscroll - - 0xb000: Playfield 1 priority (1 word per line, 256 lines) - 0xb200: Playfield 2 priority - 0xb400: Playfield 3 priority - 0xb600: Playfield 4 priority - 0x000f = Layer priority - 0x0010 = Clip inverse mode for plane 0 - 0x0020 = Clip inverse mode for plane 1 - 0x0040 = Clip inverse mode for plane 2 - 0x0080 = Clip inverse mode for plane 3 - 0x0100 = If set enable clip plane 0 - 0x0200 = If set enable clip plane 1 - 0x0400 = If set enable clip plane 2 - 0x0800 = If set enable clip plane 3 - 0x1000 = Affects interpretation of inverse mode bits. If on, 1 = invert. if off, 0 = invert. - 0xe000 = Blend mode, 0x3000 = Normal, 0x7000 = Alpha A, 0xb000 = Alpha B, others disable line + a200: Playfield 2 rowscroll + a400: Playfield 3 rowscroll + a600: Playfield 4 rowscroll + + 0xb000: Playfield 1 mixing info (layer compositing information) + b200: Playfield 2 mixing info + b400: Playfield 3 mixing info + b600: Playfield 4 mixing info + Bits: BAEI cccc iiii pppp + p = Layer priority + i = Clip inverse mode for corresponding plane + c = If set, enable corresponding clip plane + I = Affects interpretation of inverse mode bits. if on, 1 = invert. if off, 0 = invert. + E = Enable line + A = Alpha mode A - alpha enable + B = Alpha mode B - alpha with reversed source/destination contribution 0xc000 - 0xffff: Unused. - When sprite priority==playfield priority sprite takes precedence (Bubble Symph title) - **************************************************************************** F3 sprite format: - Word 0: 0xffff Tile number (LSB) - Word 1: 0xff00 X zoom - 0x00ff Y zoom - Word 2: 0x03ff X position - Word 3: 0x03ff Y position - Word 4: 0xf000 Sprite block controls - 0x0800 Sprite block start - 0x0400 Use same colour on this sprite as block start - 0x0200 Y flip - 0x0100 X flip - 0x00ff Colour - Word 5: 0xffff Tile number (MSB), probably only low bits used - Word 6: 0x8000 If set, jump to sprite location in low bits - 0x03ff Location to jump to. - Word 7: 0xffff Unused? Always zero? + word 0: [tttt tttt tttt tttt] + t: lower 16 bits of tile number + + word 1: [yyyy yyyy xxxx xxxx] + y: y zoom (scale factor is: (256-zoom)/256) + x: x zoom + + word 2: [iiss xxxx xxxx xxxx] + i: ignore global/subglobal scroll + s: set global/subglobal scroll + x: x position (signed 12 bits) + + word 3: [c.BA yyyy yyyy yyyy] + c: special command (parameters are in word 5) + B: ? set by gseeker on a special command (also sets word 3 to FFEE: probably a position overflow again) + A: ? set by ridingf on ACTUAL SPRITES during gameplay - probably just the position overflowing + y: y position (signed 12 bits) + (???) ridingf sets this word to 0x9000 at 0x3710, and 0x9001 at 0xB710 + + word 4: [bbbb mlyx cccc cccc] + b: block position controls + m: "multi" - set to 0 on the sprite before a new sprite block + l: "lock" - reuse palette from previous sprite + y: y flip + x: x flip + c: color palette + + word 5: [.... .... .... ...h] (normal sprite) + h: upper bit of tile number + word 5: [..fA ..pp ..?? ..tb] (if special command bit set) + f: enable flipscreen + A: ??? set by ridingf + p: enable extra planes (00 = 4bpp, 01 = 5bpp, 11 = 6bpp) + t: enable sprite trails (don't clear framebuffer) + b: sprite bank to switch to + (???) ridingf sets this word to 1000/1001 at 0x3710 and 0xB710 + + word 6: [j... ..ii iiii iiii] + j: jump command if set + i: index to jump to (0-1023) + + word 7: [.... .... .... ....] + (unused) **************************************************************************** @@ -215,32 +263,56 @@ Playfield tile info: 0xc000 0000 - X/Y Flip 0x3000 ffff - Tile index 0x0c00 0000 - Extra planes enable (00 = 4bpp, 01 = 5bpp, 10 = unused?, 11 = 6bpp) - 0x0200 0000 - Alpha blend mode + 0x0200 0000 - Blend value select 0x01ff 0000 - Colour + +*************************************************************************** + blending seems to work something like: + Blend values: + Bits: [BBBB AAAA bbbb aaaa] + opacity is (15-N)/8, clamped to (0, 1.0) + + each layer (each playfield, each sprite priority group, and pivot): + 1) blend enable bit ("blend mode A" historically) + 2) reverse blend enable bit ("blend mode B" historically) + always grouped together, usually with other mixing-related bits + - these select between the a/b and A/B blend value pairs + - when both 0 or both 1 (sprites), the layer is opaque. + opaque layers use two contribution values. (e.g. A*x + a*x) + + 3) blend value select bit ("blend select") + per-line for pivot and sprite groups, per-tile for playfields + this selects between the two sets of blend contribution values. + + a lower priority non-blank pixel with *different* blend mode from source: + is combined by saturating addition in the blending circuit using + a contribution amount according to the opposite of the source blend mode, + and according to its own blend select bit + + - should only be (up to) 2 contributing layers to each final pixel (?) + - there's a HW "feature" (bug?) when layers have a prio conflict. + in this case, for a given pixel, it seems like the second layer + can reset part of the state... (dariusg stage V' clouds) + ***************************************************************************/ #include "emu.h" #include "taito_f3.h" -#include "render.h" #include +#include -#define VERBOSE 0 -#define DARIUSG_KLUDGE -#define TAITOF3_VIDEO_DEBUG 0 - +constexpr int TAITOF3_VIDEO_DEBUG = 0; // Game specific data - some of this can be removed when the software values are figured out -struct taito_f3_state::F3config -{ +struct taito_f3_state::F3config { int name; int extend; // playfield control 0x1F bit 7 int sprite_lag; }; -const taito_f3_state::F3config taito_f3_state::f3_config_table[] = -{ +const taito_f3_state::F3config taito_f3_state::f3_config_table[] = { /* Name Extend Lag */ { RINGRAGE, 0, 2 }, { ARABIANM, 0, 2 }, @@ -278,68 +350,29 @@ const taito_f3_state::F3config taito_f3_state::f3_config_table[] = {0} }; - -/* -alpha_mode ----- --xx 0:disable 1:nomal 2:alpha 7000 3:alpha b000 ----1 ---- alpha level a ---1- ---- alpha level b -1-------- opaque line -*/ - - -/* -pri_alp_bitmap ----- ---1 sprite priority 0 ----- --1- sprite priority 1 ----- -1-- sprite priority 2 ----- 1--- sprite priority 3 ----1 ---- alpha level a 7000 ---1- ---- alpha level b 7000 --1-- ---- alpha level a b000 -1--- ---- alpha level b b000 -1111 1111 opaque pixel -*/ - - void taito_f3_state::device_post_load() { - /* force a reread of the dynamic tiles in the pixel layer */ + // force a reread of the dynamic tiles in the pixel layer m_gfxdecode->gfx(0)->mark_all_dirty(); m_gfxdecode->gfx(1)->mark_all_dirty(); -} - -/******************************************************************************/ -void taito_f3_state::print_debug_info(bitmap_rgb32 &bitmap) -{ -#if (TAITOF3_VIDEO_DEBUG) - const u16 *line_ram = m_line_ram; - popmessage("%04X %04X %04X %04X %04X %04X %04X %04X\n" - "%04X %04X %04X %04X %04X %04X %04X %04X\n" - "%04X %04X %04X %04X %04X %04X %04X %04X\n" - "Ctr1: %04x %04x %04x %04x\n" - "Ctr2: %04x %04x %04x %04x\n" - "Colm: %04x %04x %04x %04x\n" - "Clip: %04x %04x %04x %04x\n" - "Sprt: %04x %04x %04x %04x\n" - "Pivt: %04x %04x %04x %04x\n" - "Zoom: %04x %04x %04x %04x\n" - "Line: %04x %04x %04x %04x\n" - "Pri : %04x %04x %04x %04x\n", - m_spriteram16_buffered[0], m_spriteram16_buffered[1], m_spriteram16_buffered[2], m_spriteram16_buffered[3], m_spriteram16_buffered[4], m_spriteram16_buffered[5], m_spriteram16_buffered[6], m_spriteram16_buffered[7], - m_spriteram16_buffered[8], m_spriteram16_buffered[9], m_spriteram16_buffered[10], m_spriteram16_buffered[11], m_spriteram16_buffered[12], m_spriteram16_buffered[13], m_spriteram16_buffered[14], m_spriteram16_buffered[15], - m_spriteram16_buffered[16], m_spriteram16_buffered[17], m_spriteram16_buffered[18], m_spriteram16_buffered[19], m_spriteram16_buffered[20], m_spriteram16_buffered[21], m_spriteram16_buffered[22], m_spriteram16_buffered[23], - line_ram[0x0100/2] & 0xffff, line_ram[0x0300/2] & 0xffff, line_ram[0x0500/2] & 0xffff, line_ram[0x0700/2] & 0xffff, - line_ram[0x0900/2] & 0xffff, line_ram[0x0b00/2] & 0xffff, line_ram[0x0d00/2] & 0xffff, line_ram[0x0f00/2] & 0xffff, - line_ram[0x4180/2] & 0xffff, line_ram[0x4380/2] & 0xffff, line_ram[0x4580/2] & 0xffff, line_ram[0x4780/2] & 0xffff, - line_ram[0x5180/2] & 0xffff, line_ram[0x5380/2] & 0xffff, line_ram[0x5580/2] & 0xffff, line_ram[0x5780/2] & 0xffff, - line_ram[0x6180/2] & 0xffff, line_ram[0x6380/2] & 0xffff, line_ram[0x6580/2] & 0xffff, line_ram[0x6780/2] & 0xffff, - line_ram[0x7180/2] & 0xffff, line_ram[0x7380/2] & 0xffff, line_ram[0x7580/2] & 0xffff, line_ram[0x7780/2] & 0xffff, - line_ram[0x8180/2] & 0xffff, line_ram[0x8380/2] & 0xffff, line_ram[0x8580/2] & 0xffff, line_ram[0x8780/2] & 0xffff, - line_ram[0xa180/2] & 0xffff, line_ram[0xa380/2] & 0xffff, line_ram[0xa580/2] & 0xffff, line_ram[0xa780/2] & 0xffff, - line_ram[0xb180/2] & 0xffff, line_ram[0xb380/2] & 0xffff, line_ram[0xb580/2] & 0xffff, line_ram[0xb780/2] & 0xffff) -#endif + // refresh tile usage indexes + std::fill_n(*m_tilemap_row_usage, 32 * 8, 0); + std::fill_n(m_textram_row_usage, 64, 0); + // playfield blank tiles + for (int offset = 1; offset < 0x4000; offset += 2) { + const int row = m_extend ? BIT(offset, 7, 5) : BIT(offset, 6, 5); + const int tmap = m_extend ? offset >> 12 : offset >> 11; + if (m_pf_ram[offset] != 0) + m_tilemap_row_usage[row][tmap] += 1; + } + // textram blank tiles + for (int offset = 0; offset < 0x1000; offset++) { + const u8 tile = BIT(m_textram[offset], 0, 8); + const int row = BIT(offset, 6, 6); + if (tile != 0) + m_textram_row_usage[row] += 1; + } } /******************************************************************************/ @@ -347,163 +380,103 @@ void taito_f3_state::print_debug_info(bitmap_rgb32 &bitmap) template TILE_GET_INFO_MEMBER(taito_f3_state::get_tile_info) { - const u32 tile = (m_pf_data[Layer][tile_index * 2 + 0] << 16) | (m_pf_data[Layer][tile_index * 2 + 1] & 0xffff); - const u8 abtype = (tile >> (16 + 9)) & 1; - // tiles can be configured to use 4, 5, or 6 bpp data. - const u8 extra_planes = ((tile >> (16 + 10)) & 3); // 0 = 4bpp, 1 = 5bpp, 2 = unused?, 3 = 6bpp - - // FIXME: some (5bpp?) games need the bottom bits of the color code to be masked out. - // (mt00895 arabian magic stage 6 rain (color 0x105->104), mt01925 rayforce explosion, mt01917 rayforce ships, mt00900 kaiser knuckle azteca throw) - // however, there are (6bpp) cases which *don't* want any adjustment that this breaks: - // (quizhuhu fade palette 0x7, landmakrj win message palette 0xBE) - // special case until better understood. - if (m_game == LANDMAKR || m_game == QUIZHUHU) - { - tileinfo.set(3, - tile & 0xffff, - (tile >> 16) & 0x1ff, - TILE_FLIPYX(tile >> 30)); - } - else - { - tileinfo.set(3, - tile & 0xffff, - (tile >> 16) & 0x1ff & (~extra_planes), - TILE_FLIPYX(tile >> 30)); - } - - tileinfo.category = abtype & 1; /* alpha blending type */ - tileinfo.pen_mask = (extra_planes << 4) | 0x0f; + u16 *tilep = &m_pf_data[Layer][tile_index * 2]; + // tile info: + // [yx?? ddac cccc cccc] + // yx: x/y flip + // ?: upper bits of tile number? + // d: bpp + // a: blend select + // c: color + + const u16 palette_code = BIT(tilep[0], 0, 9); + const u8 blend_sel = BIT(tilep[0], 9, 1); + const u8 extra_planes = BIT(tilep[0], 10, 2); // 0 = 4bpp, 1 = 5bpp, 2 = unused?, 3 = 6bpp + + tileinfo.set(3, + tilep[1], + palette_code, + TILE_FLIPYX(BIT(tilep[0], 14, 2))); + + tileinfo.category = blend_sel; // blend value select + // gfx extra planes and palette code set the same bits of color address + // we need to account for tilemap.h combining using "+" instead of "|" + tileinfo.pen_mask = ((extra_planes & ~palette_code) << 4) | 0x0f; } TILE_GET_INFO_MEMBER(taito_f3_state::get_tile_info_text) { - u8 flags = 0; + const u16 vram_tile = m_textram[tile_index]; + // text tile info: + // [yccc cccx tttt tttt] + // y: y flip + // c: palette + // x: x flip + // t: tile number - const u16 vram_tile = (m_textram[tile_index] & 0xffff); - - if (vram_tile & 0x0100) flags |= TILE_FLIPX; - if (vram_tile & 0x8000) flags |= TILE_FLIPY; + u8 flags = 0; + if (BIT(vram_tile, 8)) flags |= TILE_FLIPX; + if (BIT(vram_tile, 15)) flags |= TILE_FLIPY; tileinfo.set(0, vram_tile & 0xff, - (vram_tile >> 9) & 0x3f, + BIT(vram_tile, 9, 6), flags); } TILE_GET_INFO_MEMBER(taito_f3_state::get_tile_info_pixel) { - int col_off; - u8 flags = 0; - int y_offs = (m_control_1[5] & 0x1ff); - if (m_flipscreen) y_offs += 0x100; - - /* Colour is shared with VRAM layer */ - if ((((tile_index & 0x1f) * 8 + y_offs) & 0x1ff) > 0xff) - col_off = 0x800 + ((tile_index & 0x1f) << 6) + ((tile_index & 0xfe0) >> 5); - else - col_off = ((tile_index & 0x1f) << 6) + ((tile_index & 0xfe0) >> 5); + /* attributes are shared with VRAM layer */ + // convert the index: + // pixel: [0xxxxxxyyyyy] + // text: [?yyyyyxxxxxx] + const int x = BIT(tile_index, 5, 6); + int y = BIT(tile_index, 0, 5); + // HACK: [legacy implementation of scroll offset check for pixel palette mirroring] + // the pixel layer is 256px high, but uses the palette from the text layer which is twice as long + // so normally it only uses the first half of textram, BUT if you scroll down, you get + // an alternate version of the pixel layer which gets its palette data from the second half of textram. + // we simulate this using a hack, checking scroll offset to determine which version of the pixel layer is visible. + // this means we SHOULD dirty parts of the pixel layer, if the scroll or flipscreen changes.. but we don't. + // (really we should just apply the palette during rendering instead of this ?) + int y_offs = y * 8 + m_control_1[5]; + if (m_flipscreen) + y_offs += 0x100; // this could just as easily be ^= 0x100 or -= 0x100 + if ((y_offs & 0x1ff) >= 256) + y += 32; - const u16 vram_tile = (m_textram[col_off] & 0xffff); + const u16 vram_tile = m_textram[y << 6 | x]; - if (vram_tile & 0x0100) flags |= TILE_FLIPX; - if (vram_tile & 0x8000) flags |= TILE_FLIPY; + const int tile = tile_index; + const u8 palette = BIT(vram_tile, 9, 6); + u8 flags = 0; + if (BIT(vram_tile, 8)) flags |= TILE_FLIPX; + if (BIT(vram_tile, 15)) flags |= TILE_FLIPY; - tileinfo.set(1, - tile_index, - (vram_tile >> 9) & 0x3f, - flags); + tileinfo.set(1, tile, palette, flags); } /******************************************************************************/ void taito_f3_state::screen_vblank(int state) { - // rising edge - if (state) - { - if (m_sprite_lag==2) - { - if (machine().video().skip_this_frame() == 0) - { - get_sprite_info(m_spriteram16_buffered.get()); - } - memcpy(m_spriteram16_buffered.get(), m_spriteram.target(), 0x10000); - } - else if (m_sprite_lag == 1) - { - if (machine().video().skip_this_frame() == 0) - { - get_sprite_info(m_spriteram.target()); - } - } + if (state) { + //get_sprite_info(); } } -void taito_f3_state::video_start() +void taito_f3_state::create_tilemaps(bool extend) { - const F3config *pCFG = &f3_config_table[0]; - - m_alpha_level_2as = 127; - m_alpha_level_2ad = 127; - m_alpha_level_3as = 127; - m_alpha_level_3ad = 127; - m_alpha_level_2bs = 127; - m_alpha_level_2bd = 127; - m_alpha_level_3bs = 127; - m_alpha_level_3bd = 127; - m_alpha_level_last = -1; - - m_pdest_2a = 0x10; - m_pdest_2b = 0x20; - m_tr_2a = 0; - m_tr_2b = 1; - m_pdest_3a = 0x40; - m_pdest_3b = 0x80; - m_tr_3a = 0; - m_tr_3b = 1; - - m_spritelist = nullptr; - m_spriteram16_buffered = nullptr; - m_pf_line_inf = nullptr; - m_tile_opaque_sp = nullptr; - - /* Setup individual game */ - do { - if (pCFG->name == m_game) - { - break; - } - pCFG++; - } while (pCFG->name); - - m_game_config=pCFG; - - if (m_game_config->extend) - { + m_extend = extend; + // TODO: we need to free these if this is called multiple times + if (m_extend) { m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); m_tilemap[2] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<2>)), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); m_tilemap[3] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<3>)), TILEMAP_SCAN_ROWS, 16, 16, 64, 32); m_tilemap[4] = m_tilemap[5] = m_tilemap[6] = m_tilemap[7] = nullptr; - - m_pf_data[0] = m_pf_ram + (0x0000 / 2); - m_pf_data[1] = m_pf_ram + (0x2000 / 2); - m_pf_data[2] = m_pf_ram + (0x4000 / 2); - m_pf_data[3] = m_pf_ram + (0x6000 / 2); - - m_width_mask = 0x3ff; - m_twidth_mask = 0x7f; - m_twidth_mask_bit = 7; - - m_tilemap[0]->set_transparent_pen(0); - m_tilemap[1]->set_transparent_pen(0); - m_tilemap[2]->set_transparent_pen(0); - m_tilemap[3]->set_transparent_pen(0); - } - else - { + } else { m_tilemap[0] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<0>)), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); m_tilemap[1] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<1>)), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); m_tilemap[2] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<2>)), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); @@ -512,41 +485,49 @@ void taito_f3_state::video_start() m_tilemap[5] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<5>)), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); m_tilemap[6] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<6>)), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); m_tilemap[7] = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info<7>)), TILEMAP_SCAN_ROWS, 16, 16, 32, 32); - - m_pf_data[0] = m_pf_ram + (0x0000 / 2); - m_pf_data[1] = m_pf_ram + (0x1000 / 2); - m_pf_data[2] = m_pf_ram + (0x2000 / 2); - m_pf_data[3] = m_pf_ram + (0x3000 / 2); - m_pf_data[4] = m_pf_ram + (0x4000 / 2); - m_pf_data[5] = m_pf_ram + (0x5000 / 2); - m_pf_data[6] = m_pf_ram + (0x6000 / 2); - m_pf_data[7] = m_pf_ram + (0x7000 / 2); - - m_width_mask = 0x1ff; - m_twidth_mask = 0x3f; - m_twidth_mask_bit = 6; - - m_tilemap[0]->set_transparent_pen(0); - m_tilemap[1]->set_transparent_pen(0); - m_tilemap[2]->set_transparent_pen(0); - m_tilemap[3]->set_transparent_pen(0); - m_tilemap[4]->set_transparent_pen(0); - m_tilemap[5]->set_transparent_pen(0); - m_tilemap[6]->set_transparent_pen(0); - m_tilemap[7]->set_transparent_pen(0); } + for (int i = 0; i < 8; i++) { + if (m_tilemap[i]) + m_tilemap[i]->set_transparent_pen(0); + } + std::fill_n(*m_tilemap_row_usage, 32 * 8, 0); + + if (m_extend) { + m_width_mask = 0x3ff; // 10 bits + for (int i = 0; i < 4; i++) + m_pf_data[i] = &m_pf_ram[(0x2000 * i) / 2]; + } else { + m_width_mask = 0x1ff; // 9 bits + for (int i = 0; i < 8; i++) + m_pf_data[i] = &m_pf_ram[(0x1000 * i) / 2]; + } +} + +void taito_f3_state::video_start() +{ + const F3config *pCFG = &f3_config_table[0]; + + m_spritelist = nullptr; + + /* Setup individual game */ + do { + if (pCFG->name == m_game) { + break; + } + pCFG++; + } while (pCFG->name); + + m_game_config = pCFG; + + create_tilemaps(m_game_config->extend); - m_spriteram16_buffered = std::make_unique(0x10000 / 2); m_spritelist = std::make_unique(0x400); m_sprite_end = &m_spritelist[0]; m_vram_layer = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info_text)), TILEMAP_SCAN_ROWS, 8, 8, 64, 64); m_pixel_layer = &machine().tilemap().create(*m_gfxdecode, tilemap_get_info_delegate(*this, FUNC(taito_f3_state::get_tile_info_pixel)), TILEMAP_SCAN_COLS, 8, 8, 64, 32); - m_pf_line_inf = std::make_unique(5); - m_sa_line_inf = std::make_unique(1); - m_screen->register_screen_bitmap(m_pri_alp_bitmap); - m_tile_opaque_sp = std::make_unique(m_gfxdecode->gfx(2)->elements()); - for (int i = 0; i < 8; i++) - m_tile_opaque_pf[i] = std::make_unique(m_gfxdecode->gfx(3)->elements()); + std::fill_n(m_textram_row_usage, 64, 0); + + m_screen->register_screen_bitmap(m_sprite_framebuffer); m_vram_layer->set_transparent_pen(0); m_pixel_layer->set_transparent_pen(0); @@ -556,67 +537,17 @@ void taito_f3_state::video_start() m_gfxdecode->gfx(3)->set_granularity(16); m_flipscreen = false; - memset(m_spriteram16_buffered.get(), 0, 0x10000); + m_sprite_bank = false; + m_sprite_trails = false; memset(&m_spriteram[0], 0, 0x10000); save_item(NAME(m_control_0)); save_item(NAME(m_control_1)); - m_gfxdecode->gfx(0)->set_source((u8 *)m_charram.target()); - m_gfxdecode->gfx(1)->set_source((u8 *)m_pivot_ram.target()); + m_gfxdecode->gfx(0)->set_source(reinterpret_cast(m_charram.target())); + m_gfxdecode->gfx(1)->set_source(reinterpret_cast(m_pivot_ram.target())); m_sprite_lag = m_game_config->sprite_lag; - - init_alpha_blend_func(); - - { - gfx_element *sprite_gfx = m_gfxdecode->gfx(2); - - for (int c = 0; c < sprite_gfx->elements(); c++) - { - int chk_trans_or_opa = 0; - const u8 *dp = sprite_gfx->get_data(c); - for (int y = 0; y < sprite_gfx->height(); y++) - { - for (int x = 0; x < sprite_gfx->width(); x++) - { - if (!dp[x]) chk_trans_or_opa |= 2; - else chk_trans_or_opa |= 1; - } - dp += sprite_gfx->rowbytes(); - } - if (chk_trans_or_opa == 1) m_tile_opaque_sp[c] = 1; - else m_tile_opaque_sp[c] = 0; - } - } - - { - gfx_element *pf_gfx = m_gfxdecode->gfx(3); - - for (int c = 0; c < pf_gfx->elements(); c++) - { - for (int extra_planes = 0; extra_planes < 4; extra_planes++) - { - int chk_trans_or_opa = 0; - /* 0 = 4bpp, 1=5bpp, 2=?, 3=6bpp */ - const u8 extra_mask = ((extra_planes << 4) | 0x0f); - const u8 *dp = pf_gfx->get_data(c); - - for (int y = 0; y < pf_gfx->height(); y++) - { - for (int x = 0; x < pf_gfx->width(); x++) - { - if (!(dp[x] & extra_mask)) - chk_trans_or_opa |= 2; - else - chk_trans_or_opa |= 1; - } - dp += pf_gfx->rowbytes(); - } - m_tile_opaque_pf[extra_planes][c] = chk_trans_or_opa; - } - } - } } /******************************************************************************/ @@ -628,17 +559,27 @@ u16 taito_f3_state::pf_ram_r(offs_t offset) void taito_f3_state::pf_ram_w(offs_t offset, u16 data, u16 mem_mask) { + // [.ttt yyyy yxxx xxa|h] non-extend + // [.tty yyyy xxxx xxa|h] extend + const u16 prev_tile = m_pf_ram[offset]; + COMBINE_DATA(&m_pf_ram[offset]); - if (m_game_config->extend) - { - if (offset < 0x4000) + if (offset < 0x4000) { + if (offset & 1) { + const int row = m_extend ? BIT(offset, 7, 5) : BIT(offset, 6, 5); + const int tmap = m_extend ? offset >> 12 : offset >> 11; + if ((prev_tile == 0) && (m_pf_ram[offset] != 0)) + m_tilemap_row_usage[row][tmap] += 1; + else if ((prev_tile != 0) && (m_pf_ram[offset] == 0)) + m_tilemap_row_usage[row][tmap] -= 1; + } + + if (m_game_config->extend) { m_tilemap[offset >> 12]->mark_tile_dirty((offset & 0xfff) >> 1); - } - else - { - if (offset < 0x4000) + } else { m_tilemap[offset >> 11]->mark_tile_dirty((offset & 0x7ff) >> 1); + } } } @@ -669,21 +610,30 @@ u16 taito_f3_state::textram_r(offs_t offset) void taito_f3_state::textram_w(offs_t offset, u16 data, u16 mem_mask) { + const u8 prev_tile = BIT(m_textram[offset], 0, 8); + COMBINE_DATA(&m_textram[offset]); - m_vram_layer->mark_tile_dirty(offset); - //m_vram_layer->mark_tile_dirty(offset + 1); + const int row = BIT(offset, 6, 6); + const u8 tile = BIT(m_textram[offset], 0, 8); + if (prev_tile == 0 && tile != 0) + m_textram_row_usage[row] += 1; + else if (prev_tile != 0 && tile == 0) + m_textram_row_usage[row] -= 1; - if (offset > 0x7ff) offset -= 0x800; + m_vram_layer->mark_tile_dirty(offset); - const int tile = offset; - const int col_off = ((tile & 0x3f) << 5) + ((tile & 0xfc0) >> 6); + // dirty the pixel layer too, since it uses palette etc. from text layer + // convert the position (x and y are swapped, and the upper bit of y is ignored) + // text: [Yyyyyyxxxxxx] + // pixel: [0xxxxxxyyyyy] + const int y = BIT(offset, 6, 5); + const int x = BIT(offset, 0, 6); + const int col_off = x << 5 | y; m_pixel_layer->mark_tile_dirty(col_off); - //m_pixel_layer->mark_tile_dirty(col_off+32); } - u16 taito_f3_state::charram_r(offs_t offset) { return m_charram[offset]; @@ -713,2153 +663,801 @@ u16 taito_f3_state::lineram_r(offs_t offset) void taito_f3_state::lineram_w(offs_t offset, u16 data, u16 mem_mask) { -#if 0 - /* DariusGX has an interesting bug at the start of Round D - the clearing of lineram - (0xa000->0x0xa7ff) overflows into priority RAM (0xb000) and creates garbage priority - values. I'm not sure what the real machine would do with these values, and this - emulation certainly doesn't like it, so I've chosen to catch the bug here, and prevent - the trashing of priority ram. If anyone has information on what the real machine does, - please let me know! */ - /* Update: this doesn't seem to occur anymore, I'll leave this snippet in but commented out. - * fwiw PC=0x1768a0/0x1768a4 is where the game clears lineram in round D, which is a - * move.w Dn, (An,D7.w*2) , a kind of opcode that could've been bugged back then. - */ - if (m_game == DARIUSG) - { - if (m_f3_skip_this_frame) - return; - if (offset == 0xb000 / 2 && data == 0x003f) - { - m_f3_skip_this_frame = 1; - return; - } - } -#endif - COMBINE_DATA(&m_line_ram[offset]); } void taito_f3_state::palette_24bit_w(offs_t offset, u32 data, u32 mem_mask) { - int r, g, b; - COMBINE_DATA(&m_paletteram32[offset]); - - /* 12 bit palette games - there has to be a palette select bit somewhere */ - if (m_game == SPCINVDX || m_game == RIDINGF || m_game == ARABIANM || m_game == RINGRAGE) - { - b = 15 * ((m_paletteram32[offset] >> 4) & 0xf); - g = 15 * ((m_paletteram32[offset] >> 8) & 0xf); - r = 15 * ((m_paletteram32[offset] >> 12) & 0xf); + const u32 color = m_paletteram32[offset]; + rgb_t rgb; + + /* TODO: 12 bit palette games - seems to be selected on a line basis by 6400? */ + if (m_game == SPCINVDX || m_game == RIDINGF || m_game == ARABIANM || m_game == RINGRAGE) { + // .... .... .... .... RRRR GGGG BBBB .... + // .... .... RRRR rrrr GGGG gggg BBBB bbbb + rgb = rgb_t(BIT(color, 12, 4) * 16, BIT(color, 8, 4) * 16, BIT(color, 4, 4) * 16); + } else { + rgb = rgb_t(color).set_a(255); } - /* This is weird - why are only the sprites and VRAM palettes 21 bit? */ - else if (m_game == CLEOPATR) - { - if (offset < 0x100 || offset > 0x1000) - { - r = ((m_paletteram32[offset] >> 16) & 0x7f) << 1; - g = ((m_paletteram32[offset] >> 8) & 0x7f) << 1; - b = ((m_paletteram32[offset] >> 0) & 0x7f) << 1; + m_palette->set_pen_color(offset, rgb); +} + +/******************************************************************************/ + +// line: [latched] line info from previous call, will modify in-place +// y should be called 0->255 for non-flipscreen, 255->0 for flipscreen +void taito_f3_state::read_line_ram(f3_line_inf &line, int y) +{ + const auto &line_ram = m_line_ram; + const auto latched_addr = [line_ram, y] (u8 section, u8 subsection) -> offs_t { + const u16 latches = line_ram[(section * 0x200)/2 + y]; + // NOTE: this may actually be computed from the upper byte? i.e.: + //offs_t base = 0x400 * BIT(latches, 8, 8) + 0x200 * subsection; + const offs_t base = 0x4000 + 0x1000 * section + 0x200 * subsection; + if (BIT(latches, subsection + 4)) + return (base + 0x800) / 2 + y; + else if (BIT(latches, subsection)) + return (base) / 2 + y; + return 0; + }; + // 4000 ********************************** + for (const int i : { 2, 3 }) { + if (const offs_t where = latched_addr(0, i)) { + const u16 colscroll = m_line_ram[where]; + line.pf[i].colscroll = colscroll & 0x1ff; + line.pf[i].alt_tilemap = !m_extend && colscroll & 0x200; + line.clip[2*(i-2) + 0].set_upper(BIT(colscroll, 12), BIT(colscroll, 13)); + line.clip[2*(i-2) + 1].set_upper(BIT(colscroll, 14), BIT(colscroll, 15)); } - else - { - r = (m_paletteram32[offset] >> 16) & 0xff; - g = (m_paletteram32[offset] >> 8) & 0xff; - b = (m_paletteram32[offset] >> 0) & 0xff; + } + + // 5000 ********************************** + // renderer needs to adjust clip by -48 + for (const int i : { 0, 1, 2, 3 }) { + if (const offs_t where = latched_addr(1, i)) { + const u16 clip_lows = m_line_ram[where]; + line.clip[i].set_lower(BIT(clip_lows, 0, 8), BIT(clip_lows, 8, 8)); } } - /* Another weird couple - perhaps this is alpha blending related? */ - else if (m_game == TWINQIX || m_game == RECALH) - { - if (offset > 0x1c00) - { - r = ((m_paletteram32[offset] >> 16) & 0x7f) << 1; - g = ((m_paletteram32[offset] >> 8) & 0x7f) << 1; - b = ((m_paletteram32[offset] >> 0) & 0x7f) << 1; + // 6000 ********************************** + if (const offs_t where = latched_addr(2, 0)) { // sprite blend modes, pivot blend select, ? + // old code called first value "sync register", is special handling necessary? + const u16 line_6000 = m_line_ram[where]; + + line.pivot.blend_select_v = BIT(line_6000, 9); + line.pivot.pivot_control = BIT(line_6000, 8, 8); + if (TAITOF3_VIDEO_DEBUG == 1) { + // arabianm: 0a, scfinals: a2, busymph: a2, recalh: 0c, bubblem: 03/f0 + if (line.pivot.pivot_control & 0b01011101) // check if unknown pivot control bits set + logerror("unknown 6000 pivot ctrl bits: %02x__ at %04x\n", line.pivot.pivot_control, 0x6000 + y*2); } - else - { - r = (m_paletteram32[offset] >> 16) & 0xff; - g = (m_paletteram32[offset] >> 8) & 0xff; - b = (m_paletteram32[offset] >> 0) & 0xff; + + for (int sp_group = 0; sp_group < NUM_SPRITEGROUPS; sp_group++) { + line.sp[sp_group].set_blend(BIT(line_6000, sp_group * 2, 2)); } } - - /* All other games - standard 24 bit palette */ - else - { - r = (m_paletteram32[offset] >> 16) & 0xff; - g = (m_paletteram32[offset] >> 8) & 0xff; - b = (m_paletteram32[offset] >> 0) & 0xff; + if (const offs_t where = latched_addr(2, 1)) { // blend values + const u16 blend_vals = m_line_ram[where]; + for (int idx = 0; idx < 4; idx++) { + const u8 alpha = BIT(blend_vals, 4 * idx, 4); + line.blend[idx] = std::min(8, (0xf - alpha)); + } } + if (const offs_t where = latched_addr(2, 2)) { // mosaic, palette depth effects + const u16 x_mosaic = m_line_ram[where]; - m_palette->set_pen_color(offset, rgb_t(r, g, b)); -} + line.x_sample = 16 - BIT(x_mosaic, 4, 4); -/******************************************************************************/ + for (int pf_num = 0; pf_num < NUM_PLAYFIELDS; pf_num++) { + line.pf[pf_num].x_sample_enable = BIT(x_mosaic, pf_num); + } -/*============================================================================*/ + for (auto &sp : line.sp) { + sp.x_sample_enable = BIT(x_mosaic, 8); + } + line.pivot.x_sample_enable = BIT(x_mosaic, 9); -inline void taito_f3_state::alpha_set_level() -{ - const auto set_alpha_level = [](int &d, const u8 s) - { - if (s == 0) - { - d = 0; + line.fx_6400 = (x_mosaic & 0xfc00) >> 8; // palette interpretation [unimplemented] + if (TAITOF3_VIDEO_DEBUG == 1) { + // gseeker(intro):40, ringrage/arabianm:30/33, ridingf:30/31, spcinvdj:30, gunlock:78 + if (line.fx_6400 && line.fx_6400 != 0x70) // check if unknown effect bits set + logerror("unknown 6400 fx bits: %02x__ at %04x\n", line.fx_6400, 0x6400 + y*2); } - else - { - d = s + 1; + } + if (const offs_t where = latched_addr(2, 3)) { // bg palette? [unimplemented] + line.bg_palette = m_line_ram[where]; + if (TAITOF3_VIDEO_DEBUG == 1) { + // gunlock: 0000 + if (line.bg_palette) // check if unknown effect bits set + logerror("unknown 6600 bg palette: %04x at %04x\n", line.bg_palette, 0x6600 + y*2); } - }; + } -// set_alpha_level(m_alpha_s_1_1, m_alpha_level_2ad); - set_alpha_level(m_alpha_s_1_1, 255 - m_alpha_level_2as); -// set_alpha_level(m_alpha_s_1_2, m_alpha_level_2bd); - set_alpha_level(m_alpha_s_1_2, 255 - m_alpha_level_2bs); - set_alpha_level(m_alpha_s_1_4, m_alpha_level_3ad); -// set_alpha_level(m_alpha_s_1_5, m_alpha_level_3ad*m_alpha_level_2ad / 255); - set_alpha_level(m_alpha_s_1_5, m_alpha_level_3ad * (255 - m_alpha_level_2as) / 255); -// set_alpha_level(m_alpha_s_1_6, m_alpha_level_3ad*m_alpha_level_2bd / 255); - set_alpha_level(m_alpha_s_1_6, m_alpha_level_3ad * (255 - m_alpha_level_2bs) / 255); - set_alpha_level(m_alpha_s_1_8, m_alpha_level_3bd); -// set_alpha_level(m_alpha_s_1_9, m_alpha_level_3bd*m_alpha_level_2ad / 255); - set_alpha_level(m_alpha_s_1_9, m_alpha_level_3bd * (255 - m_alpha_level_2as) / 255); -// set_alpha_level(m_alpha_s_1_a, m_alpha_level_3bd*m_alpha_level_2bd / 255); - set_alpha_level(m_alpha_s_1_a, m_alpha_level_3bd * (255 - m_alpha_level_2bs) / 255); - - set_alpha_level(m_alpha_s_2a_0, m_alpha_level_2as); - set_alpha_level(m_alpha_s_2a_4, m_alpha_level_2as * m_alpha_level_3ad / 255); - set_alpha_level(m_alpha_s_2a_8, m_alpha_level_2as * m_alpha_level_3bd / 255); - - set_alpha_level(m_alpha_s_2b_0, m_alpha_level_2bs); - set_alpha_level(m_alpha_s_2b_4, m_alpha_level_2bs * m_alpha_level_3ad / 255); - set_alpha_level(m_alpha_s_2b_8, m_alpha_level_2bs * m_alpha_level_3bd / 255); - - set_alpha_level(m_alpha_s_3a_0, m_alpha_level_3as); - set_alpha_level(m_alpha_s_3a_1, m_alpha_level_3as * m_alpha_level_2ad / 255); - set_alpha_level(m_alpha_s_3a_2, m_alpha_level_3as * m_alpha_level_2bd / 255); - - set_alpha_level(m_alpha_s_3b_0, m_alpha_level_3bs); - set_alpha_level(m_alpha_s_3b_1, m_alpha_level_3bs * m_alpha_level_2ad / 255); - set_alpha_level(m_alpha_s_3b_2, m_alpha_level_3bs * m_alpha_level_2bd / 255); -} + // 7000 ********************************** + if (const offs_t where = latched_addr(3, 0)) { // ? [unimplemented] + const u16 line_7000 = m_line_ram[where]; + line.pivot.pivot_enable = line_7000; + if (TAITOF3_VIDEO_DEBUG == 1) { + // ridingf/commandw/trstar: c000, gunlock: 0000, recalh: 4000, quizhuhu: 00ff + // puchicar/ktiger2/gekiridn: 0001, dariusg: 0001 on zone H boss pool effect lines + if (line_7000) // check if confusing pivot enable bits are set + logerror("unknown 7000 'pivot enable' bits: %04x at %04x\n", line_7000, 0x7000 + y*2); + } + } + if (const offs_t where = latched_addr(3, 1)) { // pivot layer mix info word + line.pivot.set_mix(m_line_ram[where]); + } + if (const offs_t where = latched_addr(3, 2)) { // sprite clip info, blend select + const u16 sprite_mix = m_line_ram[where]; + + if (TAITOF3_VIDEO_DEBUG == 1) { + // many: _8__, exceptions: pbobble3/puchicar/pbobble4/gunlock + const u16 unknown = BIT(sprite_mix, 10, 2); + if (unknown) + logerror("unknown sprite mix bits: _%01x__ at %04x\n", unknown << 2, 0x7400 + y*2); + } -/*============================================================================*/ + for (int group = 0; group < NUM_SPRITEGROUPS; group++) { + line.sp[group].set_mix((line.sp[group].mix_value & 0xc00f) + | BIT(sprite_mix, 0, 10) << 4); + line.sp[group].blend_select_v = BIT(sprite_mix, 12 + group, 1); + } + } + if (const offs_t where = latched_addr(3, 3)) { // sprite priority + const u16 sprite_prio = m_line_ram[where]; + for (int group = 0; group < NUM_SPRITEGROUPS; group++) { + line.sp[group].set_prio(BIT(sprite_prio, group * 4, 4)); + } + } -#define COLOR1 BYTE4_XOR_LE(0) -#define COLOR2 BYTE4_XOR_LE(1) -#define COLOR3 BYTE4_XOR_LE(2) + // 8000 ********************************** + for (const int i : { 0, 1, 2, 3 }) { // playfield zoom + if (const offs_t where = latched_addr(4, i)) { + const u16 pf_scale = m_line_ram[where]; + // y zooms are interleaved + const int FIX_Y[] = { 0, 3, 2, 1 }; + line.pf[i].x_scale = 256 - BIT(pf_scale, 8, 8); + line.pf[FIX_Y[i]].y_scale = BIT(pf_scale, 0, 8)<<1; + } + } -inline void taito_f3_state::alpha_blend32_s(int alphas, u32 s) -{ - u8 *sc = (u8 *)&s; - u8 *dc = (u8 *)&m_dval; - dc[COLOR1] = (alphas * sc[COLOR1]) >> 8; - dc[COLOR2] = (alphas * sc[COLOR2]) >> 8; - dc[COLOR3] = (alphas * sc[COLOR3]) >> 8; -} + // 9000 ********************************** + for (const int i : { 0, 1, 2, 3 }) { // playfield palette addition + if (const offs_t where = latched_addr(5, i)) { + const u16 pf_pal_add = m_line_ram[where]; + line.pf[i].pal_add = pf_pal_add * 16; + } + } -inline void taito_f3_state::alpha_blend32_d(int alphas, u32 s) -{ - u8 *sc = (u8 *)&s; - u8 *dc = (u8 *)&m_dval; - dc[COLOR1] = std::min(dc[COLOR1] + ((alphas * sc[COLOR1]) >> 8), 255U); - dc[COLOR2] = std::min(dc[COLOR2] + ((alphas * sc[COLOR2]) >> 8), 255U); - dc[COLOR3] = std::min(dc[COLOR3] + ((alphas * sc[COLOR3]) >> 8), 255U); -} + // A000 ********************************** + // iiii iiii iiff ffff + // fractional part is negative (allegedly). i wonder if it's supposed to be inverted instead? + // and then we just subtract (1<<8) to get almost the same value.. + for (const int i : { 0, 1, 2, 3 }) { // playfield rowscroll + if (const offs_t where = latched_addr(6, i)) { + const fixed8 rowscroll = m_line_ram[where] << (8-6); + line.pf[i].rowscroll = (rowscroll & 0xffffff00) - (rowscroll & 0x000000ff); + // ((i ^ 0b111111) - 0b111111) << (8-6); + } + } -/*============================================================================*/ - -inline void taito_f3_state::alpha_blend_1_1(u32 s) { alpha_blend32_d(m_alpha_s_1_1, s); } -inline void taito_f3_state::alpha_blend_1_2(u32 s) { alpha_blend32_d(m_alpha_s_1_2, s); } -inline void taito_f3_state::alpha_blend_1_4(u32 s) { alpha_blend32_d(m_alpha_s_1_4, s); } -inline void taito_f3_state::alpha_blend_1_5(u32 s) { alpha_blend32_d(m_alpha_s_1_5, s); } -inline void taito_f3_state::alpha_blend_1_6(u32 s) { alpha_blend32_d(m_alpha_s_1_6, s); } -inline void taito_f3_state::alpha_blend_1_8(u32 s) { alpha_blend32_d(m_alpha_s_1_8, s); } -inline void taito_f3_state::alpha_blend_1_9(u32 s) { alpha_blend32_d(m_alpha_s_1_9, s); } -inline void taito_f3_state::alpha_blend_1_a(u32 s) { alpha_blend32_d(m_alpha_s_1_a, s); } - -inline void taito_f3_state::alpha_blend_2a_0(u32 s) { alpha_blend32_s(m_alpha_s_2a_0, s); } -inline void taito_f3_state::alpha_blend_2a_4(u32 s) { alpha_blend32_d(m_alpha_s_2a_4, s); } -inline void taito_f3_state::alpha_blend_2a_8(u32 s) { alpha_blend32_d(m_alpha_s_2a_8, s); } - -inline void taito_f3_state::alpha_blend_2b_0(u32 s) { alpha_blend32_s(m_alpha_s_2b_0, s); } -inline void taito_f3_state::alpha_blend_2b_4(u32 s) { alpha_blend32_d(m_alpha_s_2b_4, s); } -inline void taito_f3_state::alpha_blend_2b_8(u32 s) { alpha_blend32_d(m_alpha_s_2b_8, s); } - -inline void taito_f3_state::alpha_blend_3a_0(u32 s) { alpha_blend32_s(m_alpha_s_3a_0, s); } -inline void taito_f3_state::alpha_blend_3a_1(u32 s) { alpha_blend32_d(m_alpha_s_3a_1, s); } -inline void taito_f3_state::alpha_blend_3a_2(u32 s) { alpha_blend32_d(m_alpha_s_3a_2, s); } - -inline void taito_f3_state::alpha_blend_3b_0(u32 s) { alpha_blend32_s(m_alpha_s_3b_0, s); } -inline void taito_f3_state::alpha_blend_3b_1(u32 s) { alpha_blend32_d(m_alpha_s_3b_1, s); } -inline void taito_f3_state::alpha_blend_3b_2(u32 s) { alpha_blend32_d(m_alpha_s_3b_2, s); } - -/*============================================================================*/ - -inline bool taito_f3_state::dpix_1_noalpha(u32 s_pix) { m_dval = s_pix; return true; } -inline bool taito_f3_state::dpix_ret1(u32 s_pix) { return true; } -inline bool taito_f3_state::dpix_ret0(u32 s_pix) { return false; } -inline bool taito_f3_state::dpix_1_1(u32 s_pix) { if (s_pix) alpha_blend_1_1(s_pix); return true; } -inline bool taito_f3_state::dpix_1_2(u32 s_pix) { if (s_pix) alpha_blend_1_2(s_pix); return true; } -inline bool taito_f3_state::dpix_1_4(u32 s_pix) { if (s_pix) alpha_blend_1_4(s_pix); return true; } -inline bool taito_f3_state::dpix_1_5(u32 s_pix) { if (s_pix) alpha_blend_1_5(s_pix); return true; } -inline bool taito_f3_state::dpix_1_6(u32 s_pix) { if (s_pix) alpha_blend_1_6(s_pix); return true; } -inline bool taito_f3_state::dpix_1_8(u32 s_pix) { if (s_pix) alpha_blend_1_8(s_pix); return true; } -inline bool taito_f3_state::dpix_1_9(u32 s_pix) { if (s_pix) alpha_blend_1_9(s_pix); return true; } -inline bool taito_f3_state::dpix_1_a(u32 s_pix) { if (s_pix) alpha_blend_1_a(s_pix); return true; } - -bool taito_f3_state::dpix_2a_0(u32 s_pix) -{ - if (s_pix) alpha_blend_2a_0(s_pix); - else m_dval = 0; - if (m_pdest_2a) { m_pval |= m_pdest_2a; return false; } - return true; -} -bool taito_f3_state::dpix_2a_4(u32 s_pix) -{ - if (s_pix) alpha_blend_2a_4(s_pix); - if (m_pdest_2a) { m_pval |= m_pdest_2a; return false; } - return true; -} -bool taito_f3_state::dpix_2a_8(u32 s_pix) -{ - if (s_pix) alpha_blend_2a_8(s_pix); - if (m_pdest_2a) { m_pval |= m_pdest_2a; return false; } - return true; + // B000 ********************************** + for (const int i : { 0, 1, 2, 3 }) { // playfield mix info + if (const offs_t where = latched_addr(7, i)) { + line.pf[i].set_mix(m_line_ram[where]); + } + } } -bool taito_f3_state::dpix_3a_0(u32 s_pix) -{ - if (s_pix) alpha_blend_3a_0(s_pix); - else m_dval = 0; - if (m_pdest_3a) { m_pval |= m_pdest_3a; return false; } - return true; -} -bool taito_f3_state::dpix_3a_1(u32 s_pix) -{ - if (s_pix) alpha_blend_3a_1(s_pix); - if (m_pdest_3a) { m_pval |= m_pdest_3a; return false; } - return true; -} -bool taito_f3_state::dpix_3a_2(u32 s_pix) +void taito_f3_state::get_pf_scroll(int pf_num, fixed8 ®_sx, fixed8 ®_sy) { - if (s_pix) alpha_blend_3a_2(s_pix); - if (m_pdest_3a) { m_pval |= m_pdest_3a; return false; } - return true; -} + // x: iiii iiii iiFF FFFF + // y: iiii iiii ifff ffff -bool taito_f3_state::dpix_2b_0(u32 s_pix) -{ - if (s_pix) alpha_blend_2b_0(s_pix); - else m_dval = 0; - if (m_pdest_2b) { m_pval |= m_pdest_2b; return false; } - return true; -} -bool taito_f3_state::dpix_2b_4(u32 s_pix) -{ - if (s_pix) alpha_blend_2b_4(s_pix); - if (m_pdest_2b) { m_pval |= m_pdest_2b; return false; } - return true; -} -bool taito_f3_state::dpix_2b_8(u32 s_pix) -{ - if (s_pix) alpha_blend_2b_8(s_pix); - if (m_pdest_2b) { m_pval |= m_pdest_2b; return false; } - return true; -} + // x scroll is stored as fixed10.6, with fractional bits inverted. + // we convert this to regular fixed24.8 -bool taito_f3_state::dpix_3b_0(u32 s_pix) -{ - if (s_pix) alpha_blend_3b_0(s_pix); - else m_dval = 0; - if (m_pdest_3b) { m_pval |= m_pdest_3b; return false; } - return true; -} -bool taito_f3_state::dpix_3b_1(u32 s_pix) -{ - if (s_pix) alpha_blend_3b_1(s_pix); - if (m_pdest_3b) { m_pval |= m_pdest_3b; return false; } - return true; -} -bool taito_f3_state::dpix_3b_2(u32 s_pix) -{ - if (s_pix) alpha_blend_3b_2(s_pix); - if (m_pdest_3b) { m_pval |= m_pdest_3b; return false; } - return true; -} + s16 sx_raw = m_control_0[pf_num]; + s16 sy_raw = m_control_0[pf_num + 4]; -bool taito_f3_state::dpix_2_0(u32 s_pix) -{ - const u8 tr2 = m_tval & 1; - if (s_pix) - { - if (tr2 == m_tr_2b) { alpha_blend_2b_0(s_pix); if (m_pdest_2b) m_pval |= m_pdest_2b; else return true; } - else if (tr2 == m_tr_2a) { alpha_blend_2a_0(s_pix); if (m_pdest_2a) m_pval |= m_pdest_2a; else return true; } + // why don't we need to do the 24 adjustment for pf 1 and 2 ? + sy_raw += (1 << 7); // 9.7 + + if (m_flipscreen) { + sx_raw += 320 << 6; // 10.6 + sx_raw += (512 + 192) << 6; // 10.6 + + sy_raw = -sy_raw; } - else - { - if (tr2 == m_tr_2b) { m_dval = 0; if (m_pdest_2b) m_pval |= m_pdest_2b; else return true; } - else if (tr2 == m_tr_2a) { m_dval = 0; if (m_pdest_2a) m_pval |= m_pdest_2a; else return true; } + + sx_raw += (40 - 4*pf_num) << 6; // 10.6 + + fixed8 sx = sx_raw << (8-6); // 10.6 to 24.8 + fixed8 sy = sy_raw << (8-7); // 9.7 to 24.8 + sx ^= 0b1111'1100; + if (m_flipscreen) { + sx = sx - (H_START << 8); + sy = -sy; + } else { + sx = sx - (H_START << 8); } - return false; + + reg_sx = sx; + reg_sy = sy; } -bool taito_f3_state::dpix_2_4(u32 s_pix) + +template +std::vector +taito_f3_state::calc_clip(const clip_plane_inf (&clip)[NUM_CLIPPLANES], + const Mix &layer) { - const u8 tr2 = m_tval & 1; - if (s_pix) - { - if (tr2 == m_tr_2b) { alpha_blend_2b_4(s_pix); if (m_pdest_2b) m_pval |= m_pdest_2b; else return true; } - else if (tr2 == m_tr_2a) { alpha_blend_2a_4(s_pix); if (m_pdest_2a) m_pval |= m_pdest_2a; else return true; } - } - else - { - if (tr2 == m_tr_2b) { if (m_pdest_2b) m_pval |= m_pdest_2b; else return true; } - else if (tr2 == m_tr_2a) { if (m_pdest_2a) m_pval |= m_pdest_2a; else return true; } + using clip_range = clip_plane_inf; + constexpr s16 INF_L = H_START; + constexpr s16 INF_R = H_START + H_VIS; + + std::bitset<4> normal_planes = layer.clip_enable() & ~layer.clip_inv(); + std::bitset<4> invert_planes = layer.clip_enable() & layer.clip_inv(); + if (!layer.clip_inv_mode()) + std::swap(normal_planes, invert_planes); + + // start with a visible region spanning the entire space + std::vector ranges{1, clip_range{INF_L, INF_R}}; + for (int plane = 0; plane < NUM_CLIPPLANES; plane++) { + const s16 clip_l = clip[plane].l - 1; + const s16 clip_r = clip[plane].r - 2; + + if (normal_planes[plane]) { + // check and clip all existing ranges + for (auto it = ranges.begin(); it != ranges.end(); it++) { + // if this clip is <1 px wide, clip entire line + // remove ranges outside normal clip intersection + if (clip_l > clip_r || it->r < clip_l || it->l > clip_r) { + ranges.erase(it); --it; + } else { // otherwise intersect normally + it->l = std::max(it->l, clip_l); + it->r = std::min(it->r, clip_r); + } + } + } else if (invert_planes[plane] && (clip_l <= clip_r)) { + // ASSUMING: only up to two clip settings legal at a time, + // can get up to 3 ranges; figure out which one it *isn't* later + std::vector new_ranges{}; + new_ranges.reserve(2 * ranges.size()); + new_ranges.insert(new_ranges.end(), ranges.size(), clip_range{INF_L, clip_l}); + new_ranges.insert(new_ranges.end(), ranges.size(), clip_range{clip_r, INF_R}); + + for (auto it = new_ranges.begin(); it != new_ranges.end(); it++) { + for (const auto &range : ranges) { + it->l = std::max(range.l, it->l); + it->r = std::max(range.l, it->r); + if (it->l >= it->r) { + new_ranges.erase(it); --it; + break; // goto... + } + } + } + ranges = new_ranges; + } } - return false; + return ranges; } -bool taito_f3_state::dpix_2_8(u32 s_pix) + +static int mosaic(int x, u8 sample) { - const u8 tr2 = m_tval & 1; - if (s_pix) - { - if (tr2 == m_tr_2b) { alpha_blend_2b_8(s_pix); if (m_pdest_2b) m_pval |= m_pdest_2b; else return true; } - else if (tr2 == m_tr_2a) { alpha_blend_2a_8(s_pix); if (m_pdest_2a) m_pval |= m_pdest_2a; else return true; } - } - else - { - if (tr2 == m_tr_2b) { if (m_pdest_2b) m_pval |= m_pdest_2b; else return true; } - else if (tr2 == m_tr_2a) { if (m_pdest_2a) m_pval |= m_pdest_2a; else return true; } - } - return false; + int x_count = (x - 46 + 114); + // hw quirk: the counter resets 2 px from the right edge... + x_count = x_count >= 432 ? x_count - 432 : x_count; + return x - (x_count % sample); } -bool taito_f3_state::dpix_3_0(u32 s_pix) +inline bool taito_f3_state::mixable::layer_enable() const { - const u8 tr2 = m_tval & 1; - if (s_pix) - { - if (tr2 == m_tr_3b) { alpha_blend_3b_0(s_pix); if (m_pdest_3b) m_pval |= m_pdest_3b; else return true; } - else if (tr2 == m_tr_3a) { alpha_blend_3a_0(s_pix); if (m_pdest_3a) m_pval |= m_pdest_3a; else return true; } - } - else - { - if (tr2 == m_tr_3b) { m_dval = 0; if (m_pdest_3b) m_pval |= m_pdest_3b; else return true; } - else if (tr2 == m_tr_3a) { m_dval = 0; if (m_pdest_3a) m_pval |= m_pdest_3a; else return true; } - } - return false; + return (mix_value & 0x2000) && blend_mode != 0b11; } -bool taito_f3_state::dpix_3_1(u32 s_pix) +inline int taito_f3_state::mixable::x_index(int x) const { - const u8 tr2 = m_tval & 1; - if (s_pix) - { - if (tr2 == m_tr_3b) { alpha_blend_3b_1(s_pix); if (m_pdest_3b) m_pval |= m_pdest_3b; else return true; } - else if (tr2 == m_tr_3a) { alpha_blend_3a_1(s_pix); if (m_pdest_3a) m_pval |= m_pdest_3a; else return true; } - } - else - { - if (tr2 == m_tr_3b) { if (m_pdest_3b) m_pval |= m_pdest_3b; else return true; } - else if (tr2 == m_tr_3a) { if (m_pdest_3a) m_pval |= m_pdest_3a; else return true; } - } - return false; + return x; } -bool taito_f3_state::dpix_3_2(u32 s_pix) +inline int taito_f3_state::mixable::y_index(int y) const { - const u8 tr2 = m_tval & 1; - if (s_pix) - { - if (tr2 == m_tr_3b) { alpha_blend_3b_2(s_pix); if (m_pdest_3b) m_pval |= m_pdest_3b; else return true; } - else if (tr2 == m_tr_3a) { alpha_blend_3a_2(s_pix); if (m_pdest_3a) m_pval |= m_pdest_3a; else return true; } - } - else - { - if (tr2 == m_tr_3b) { if (m_pdest_3b) m_pval |= m_pdest_3b; else return true; } - else if (tr2 == m_tr_3a) { if (m_pdest_3a) m_pval |= m_pdest_3a; else return true; } - } - return false; + return y; } - -inline void taito_f3_state::dpix_1_sprite(u32 s_pix) +inline bool taito_f3_state::sprite_inf::layer_enable() const { - if (s_pix) - { - const u8 p1 = m_pval & 0xf0; - if (p1 == 0x10) alpha_blend_1_1(s_pix); - else if (p1 == 0x20) alpha_blend_1_2(s_pix); - else if (p1 == 0x40) alpha_blend_1_4(s_pix); - else if (p1 == 0x50) alpha_blend_1_5(s_pix); - else if (p1 == 0x60) alpha_blend_1_6(s_pix); - else if (p1 == 0x80) alpha_blend_1_8(s_pix); - else if (p1 == 0x90) alpha_blend_1_9(s_pix); - else if (p1 == 0xa0) alpha_blend_1_a(s_pix); - } + return (mix_value & 0x2000) && blend_mode != 0b00; } - -inline void taito_f3_state::dpix_bg(u32 bgcolor) +inline u16 taito_f3_state::playfield_inf::palette_adjust(u16 pal) const { - const u8 p1 = m_pval & 0xf0; - if (!p1) m_dval = bgcolor; - else if (p1 == 0x10) alpha_blend_1_1(bgcolor); - else if (p1 == 0x20) alpha_blend_1_2(bgcolor); - else if (p1 == 0x40) alpha_blend_1_4(bgcolor); - else if (p1 == 0x50) alpha_blend_1_5(bgcolor); - else if (p1 == 0x60) alpha_blend_1_6(bgcolor); - else if (p1 == 0x80) alpha_blend_1_8(bgcolor); - else if (p1 == 0x90) alpha_blend_1_9(bgcolor); - else if (p1 == 0xa0) alpha_blend_1_a(bgcolor); + return pal + pal_add; } - -/******************************************************************************/ - -void taito_f3_state::init_alpha_blend_func() +inline int taito_f3_state::playfield_inf::x_index(int x) const { - m_dpix_n[0][0x0] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x1] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x2] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x3] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x4] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x5] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x6] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x7] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x8] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0x9] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0xa] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0xb] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0xc] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0xd] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0xe] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[0][0xf] = &taito_f3_state::dpix_1_noalpha; - - m_dpix_n[1][0x0] = &taito_f3_state::dpix_1_noalpha; - m_dpix_n[1][0x1] = &taito_f3_state::dpix_1_1; - m_dpix_n[1][0x2] = &taito_f3_state::dpix_1_2; - m_dpix_n[1][0x3] = &taito_f3_state::dpix_ret1; - m_dpix_n[1][0x4] = &taito_f3_state::dpix_1_4; - m_dpix_n[1][0x5] = &taito_f3_state::dpix_1_5; - m_dpix_n[1][0x6] = &taito_f3_state::dpix_1_6; - m_dpix_n[1][0x7] = &taito_f3_state::dpix_ret1; - m_dpix_n[1][0x8] = &taito_f3_state::dpix_1_8; - m_dpix_n[1][0x9] = &taito_f3_state::dpix_1_9; - m_dpix_n[1][0xa] = &taito_f3_state::dpix_1_a; - m_dpix_n[1][0xb] = &taito_f3_state::dpix_ret1; - m_dpix_n[1][0xc] = &taito_f3_state::dpix_ret1; - m_dpix_n[1][0xd] = &taito_f3_state::dpix_ret1; - m_dpix_n[1][0xe] = &taito_f3_state::dpix_ret1; - m_dpix_n[1][0xf] = &taito_f3_state::dpix_ret1; - - m_dpix_n[2][0x0] = &taito_f3_state::dpix_2a_0; - m_dpix_n[2][0x1] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0x2] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0x3] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0x4] = &taito_f3_state::dpix_2a_4; - m_dpix_n[2][0x5] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0x6] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0x7] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0x8] = &taito_f3_state::dpix_2a_8; - m_dpix_n[2][0x9] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0xa] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0xb] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0xc] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0xd] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0xe] = &taito_f3_state::dpix_ret0; - m_dpix_n[2][0xf] = &taito_f3_state::dpix_ret0; - - m_dpix_n[3][0x0] = &taito_f3_state::dpix_3a_0; - m_dpix_n[3][0x1] = &taito_f3_state::dpix_3a_1; - m_dpix_n[3][0x2] = &taito_f3_state::dpix_3a_2; - m_dpix_n[3][0x3] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0x4] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0x5] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0x6] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0x7] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0x8] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0x9] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0xa] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0xb] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0xc] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0xd] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0xe] = &taito_f3_state::dpix_ret0; - m_dpix_n[3][0xf] = &taito_f3_state::dpix_ret0; - - m_dpix_n[4][0x0] = &taito_f3_state::dpix_2b_0; - m_dpix_n[4][0x1] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0x2] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0x3] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0x4] = &taito_f3_state::dpix_2b_4; - m_dpix_n[4][0x5] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0x6] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0x7] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0x8] = &taito_f3_state::dpix_2b_8; - m_dpix_n[4][0x9] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0xa] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0xb] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0xc] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0xd] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0xe] = &taito_f3_state::dpix_ret0; - m_dpix_n[4][0xf] = &taito_f3_state::dpix_ret0; - - m_dpix_n[5][0x0] = &taito_f3_state::dpix_3b_0; - m_dpix_n[5][0x1] = &taito_f3_state::dpix_3b_1; - m_dpix_n[5][0x2] = &taito_f3_state::dpix_3b_2; - m_dpix_n[5][0x3] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0x4] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0x5] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0x6] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0x7] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0x8] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0x9] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0xa] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0xb] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0xc] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0xd] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0xe] = &taito_f3_state::dpix_ret0; - m_dpix_n[5][0xf] = &taito_f3_state::dpix_ret0; - - m_dpix_n[6][0x0] = &taito_f3_state::dpix_2_0; - m_dpix_n[6][0x1] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0x2] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0x3] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0x4] = &taito_f3_state::dpix_2_4; - m_dpix_n[6][0x5] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0x6] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0x7] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0x8] = &taito_f3_state::dpix_2_8; - m_dpix_n[6][0x9] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0xa] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0xb] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0xc] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0xd] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0xe] = &taito_f3_state::dpix_ret0; - m_dpix_n[6][0xf] = &taito_f3_state::dpix_ret0; - - m_dpix_n[7][0x0] = &taito_f3_state::dpix_3_0; - m_dpix_n[7][0x1] = &taito_f3_state::dpix_3_1; - m_dpix_n[7][0x2] = &taito_f3_state::dpix_3_2; - m_dpix_n[7][0x3] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0x4] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0x5] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0x6] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0x7] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0x8] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0x9] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0xa] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0xb] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0xc] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0xd] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0xe] = &taito_f3_state::dpix_ret0; - m_dpix_n[7][0xf] = &taito_f3_state::dpix_ret0; + return (((reg_fx_x + (x - H_START) * x_scale)>>8) + H_START) & width_mask; } - -/******************************************************************************/ - -void taito_f3_state::get_pixmap_pointer(int skip_layer_num, const f3_playfield_line_inf **line_t, int y) +inline int taito_f3_state::playfield_inf::y_index(int y) const { - for (int pf_num = skip_layer_num; pf_num < 5; ++pf_num) - { - const f3_playfield_line_inf *line_tmp = line_t[pf_num]; - m_src[pf_num] = line_tmp->src[y]; - m_src_s[pf_num] = line_tmp->src_s[y]; - m_src_e[pf_num] = line_tmp->src_e[y]; - m_tsrc[pf_num] = line_tmp->tsrc[y]; - m_tsrc_s[pf_num] = line_tmp->tsrc_s[y]; - m_x_count[pf_num] = line_tmp->x_count[y]; - m_x_zoom[pf_num] = line_tmp->x_zoom[y]; - m_clip_al[pf_num] = line_tmp->clip_in[y] & 0xffff; - m_clip_ar[pf_num] = line_tmp->clip_in[y] >> 16; - m_clip_bl[pf_num] = line_tmp->clip_ex[y] & 0xffff; - m_clip_br[pf_num] = line_tmp->clip_ex[y] >> 16; - m_pal_add[pf_num] = line_tmp->pal_add[y]; - } + return ((reg_fx_y >> 8) + colscroll) & 0x1ff; } - -void taito_f3_state::culc_pixmap_pointer(int skip_layer_num) +inline int taito_f3_state::pivot_inf::x_index(int x) const { - for (int pf_num = skip_layer_num; pf_num < 5; ++pf_num) - { - m_x_count[pf_num] += m_x_zoom[pf_num]; - if (m_x_count[pf_num] >> 16) - { - m_x_count[pf_num] &= 0xffff; - m_src[pf_num]++; - m_tsrc[pf_num]++; - if (m_src[pf_num] == m_src_e[pf_num]) - { - m_src[pf_num] = m_src_s[pf_num]; - m_tsrc[pf_num] = m_tsrc_s[pf_num]; - } - } - } + return (x + reg_sx) & 0x1FF; } - -#define UPDATE_PIXMAP_SP(pf_num) \ - if (cx >= clip_als && cx < clip_ars && !(cx >= clip_bls && cx < clip_brs)) \ - { \ - sprite_pri = sprite[pf_num] & m_pval; \ - if (sprite_pri) \ - { \ - if (sprite[pf_num] & 0x100) break; \ - if (!m_dpix_sp[sprite_pri]) \ - { \ - if (!(m_pval & 0xf0)) break; \ - else { dpix_1_sprite(*dsti); *dsti = m_dval; break; } \ - } \ - if ((this->*m_dpix_sp[sprite_pri][m_pval >> 4])(*dsti)) { *dsti = m_dval; break; } \ - } \ - } - -#define UPDATE_PIXMAP_LP(pf_num) \ - if (cx >= m_clip_al[pf_num] && cx < m_clip_ar[pf_num] && !(cx >= m_clip_bl[pf_num] && cx < m_clip_br[pf_num])) \ - { \ - m_tval = *m_tsrc[pf_num]; \ - if (m_tval & 0xf0) \ - if ((this->*m_dpix_lp[pf_num][m_pval >> 4])(clut[(*m_src[pf_num] + m_pal_add[pf_num]) & 0x1fff])) { *dsti = m_dval; break; } \ - } - - -/*============================================================================*/ - -inline void taito_f3_state::draw_scanlines( - bitmap_rgb32 &bitmap, int xsize, s16 *draw_line_num, - const f3_playfield_line_inf **line_t, - const u8 *sprite, - u32 orient, - int skip_layer_num) +inline int taito_f3_state::pivot_inf::y_index(int y) const { - const pen_t *clut = &m_palette->pen(0); - const u32 bgcolor = clut[0]; - - const int x = 46; - - u16 clip_als = 0, clip_ars = 0, clip_bls = 0, clip_brs = 0; - - int yadv = bitmap.rowpixels(); - int yadvp = m_pri_alp_bitmap.rowpixels(); - int i = 0, y = draw_line_num[0]; - int ty = y; - - if (orient & ORIENTATION_FLIP_Y) - { - ty = bitmap.height() - 1 - ty; - yadv = -yadv; - yadvp = -yadvp; - } - - u8 *dstp0 = &m_pri_alp_bitmap.pix(ty, x); - - m_pdest_2a = m_alpha_level_2ad ? 0x10 : 0; - m_pdest_2b = m_alpha_level_2bd ? 0x20 : 0; - m_tr_2a =(m_alpha_level_2as == 0 && m_alpha_level_2ad == 255) ? -1 : 0; - m_tr_2b =(m_alpha_level_2bs == 0 && m_alpha_level_2bd == 255) ? -1 : 1; - m_pdest_3a = m_alpha_level_3ad ? 0x40 : 0; - m_pdest_3b = m_alpha_level_3bd ? 0x80 : 0; - m_tr_3a =(m_alpha_level_3as == 0 && m_alpha_level_3ad == 255) ? -1 : 0; - m_tr_3b =(m_alpha_level_3bs == 0 && m_alpha_level_3bd == 255) ? -1 : 1; - - { - u32 *dsti0 = &bitmap.pix(ty, x); - while (1) - { - int cx = 0; - - clip_als = m_sa_line_inf[0].sprite_clip_in[y] & 0xffff; - clip_ars = m_sa_line_inf[0].sprite_clip_in[y] >> 16; - clip_bls = m_sa_line_inf[0].sprite_clip_ex[y] & 0xffff; - clip_brs = m_sa_line_inf[0].sprite_clip_ex[y] >> 16; - - int length = xsize; - u32 *dsti = dsti0; - u8 *dstp = dstp0; - - get_pixmap_pointer(skip_layer_num, line_t, y); - - while (1) - { - m_pval = *dstp; - if (m_pval != 0xff) - { - u8 sprite_pri; - switch (skip_layer_num) - { - case 0: UPDATE_PIXMAP_SP(0) UPDATE_PIXMAP_LP(0) [[fallthrough]]; - case 1: UPDATE_PIXMAP_SP(1) UPDATE_PIXMAP_LP(1) [[fallthrough]]; - case 2: UPDATE_PIXMAP_SP(2) UPDATE_PIXMAP_LP(2) [[fallthrough]]; - case 3: UPDATE_PIXMAP_SP(3) UPDATE_PIXMAP_LP(3) [[fallthrough]]; - case 4: UPDATE_PIXMAP_SP(4) UPDATE_PIXMAP_LP(4) [[fallthrough]]; - case 5: UPDATE_PIXMAP_SP(5) - if (!bgcolor) { if (!(m_pval & 0xf0)) { *dsti = 0; break; } } - else dpix_bg(bgcolor); - *dsti = m_dval; - } - } - - if (!(--length)) break; - dsti++; - dstp++; - cx++; - - culc_pixmap_pointer(skip_layer_num); - } - - i++; - if (draw_line_num[i] < 0) break; - if (draw_line_num[i] == y + 1) - { - dsti0 += yadv; - dstp0 += yadvp; - y++; - continue; - } - else - { - dsti0 += (draw_line_num[i] - y) * yadv; - dstp0 += (draw_line_num[i] - y) * yadvp; - y = draw_line_num[i]; - } - } - } + return (reg_sy + y) & (use_pix() ? 0xff : 0x1ff); } -/******************************************************************************/ - -void taito_f3_state::visible_tile_check( - f3_playfield_line_inf *line_t, - int line, - u32 x_index_fx,u32 y_index, - const u16 *pf_data_n) +template +bool taito_f3_state::mix_line(const Mix &gfx, mix_pix &z, pri_mode &pri, const f3_line_inf &line, const clip_plane_inf &range) { - const u8 alpha_mode = line_t->alpha_mode[line]; - if (!alpha_mode) - return; + const int y = gfx.y_index(line.y); + const u16 *src = &gfx.bitmap.src->pix(y); + const u8 *flags = gfx.bitmap.flags ? &gfx.bitmap.flags->pix(y) : nullptr; - const u32 total_elements = m_gfxdecode->gfx(3)->elements(); + for (int x = range.l; x < range.r; x++) { + if (gfx.blend_mode == pri.src_blendmode[x]) + continue; // note that layers cannot blend against the same blend mode - int tile_index = x_index_fx >> 16; - const int tile_num = (((line_t->x_zoom[line] * 320 + (x_index_fx & 0xffff) + 0xffff) >> 16) + (tile_index & 0xf) + 15) >> 4; - tile_index >>= 4; + const int real_x = gfx.x_sample_enable ? mosaic(x, line.x_sample) : x; + const int gfx_x = gfx.x_index(real_x); - const u16 *pf_base; - if (m_flipscreen) - { - pf_base = pf_data_n + ((31 - (y_index >> 4)) << m_twidth_mask_bit); - tile_index = (m_twidth_mask - tile_index) - tile_num + 1; - } - else pf_base = pf_data_n + ((y_index >> 4) << m_twidth_mask_bit); - - bool trans_all = true; - bool opaque_all = true; - u8 alpha_type = 0; - for (int i = 0; i < tile_num; i++) - { - const u32 tile = (pf_base[(tile_index * 2 + 0) & m_twidth_mask] << 16) | (pf_base[(tile_index * 2 + 1) & m_twidth_mask]); - const u8 extra_planes = (tile >> (16 + 10)) & 3; - if (tile & 0xffff) - { - trans_all = false; - if (opaque_all) - { - if (m_tile_opaque_pf[extra_planes][(tile & 0xffff) % total_elements] != 1) opaque_all = false; - } + if constexpr (std::is_same_v) { + if (BIT(src[gfx_x], 10, 2) != gfx.index) + continue; + } - if (alpha_mode == 1) - { - if (!opaque_all) return; + // tilemap transparent flag + if (flags && !(flags[gfx_x] & 0xf0)) + continue; + + if (gfx.prio > pri.src_prio[x]) { + // submit src pix + if (const u16 c = src[gfx_x]) { + const u16 pal = gfx.palette_adjust(c); + // could be pulled out of loop for pivot and sprite + u8 sel = gfx.blend_select(flags, gfx_x); + + switch (gfx.blend_mode) { + case 0b01: // normal blend + sel = 2 + sel; + [[fallthrough]]; + case 0b10: // reverse blend + if (line.blend[sel] == 0) + continue; // could be early return for pivot and sprite + z.src_blend[x] = line.blend[sel]; + break; + case 0b00: case 0b11: default: // opaque layer + if (line.blend[sel] + line.blend[2 + sel] == 0) + continue; // could be early return for pivot and sprite + z.src_blend[x] = line.blend[2 + sel]; + z.dst_blend[x] = line.blend[sel]; + pri.dst_prio[x] = gfx.prio; + z.dst_pal[x] = pal; + break; + } + // lock in source color for blending and update the prio test buffer + z.src_pal[x] = pal; + pri.src_blendmode[x] = gfx.blend_mode; + pri.src_prio[x] = gfx.prio; } - else - { - if (alpha_type != 3) - { - if ((tile >> (16 + 9)) & 1) alpha_type |= 2; - else alpha_type |= 1; + } else if (gfx.prio >= pri.dst_prio[x]) { + // submit dest pix + if (const u16 c = src[gfx_x]) { + const u16 pal = gfx.palette_adjust(c); + if (gfx.prio != pri.dst_prio[x]) + z.dst_pal[x] = pal; + else // prio conflict = color line conflict? (dariusg, bubblem) + z.dst_pal[x] = 0; + pri.dst_prio[x] = gfx.prio; + const bool sel = gfx.blend_select(flags, gfx_x); + switch (pri.src_blendmode[x]) { + case 0b01: + z.dst_blend[x] = line.blend[sel]; + break; + case 0b10: case 0b00: case 0b11: default: + z.dst_blend[x] = line.blend[2 + sel]; + break; } - else if (!opaque_all) break; } } - else if (opaque_all) opaque_all = false; - - tile_index++; } - if (trans_all) { line_t->alpha_mode[line] = 0; return; } - - if (alpha_mode > 1) - { - line_t->alpha_mode[line] |= alpha_type << 4; + constexpr int DEBUG_X = 50 + H_START; + constexpr int DEBUG_Y = 180 + V_START; + if (TAITOF3_VIDEO_DEBUG && line.y == DEBUG_Y) { + logerror("[%X] %s%d: %d,%d (%d)\n {pal: %x/%x, blend: %x/%x, prio: %x/%x}\n", + gfx.prio, gfx.debug_name(), gfx.index, + gfx.blend_b(), gfx.blend_a(), gfx.blend_select(flags, 82), + z.src_pal[DEBUG_X], z.dst_pal[DEBUG_X], + z.src_blend[DEBUG_X], z.dst_blend[DEBUG_X], + pri.src_prio[DEBUG_X], pri.dst_prio[DEBUG_X]); } - if (opaque_all) - line_t->alpha_mode[line] |= 0x80; -} - -/******************************************************************************/ - -void taito_f3_state::calculate_clip(int y, u16 pri, u32 &clip_in, u32 &clip_ex, u8 &line_enable) -{ - const f3_spritealpha_line_inf *sa_line = &m_sa_line_inf[0]; - - /* landmakr and quizhuhu use clip planes 2 and 3, - commandw enables all clip planes. - only up to 2 valid clips ever used in existing games? */ - u16 normal_planes = (pri >> 8) & (pri >> 4); - u16 invert_planes = (pri >> 8) & ~(pri >> 4); - // when bit 0x1000 set, invert bit ON is normal clip, OFF is inverted - if (pri & 0x1000) - std::swap(normal_planes, invert_planes); - - s16 clipl = 0, clipr = 0x7fff; - - const auto calc_clip = - [&sa_line, y, &clipl, &clipr] (unsigned p) - { - clipl = std::max(sa_line->clip_l[p][y], clipl); - clipr = std::min(sa_line->clip_r[p][y], clipr); - }; - const auto calc_clip_inv = - [&sa_line, y, &clipl, &clipr] - (unsigned p) - { - clipl = std::min(sa_line->clip_l[p][y], clipl); - clipr = std::max(sa_line->clip_r[p][y], clipr); - }; - - if (normal_planes & 0b0001) { calc_clip(0); }; - if (normal_planes & 0b0010) { calc_clip(1); }; - if (normal_planes & 0b0100) { calc_clip(2); }; - if (normal_planes & 0b1000) { calc_clip(3); }; - if (clipl > clipr) - line_enable = 0; - else - clip_in = clipl | (clipr << 16); - - // reset temp clip sides for the inverted/excluded window - clipl = 0x7fff; clipr = 0; - if (invert_planes & 0b0001) { calc_clip_inv(0); }; - if (invert_planes & 0b0010) { calc_clip_inv(1); }; - if (invert_planes & 0b0100) { calc_clip_inv(2); }; - if (invert_planes & 0b1000) { calc_clip_inv(3); }; - if (clipl > clipr) - clip_ex = 0; - else - clip_ex = clipl | (clipr << 16); + return false; // TODO: determine when we can stop drawing? } -void taito_f3_state::get_spritealphaclip_info() +void taito_f3_state::render_line(pen_t *RESTRICT dst, const mix_pix &z) { - f3_spritealpha_line_inf *line_t = &m_sa_line_inf[0]; - - int y, y_end, y_inc; - - int spri_base, clip_base_low, clip_base_high, inc; - - u16 spri = 0; - u16 sprite_clip = 0; - u16 clip0_low = 0, clip0_high = 0, clip1_low = 0; - u16 clip2_low = 0, clip2_high = 0, clip3_low = 0; - u16 alpha_level = 0; - u16 sprite_alpha = 0; - - if (m_flipscreen) - { - spri_base = 0x77fe; - clip_base_low = 0x51fe; - clip_base_high = 0x45fe; - inc = -2; - y = 255; - y_end = -1; - y_inc = -1; - - } - else - { - spri_base = 0x7600; - clip_base_low = 0x5000; - clip_base_high = 0x4400; - inc = 2; - y = 0; - y_end = 256; - y_inc = 1; + const pen_t *clut = m_palette->pens(); + for (int x = H_START; x < H_START + H_VIS; x++) { + rgb_t s_rgb = clut[z.src_pal[x]]; + rgb_t d_rgb = clut[z.dst_pal[x]]; + + // source_color * src_blend + dest_color * dst_blend + // by the way, any time i touch this code i lose 10-20% speed. - ywy + u16 r1 = s_rgb.r(); + u16 g1 = s_rgb.g(); + u16 b1 = s_rgb.b(); + u16 r2 = d_rgb.r(); + u16 g2 = d_rgb.g(); + u16 b2 = d_rgb.b(); + r1 *= z.src_blend[x]; // these blend contributions have fixed3 precision + g1 *= z.src_blend[x]; // i.e. 0 (b0'000) to 8 (b1'000) represents 0.0 to 1.0 + b1 *= z.src_blend[x]; + r2 *= z.dst_blend[x]; + g2 *= z.dst_blend[x]; + b2 *= z.dst_blend[x]; + r1 += r2; + g1 += g2; + b1 += b2; + + r1 >>= 3; + g1 >>= 3; + b1 >>= 3; + r1 = std::min(r1, static_cast(255)); + g1 = std::min(g1, static_cast(255)); + b1 = std::min(b1, static_cast(255)); + + dst[x] = rgb_t(r1, g1, b1); } +} - while (y != y_end) - { - /* The zoom, column and row values can latch according to control ram */ - { - if (m_line_ram[0x100 + y] & 1) // 5000 control playfield 1 - clip0_low = (m_line_ram[clip_base_low / 2] >> 0) & 0xffff; - if (m_line_ram[0x000 + y] & 4) // 4000 control - clip0_high = (m_line_ram[clip_base_high / 2] >> 0) & 0xffff; - if (m_line_ram[0x100 + y] & 2) // 5000 control playfield 2 - clip1_low = (m_line_ram[(clip_base_low + 0x200) / 2] >> 0) & 0xffff; - - if (m_line_ram[0x100 + y] & 4) // 5000 control playfield 3 - clip2_low = (m_line_ram[(clip_base_low + 0x400) / 2] >> 0) & 0xffff; - if (m_line_ram[0x000 + y] & 8) // 4000 control - clip2_high = (m_line_ram[(clip_base_high + 0x200) / 2] >> 0) & 0xffff; - if (m_line_ram[0x100 + y] & 8) // 5000 control playfield 4 - clip3_low = (m_line_ram[(clip_base_low + 0x600) / 2] >> 0) & 0xffff; - - if (m_line_ram[(0x0600 / 2) + y] & 0x8) - spri = m_line_ram[spri_base / 2] & 0xffff; - if (m_line_ram[(0x0600 / 2) + y] & 0x4) - sprite_clip = m_line_ram[(spri_base-0x200) / 2] & 0xffff; - if (m_line_ram[(0x0400 / 2) + y] & 0x1) - sprite_alpha = m_line_ram[(spri_base-0x1600) / 2] & 0xffff; - if (m_line_ram[(0x0400 / 2) + y] & 0x2) - alpha_level = m_line_ram[(spri_base-0x1400) / 2] & 0xffff; - } - - - line_t->alpha_level[y] = alpha_level; - line_t->spri[y] = spri; - line_t->sprite_alpha[y] = sprite_alpha; - line_t->clip_l[0][y] = ((clip0_low & 0xff) | ((clip0_high & 0x1000) >> 4)) - 47; - line_t->clip_r[0][y] = (((clip0_low & 0xff00) >> 8) | ((clip0_high & 0x2000) >> 5)) - 48; - line_t->clip_l[1][y] = ((clip1_low & 0xff) | ((clip0_high & 0x4000) >> 6)) - 47; - line_t->clip_r[1][y] = (((clip1_low & 0xff00) >> 8) | ((clip0_high & 0x8000) >> 7)) - 48; - line_t->clip_l[2][y] = ((clip2_low & 0xff) | ((clip2_high & 0x1000) >> 4)) - 47; - line_t->clip_r[2][y] = (((clip2_low & 0xff00) >> 8) | ((clip2_high & 0x2000) >> 5)) - 48; - line_t->clip_l[3][y] = ((clip3_low & 0xff) | ((clip2_high & 0x4000) >> 6)) - 47; - line_t->clip_r[3][y] = (((clip3_low & 0xff00) >> 8) | ((clip2_high & 0x8000) >> 7)) - 48; - if (line_t->clip_l[0][y] < 0) line_t->clip_l[0][y] = 0; - if (line_t->clip_r[0][y] < 0) line_t->clip_r[0][y] = 0; - if (line_t->clip_l[1][y] < 0) line_t->clip_l[1][y] = 0; - if (line_t->clip_r[1][y] < 0) line_t->clip_r[1][y] = 0; - if (line_t->clip_l[2][y] < 0) line_t->clip_l[2][y] = 0; - if (line_t->clip_r[2][y] < 0) line_t->clip_r[2][y] = 0; - if (line_t->clip_l[3][y] < 0) line_t->clip_l[3][y] = 0; - if (line_t->clip_r[3][y] < 0) line_t->clip_r[3][y] = 0; - - /* Evaluate sprite clipping */ - if (sprite_clip & 0xf0) - { - u8 line_enable = 1; - calculate_clip(y, ((sprite_clip & 0x1ff) << 4), line_t->sprite_clip_in[y], line_t->sprite_clip_ex[y], line_enable); - if (line_enable == 0) - line_t->sprite_clip_in[y] = 0x7fff7fff; - } - else - { - line_t->sprite_clip_in[y] = 0x7fff0000; - line_t->sprite_clip_ex[y] = 0; - } - spri_base += inc; - clip_base_low += inc; - clip_base_high += inc; - y += y_inc; - } +inline bool taito_f3_state::used(const pivot_inf &layer, int y) const +{ + return layer.use_pix() || (m_textram_row_usage[layer.y_index(y) >> 3] > 0); } - -/* sx and sy are 16.16 fixed point numbers */ -void taito_f3_state::get_line_ram_info(tilemap_t *tmap, int sx, int sy, int pos, const u16 *pf_data_n) +inline bool taito_f3_state::used(const sprite_inf &layer, int y) const { - f3_playfield_line_inf *line_t = &m_pf_line_inf[pos]; - - int y_start, y_end, y_inc; - int y_index_fx; - - u16 colscroll = 0; - u16 _colscroll[256]; - int x_offset = 0; - u32 _x_offset[256]; - u8 line_zoom_x = 0, line_zoom_y = 0; - u8 _y_zoom[256]; - u16 pri = 0, pal_add = 0; - - sx += ((46 << 16)); - - if (m_flipscreen) - { - y_start = 255; - y_end = -1; - y_inc = -1; - - /* Adjust for flipped scroll position */ - if (m_game_config->extend) - sx = -sx + (((188 - 512) & 0xffff) << 16); - else - sx = -sx + (188 << 16); - - y_index_fx = -sy - (256 << 16); /* Adjust for flipped scroll position */ - } - else - { - y_start = 0; - y_end = 256; - y_inc = 1; - - y_index_fx = sy; - } - - int y = y_start; - - while (y != y_end) - { - const u16 col_base = (0x4000 + (pos << 9)) / 2; - const u16 zoom_base = 0x8000 / 2; - const u16 pal_add_base = (0x9000 + (pos << 9)) / 2; - const u16 line_base = (0xa000 + (pos << 9)) / 2; - const u16 pri_base = (0xb000 + (pos << 9)) / 2; - - const u8 bit_select = 1 << pos; - - /* The zoom, column and row values can latch according to control ram */ - { - if (m_line_ram[0x600 + y] & bit_select) - x_offset = m_line_ram[line_base + y] << 10; - if (m_line_ram[0x700 + y] & bit_select) - pri = m_line_ram[pri_base + y]; - - // Zoom for playfields 1 & 3 is interleaved, as is the latch select - switch (pos) - { - case 0: - if (m_line_ram[0x400 + y] & bit_select) - { - line_zoom_x = m_line_ram[zoom_base + y + 0x000 / 2] >> 8; - line_zoom_y = m_line_ram[zoom_base + y + 0x000 / 2] & 0xff; - } - break; - case 1: - if (m_line_ram[0x400 + y] & 0x2) - line_zoom_x = m_line_ram[zoom_base + y + 0x200 / 2] >> 8; - if (m_line_ram[0x400 + y] & 0x8) - line_zoom_y = m_line_ram[zoom_base + y + 0x600 / 2] & 0xff; - break; - case 2: - if (m_line_ram[0x400 + y] & bit_select) - { - line_zoom_x = m_line_ram[zoom_base + y + 0x400 / 2] >> 8; - line_zoom_y = m_line_ram[zoom_base + y + 0x400 / 2] & 0xff; - } - break; - case 3: - if (m_line_ram[0x400 + y] & 0x8) - line_zoom_x = m_line_ram[zoom_base + y + 0x600 / 2] >> 8; - if (m_line_ram[0x400 + y] & 0x2) - line_zoom_y = m_line_ram[zoom_base + y + 0x200 / 2] & 0xff; - break; - default: - break; - } - - // Column scroll only affects playfields 2 & 3 - if (pos >= 2 && m_line_ram[0x000 + y] & bit_select) - colscroll = (m_line_ram[col_base + y] >> 0) & 0x3ff; - - if (m_line_ram[0x500 + y] & bit_select) - pal_add = (m_line_ram[pal_add_base + y] & 0x1ff) * 16; - } - - u8 line_enable; - - if (!pri || (!m_flipscreen && y < 24) || (m_flipscreen && y > 231) || - (pri & 0xc000) == 0xc000 || !(pri & 0x2000)/**/) - line_enable = 0; - else if (pri & 0x4000) //alpha1 - line_enable = 2; - else if (pri & 0x8000) //alpha2 - line_enable = 3; - else - line_enable = 1; - - _colscroll[y] = colscroll; - _x_offset[y] = (x_offset & 0xffff0000) - (x_offset & 0x0000ffff); - _y_zoom[y] = line_zoom_y; - - /* Evaluate clipping */ - if (pri & 0x0f00) - { - //fast path todo - remove line enable - calculate_clip(y, pri & 0x1ff0, line_t->clip_in[y], line_t->clip_ex[y], line_enable); - } - else - { - /* No clipping */ - line_t->clip_in[y] = 0x7fff0000; - line_t->clip_ex[y] = 0; - } - - line_t->x_zoom[y] = 0x10000 - (line_zoom_x << 8); - line_t->alpha_mode[y] = line_enable; - line_t->pri[y] = pri; - line_t->pal_add[y] = pal_add; - - // zoom_base += inc; - y += y_inc; - } - // ignore the first zoom value from ram and use the default - _y_zoom[y_start] = 0; - line_t->x_zoom[y_start] = 0x10000; - - tilemap_t* tm = tmap; - const u16* pfdata = pf_data_n; - - y = y_start; - while (y != y_end) - { - u32 x_index_fx; - u32 y_index; - - /* lines with 0x0200 set in column scroll look up in alternate tilemaps - playfield 3 2000 -> 4000, playfield 4 3000 -> 5000 (non-extended only?) - used by kaiserkn (high scores), kirameki, football games (crowd, goals) - - there's some seemingly unrelated issue with the timing of y scrolling, - causing the pitch to scroll ahead of crowd areas - */ - const u16 cs = _colscroll[y]; - if (cs & 0x200) - { - if (m_tilemap[4] && m_tilemap[5]) - { - if (tmap == m_tilemap[2]) - { - tmap = m_tilemap[4]; - pf_data_n = m_pf_data[4]; - } - else if (tmap == m_tilemap[3]) - { - tmap = m_tilemap[5]; - pf_data_n = m_pf_data[5]; - } - } - } - else - { - tmap = tm; - pf_data_n = pfdata; - } - - /* set pixmap pointer */ - bitmap_ind16 &srcbitmap = tmap->pixmap(); - bitmap_ind8 &flagsbitmap = tmap->flagsmap(); - - if (line_t->alpha_mode[y] != 0) - { - u16 *src_s; - u8 *tsrc_s; - - x_index_fx = (sx+_x_offset[y]-(10*0x10000) + (10*line_t->x_zoom[y]))&((m_width_mask << 16)|0xffff); - y_index = ((y_index_fx >> 16)+_colscroll[y]) & 0x1ff; - - /* check tile status */ - visible_tile_check(line_t, y, x_index_fx, y_index, pf_data_n); - - /* If clipping enabled for this line have to disable 'all opaque' optimisation */ - if (line_t->clip_in[y] != 0x7fff0000 || line_t->clip_ex[y] != 0) - line_t->alpha_mode[y] &= ~0x80; - - /* set pixmap index */ - line_t->x_count[y]=x_index_fx & 0xffff; // Fractional part - line_t->src_s[y] = src_s = &srcbitmap.pix(y_index); - line_t->src_e[y] = &src_s[m_width_mask + 1]; - line_t->src[y] = &src_s[x_index_fx >> 16]; - - line_t->tsrc_s[y]=tsrc_s = &flagsbitmap.pix(y_index); - line_t->tsrc[y] = &tsrc_s[x_index_fx >> 16]; - } - - y_index_fx += _y_zoom[y] << 9; - y += y_inc; - } + return m_sprite_pri_row_usage[y] & (1 << layer.index); } - -void taito_f3_state::get_vram_info(tilemap_t *vram_tilemap, tilemap_t *pixel_tilemap, int sx, int sy) +inline bool taito_f3_state::used(const playfield_inf &layer, int y) const { - const f3_spritealpha_line_inf *sprite_alpha_line_t = &m_sa_line_inf[0]; - f3_playfield_line_inf *line_t = &m_pf_line_inf[4]; - - int y_start, y_end, y_inc; - int pri_base, inc; - - u8 line_enable; - - u16 pri = 0; - - const u16 vram_width_mask = 0x1ff; - - if (m_flipscreen) - { - pri_base = 0x73fe; - inc = -2; - y_start = 255; - y_end = -1; - y_inc = -1; - } - else - { - pri_base = 0x7200; - inc = 2; - y_start = 0; - y_end = 256; - y_inc = 1; - - } - - int y = y_start; - while (y != y_end) - { - /* The zoom, column and row values can latch according to control ram */ - { - if (m_line_ram[(0x0600 / 2) + y] & 0x2) - pri = (m_line_ram[pri_base / 2] & 0xffff); - } - - if (!pri || (!m_flipscreen && y < 24) || (m_flipscreen && y > 231) || - (pri & 0xc000) == 0xc000 || !(pri & 0x2000)/**/) - line_enable = 0; - else if (pri & 0x4000) //alpha1 - line_enable = 2; - else if (pri & 0x8000) //alpha2 - line_enable = 3; - else - line_enable = 1; - - line_t->pri[y] = pri; - - /* Evaluate clipping */ - if (pri & 0x0f00) - { - //fast path todo - remove line enable - calculate_clip(y, pri & 0x1ff0, line_t->clip_in[y], line_t->clip_ex[y], line_enable); - } - else - { - /* No clipping */ - line_t->clip_in[y] = 0x7fff0000; - line_t->clip_ex[y] = 0; - } - - line_t->x_zoom[y] = 0x10000; - line_t->alpha_mode[y] = line_enable; - if (line_t->alpha_mode[y] > 1) - line_t->alpha_mode[y] |= 0x10; - - pri_base += inc; - y += y_inc; - } - - sx &= 0x1ff; - - /* set pixmap pointer */ - bitmap_ind16 &srcbitmap_pixel = pixel_tilemap->pixmap(); - bitmap_ind8 &flagsbitmap_pixel = pixel_tilemap->flagsmap(); - bitmap_ind16 &srcbitmap_vram = vram_tilemap->pixmap(); - bitmap_ind8 &flagsbitmap_vram = vram_tilemap->flagsmap(); - - y = y_start; - while (y != y_end) - { - if (line_t->alpha_mode[y] != 0) - { - u16 *src_s; - u8 *tsrc_s; - - // These bits in control ram indicate whether the line is taken from - // the VRAM tilemap layer or pixel layer. - const bool usePixelLayer = ((sprite_alpha_line_t->sprite_alpha[y] & 0xa000) == 0xa000); - - /* set pixmap index */ - line_t->x_count[y] = 0xffff; - if (usePixelLayer) - line_t->src_s[y] = src_s = &srcbitmap_pixel.pix(sy & 0xff); - else - line_t->src_s[y] = src_s = &srcbitmap_vram.pix(sy & 0x1ff); - line_t->src_e[y] = &src_s[vram_width_mask + 1]; - line_t->src[y] = &src_s[sx]; - - if (usePixelLayer) - line_t->tsrc_s[y]=tsrc_s = &flagsbitmap_pixel.pix(sy & 0xff); - else - line_t->tsrc_s[y]=tsrc_s = &flagsbitmap_vram.pix(sy & 0x1ff); - line_t->tsrc[y] = &tsrc_s[sx]; - } - - sy++; - y += y_inc; - } + const int y_adj = m_flipscreen ? 0x1ff - layer.y_index(y) : layer.y_index(y); + return m_tilemap_row_usage[y_adj >> 4][layer.index + (2 * layer.alt_tilemap)] > 0; } -/******************************************************************************/ - void taito_f3_state::scanline_draw(bitmap_rgb32 &bitmap, const rectangle &cliprect) { - int i, ys, ye; - int y_start, y_end, y_start_next, y_end_next; - u8 draw_line[256] = {}; - s16 draw_line_num[256]; + auto prio = [](const auto &obj) -> u8 { return obj->prio; }; - u32 rot = 0; + // acquire sprite rendering layers, playfield tilemaps, playfield scroll + f3_line_inf line_data{}; + for (int i=0; i < NUM_SPRITEGROUPS; i++) { + new (&line_data.sp[i].bitmap) draw_source(&m_sprite_framebuffer); + line_data.sp[i].index = i; + } + for (int pf = 0; pf < NUM_PLAYFIELDS; ++pf) { + get_pf_scroll(pf, line_data.pf[pf].reg_sx, line_data.pf[pf].reg_sy); - if (m_flipscreen) - { - rot = ORIENTATION_FLIP_Y; - ys = 0; - ye = 232; + line_data.pf[pf].reg_fx_y = line_data.pf[pf].reg_sy; + line_data.pf[pf].width_mask = m_width_mask; + line_data.pf[pf].index = pf; } - else - { - ys = 24; - ye = 256; + if (m_flipscreen) { + line_data.pivot.reg_sx = m_control_1[4] - 12; + line_data.pivot.reg_sy = m_control_1[5]; + } else { + line_data.pivot.reg_sx = -m_control_1[4] - 5; + line_data.pivot.reg_sy = -m_control_1[5]; } - y_start = ys; - y_end = ye; - - while (1) - { - u8 alpha_mode_flag[5]; - u8 sprite_alpha_check; - u8 sprite_alpha_all_2a; - f3_playfield_line_inf *pf_line_inf = m_pf_line_inf.get(); - f3_spritealpha_line_inf *sa_line_inf = m_sa_line_inf.get(); - u8 sprite[6] = {}; - const f3_playfield_line_inf *line_t[5]; - - /* find same status of scanlines */ - u16 pri[5]; - pri[0] = pf_line_inf[0].pri[y_start]; - pri[1] = pf_line_inf[1].pri[y_start]; - pri[2] = pf_line_inf[2].pri[y_start]; - pri[3] = pf_line_inf[3].pri[y_start]; - pri[4] = pf_line_inf[4].pri[y_start]; - - u8 alpha_mode[5]; - alpha_mode[0] = pf_line_inf[0].alpha_mode[y_start]; - alpha_mode[1] = pf_line_inf[1].alpha_mode[y_start]; - alpha_mode[2] = pf_line_inf[2].alpha_mode[y_start]; - alpha_mode[3] = pf_line_inf[3].alpha_mode[y_start]; - alpha_mode[4] = pf_line_inf[4].alpha_mode[y_start]; - const u16 alpha_level = sa_line_inf[0].alpha_level[y_start]; - const u16 spri = sa_line_inf[0].spri[y_start]; - const u16 sprite_alpha = sa_line_inf[0].sprite_alpha[y_start]; - - draw_line[y_start] = 1; - draw_line_num[i = 0] = y_start; - y_start_next = -1; - y_end_next = -1; - for (int y = y_start + 1; y < y_end; y++) - { - if (!draw_line[y]) - { - if (pri[0] != pf_line_inf[0].pri[y]) y_end_next = y + 1; - else if (pri[1] != pf_line_inf[1].pri[y]) y_end_next = y + 1; - else if (pri[2] != pf_line_inf[2].pri[y]) y_end_next = y + 1; - else if (pri[3] != pf_line_inf[3].pri[y]) y_end_next = y + 1; - else if (pri[4] != pf_line_inf[4].pri[y]) y_end_next = y + 1; - else if (alpha_mode[0] != pf_line_inf[0].alpha_mode[y]) y_end_next = y + 1; - else if (alpha_mode[1] != pf_line_inf[1].alpha_mode[y]) y_end_next = y + 1; - else if (alpha_mode[2] != pf_line_inf[2].alpha_mode[y]) y_end_next = y + 1; - else if (alpha_mode[3] != pf_line_inf[3].alpha_mode[y]) y_end_next = y + 1; - else if (alpha_mode[4] != pf_line_inf[4].alpha_mode[y]) y_end_next = y + 1; - else if (alpha_level!=sa_line_inf[0].alpha_level[y]) y_end_next = y + 1; - else if (spri!=sa_line_inf[0].spri[y]) y_end_next = y + 1; - else if (sprite_alpha!=sa_line_inf[0].sprite_alpha[y]) y_end_next = y + 1; - else - { - draw_line[y] = 1; - draw_line_num[++i] = y; - continue; - } - - if (y_start_next < 0) y_start_next = y; - } + for (int screen_y = 0; screen_y != 256; screen_y += 1) { + const int y = m_flipscreen ? 255 - screen_y : screen_y; + read_line_ram(line_data, y); + line_data.y = screen_y; + + // some tilemap source selection depends on current line data + for (int pf_num = 0; pf_num < NUM_PLAYFIELDS; ++pf_num) { + auto &pf = line_data.pf[pf_num]; + int tmap_number = pf_num; + if (!m_extend && pf.alt_tilemap) + tmap_number += 2; + new (&pf.bitmap) draw_source(m_tilemap[tmap_number]); + // what is with this calculation... + pf.reg_fx_x = pf.reg_sx + pf.rowscroll; + pf.reg_fx_x += 10 * ((pf.x_scale) - (1<<8)); + } + if (line_data.pivot.use_pix()) { + new (&line_data.pivot.bitmap) draw_source(m_pixel_layer); + } else { + new (&line_data.pivot.bitmap) draw_source(m_vram_layer); } - y_end = y_end_next; - y_start = y_start_next; - draw_line_num[++i] = -1; - - /* alpha blend */ - alpha_mode_flag[0] = alpha_mode[0] & ~3; - alpha_mode_flag[1] = alpha_mode[1] & ~3; - alpha_mode_flag[2] = alpha_mode[2] & ~3; - alpha_mode_flag[3] = alpha_mode[3] & ~3; - alpha_mode_flag[4] = alpha_mode[4] & ~3; - alpha_mode[0] &= 3; - alpha_mode[1] &= 3; - alpha_mode[2] &= 3; - alpha_mode[3] &= 3; - alpha_mode[4] &= 3; - if (alpha_mode[0] > 1 || - alpha_mode[1] > 1 || - alpha_mode[2] > 1 || - alpha_mode[3] > 1 || - alpha_mode[4] > 1 || - (sprite_alpha & 0xff) != 0xff) - { - /* set alpha level */ - if (alpha_level != m_alpha_level_last) - { - const u8 a = BIT(alpha_level, 12, 4); - const u8 b = BIT(alpha_level, 8, 4); - const u8 c = BIT(alpha_level, 4, 4); - const u8 d = BIT(alpha_level, 0, 4); - - /* b000 7000 */ - u8 al_s = std::min(255, ((15 - d) * 256) / 8); - u8 al_d = std::min(255, ((15 - b) * 256) / 8); - m_alpha_level_3as = al_s; - m_alpha_level_3ad = al_d; - m_alpha_level_2as = al_d; - m_alpha_level_2ad = al_s; - - al_s = std::min(255, ((15 - c) * 256) / 8); - al_d = std::min(255, ((15 - a) * 256) / 8); - m_alpha_level_3bs = al_s; - m_alpha_level_3bd = al_d; - m_alpha_level_2bs = al_d; - m_alpha_level_2bd = al_s; - - alpha_set_level(); - m_alpha_level_last = alpha_level; - } - /* set sprite alpha mode */ - sprite_alpha_check = 0; - sprite_alpha_all_2a = 1; - m_dpix_sp[1] = nullptr; - m_dpix_sp[2] = nullptr; - m_dpix_sp[4] = nullptr; - m_dpix_sp[8] = nullptr; - for (i = 0; i < 4; i++) /* i = sprite priority offset */ - { - const u8 sprite_alpha_mode = (sprite_alpha >> (i * 2)) & 3; - const u8 sftbit = 1 << i; - if (m_sprite_pri_usage & sftbit) - { - if (sprite_alpha_mode == 1) - { - if (m_alpha_level_2as == 0 && m_alpha_level_2ad == 255) - m_sprite_pri_usage &= ~sftbit; // Disable sprite priority block - else - { - m_dpix_sp[sftbit] = m_dpix_n[2]; - sprite_alpha_check |= sftbit; - } - } - else if (sprite_alpha_mode == 2) - { - if (sprite_alpha & 0xff00) - { - if (m_alpha_level_3as == 0 && m_alpha_level_3ad == 255) m_sprite_pri_usage &= ~sftbit; - else - { - m_dpix_sp[sftbit] = m_dpix_n[3]; - sprite_alpha_check |= sftbit; - sprite_alpha_all_2a = 0; - } - } - else - { - if (m_alpha_level_3bs == 0 && m_alpha_level_3bd == 255) m_sprite_pri_usage &= ~sftbit; - else - { - m_dpix_sp[sftbit] = m_dpix_n[5]; - sprite_alpha_check |= sftbit; - sprite_alpha_all_2a = 0; - } + // set up line blend pixel and priority buffers + mix_pix line_buf{}; + pri_mode line_pri{}; + // background palette -- what contributions should this default to? + std::fill_n(line_buf.dst_pal, H_TOTAL, line_data.bg_palette); + std::fill_n(line_buf.dst_blend, H_TOTAL, 0xff); + // set an invalid blend mode as it affects mixing + std::fill_n(line_pri.src_blendmode, H_TOTAL, 0xff); + std::fill_n(line_pri.dst_blendmode, H_TOTAL, 0xff); + + // sort layers + std::array, + NUM_SPRITEGROUPS + NUM_PLAYFIELDS + 1> layers = { + &line_data.pivot, // this order seems ok for dariusg/gseeker/bubblem conflicts? + &line_data.sp[0], &line_data.pf[0], + &line_data.sp[3], &line_data.pf[3], + &line_data.sp[2], &line_data.pf[2], + &line_data.sp[1], &line_data.pf[1] + }; + std::stable_sort(layers.begin(), layers.end(), + [prio](auto a, auto b) -> bool { + return std::visit(prio, a) > std::visit(prio, b); + }); + + // draw layers to framebuffer (currently top to bottom) + if (screen_y >= cliprect.min_y && screen_y <= cliprect.max_y) { + for (auto gfx : layers) { + std::visit([this, &line_data, &line_buf, &line_pri](auto &&arg) { + const auto &layer = *arg; + if (layer.layer_enable() && used(layer, line_data.y)) { + const auto clip_ranges = calc_clip(line_data.clip, layer); + for (const auto &clip : clip_ranges) { + mix_line(layer, line_buf, line_pri, line_data, clip); } } - } - } - - /* check alpha level */ - for (i = 0; i < 5; i++) /* i = playfield num (pos) */ - { - const u8 alpha_type = (alpha_mode_flag[i] >> 4) & 3; - - if (alpha_mode[i] == 2) - { - if (alpha_type == 1) - { - /* if (m_alpha_level_2as == 0 && m_alpha_level_2ad == 255) - * alpha_mode[i]=3; alpha_mode_flag[i] |= 0x80; } - * will display continue screen in gseeker (mt 00026) */ - if (m_alpha_level_2as == 0 && m_alpha_level_2ad == 255) alpha_mode[i] = 0; - else if (m_alpha_level_2as == 255 && m_alpha_level_2ad == 0) alpha_mode[i] = 1; - } - else if (alpha_type == 2) - { - if (m_alpha_level_2bs == 0 && m_alpha_level_2bd == 255) alpha_mode[i] = 0; - else if (m_alpha_level_2as == 255 && m_alpha_level_2ad == 0 && - m_alpha_level_2bs == 255 && m_alpha_level_2bd == 0) alpha_mode[i] = 1; - } - else if (alpha_type == 3) - { - if (m_alpha_level_2as == 0 && m_alpha_level_2ad == 255 && - m_alpha_level_2bs == 0 && m_alpha_level_2bd == 255) alpha_mode[i] = 0; - else if (m_alpha_level_2as == 255 && m_alpha_level_2ad == 0 && - m_alpha_level_2bs == 255 && m_alpha_level_2bd == 0) alpha_mode[i] = 1; - } - } - else if (alpha_mode[i] == 3) - { - if (alpha_type == 1) - { - if (m_alpha_level_3as == 0 && m_alpha_level_3ad == 255) alpha_mode[i] = 0; - else if (m_alpha_level_3as == 255 && m_alpha_level_3ad == 0) alpha_mode[i] = 1; - } - else if (alpha_type == 2) - { - if (m_alpha_level_3bs == 0 && m_alpha_level_3bd == 255) alpha_mode[i] = 0; - else if (m_alpha_level_3as == 255 && m_alpha_level_3ad == 0 && - m_alpha_level_3bs == 255 && m_alpha_level_3bd == 0) alpha_mode[i] = 1; - } - else if (alpha_type == 3) - { - if (m_alpha_level_3as == 0 && m_alpha_level_3ad == 255 && - m_alpha_level_3bs == 0 && m_alpha_level_3bd == 255) alpha_mode[i] = 0; - else if (m_alpha_level_3as == 255 && m_alpha_level_3ad == 0 && - m_alpha_level_3bs == 255 && m_alpha_level_3bd == 0) alpha_mode[i] = 1; - } - } + }, gfx); } - - if ((alpha_mode[0] == 1 || alpha_mode[0] == 2 || !alpha_mode[0]) && - (alpha_mode[1] == 1 || alpha_mode[1] == 2 || !alpha_mode[1]) && - (alpha_mode[2] == 1 || alpha_mode[2] == 2 || !alpha_mode[2]) && - (alpha_mode[3] == 1 || alpha_mode[3] == 2 || !alpha_mode[3]) && - (alpha_mode[4] == 1 || alpha_mode[4] == 2 || !alpha_mode[4]) && - sprite_alpha_all_2a) - { - const u8 alpha_type = (alpha_mode_flag[0] | alpha_mode_flag[1] | alpha_mode_flag[2] | alpha_mode_flag[3]) & 0x30; - if ((alpha_type == 0x10 && m_alpha_level_2as == 255) || - (alpha_type == 0x20 && m_alpha_level_2as == 255 && m_alpha_level_2bs == 255) || - (alpha_type == 0x30 && m_alpha_level_2as == 255 && m_alpha_level_2bs == 255)) - { - if (alpha_mode[0] > 1) alpha_mode[0] = 1; - if (alpha_mode[1] > 1) alpha_mode[1] = 1; - if (alpha_mode[2] > 1) alpha_mode[2] = 1; - if (alpha_mode[3] > 1) alpha_mode[3] = 1; - if (alpha_mode[4] > 1) alpha_mode[4] = 1; - sprite_alpha_check = 0; - m_dpix_sp[1] = nullptr; - m_dpix_sp[2] = nullptr; - m_dpix_sp[4] = nullptr; - m_dpix_sp[8] = nullptr; - } - } - } - else - { - sprite_alpha_check = 0; - m_dpix_sp[1] = nullptr; - m_dpix_sp[2] = nullptr; - m_dpix_sp[4] = nullptr; - m_dpix_sp[8] = nullptr; - } - - /* set scanline priority */ - u8 layer_tmp[5]; - int count_skip_layer = 0; - { - int pri_max_opa = -1; - for (i = 0; i < 5; i++) /* i = playfield num (pos) */ - { - const u16 p0 = pri[i]; - const u8 pri_sl1 = p0 & 0x0f; - - layer_tmp[i] = i + (pri_sl1 << 3); - - if (!alpha_mode[i]) - { - layer_tmp[i] |= 0x80; - count_skip_layer++; - } - else if (alpha_mode[i] == 1 && (alpha_mode_flag[i] & 0x80)) - { - if (layer_tmp[i] > pri_max_opa) pri_max_opa = layer_tmp[i]; + if (TAITOF3_VIDEO_DEBUG == 1) { + if (y == 100) { + logerror("{pal: %x/%x, blend: %x/%x, prio: %x/%x}\n", + line_buf.src_pal[180], line_buf.dst_pal[180], + line_buf.src_blend[180], line_buf.dst_blend[180], + line_pri.src_prio[180], line_pri.dst_prio[180]); + logerror("-' [%hhu,%hhu,%hhu,%hhu] '------------------------- 100\n", line_data.blend[0], + line_data.blend[1], line_data.blend[2], line_data.blend[3]); } } - if (pri_max_opa != -1) - { - if (pri_max_opa > layer_tmp[0]) { layer_tmp[0] |= 0x80; count_skip_layer++; } - if (pri_max_opa > layer_tmp[1]) { layer_tmp[1] |= 0x80; count_skip_layer++; } - if (pri_max_opa > layer_tmp[2]) { layer_tmp[2] |= 0x80; count_skip_layer++; } - if (pri_max_opa > layer_tmp[3]) { layer_tmp[3] |= 0x80; count_skip_layer++; } - if (pri_max_opa > layer_tmp[4]) { layer_tmp[4] |= 0x80; count_skip_layer++; } - } + render_line(&bitmap.pix(screen_y), line_buf); } - /* sort layer_tmp */ - std::sort(std::begin(layer_tmp), std::end(layer_tmp), std::greater()); - - /* check sprite & layer priority */ - { - u8 pri_sp[5]; - - const u8 l0 = layer_tmp[0] >> 3; - const u8 l1 = layer_tmp[1] >> 3; - const u8 l2 = layer_tmp[2] >> 3; - const u8 l3 = layer_tmp[3] >> 3; - const u8 l4 = layer_tmp[4] >> 3; - - pri_sp[0] = spri & 0xf; - pri_sp[1] = (spri >> 4) & 0xf; - pri_sp[2] = (spri >> 8) & 0xf; - pri_sp[3] = spri >> 12; - - for (i = 0; i < 4; i++) /* i = sprite priority offset */ - { - const u8 sflg = 1 << i; - if (!(m_sprite_pri_usage & sflg)) continue; - u8 sp = pri_sp[i]; - - /* - sprite priority==playfield priority - GSEEKER (plane leaving hangar) --> sprite - BUBSYMPH (title) ---> sprite - DARIUSG (ZONE V' BOSS) ---> playfield - */ - - if (m_game == BUBSYMPH) sp++; //BUBSYMPH (title) - if (m_game == GSEEKER) sp++; //GSEEKER (plane leaving hangar) - - if ( sp > l0) sprite[0] |= sflg; - else if (sp <= l0 && sp > l1) sprite[1] |= sflg; - else if (sp <= l1 && sp > l2) sprite[2] |= sflg; - else if (sp <= l2 && sp > l3) sprite[3] |= sflg; - else if (sp <= l3 && sp > l4) sprite[4] |= sflg; - else if (sp <= l4 ) sprite[5] |= sflg; + if (screen_y != 0) { + // update registers + for (auto &pf : line_data.pf) { + pf.reg_fx_y += pf.y_scale; } } + } +} +/******************************************************************************/ - /* draw scanlines */ - bool alpha = false; - for (i = count_skip_layer; i < 5; i++) - { - const u8 pos = layer_tmp[i] & 7; - line_t[i] = &pf_line_inf[pos]; - - if (sprite[i] & sprite_alpha_check) alpha = true; - else if (!alpha) sprite[i] |= 0x100; - - if (alpha_mode[pos] > 1) - { - const u8 alpha_type = (((alpha_mode_flag[pos] >> 4) & 3) - 1) * 2; - m_dpix_lp[i] = m_dpix_n[alpha_mode[pos]+alpha_type]; - alpha = true; - } - else - { - if (alpha) m_dpix_lp[i] = m_dpix_n[1]; - else m_dpix_lp[i] = m_dpix_n[0]; +inline void taito_f3_state::f3_drawgfx(const tempsprite &sprite, const rectangle &cliprect) +{ + bitmap_ind16 &dest_bmp = m_sprite_framebuffer; + + gfx_element *gfx = m_gfxdecode->gfx(2); + const u8 *code_base = gfx->get_data(sprite.code % gfx->elements()); + + const u8 flipx = sprite.flip_x ? 0xF : 0; + const u8 flipy = sprite.flip_y ? 0xF : 0; + + fixed8 dy8 = (sprite.y); + if (!m_flipscreen) + dy8 += 255; // round up in non-flipscreen mode? + // maybe flipscreen coordinate adjustments should be done after all this math, during final rendering? + // y scaling testcases: elvactr mission # text (!flip), kaiserknj attract text (flip) + + for (u8 y = 0; y < 16; y++) { + const int dy = dy8 >> 8; + dy8 += sprite.scale_y; + if (dy < cliprect.min_y || dy > cliprect.max_y) + continue; + u16 *dest = &dest_bmp.pix(dy); + auto &usage = m_sprite_pri_row_usage[dy]; + const u8 *src = &code_base[(y ^ flipy) * 16]; + + fixed8 dx8 = (sprite.x) + 128; // 128 is ½ in fixed.8 + for (u8 x = 0; x < 16; x++) { + const int dx = dx8 >> 8; + dx8 += sprite.scale_x; + // is this necessary with the large margins outside visarea? + if (dx < cliprect.min_x || dx > cliprect.max_x) + continue; + if (dx == dx8 >> 8) // if the next pixel would be in the same column, skip this one + continue; + const u8 c = src[(x ^ flipx)] & m_sprite_pen_mask; + if (c && !dest[dx]) { + dest[dx] = gfx->colorbase() + (sprite.color<<4 | c); + usage |= 1<pen(gfx->colorbase() + gfx->granularity() * (color % gfx->colors())); - const u8 *code_base = gfx->get_data(code % gfx->elements()); + const u16 *spriteram16_ptr = m_spriteram.target(); + struct sprite_axis { + fixed8 block_scale = 1 << 8; + fixed8 pos = 0, block_pos = 0; + s16 global = 0, subglobal = 0; + void update(u8 scroll, u16 posw, bool multi, u8 block_ctrl, u8 new_zoom) { - /* compute sprite increment per screen pixel */ - int dx = (16 << 16) / scalex; - int dy = (16 << 16) / scaley; - - int ex = sx + scalex; - int ey = sy + scaley; - - int x_index_base; - int y_index; - - if (flipx) - { - x_index_base = (scalex - 1) * dx; - dx = -dx; - } - else - { - x_index_base = 0; + s16 new_pos = util::sext(posw, 12); + // set scroll offsets + if (BIT(scroll, 0)) + subglobal = new_pos; + if (BIT(scroll, 1)) + global = new_pos; + // add scroll offsets + if (!BIT(scroll, 3)) { + new_pos += global; + if (!BIT(scroll, 2)) + new_pos += subglobal; } - if (flipy) - { - y_index = (scaley - 1) * dy; - dy = -dy; - } - else - { - y_index = 0; - } - - if (sx < myclip.min_x) - { /* clip left */ - int pixels = myclip.min_x - sx; - sx += pixels; - x_index_base += pixels * dx; - } - if (sy < myclip.min_y) - { /* clip top */ - int pixels = myclip.min_y - sy; - sy += pixels; - y_index += pixels * dy; - } - /* NS 980211 - fixed incorrect clipping */ - if (ex > myclip.max_x + 1) - { /* clip right */ - int pixels = ex - myclip.max_x - 1; - ex -= pixels; - } - if (ey > myclip.max_y + 1) - { /* clip bottom */ - int pixels = ey - myclip.max_y - 1; - ey -= pixels; - } - if (ex > sx) - { /* skip if inner loop doesn't draw anything */ -// if (dest_bmp.bpp == 32) - { - for (int y = sy; y < ey; y++) - { - const u8 *source = code_base + (y_index >> 16) * 16; - u32 *dest = &dest_bmp.pix(y); - u8 *pri = &m_pri_alp_bitmap.pix(y); - - int x_index = x_index_base; - for (int x = sx; x < ex; x++) - { - int c = source[x_index >> 16] & m_sprite_pen_mask; - if (c) - { - const u8 p = pri[x]; - if (p == 0 || p == 0xff) - { - dest[x] = pal[c]; - pri[x] = pri_dst; - } - } - x_index += dx; - } - y_index += dy; - } + switch (block_ctrl) { + case 0b00: + if (!multi) { + block_pos = new_pos << 8; + block_scale = (0x100 - new_zoom); } + [[fallthrough]]; + case 0b10: + pos = block_pos; + break; + case 0b11: + pos += block_scale * 16; + break; } - } - } -} - -void taito_f3_state::get_sprite_info(const u16 *spriteram16_ptr) -{ - const auto calc_zoom = [](u16 &addition, u8 &addition_left, u8 block_zoom) - { - addition = 0x100 - block_zoom + addition_left; - addition_left = addition & 0xf; - addition = addition >> 4; - // zoom = addition << 12; + }; }; - - const rectangle &visarea = m_screen->visible_area(); - const int min_x = visarea.min_x, max_x = visarea.max_x; - const int min_y = visarea.min_y, max_y = visarea.max_y; - s16 global_x = 0, global_y = 0, subglobal_x = 0, subglobal_y = 0; // 12-bit signed values, extended to 16 bits - s16 block_x = 0, block_y = 0; - s16 last_x = 0, last_y = 0; - u8 block_zoom_x = 0, block_zoom_y = 0; - s16 this_x, this_y; // 12-bit signed values, extended to 16 bits - u16 y_addition = 16, x_addition = 16; + sprite_axis x, y; + u8 color = 0; bool multi = false; - u8 x_addition_left = 8, y_addition_left = 8; + const rectangle &visarea = m_screen->visible_area(); tempsprite *sprite_ptr = &m_spritelist[0]; - int total_sprites = 0; - u8 color = 0, last_color = 0; - bool flipx = 0, flipy = 0; - //int old_x = 0; - s16 y = 0, x = 0; - - u16 sprite_top = 0x2000; - for (int offs = 0; offs < sprite_top && (total_sprites < 0x400); offs += 8) - { - const int current_offs = offs; /* Offs can change during loop, current_offs cannot */ + for (int offs = 0; offs < 0x400 && (total_sprites < 0x400); offs++) { + total_sprites++; // prevent infinite loops + const int bank = m_sprite_bank ? 0x4000 : 0; + const u16 *spr = &spriteram16_ptr[bank + (offs * 8)]; - /* Check if the sprite list jump command bit is set */ - if ((spriteram16_ptr[current_offs + 6 + 0]) & 0x8000) - { - const u32 jump = (spriteram16_ptr[current_offs + 6 + 0]) & 0x3ff; + // Check if special command bit is set + if (BIT(spr[3], 15)) { + const u16 cntrl = spr[5]; + m_flipscreen = BIT(cntrl, 13); - const u32 new_offs = ((offs & 0x4000) | ((jump << 4) / 2)); - if (new_offs == offs) - break; - offs = new_offs - 8; - } + /* + ??f? ??dd ???? ??tb - /* Check if special command bit is set */ - if (spriteram16_ptr[current_offs + 2 + 1] & 0x8000) - { - const u16 cntrl = spriteram16_ptr[current_offs + 4 + 1]; - m_flipscreen = cntrl & 0x2000; - - /* cntrl & 0x1000 = disabled? (From F2 driver, doesn't seem used anywhere) - cntrl & 0x0010 = ??? - cntrl & 0x0020 = ??? - cntrl & 0x0002 = enabled when Darius Gaiden sprite trail effect should occur (MT #1922) - Notice that sprites also completely disappear due of a bug/missing feature in the - alpha routines. + cntrl bit 12(0x1000) = disabled? (From F2 driver, doesn't seem used anywhere) + cntrl bit 4 (0x0010) = ??? + cntrl bit 5 (0x0020) = ??? */ - m_sprite_extra_planes = (cntrl & 0x0300) >> 8; // 0 = 4bpp, 1 = 5bpp, 2 = unused?, 3 = 6bpp + m_sprite_extra_planes = BIT(cntrl, 8, 2); // 00 = 4bpp, 01 = 5bpp, 10 = nonsense, 11 = 6bpp m_sprite_pen_mask = (m_sprite_extra_planes << 4) | 0x0f; + m_sprite_trails = BIT(cntrl, 1); - /* Sprite bank select */ - if (cntrl & 1) - { - offs = offs | 0x4000; - sprite_top = sprite_top | 0x4000; + if (cntrl & 0b1101'1100'1111'1100) { + logerror("unknown sprite command bits: %4x\n", cntrl); } - } - /* Set global sprite scroll */ - if (((spriteram16_ptr[current_offs + 2 + 0]) & 0xf000) == 0xa000) - { - global_x = (spriteram16_ptr[current_offs + 2 + 0]) & 0xfff; - global_x = util::sext(global_x, 12); - global_y = spriteram16_ptr[current_offs + 2 + 1] & 0xfff; - global_y = util::sext(global_y, 12); + // Sprite bank select + m_sprite_bank = BIT(cntrl, 0); + } else { + if (spr[5] >> 1) { + logerror("unknown word 5 bits: %4x\n", spr[5]); + } } - /* And sub-global sprite scroll */ - if (((spriteram16_ptr[current_offs + 2 + 0]) & 0xf000) == 0x5000) - { - subglobal_x = (spriteram16_ptr[current_offs + 2 + 0]) & 0xfff; - subglobal_x = util::sext(subglobal_x, 12); - subglobal_y = spriteram16_ptr[current_offs + 2 + 1] & 0xfff; - subglobal_y = util::sext(subglobal_y, 12); + if (spr[3] & 0b0110'0000'0000'0000) { + logerror("unknown sprite y upper bits: %4x\n", spr[3]); } - - if (((spriteram16_ptr[current_offs + 2 + 0]) & 0xf000) == 0xb000) - { - subglobal_x = (spriteram16_ptr[current_offs + 2 + 0]) & 0xfff; - subglobal_x = util::sext(subglobal_x, 12); - subglobal_y = spriteram16_ptr[current_offs + 2 + 1] & 0xfff; - subglobal_y = util::sext(subglobal_y, 12); - global_y = subglobal_y; - global_x = subglobal_x; + if (spr[6] & 0b0111'1100'0000'0000) { + // landmakrj: 8BFF ? + logerror("unknown sprite jump bits: %4x\n", spr[6]); } - - /* A real sprite to process! */ - const int sprite = (spriteram16_ptr[current_offs + 0 + 0]) | ((spriteram16_ptr[current_offs + 4 + 1] & 1) << 16); - const u8 spritecont = spriteram16_ptr[current_offs + 4 + 0] >> 8; - -/* These games either don't set the XY control bits properly (68020 bug?), or - have some different mode from the others */ -#ifdef DARIUSG_KLUDGE - if (m_game == DARIUSG || m_game == GEKIRIDO || m_game == CLEOPATR || m_game == RECALH) - multi = spritecont & 0xf0; -#endif - - /* Check if this sprite is part of a continued block */ - if (multi) - { - /* Bit 0x4 is 'use previous colour' for this block part */ - if (spritecont & 0x4) color = last_color; - else color = (spriteram16_ptr[current_offs + 4 + 0]) & 0xff; - -#ifdef DARIUSG_KLUDGE - if (m_game == DARIUSG || m_game == GEKIRIDO || m_game == CLEOPATR || m_game == RECALH) - { - /* Adjust X Position */ - if ((spritecont & 0x40) == 0) - { - if (spritecont & 0x4) - x = block_x; - else - { - this_x = spriteram16_ptr[current_offs + 2 + 0] & 0xfff; - this_x = util::sext(this_x, 12); - - if ((spriteram16_ptr[current_offs + 2 + 0]) & 0x8000) - this_x += 0; - else if ((spriteram16_ptr[current_offs + 2 + 0]) & 0x4000) /* Ignore subglobal (but apply global) */ - this_x += global_x; - else /* Apply both scroll offsets */ - this_x += global_x + subglobal_x; - - block_x = this_x; - x = this_x; - } - x_addition_left = 8; - calc_zoom(x_addition, x_addition_left, block_zoom_x); - } - else if ((spritecont & 0x80) != 0) - { - x = last_x + x_addition; - calc_zoom(x_addition, x_addition_left, block_zoom_x); - } - - /* Adjust Y Position */ - if ((spritecont & 0x10) == 0) - { - if (spritecont & 0x4) - y = block_y; - else - { - this_y = spriteram16_ptr[current_offs + 2 + 1] & 0xfff; - this_y = util::sext(this_y, 12); - - if ((spriteram16_ptr[current_offs + 2 + 0]) & 0x8000) - this_y += 0; - else if ((spriteram16_ptr[current_offs + 2 + 0]) & 0x4000) /* Ignore subglobal (but apply global) */ - this_y += global_y; - else /* Apply both scroll offsets */ - this_y += global_y + subglobal_y; - - block_y = this_y; - y = this_y; - } - y_addition_left = 8; - calc_zoom(y_addition, y_addition_left, block_zoom_y); - } - else if ((spritecont & 0x20) != 0) - { - y = last_y + y_addition; - calc_zoom(y_addition, y_addition_left, block_zoom_y); - } - } - else -#endif - { - /* Adjust X Position */ - if ((spritecont & 0x40) == 0) - { - x = block_x; - x_addition_left = 8; - calc_zoom(x_addition, x_addition_left, block_zoom_x); - } - else if ((spritecont & 0x80) != 0) - { - x = last_x + x_addition; - calc_zoom(x_addition, x_addition_left, block_zoom_x); - } - /* Adjust Y Position */ - if ((spritecont & 0x10) == 0) - { - y = block_y; - y_addition_left = 8; - calc_zoom(y_addition, y_addition_left, block_zoom_y); - } - else if ((spritecont & 0x20) != 0) - { - y = last_y + y_addition; - calc_zoom(y_addition, y_addition_left, block_zoom_y); - } - /* Both zero = reread block latch? */ - } + if (spr[7] != 0) { + logerror("unknown sprite word 7: %4x\n", spr[7]); } - /* Else this sprite is the possible start of a block */ - else - { - color = (spriteram16_ptr[current_offs + 4 + 0]) & 0xff; - last_color = color; - - /* Sprite positioning */ - this_x = spriteram16_ptr[current_offs + 2 + 0] & 0xfff; - this_y = spriteram16_ptr[current_offs + 2 + 1] & 0xfff; - this_x = util::sext(this_x, 12); - this_y = util::sext(this_y, 12); - - /* Ignore both scroll offsets for this block */ - if ((spriteram16_ptr[current_offs + 2 + 0]) & 0x8000) - { - this_x += 0; - this_y += 0; - } - else if ((spriteram16_ptr[current_offs + 2 + 0]) & 0x4000) /* Ignore subglobal (but apply global) */ - { - this_x += global_x; - this_y += global_y; - } - else /* Apply both scroll offsets */ - { - this_x += global_x + subglobal_x; - this_y += global_y + subglobal_y; - } - - y = this_y; - block_y = this_y; - x = this_x; - block_x = this_x; - block_zoom_x = spriteram16_ptr[current_offs + 0 + 1]; - block_zoom_y = spriteram16_ptr[current_offs + 0 + 1] >> 8; + // Check if the sprite list jump bit is set + // we have to check this AFTER processing sprite commands because recalh uses a sprite command and jump in the same sprite + // i wonder if this should go after other sprite processsing as well? can a regular sprite have a jump ? + if (BIT(spr[6], 15)) { + const int new_offs = BIT(spr[6], 0, 10); + if (new_offs == offs) // could this be ≤ ? -- NO! RECALH USES BACKWARDS JUMPS!! + break; // optimization, edge cases to watch for: looped sprite block commands? - x_addition_left = 8; - calc_zoom(x_addition, x_addition_left, block_zoom_x); - - y_addition_left = 8; - calc_zoom(y_addition, y_addition_left, block_zoom_y); + offs = new_offs - 1; // subtract because we increment in the for loop } - /* These features are common to sprite and block parts */ - flipx = spritecont & 0x1; - flipy = spritecont & 0x2; - multi = spritecont & 0x8; - last_x = x; - last_y = y; - - if (!sprite) continue; - if (!x_addition || !y_addition) continue; - - if (m_flipscreen) - { - const int tx = 512 - x_addition - x; - const int ty = 256 - y_addition - y; - - if (tx + x_addition <= min_x || tx > max_x || ty + y_addition <= min_y || ty > max_y) continue; - sprite_ptr->x = tx; - sprite_ptr->y = ty; - sprite_ptr->flipx = !flipx; - sprite_ptr->flipy = !flipy; - } - else - { - if (x + x_addition <= min_x || x > max_x || y + y_addition <= min_y || y > max_y) continue; - sprite_ptr->x = x; - sprite_ptr->y = y; - sprite_ptr->flipx = flipx; - sprite_ptr->flipy = flipy; - } - - sprite_ptr->code = sprite; + const u8 spritecont = spr[4] >> 8; + const bool lock = BIT(spritecont, 2); + if (!lock) + color = spr[4] & 0xFF; + const u8 scroll_mode = BIT(spr[2], 12, 4); + const u16 zooms = spr[1]; + x.update(scroll_mode, spr[2] & 0xFFF, multi, BIT(spritecont, 4 + 2, 2), zooms & 0xFF); + y.update(scroll_mode, spr[3] & 0xFFF, multi, BIT(spritecont, 4 + 0, 2), zooms >> 8); + multi = BIT(spritecont, 3); + + const int tile = spr[0] | (BIT(spr[5], 0) << 16); + if (!tile) + continue; // todo: is this the correct way to tell if a sprite exists? + + const fixed8 tx = m_flipscreen ? (512<<8) - x.block_scale*16 - x.pos : x.pos; + const fixed8 ty = m_flipscreen ? (256<<8) - y.block_scale*16 - y.pos : y.pos; + + if (tx + x.block_scale*16 <= visarea.min_x<<8 || tx > visarea.max_x<<8 || ty + y.block_scale*16 <= visarea.min_y<<8 || ty > visarea.max_y<<8) + continue; + + const bool flip_x = BIT(spritecont, 0); + const bool flip_y = BIT(spritecont, 1); + + sprite_ptr->x = tx; + sprite_ptr->y = ty; + sprite_ptr->flip_x = m_flipscreen ? !flip_x : flip_x; + sprite_ptr->flip_y = m_flipscreen ? !flip_y : flip_y; + sprite_ptr->code = tile; sprite_ptr->color = color; - sprite_ptr->zoomx = x_addition; - sprite_ptr->zoomy = y_addition; - sprite_ptr->pri = (color & 0xc0) >> 6; + sprite_ptr->scale_x = x.block_scale; + sprite_ptr->scale_y = y.block_scale; + sprite_ptr->pri = BIT(color, 6, 2); sprite_ptr++; - total_sprites++; } m_sprite_end = sprite_ptr; } -void taito_f3_state::draw_sprites(bitmap_rgb32 &bitmap, const rectangle &cliprect) + +void taito_f3_state::draw_sprites(const rectangle &cliprect) { - const tempsprite *sprite_ptr; - gfx_element *sprite_gfx = m_gfxdecode->gfx(2); - - sprite_ptr = m_sprite_end; - m_sprite_pri_usage = 0; - - // if sprites use more than 4bpp, the bottom bits of the color code must be masked out. - // This fixes (at least) stage 1 battle ships and attract mode explosions in Ray Force. - - while (sprite_ptr != &m_spritelist[0]) - { - sprite_ptr--; - - const u8 pri = sprite_ptr->pri; - m_sprite_pri_usage |= 1 << pri; - - f3_drawgfx( - bitmap, cliprect, sprite_gfx, - sprite_ptr->code, - sprite_ptr->color & (~m_sprite_extra_planes), - sprite_ptr->flipx, sprite_ptr->flipy, - sprite_ptr->x, sprite_ptr->y, - sprite_ptr->zoomx, sprite_ptr->zoomy, - pri); + if (!m_sprite_trails) { + std::fill_n(m_sprite_pri_row_usage, 256, 0); + m_sprite_framebuffer.fill(0); + } + + for (const auto *spr = m_sprite_end; spr-- != &m_spritelist[0]; ) { + f3_drawgfx(*spr, cliprect); } } /******************************************************************************/ - u32 taito_f3_state::screen_update(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect) { - u32 sy_fix[5], sx_fix[5]; - machine().tilemap().set_flip_all(m_flipscreen ? (TILEMAP_FLIPY | TILEMAP_FLIPX) : 0); - /* Setup scroll */ - sy_fix[0] = ((m_control_0[4] & 0xffff) << 9) + (1 << 16); - sy_fix[1] = ((m_control_0[5] & 0xffff) << 9) + (1 << 16); - sy_fix[2] = ((m_control_0[6] & 0xffff) << 9) + (1 << 16); - sy_fix[3] = ((m_control_0[7] & 0xffff) << 9) + (1 << 16); - sx_fix[0] = ((m_control_0[0] & 0xffc0) << 10) - (6 << 16); - sx_fix[1] = ((m_control_0[1] & 0xffc0) << 10) - (10 << 16); - sx_fix[2] = ((m_control_0[2] & 0xffc0) << 10) - (14 << 16); - sx_fix[3] = ((m_control_0[3] & 0xffc0) << 10) - (18 << 16); - sx_fix[4] = -(m_control_1[4]) + 41; - sy_fix[4] = -(m_control_1[5] & 0x1ff); - - sx_fix[0]-=((m_control_0[0] & 0x003f) << 10) + 0x0400 - 0x10000; - sx_fix[1]-=((m_control_0[1] & 0x003f) << 10) + 0x0400 - 0x10000; - sx_fix[2]-=((m_control_0[2] & 0x003f) << 10) + 0x0400 - 0x10000; - sx_fix[3]-=((m_control_0[3] & 0x003f) << 10) + 0x0400 - 0x10000; - - if (m_flipscreen) - { - sy_fix[0] = 0x3000000 - sy_fix[0]; - sy_fix[1] = 0x3000000 - sy_fix[1]; - sy_fix[2] = 0x3000000 - sy_fix[2]; - sy_fix[3] = 0x3000000 - sy_fix[3]; - sx_fix[0] = -0x1a00000 - sx_fix[0]; - sx_fix[1] = -0x1a00000 - sx_fix[1]; - sx_fix[2] = -0x1a00000 - sx_fix[2]; - sx_fix[3] = -0x1a00000 - sx_fix[3]; - sx_fix[4] = -sx_fix[4] + 75; - sy_fix[4] = -sy_fix[4]; + bitmap.fill(0, cliprect); + + // TODO: presumably "sprite lag" is timing of sprite ram/framebuffer access. + if (m_sprite_lag == 0) { + get_sprite_info(); + draw_sprites(cliprect); + scanline_draw(bitmap, cliprect); + } else if (m_sprite_lag == 1) { + scanline_draw(bitmap, cliprect); + get_sprite_info(); + draw_sprites(cliprect); + } else { // 2 + scanline_draw(bitmap, cliprect); + draw_sprites(cliprect); + get_sprite_info(); } - m_pri_alp_bitmap.fill(0, cliprect); - - /* sprites */ - if (m_sprite_lag == 0) - get_sprite_info(m_spriteram.target()); - - /* Update sprite buffer */ - draw_sprites(bitmap, cliprect); - - /* Parse sprite, alpha & clipping parts of lineram */ - get_spritealphaclip_info(); - - /* Parse playfield effects */ - get_line_ram_info(m_tilemap[0], sx_fix[0], sy_fix[0], 0, m_pf_data[0]); - get_line_ram_info(m_tilemap[1], sx_fix[1], sy_fix[1], 1, m_pf_data[1]); - get_line_ram_info(m_tilemap[2], sx_fix[2], sy_fix[2], 2, m_pf_data[2]); - get_line_ram_info(m_tilemap[3], sx_fix[3], sy_fix[3], 3, m_pf_data[3]); - get_vram_info(m_vram_layer, m_pixel_layer, sx_fix[4], sy_fix[4]); - - /* Draw final framebuffer */ - scanline_draw(bitmap, cliprect); - - if (VERBOSE) - print_debug_info(bitmap); return 0; } diff --git a/src/mame/taito/taito_o.cpp b/src/mame/taito/taito_o.cpp index 33eeff0262f07..d03db1938506f 100644 --- a/src/mame/taito/taito_o.cpp +++ b/src/mame/taito/taito_o.cpp @@ -104,13 +104,13 @@ class taitoo_state : public driver_device required_device m_hopper; output_finder<32> m_lamps; - u16 m_hoppff = 0x0000; + u16 m_hopper_ff_state = 0x0000; u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); TIMER_DEVICE_CALLBACK_MEMBER(interrupt); u32 draw_sprites(bitmap_ind16 &bitmap, const rectangle &cliprect, u32 start_offset); void prg_map(address_map &map); - void taitoo_hopper_int_cb(int state); + void hopper_int_cb(int state); void taito_outa_w(offs_t offs, u16 data, u16 mem_mask); void taito_outb_w(offs_t offs, u16 data, u16 mem_mask); }; @@ -183,7 +183,7 @@ Bit 15 : ? machine().bookkeeping().coin_counter_w(2, BIT(data, 2)); // machine().bookkeeping().coin_counter_w(3, BIT(data, 3)); // Games m_hopper->motor_w(BIT(data, 9)); - //logerror("Port a:lines: data:%04x\n", data); + //logerror("Port a:lines: data:%04x\n", data); } } @@ -221,7 +221,7 @@ Bit 14 : paid lamp? (one short pulse after all is paid) */ for (u8 i = 0; i < 16; i++) m_lamps[i] = BIT(data, i); -// logerror("Port b:lamps: data:%04x\n", data); +// logerror("Port b:lamps: data:%04x\n", data); } @@ -287,7 +287,7 @@ static INPUT_PORTS_START( parentj ) // dip descriptions and defaults taken from dip sheet // NOTE: bit 0 = loc 8, bit 7 = loc 1 PORT_START("DSWA") - PORT_DIPNAME(0x01, 0x00, "Credits at start") PORT_DIPLOCATION("DSWA:8") + PORT_DIPNAME(0x01, 0x01, "Credits at start") PORT_DIPLOCATION("DSWA:8") PORT_DIPSETTING( 0x00, "500" ) PORT_DIPSETTING( 0x01, "0" ) PORT_DIPNAME(0x02, 0x02, "Key Up / Clear") PORT_DIPLOCATION("DSWA:7") @@ -419,12 +419,12 @@ TIMER_DEVICE_CALLBACK_MEMBER(taitoo_state::interrupt) } -void taitoo_state::taitoo_hopper_int_cb(int state) +void taitoo_state::hopper_int_cb(int state) { // Add a flip flop to coin_out sensor, to interrupt once per coin - if ((m_hoppff != state) && !state) + if ((m_hopper_ff_state != state) && !state) m_maincpu->set_input_line(6, HOLD_LINE); - m_hoppff = state; // keep ff state + m_hopper_ff_state = state; // keep ff state } void taitoo_state::taitoo(machine_config &config) @@ -456,7 +456,7 @@ void taitoo_state::taitoo(machine_config &config) m_tc0080vco->set_palette(m_palette); HOPPER(config, m_hopper, attotime::from_msec(100), TICKET_MOTOR_ACTIVE_HIGH, TICKET_STATUS_ACTIVE_HIGH); - m_hopper->dispense_handler().set(FUNC(taitoo_state::taitoo_hopper_int_cb)); + m_hopper->dispense_handler().set(FUNC(taitoo_state::hopper_int_cb)); SPEAKER(config, "mono").front_center(); diff --git a/src/mame/ti/cc40.cpp b/src/mame/ti/cc40.cpp index 37473c0865720..87930d83ae14d 100644 --- a/src/mame/ti/cc40.cpp +++ b/src/mame/ti/cc40.cpp @@ -131,6 +131,29 @@ class cc40_state : public driver_device virtual void device_post_load() override; private: + required_device m_maincpu; + required_device_array m_nvram; + required_memory_bank m_sysbank; + required_memory_bank m_cartbank; + required_device m_cart; + optional_device m_cass; + required_ioport_array<8> m_key_matrix; + output_finder<80> m_segs; + + memory_region *m_cart_rom; + + u8 m_bus_control = 0; + u8 m_power = 0; + u8 m_banks = 0; + u8 m_clock_control = 0; + u8 m_clock_divider = 0; + u8 m_key_select = 0; + + std::unique_ptr m_sysram[2]; + u16 m_sysram_size[2]; + u16 m_sysram_end[2]; + u16 m_sysram_mask[2]; + void init_sysram(int chip, u16 size); void update_lcd_indicator(u8 y, u8 x, int state); void update_clock_divider(); @@ -156,29 +179,6 @@ class cc40_state : public driver_device void cc40_map(address_map &map); void cc40p_map(address_map &map); - - required_device m_maincpu; - required_device_array m_nvram; - required_memory_bank m_sysbank; - required_memory_bank m_cartbank; - required_device m_cart; - optional_device m_cass; - required_ioport_array<8> m_key_matrix; - output_finder<80> m_segs; - - memory_region *m_cart_rom; - - u8 m_bus_control = 0; - u8 m_power = 0; - u8 m_banks = 0; - u8 m_clock_control = 0; - u8 m_clock_divider = 0; - u8 m_key_select = 0; - - std::unique_ptr m_sysram[2]; - u16 m_sysram_size[2]; - u16 m_sysram_end[2]; - u16 m_sysram_mask[2]; }; diff --git a/src/mame/ti/snspell.cpp b/src/mame/ti/snspell.cpp index 1feb4a779b287..bf8daa774dc4b 100644 --- a/src/mame/ti/snspell.cpp +++ b/src/mame/ti/snspell.cpp @@ -301,6 +301,14 @@ class snspell_state : public driver_device optional_device m_softlist; required_ioport_array<9> m_inputs; + u32 m_cart_max_size = 0; + u8 *m_cart_base = nullptr; + + bool m_power_on = false; + u32 m_r = 0; + u16 m_grid = 0; + u16 m_plate = 0; + void power_off(); void update_display(); @@ -312,14 +320,6 @@ class snspell_state : public driver_device void lantrans_write_r(u32 data); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); - - u32 m_cart_max_size = 0; - u8 *m_cart_base = nullptr; - - bool m_power_on = false; - u32 m_r = 0; - u16 m_grid = 0; - u16 m_plate = 0; }; void snspell_state::machine_start() diff --git a/src/mame/ti/snspellc.cpp b/src/mame/ti/snspellc.cpp index 183fbff9a04fe..371b68a1203a4 100644 --- a/src/mame/ti/snspellc.cpp +++ b/src/mame/ti/snspellc.cpp @@ -216,16 +216,16 @@ class snspellc_state : public driver_device required_ioport_array<10> m_inputs; output_finder<> m_power_on; + u8 *m_cart_base = nullptr; + u16 m_o = 0; + u32 m_r = 0; + void power_off(); virtual u8 read_k(); void write_o(u16 data); void write_r(u32 data); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); - - u8 *m_cart_base = nullptr; - u16 m_o = 0; - u32 m_r = 0; }; void snspellc_state::machine_start() @@ -263,10 +263,10 @@ class tntell_state : public snspellc_state optional_ioport m_overlay_inp; output_finder<5> m_overlay_out; + u8 m_overlay_code = 0; + u8 get_hexchar(const char c); TIMER_DEVICE_CALLBACK_MEMBER(get_overlay); - - u8 m_overlay_code = 0; }; void tntell_state::machine_start() diff --git a/src/mame/ti/spellb.cpp b/src/mame/ti/spellb.cpp index d5505569e1a2c..5e9c1b564c857 100644 --- a/src/mame/ti/spellb.cpp +++ b/src/mame/ti/spellb.cpp @@ -95,6 +95,14 @@ class spellb_state : public driver_device optional_device m_speaker; required_ioport_array<8> m_inputs; + bool m_power_on = false; + u32 m_r = 0; + u16 m_grid = 0; + u16 m_plate = 0; + u16 m_sub_o = 0; + u16 m_sub_r = 0; + u8 m_rev1_ctl = 0; + void power_off(); void power_subcpu(); void update_display(); @@ -111,14 +119,6 @@ class spellb_state : public driver_device void rev2_write_o(u16 data); void rev2_write_r(u32 data); - - bool m_power_on = false; - u32 m_r = 0; - u16 m_grid = 0; - u16 m_plate = 0; - u16 m_sub_o = 0; - u16 m_sub_r = 0; - u8 m_rev1_ctl = 0; }; void spellb_state::machine_start() diff --git a/src/mame/ti/ti74.cpp b/src/mame/ti/ti74.cpp index d8820e6ac4967..72893a7ac725a 100644 --- a/src/mame/ti/ti74.cpp +++ b/src/mame/ti/ti74.cpp @@ -110,6 +110,16 @@ class ti74_state : public driver_device virtual void machine_start() override; private: + required_device m_maincpu; + required_memory_bank m_sysbank; + required_device m_cart; + required_ioport_array<8> m_key_matrix; + required_ioport m_battery_inp; + output_finder<80> m_segs; + + u8 m_key_select = 0; + u8 m_power = 0; + void update_lcd_indicator(u8 y, u8 x, int state); void update_battery_status(int state); @@ -122,16 +132,6 @@ class ti74_state : public driver_device HD44780_PIXEL_UPDATE(ti74_pixel_update); HD44780_PIXEL_UPDATE(ti95_pixel_update); void main_map(address_map &map); - - required_device m_maincpu; - required_memory_bank m_sysbank; - required_device m_cart; - required_ioport_array<8> m_key_matrix; - required_ioport m_battery_inp; - output_finder<80> m_segs; - - u8 m_key_select = 0; - u8 m_power = 0; }; diff --git a/src/mame/tiger/bingobear.cpp b/src/mame/tiger/bingobear.cpp index a1819694c1bb3..1aa716e2dbd8c 100644 --- a/src/mame/tiger/bingobear.cpp +++ b/src/mame/tiger/bingobear.cpp @@ -72,16 +72,16 @@ class bingobear_state : public driver_device optional_device m_cart; required_ioport m_inputs; + bool m_power_on = false; + u16 m_inp_mux = 0; + u32 m_r = 0; + void power_off(); u8 read_k(); void write_o(u16 data); void write_r(u32 data); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); - - bool m_power_on = false; - u16 m_inp_mux = 0; - u32 m_r = 0; }; void bingobear_state::machine_start() diff --git a/src/mame/tiger/k28m2.cpp b/src/mame/tiger/k28m2.cpp index 2ad8525f92f3d..7150ff9ef5dd5 100644 --- a/src/mame/tiger/k28m2.cpp +++ b/src/mame/tiger/k28m2.cpp @@ -72,6 +72,11 @@ class k28m2_state : public driver_device required_ioport_array<9> m_inputs; output_finder<8> m_digits; + bool m_power_on = false; + u16 m_inp_mux = 0; + u32 m_r = 0; + u32 m_digit_data[4] = { }; + void power_off(); u8 read_k(); void write_o(u16 data); @@ -81,11 +86,6 @@ class k28m2_state : public driver_device void write_segs(offs_t offset, u32 data); DECLARE_DEVICE_IMAGE_LOAD_MEMBER(cart_load); - - bool m_power_on = false; - u16 m_inp_mux = 0; - u32 m_r = 0; - u32 m_digit_data[4] = { }; }; void k28m2_state::machine_start() diff --git a/src/mame/tiger/pylo.cpp b/src/mame/tiger/pylo.cpp index 7b54d1eb9b5b6..f7b324916dbc3 100644 --- a/src/mame/tiger/pylo.cpp +++ b/src/mame/tiger/pylo.cpp @@ -51,15 +51,15 @@ class pylo_state : public driver_device required_device m_speaker; required_ioport_array<6> m_inputs; + u8 m_inp_mux = 0; + u8 m_digit_data = 0; + u8 m_led_data = 0; + void update_display(); u8 input_r(); void input_w(u8 data); void digit_w(u8 data); void led_w(u8 data); - - u8 m_inp_mux = 0; - u8 m_digit_data = 0; - u8 m_led_data = 0; }; void pylo_state::machine_start() diff --git a/src/mame/tryom/chess.cpp b/src/mame/tryom/chess.cpp index d4abc1929159d..e9c1e99bd3f51 100644 --- a/src/mame/tryom/chess.cpp +++ b/src/mame/tryom/chess.cpp @@ -59,6 +59,12 @@ class chess_state : public driver_device required_device m_dac; required_ioport_array<5> m_inputs; + std::unique_ptr m_ram; + u8 m_ram_address = 0; + u8 m_ram_data = 0; + u8 m_inp_mux = 0; + u8 m_digit_data = 0; + void main_map(address_map &map); void main_io(address_map &map); @@ -71,12 +77,6 @@ class chess_state : public driver_device u8 p4_r(); void p5_w(u8 data); u8 p5_r(); - - std::unique_ptr m_ram; - u8 m_ram_address = 0; - u8 m_ram_data = 0; - u8 m_inp_mux = 0; - u8 m_digit_data = 0; }; void chess_state::machine_start() diff --git a/src/mame/tryom/omar.cpp b/src/mame/tryom/omar.cpp index 2ce19db6e146d..2929b2497e23c 100644 --- a/src/mame/tryom/omar.cpp +++ b/src/mame/tryom/omar.cpp @@ -60,6 +60,8 @@ class omar_state : public driver_device required_device m_dac; required_ioport_array<5> m_inputs; + u8 m_inp_mux = 0; + void main_map(address_map &map); void main_io(address_map &map); @@ -68,8 +70,6 @@ class omar_state : public driver_device void p4_w(u8 data); u8 p4_r(); void p5_w(u8 data); - - u8 m_inp_mux = 0; }; void omar_state::machine_start() diff --git a/src/mame/tvgames/micom_mahjong.cpp b/src/mame/tvgames/micom_mahjong.cpp index 89cd735ba45c3..4f1224da9bcc9 100644 --- a/src/mame/tvgames/micom_mahjong.cpp +++ b/src/mame/tvgames/micom_mahjong.cpp @@ -62,6 +62,8 @@ class mmahjong_state : public driver_device required_device m_dac; required_ioport_array<3> m_inputs; + u8 m_inp_matrix = 0; + TILE_GET_INFO_MEMBER(get_tile_info) { tileinfo.set(0, m_vram[tile_index], 0, 0); } u32 screen_update(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect); @@ -71,8 +73,6 @@ class mmahjong_state : public driver_device void input_w(u8 data); u8 input_r(); void sound_w(u8 data); - - u8 m_inp_matrix = 0; }; void mmahjong_state::machine_start() diff --git a/src/mame/ussr/debut.cpp b/src/mame/ussr/debut.cpp index 4a11b1ea0d89b..d85dac7c100b1 100644 --- a/src/mame/ussr/debut.cpp +++ b/src/mame/ussr/debut.cpp @@ -90,6 +90,10 @@ class debut_state : public driver_device output_finder<4> m_out_digit; required_ioport m_inputs; + u8 m_latch[5] = { }; + u8 m_dac_data = 0; + u8 m_lcd_update = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -99,10 +103,6 @@ class debut_state : public driver_device u8 input_r(offs_t offset); void latch_w(offs_t offset, u8 data); void lcd_update_w(int state); - - u8 m_latch[5] = { }; - u8 m_dac_data = 0; - u8 m_lcd_update = 0; }; void debut_state::machine_start() diff --git a/src/mame/ussr/im01.cpp b/src/mame/ussr/im01.cpp index 9067226ae2ea2..f5152f397926f 100644 --- a/src/mame/ussr/im01.cpp +++ b/src/mame/ussr/im01.cpp @@ -126,6 +126,9 @@ class im01_state : public driver_device required_device m_dac; required_ioport_array<6> m_inputs; + u16 m_inp_mux = 0; + u16 m_digit_data = 0; + void im01_map(address_map &map); void im01t_map(address_map &map); void im05_map(address_map &map); @@ -142,9 +145,6 @@ class im01_state : public driver_device u16 input_r(offs_t offset, u16 mem_mask); u16 inputa_r(offs_t offset, u16 mem_mask); void error_w(offs_t offset, u16 data, u16 mem_mask); - - u16 m_inp_mux = 0; - u16 m_digit_data = 0; }; void im01_state::machine_start() diff --git a/src/mame/ussr/intellect02.cpp b/src/mame/ussr/intellect02.cpp index 97ecd7a77aa33..7ea049e1ef23b 100644 --- a/src/mame/ussr/intellect02.cpp +++ b/src/mame/ussr/intellect02.cpp @@ -83,6 +83,9 @@ class intel02_state : public driver_device required_device m_beeper; required_ioport_array<2> m_inputs; + u8 m_digit_data = 0; + u8 m_led_select = 0; + // address maps void main_map(address_map &map); void main_io(address_map &map); @@ -92,9 +95,6 @@ class intel02_state : public driver_device u8 input_r(); void digit_w(u8 data); void control_w(u8 data); - - u8 m_digit_data = 0; - u8 m_led_select = 0; }; void intel02_state::machine_start() diff --git a/src/mame/wicat/t7000.cpp b/src/mame/wicat/t7000.cpp new file mode 100644 index 0000000000000..a223a7edf0daa --- /dev/null +++ b/src/mame/wicat/t7000.cpp @@ -0,0 +1,267 @@ +// license:BSD-3-Clause +// copyright-holders:AJR +/**************************************************************************** + + Preliminary driver for Wicat T7000 terminal. + + This fairly typical ASCII video display terminal was sold for use with + the Wicat System 100. It shows a basic 80x25 monochrome text display + with an optional status line, and supports the VT52 and ANSI command + sets. Keytronic Model L2207 is the specified keyboard. Settings can be + saved to nonvolatile memory by typing "PERM" (all caps) in Set-Up mode. + + Currently the cursor display and attributes are not provided due to + 8276 emulation not supporting the dual configuration used here. The + optional touch panel is also not supported. + +****************************************************************************/ + +#include "emu.h" + +#include "bus/rs232/rs232.h" +#include "cpu/z80/z80.h" +#include "machine/74259.h" +#include "machine/input_merger.h" +#include "machine/keytronic_l2207.h" +#include "machine/scn_pci.h" +#include "machine/x2212.h" +#include "video/i8275.h" + +#include "screen.h" + + +namespace { + +class t7000_state : public driver_device +{ +public: + t7000_state(const machine_config &mconfig, device_type type, const char *tag) + : driver_device(mconfig, type, tag) + , m_maincpu(*this, "maincpu") + , m_mainint(*this, "mainint") + , m_outlatch(*this, "outlatch") + , m_pci(*this, "pci%u", 0U) + , m_crtc(*this, "crtc%u", 0U) + , m_vram(*this, "vram") + , m_attr_vram(*this, "attr_vram", 0x4000, ENDIANNESS_LITTLE) + , m_vram_view(*this, "vram") + , m_chargen(*this, "chargen") + , m_vblint(false) + , m_attr_latch(0) + { + } + + void t7000(machine_config &config); + +protected: + virtual void machine_start() override; + +private: + I8275_DRAW_CHARACTER_MEMBER(display_character); + + void vram_w(offs_t offset, u8 data); + u8 vram_dma_r(offs_t offset); + void attr_latch_w(u8 data); + u8 vblint_status_r(); + void vblint_enable_w(int state); + void dma_enable_w(int state); + void vblint_w(int state); + void crtc_combined_w(offs_t offset, u8 data); + + void mem_map(address_map &map); + void io_map(address_map &map); + + required_device m_maincpu; + required_device m_mainint; + required_device m_outlatch; + required_device_array m_pci; + required_device_array m_crtc; + required_shared_ptr m_vram; + memory_share_creator m_attr_vram; + memory_view m_vram_view; + required_region_ptr m_chargen; + + bool m_vblint; + u8 m_attr_latch; +}; + +void t7000_state::machine_start() +{ + save_item(NAME(m_vblint)); + save_item(NAME(m_attr_latch)); +} + +I8275_DRAW_CHARACTER_MEMBER(t7000_state::display_character) +{ + u16 dots = vsp ? 0 : m_chargen[(charcode << 4) | linecount]; + + rgb_t fg = rgb_t::white(); + rgb_t bg = rgb_t::black(); + if (m_outlatch->q2_r()) + { + using std::swap; + swap(fg, bg); + } + + for (int i = 0; i < 10; i++) + { + bitmap.pix(y, x + i) = ((dots & 0x300) != 0) ? fg : bg; + dots <<= 1; + } +} + +void t7000_state::vram_w(offs_t offset, u8 data) +{ + m_vram[offset] = data; + m_attr_vram[offset] = m_attr_latch; +} + +u8 t7000_state::vram_dma_r(offs_t offset) +{ + u8 data = m_vram[offset]; + if (!machine().side_effects_disabled()) + { + m_crtc[0]->dack_w(data); + m_crtc[1]->dack_w(m_attr_vram[offset]); + } + return data; +} + +void t7000_state::attr_latch_w(u8 data) +{ + m_attr_latch = data; +} + +u8 t7000_state::vblint_status_r() +{ + // Only bit 5 is ever examined + return m_vblint ? 0x20 : 0x00; +} + +void t7000_state::vblint_enable_w(int state) +{ + if (!state && m_vblint) + { + m_vblint = false; + m_mainint->in_w<4>(0); + } +} + +void t7000_state::dma_enable_w(int state) +{ + if (state) + m_vram_view.select(0); + else + m_vram_view.disable(); +} + +void t7000_state::vblint_w(int state) +{ + if (state && m_outlatch->q0_r() && !m_vblint) + { + m_vblint = true; + m_mainint->in_w<4>(1); + } +} + +void t7000_state::crtc_combined_w(offs_t offset, u8 data) +{ + for (auto &crtc : m_crtc) + crtc->write(BIT(offset, 0), data); +} + +void t7000_state::mem_map(address_map &map) +{ + map(0x0000, 0x3fff).rom().region("program", 0); + map(0x4000, 0x7fff).ram().share(m_vram).w(FUNC(t7000_state::vram_w)); + map(0x4000, 0x7fff).view(m_vram_view); + m_vram_view[0](0x4000, 0x7fff).r(FUNC(t7000_state::vram_dma_r)); + map(0x8000, 0x803f).rw("novram", FUNC(x2210_device::read), FUNC(x2210_device::write)); +} + +void t7000_state::io_map(address_map &map) +{ + map.global_mask(0xff); + map(0x80, 0x80).r(FUNC(t7000_state::vblint_status_r)); + map(0xa1, 0xa1).nopr(); // touch panel status? + map(0xb0, 0xb1).w(FUNC(t7000_state::crtc_combined_w)); + map(0xb2, 0xb3).rw(m_crtc[0], FUNC(i8275_device::read), FUNC(i8275_device::write)); + map(0xb4, 0xb5).rw(m_crtc[1], FUNC(i8275_device::read), FUNC(i8275_device::write)); + map(0xc0, 0xc3).rw(m_pci[0], FUNC(scn_pci_device::read), FUNC(scn_pci_device::write)); + map(0xd0, 0xd3).rw(m_pci[1], FUNC(scn_pci_device::read), FUNC(scn_pci_device::write)); + map(0xe0, 0xe0).w(FUNC(t7000_state::attr_latch_w)); + map(0xf0, 0xf7).w("outlatch", FUNC(ls259_device::write_d0)); +} + +static INPUT_PORTS_START(t7000) +INPUT_PORTS_END + +void t7000_state::t7000(machine_config &config) +{ + Z80(config, m_maincpu, 4_MHz_XTAL); + m_maincpu->set_addrmap(AS_PROGRAM, &t7000_state::mem_map); + m_maincpu->set_addrmap(AS_IO, &t7000_state::io_map); + + INPUT_MERGER_ANY_HIGH(config, m_mainint).output_handler().set_inputline(m_maincpu, INPUT_LINE_IRQ0); + INPUT_MERGER_ALL_HIGH(config, "mainnmi").output_handler().set_inputline(m_maincpu, INPUT_LINE_NMI); + + X2210(config, "novram"); // U39 + + SCN2651(config, m_pci[0], 5.0688_MHz_XTAL); + m_pci[0]->txd_handler().set("serial", FUNC(rs232_port_device::write_txd)); + m_pci[0]->rts_handler().set("serial", FUNC(rs232_port_device::write_rts)); + m_pci[0]->dtr_handler().set("serial", FUNC(rs232_port_device::write_dtr)); + m_pci[0]->txrdy_handler().set(m_mainint, FUNC(input_merger_device::in_w<0>)); + m_pci[0]->rxrdy_handler().set(m_mainint, FUNC(input_merger_device::in_w<1>)); + + SCN2651(config, m_pci[1], 5.0688_MHz_XTAL); + m_pci[1]->txd_handler().set("keyboard", FUNC(keytronic_l2207_device::ser_in_w)); + m_pci[1]->txrdy_handler().set(m_mainint, FUNC(input_merger_device::in_w<2>)); + m_pci[1]->rxrdy_handler().set(m_mainint, FUNC(input_merger_device::in_w<3>)); + + KEYTRONIC_L2207(config, "keyboard").ser_out_callback().set(m_pci[1], FUNC(scn_pci_device::rxd_w)); + + LS259(config, m_outlatch); // U43 + m_outlatch->q_out_cb<0>().set(FUNC(t7000_state::vblint_enable_w)); + m_outlatch->q_out_cb<1>().set(FUNC(t7000_state::dma_enable_w)); + m_outlatch->q_out_cb<5>().set("novram", FUNC(x2210_device::recall)).invert(); + m_outlatch->q_out_cb<6>().set("mainnmi", FUNC(input_merger_device::in_w<0>)); + m_outlatch->q_out_cb<7>().set("novram", FUNC(x2210_device::store)); + + screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER)); + screen.set_color(rgb_t::green()); // "Phospher Type...P31-green (mediam persistence)" (manual p. 6-2) + screen.set_raw(19.6608_MHz_XTAL, 1020, 0, 800, 324, 0, 300); + screen.set_screen_update(m_crtc[0], FUNC(i8275_device::screen_update)); + + I8276(config, m_crtc[0], 19.6608_MHz_XTAL / 10); + m_crtc[0]->set_character_width(10); + m_crtc[0]->set_display_callback(FUNC(t7000_state::display_character)); + m_crtc[0]->drq_wr_callback().set("mainnmi", FUNC(input_merger_device::in_w<1>)); + m_crtc[0]->vrtc_wr_callback().set(FUNC(t7000_state::vblint_w)); + m_crtc[0]->set_screen("screen"); + + I8276(config, m_crtc[1], 19.6608_MHz_XTAL / 10); + m_crtc[1]->set_character_width(10); + m_crtc[1]->set_screen("screen"); + + rs232_port_device &serial(RS232_PORT(config, "serial", default_rs232_devices, nullptr)); + serial.rxd_handler().set(m_pci[0], FUNC(scn_pci_device::rxd_w)); + serial.cts_handler().set(m_pci[0], FUNC(scn_pci_device::cts_w)); + + // TODO: RS232C printer port ("same as above except SEND only") +} + +ROM_START(t7000) + ROM_REGION(0x4000, "program", 0) + ROM_LOAD("t7000_0_8-17-82.u35", 0x0000, 0x1000, CRC(d1645232) SHA1(cdc203942af5b8b3e6bd189c4c7121e480ce1e17)) // all Intel D2732A-3 or MBM2732A-30 + ROM_LOAD("t7000_1_8-17-82.u36", 0x1000, 0x1000, CRC(3441e9cc) SHA1(323d97308170ec6a52a64a60bb8d4554e11e9c12)) + ROM_LOAD("t7000_2_8-17-82.u37", 0x2000, 0x1000, CRC(43a50f3e) SHA1(ae25d3d586ff7027d326e7ce061523b435c2d651)) + ROM_LOAD("t7000_3_8-17-82.u38", 0x3000, 0x1000, CRC(d4ef7293) SHA1(e8c331f629c29d9441723dad9e01f7447638202d)) + + ROM_REGION(0x800, "chargen", 0) + ROM_LOAD("blank.u45", 0x000, 0x800, CRC(0fadcbc8) SHA1(b939b204e76b5d390814a3e575f5473b0a4cbf9d)) // MM2716Q-1 +ROM_END + +} // anonymous namespace + +SYST(1982, t7000, 0, 0, t7000, t7000, t7000_state, empty_init, "Wicat Systems", "T7000 Video Terminal", MACHINE_NOT_WORKING | MACHINE_IMPERFECT_GRAPHICS | MACHINE_SUPPORTS_SAVE) diff --git a/src/mame/skeleton/wicat.cpp b/src/mame/wicat/wicat.cpp similarity index 100% rename from src/mame/skeleton/wicat.cpp rename to src/mame/wicat/wicat.cpp diff --git a/src/mame/yamaha/ymmu80.cpp b/src/mame/yamaha/ymmu80.cpp index 0568d0589f0b5..cb73283ab5673 100644 --- a/src/mame/yamaha/ymmu80.cpp +++ b/src/mame/yamaha/ymmu80.cpp @@ -381,7 +381,8 @@ void mu80_state::mu80(machine_config &config) ROM_START( mu80 ) ROM_REGION( 0x80000, "mu80cpu", 0 ) - ROM_LOAD16_WORD_SWAP( "yamaha_mu80.bin", 0x000000, 0x080000, CRC(c31074c0) SHA1(a11bd4523cd8ff1e1744078c3b4c18112b73c61e) ) + // v1.04, Dec. 04, 1994 + ROM_LOAD16_WORD_SWAP( "xq556a0.ic8", 0x000000, 0x080000, CRC(c31074c0) SHA1(a11bd4523cd8ff1e1744078c3b4c18112b73c61e) ) ROM_REGION16_LE( 0x800000, "swp20", 0 ) ROM_LOAD( "xq012b0-822.bin", 0x000000, 0x200000, CRC(cb454418) SHA1(43dab164de5497df9203a1ac9e7ece478276e46d)) diff --git a/src/mame/yamaha/ympsr150.cpp b/src/mame/yamaha/ympsr150.cpp index 68ead6ce70d0c..75a98f7eb94ee 100644 --- a/src/mame/yamaha/ympsr150.cpp +++ b/src/mame/yamaha/ympsr150.cpp @@ -130,7 +130,7 @@ class psr150_state : public driver_device required_device m_maincpu; optional_device m_pwm; - optional_device m_lcdc; + optional_device m_lcdc; optional_ioport_array<6> m_port; optional_ioport_array<19> m_keys; @@ -429,7 +429,7 @@ void psr150_state::psr190_base(machine_config &config) m_maincpu->port_in_cb<2>().set_ioport("PC_R"); m_maincpu->port_out_cb<2>().set_ioport("PC_W"); - HD44780(config, m_lcdc, 250'000); // TODO: clock not measured, datasheet typical clock used + KS0066(config, m_lcdc, 270'000); // OSC = 91K resistor, TODO: actually KS0076B-00 m_lcdc->set_lcd_size(2, 8); screen_device& screen(SCREEN(config, "screen", SCREEN_TYPE_SVG)); diff --git a/src/mame/yamaha/ympsr260.cpp b/src/mame/yamaha/ympsr260.cpp index 14fe762c02763..cfdb63781bdf0 100644 --- a/src/mame/yamaha/ympsr260.cpp +++ b/src/mame/yamaha/ympsr260.cpp @@ -5,6 +5,13 @@ Skeleton driver for Yamaha YMW728-F (GEW12) keyboards + TODO: + - according to schematics, CPU XTAL is 14MHz, but that makes it run too fast. + When comparing boot-up scroll speed to a video, it should be around 8MHz, + 7MHz (14/2) is too slow. + Increasing tick_rate in gew12.cpp will improve scroll speed, but it won't fix + graphics glitches due to writing to LCD before the busy flag is cleared. + */ #include "emu.h" @@ -39,7 +46,7 @@ class psr260_state : public driver_device void palette_init(palette_device& palette); required_device m_maincpu; - optional_device m_lcdc; + required_device m_lcdc; optional_ioport_array<11> m_keys; optional_ioport_array<6> m_buttons; @@ -76,17 +83,15 @@ void psr260_state::palette_init(palette_device& palette) void psr260_state::psr260(machine_config &config) { - GEW12(config, m_maincpu, 14'000'000); + GEW12(config, m_maincpu, 8'000'000); // see TODO m_maincpu->port_out_cb<5>().set(FUNC(psr260_state::lcd_w)); // TODO: MIDI in/out // LCD - HD44780(config, m_lcdc, 250'000); // TODO: clock not measured, datasheet typical clock used + KS0066(config, m_lcdc, 270'000); // OSC = 91K resistor, TODO: actually KS0066U-10B m_lcdc->set_lcd_size(2, 8); m_lcdc->set_pixel_update_cb(FUNC(psr260_state::lcd_update)); - // code never checks the busy flag, it just delays for a fixed amount and assumes it's ready - m_lcdc->set_busy_factor(0.5f); // screen (for testing only) // TODO: the actual LCD with custom segments diff --git a/src/mame/yamaha/ympsr540.cpp b/src/mame/yamaha/ympsr540.cpp index 34831baadfc75..c6183eb783d1d 100644 --- a/src/mame/yamaha/ympsr540.cpp +++ b/src/mame/yamaha/ympsr540.cpp @@ -53,7 +53,7 @@ void psr540_state::map(address_map &map) { map(0x0000000, 0x003ffff).ram().share(m_boot).unmapw(); map(0x0400000, 0x07fffff).rom().region("program_rom", 0); - map(0x1000000, 0x13fffff).ram(); // dram + map(0x1000000, 0x13fffff).ram(); // dram } static INPUT_PORTS_START( psr540 ) @@ -64,8 +64,8 @@ ROM_START( psr540 ) ROM_LOAD16_WORD_SWAP( "xw25320.ic310", 0, 0x400000, CRC(e8d29e49) SHA1(079e0ccf6cf5d5bd2d2d82076b09dd702fcd1421)) ROM_REGION16_LE( 0x600000, "swx00", 0) - ROM_LOAD16_WORD_SWAP( "xw25320.ic310", 0, 0x400000, CRC(c7c4736d) SHA1(ff1052eb076557071ed8652e6c2fc0925144fbd5)) - ROM_LOAD16_WORD_SWAP( "xw25320.ic310", 0, 0x200000, CRC(9ef56c4e) SHA1(f26b588f9bcfd7bdbf1c0b38e4a1ea57e2f29f10)) + ROM_LOAD16_WORD_SWAP( "xw25410.ic210", 0, 0x400000, CRC(c7c4736d) SHA1(ff1052eb076557071ed8652e6c2fc0925144fbd5)) + ROM_LOAD16_WORD_SWAP( "xw25520.ic220", 0, 0x200000, CRC(9ef56c4e) SHA1(f26b588f9bcfd7bdbf1c0b38e4a1ea57e2f29f10)) ROM_END - + SYST( 1999, psr540, 0, 0, psr540, psr540, psr540_state, empty_init, "Yamaha", "PSR540", MACHINE_IS_SKELETON )