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decode.c
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decode.c
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static char RcsHeader[] = "$Header: /usr/home/nakashim/proj-arm64/src/csim/RCS/decode.c,v 1.109 2022/10/11 08:06:49 nakashim Exp nakashim $";
/* ARM Instruction Simulator */
/* Copyright (C) 2007 by NAIST. */
/* Primary writer: Y.Nakashima */
/* nakashim@is.naist.jp */
/* decode.c 2005/3/22 */
/* armi[Q_ARMI] から hst1[Q_HSTC] へ */
#include "csim.h"
insn_decode(tid, mc, pc, i, rob) Uint tid, mc, pc; union armf i; struct rob *rob;
{
/* return 0:normal end, 1:continue (ex. LDP/STP), 2:error */
Uint cid = tid2cid(tid);
Uint robid = rob-&c[cid].rob[0];
Uint s, rm, obits, bits;
Uint s1, s2, s3, v0, v1;
int j, k, l;
rob->stat = ROB_MAPPED;
rob->term = 1;
rob->tid = tid;
rob->pc = pc;
rob->target = pc+4;
rob->bpred = 0; /* not taken */
rob->cond = 14; /* always */
rob->sop = 0;
rob->ptw = 0;
rob->size = 0;
rob->idx = 0;
rob->rep = 0;
rob->dir = 0;
rob->iinv = 0; /* invert operand2 */
rob->oinv = 0; /* invert result */
rob->dbl = 0; /* 0:single, 1:double */
rob->plus = 0; /* EAG */
rob->pre = 0; /* EAG */
rob->wb = 0; /* EAG */
rob->updt = 0; /* update CC */
rob->sr[0].t = 0; /* src1 */
rob->sr[1].t = 0; /* src2 */
rob->sr[2].t = 0; /* src3 */
rob->sr[3].t = 0; /* aux-src */
rob->sr[4].t = 0; /* aux-src */
rob->sr[5].t = 0; /* in-cc for conditional exec */
rob->dr[1].t = 0; /* out-reg */
rob->dr[1].p = robid;
rob->dr[1].mask[0] = 0x00000000;
rob->dr[1].val[0] = 0x00000000;
rob->dr[1].mask[1] = 0x00000000;
rob->dr[1].val[1] = 0x00000000;
rob->dr[2].t = 0;
rob->dr[2].p = robid;
rob->dr[2].mask[0] = 0x00000000;
rob->dr[2].val[0] = 0x00000000;
rob->dr[2].mask[1] = 0x00000000;
rob->dr[2].val[1] = 0x00000000;
rob->dr[3].t = 0; /* out-cc */
rob->dr[3].p = robid;
rob->dr[3].mask[0] = 0x00000000;
rob->dr[3].val[0] = 0x00000000;
rob->dr[3].mask[1] = 0x00000000;
rob->dr[3].val[1] = 0x00000000;
rob->ls_addr = 0;
rob->stbf.t = 0;
/* 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 */
/* 1 0 0 1 0 0 0 0 0 0 1 1 1 1 1 1 stlxr */
/* 1 0 0 1 0 0 0 0 1 0 1 1 1 1 1 1 1 1 1 1 1 ldaxr */
/* 0 1 0 1 0 and_shifted */
/* 0 1 0 1 1 0 add_sub_shifted */
/* 0 1 0 1 1 0 0 1 add_sub_extreg */
/* 1 0 1 0 0 ldp_stp */
/* 1 0 1 1 0 ldp_stp(simd&fp) */
/* 0 0 0 1 1 0 0 0 ld1_st1_mult */
/* 0 0 0 1 1 0 1 ld1_st1_sing x x x */
/* 0 0 0 1 1 0 1 ld1_st1_(repl) 1 1 0 */
/* 0 0 0 1 1 1 0 0 0 0 0 0 0 0 0 1 dup_vec */
/* 0 0 0 1 1 1 0 0 0 0 0 0 0 0 1 1 dup_general */
/* 0 1 0 0 1 1 1 0 0 0 0 0 0 0 1 1 1 mov/ins */
/* 0 0 0 1 1 1 0 0 0 0 0 0 1 1 1 1 mov/umov */
/* 0 0 0 1 1 1 0 1 0 0 0 1 1 1 and/orr(vector) */
/* 0 0 0 1 1 1 0 1 0 0 0 0 1 0 0 1 0 1 0 xtn,xtn2 */
/* 0 0 1 1 1 0 1 0 1 1 0 1 maxmin */
/* 0 0 1 1 1 0 1 1 0 0 0 0 1 add/sub(vector) */
/* 0 0 1 1 1 0 1 1 0 0 1 0 1 mla/mls(vector) */
/* 0 0 1 1 1 0 1 1 1 0 1 0 1 fadd(vector) */
/* 0 0 0 1 1 1 0 1 1 1 0 0 1 1 fmla(vector) */
/* 0 0 1 1 1 0 1 1 0 0 0 1 1 cmtst/eq(vector) */
/* 0 0 1 1 1 0 1 0 0 1 1 0 1 cmgt/hi(vector) */
/* 0 0 1 1 1 0 1 0 0 1 1 1 1 cmge/hs(vector) */
/* 0 1 0 1 1 1 0 1 0 0 0 1 1 1 bitwise(eor/bsl/bit/bif) */
/* 0 1 0 1 1 1 0 0 1 1 1 0 1 1 1 fmul(vector) */
/* 0 0 1 1 1 1 0 0 0 0 0 0 1 movi */
/* 0 0 1 1 1 1 0 -immh!=0-- 0 0 0 0 0 1 sshr,ushr(vector) */
/* 0 0 1 1 1 1 0 -immh!=0-- 1 0 1 0 0 1 ushll,ushll2 */
/* 1 0 0 0 0 adr */
/* 1 0 0 0 1 add_sub_imm */
/* 1 0 0 1 0 0 and_imm */
/* 1 0 0 1 0 1 mov */
/* 1 0 0 1 1 0 sft_imm */
/* 0 0 1 0 0 1 1 1 0 ror_imm */
/* 0 0 1 0 1 bl */
/* 0 1 1 0 1 0 cbz */
/* 0 1 1 0 1 1 tbz */
/* 0 1 0 1 0 1 0 0 b_cond 0 */
/* 1 1 0 1 0 1 0 0 0 0 0 svc 0 0 0 0 1 */
/* 1 1 0 1 0 1 1 0 0 1 1 1 1 1 0 0 0 0 0 0 blr 0 0 0 0 0 */
/* 0 1 1 0 0 0 ldr_str_literal */
/* 1 1 1 0 0 0 1 ldr_str_reg 1 0 */
/* 1 1 1 1 0 0 1 ldr_str_reg(simd) 1 0 */
/* 1 1 1 0 0 0 0 ldr_str_unsc 0 0 */
/* 1 1 1 0 0 0 0 ldr_str_imm(post) 0 1 */
/* 1 1 1 0 0 0 0 ldr_str_imm(pre) 1 1 */
/* 1 1 1 0 0 1 ldr_str_imm(uns) */
/* 1 1 0 1 0 0 0 0 adc_sbc 0 0 0 0 0 0 */
/* 1 1 1 0 1 0 0 1 0 ccm 0 */
/* 0 1 1 0 1 0 1 0 0 csel 0 */
/* 0 0 1 1 0 1 0 1 1 0 sft_reg 0 0 1 0 */
/* 1 0 0 1 1 0 1 0 1 1 0 0 0 0 0 1 0 udiv */
/* 1 0 0 1 1 0 1 0 1 1 0 0 0 0 0 1 1 sdiv */
/* 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 0 rev */
/* 1 0 1 1 0 1 0 1 1 0 0 0 0 0 0 0 0 0 1 0 cls */
/* 0 0 1 1 0 1 1 0 0 0 mad */
/* 1 0 0 1 1 0 1 1 0 1 mad */
/* 1 0 0 1 1 0 1 1 0 1 0 0 1 1 1 1 1 smulh */
/* 1 0 0 1 1 0 1 1 1 1 0 0 1 1 1 1 1 umulh */
/* 0 1 1 1 0 0 ldr_str_literal(simd&fp) */
/* 1 1 1 1 0 0 1 0 ldur(simd&fp) 0 0 */
/* 1 1 1 1 0 0 0 ldr_str_imm(post,simd&fp) 0 1 */
/* 1 1 1 1 0 0 0 ldr_str_imm(pre,simd&fp) 1 1 */
/* 1 1 1 1 0 1 ldr_str_imm(uns,simd&fp) */
/* 0 0 1 1 1 1 0 1 fmov(general) 0 0 0 0 0 0 */
/* 0 0 0 1 1 1 1 0 1 fmov(scalar,immediate) 1 0 0 0 0 0 0 0 */
/* 0 0 0 1 1 1 1 0 1 fadds 0 0 1 1 0 */
/* 0 0 0 1 1 1 1 0 1 fmul(scalar) 0 0 0 1 0 */
/* 0 0 0 1 1 1 1 0 1 fdiv(scalar) 0 0 0 1 1 0 */
/* 0 0 0 1 1 1 1 0 0 x 1 0 0 1 0 0 0 fcmp 0 x 0 0 0 */
/* 0 0 0 1 1 1 1 0 0 x 1 0 0 1 0 0 0 fcmpe 1 x 0 0 0 */
/* 0 0 0 1 1 1 1 0 0 x 1 0 0 0 0 1 0 0 0 0 fmov(register) */
/* 0 0 0 1 1 1 1 0 1 0 0 0 1 1 0 0 0 0 fcvt(scalar) */
/* 0 0 0 1 1 1 1 0 0 x 1 0 0 1 0 1 0 1 0 0 0 0 frintm(scalar) */
/* 0 1 1 1 1 1 0 1 1 0 0 0 0 1 add/sub(scalar) */
/* 0 1 1 1 1 1 0 1 1 1 1 0 0 0 1 1 cmtst/eq(scalar) */
/* 0 1 1 1 1 1 0 1 1 1 0 0 1 1 0 1 cmgt/hi(scalar) */
/* 0 1 1 1 1 1 0 1 1 1 0 0 1 1 1 1 cmge/hs(scalar) */
/* 0 0 0 1 1 1 1 1 fmadd */
/* 0 1 1 1 1 1 1 0 -immh!=0-- 0 0 0 0 0 1 sshr,ushr(scalar) */
/* 0 1 0 1 1 1 1 1 0 -immh!=0-- 0 1 0 1 0 1 shl(scalar) */
if (i.adr.op28_24==0x10) { /* C6.6.9 ADR, C6.6.10 ADRP */
Ull offset = i.adr.op ? (Sll)(((Ull)i.adr.immhi<<45)|((Ull)i.adr.immlo<<43))>>31 : (Sll)(((Ull)i.adr.immhi<<45)|((Ull)i.adr.immlo<<43))>>43;
rob->type = 0; /* ALU */
rob->opcd = 4; /* ADD */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = 1; /* always 64bit */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = 1; /* PC */
rob->sr[0].x = 0; /* renamig N.A. */
rob->sr[0].n = i.adr.op ? pc&0xfffff000 : pc; /* PC */
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = offset;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
/* dest */
rob->dr[1].t = 1;
rob->dr[1].n = i.adr.rd;
t[tid].map[i.adr.rd].x = 1;
t[tid].map[i.adr.rd].rob = robid;
return (0);
}
else if (i.add_sub_imm.op28_24==0x11) { /* C6.6.4 ADD(immediate), C6.6.7 ADDS(immediate), C6.6.42 CMN(immediate), C6.6.45 CMP(immediate), C6.6.121 MOV(to/from SP), C6.6.195 SUB(immediate), C6.6.198 SUBS(immediate) */
rob->type = 0; /* ALU */
rob->opcd = i.add_sub_imm.op==0?4:2; /* ADD/SUB */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.add_sub_imm.sf; /* 0:add32, 1:add64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = i.add_sub_imm.S;
rob->sr[0].t = !t[tid].map[i.add_sub_imm.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.add_sub_imm.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = t[tid].map[i.add_sub_imm.rn].x; /* reg */
rob->sr[0].n = !t[tid].map[i.add_sub_imm.rn].x ? i.add_sub_imm.rn : t[tid].map[i.add_sub_imm.rn].rob;
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = i.add_sub_imm.shift==0?(Ull)i.add_sub_imm.imm12:(Ull)(i.add_sub_imm.imm12<<12);
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
/* dest */
if (i.add_sub_imm.rd!=31 || !i.add_sub_imm.S) {
rob->dr[1].t = 1;
rob->dr[1].n = i.add_sub_imm.rd;
t[tid].map[i.add_sub_imm.rd].x = 1;
t[tid].map[i.add_sub_imm.rd].rob = robid;
}
if (i.add_sub_imm.S) {
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
}
return (0);
}
else if (i.adc_sbc.op28_21==0xd0 && i.adc_sbc.op15_10==0) { /* C6.6.1 ADC, C6.6.2 ADCS, C6.6.137 NGC, C6.6.138 NGCS, C6.6.155 SBC, C6.6.156 SBCS */
rob->type = 0; /* ALU */
rob->opcd = i.adc_sbc.op==0?5:6; /* ADC/SBC */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.adc_sbc.sf; /* 0:adc32, 1:adc64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = i.adc_sbc.S;
rob->sr[0].t = i.adc_sbc.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.adc_sbc.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.adc_sbc.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.adc_sbc.rn==31 ? 0 : /* ZERO */
t[tid].map[i.adc_sbc.rn].x; /* reg */
rob->sr[0].n = i.adc_sbc.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.adc_sbc.rn].x ? i.adc_sbc.rn : t[tid].map[i.adc_sbc.rn].rob;
rob->sr[1].t = i.adc_sbc.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.adc_sbc.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.adc_sbc.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.adc_sbc.rm==31 ? 0 : /* ZERO */
t[tid].map[i.adc_sbc.rm].x; /* reg */
rob->sr[1].n = i.adc_sbc.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.adc_sbc.rm].x ? i.adc_sbc.rm : t[tid].map[i.adc_sbc.rm].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
rob->sr[5].t = !t[tid].map[CPSREGTOP].x ? 2 : (c[cid].rob[t[tid].map[CPSREGTOP].rob].stat>=ROB_COMPLETE)? 2 : 3; /* cpsr */
rob->sr[5].x = t[tid].map[CPSREGTOP].x; /* cpsr */
rob->sr[5].n = !t[tid].map[CPSREGTOP].x ? CPSREGTOP : t[tid].map[CPSREGTOP].rob;
/* dest */
if (i.adc_sbc.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.adc_sbc.rd;
t[tid].map[i.adc_sbc.rd].x = 1;
t[tid].map[i.adc_sbc.rd].rob = robid;
}
if (i.adc_sbc.S) {
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
}
return (0);
}
else if (i.csel.op29_21==0x0d4 && i.csel.op11==0) { /* C6.6.36 CINC, C6.6.37 CINV, C6.6.47 CNEG, C6.6.50 CSEL, C6.6.51 CSET, C6.6.52 CSETM, C6.6.53 CSINC, C6.6.54 CSINV, C6.6.55 CSNEG */
rob->type = 0; /* ALU */
rob->opcd =10; /* CSEL */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = i.csel.op; /* 0:result, 1:~result */
rob->dbl = i.csel.sf; /* 0:csel32, 1:csel64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = i.csel.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.csel.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.csel.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.csel.rn==31 ? 0 : /* ZERO */
t[tid].map[i.csel.rn].x; /* reg */
rob->sr[0].n = i.csel.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.csel.rn].x ? i.csel.rn : t[tid].map[i.csel.rn].rob;
rob->sr[1].t = i.csel.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.csel.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.csel.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.csel.rm==31 ? 0 : /* ZERO */
t[tid].map[i.csel.rm].x; /* reg */
rob->sr[1].n = i.csel.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.csel.rm].x ? i.csel.rm : t[tid].map[i.csel.rm].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
rob->sr[3].t = 1; /* immediate */
rob->sr[3].x = 0; /* renamig N.A. */
rob->sr[3].n = i.csel.cond;
rob->sr[4].t = 1; /* immediate */
rob->sr[4].x = 0; /* renamig N.A. */
rob->sr[4].n = i.csel.o2; /* o2(inc=1) */
rob->sr[5].t = !t[tid].map[CPSREGTOP].x ? 2 : (c[cid].rob[t[tid].map[CPSREGTOP].rob].stat>=ROB_COMPLETE)? 2 : 3; /* cpsr */
rob->sr[5].x = t[tid].map[CPSREGTOP].x; /* cpsr */
rob->sr[5].n = !t[tid].map[CPSREGTOP].x ? CPSREGTOP : t[tid].map[CPSREGTOP].rob;
/* dest */
if (i.csel.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.csel.rd;
t[tid].map[i.csel.rd].x = 1;
t[tid].map[i.csel.rd].rob = robid;
}
return (0);
}
else if (i.ccm.op29_21==0x1d2 && i.ccm.op4==0) { /* C6.6.32 CCMN(immediate), C6.6.33 CCMN(register), C6.6.34 CCMP(immediate), C6.6.35 CCMP(register) */
rob->type = 0; /* ALU */
rob->opcd =11; /* CCMN/CCMP */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = i.ccm.op==1; /* CCMP */
rob->oinv = 0; /* not used */
rob->dbl = i.ccm.sf; /* 0:ccmp32, 1:ccmp64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = i.ccm.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.ccm.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.ccm.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.ccm.rn==31 ? 0 : /* ZERO */
t[tid].map[i.ccm.rn].x; /* reg */
rob->sr[0].n = i.ccm.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.ccm.rn].x ? i.ccm.rn : t[tid].map[i.ccm.rn].rob;
switch (i.ccm.op11_10) {
case 0: /* register */
rob->sr[1].t = i.ccm.rm_imm5==31 ? 1 : /* ZERO */
!t[tid].map[i.ccm.rm_imm5].x ? 2 :
(c[cid].rob[t[tid].map[i.ccm.rm_imm5].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.ccm.rm_imm5==31 ? 0 : /* ZERO */
t[tid].map[i.ccm.rm_imm5].x; /* reg */
rob->sr[1].n = i.ccm.rm_imm5==31 ? 0 : /* ZERO */
!t[tid].map[i.ccm.rm_imm5].x ? i.ccm.rm_imm5 : t[tid].map[i.ccm.rm_imm5].rob;
break;
case 2: /* immediate */
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = i.ccm.rm_imm5;
break;
default:
i_xxx(rob);
return (0);
}
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
rob->sr[3].t = 1; /* immediate */
rob->sr[3].x = 0; /* renamig N.A. */
rob->sr[3].n = i.ccm.cond;
rob->sr[4].t = 1; /* immediate */
rob->sr[4].x = 0; /* renamig N.A. */
rob->sr[4].n = i.ccm.nzcv;
rob->sr[5].t = !t[tid].map[CPSREGTOP].x ? 2 : (c[cid].rob[t[tid].map[CPSREGTOP].rob].stat>=ROB_COMPLETE)? 2 : 3; /* cpsr */
rob->sr[5].x = t[tid].map[CPSREGTOP].x; /* cpsr */
rob->sr[5].n = !t[tid].map[CPSREGTOP].x ? CPSREGTOP : t[tid].map[CPSREGTOP].rob;
/* dest */
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
return (0);
}
else if (i.mov.op28_23==0x25) { /* C6.6.122 MOV(inverted wide immediate), C6.6.123 MOV(wide immediate), C6.6.126 MOVK, C6.6.127 MOVN, C6.6.128 MOVZ */
rob->type = 0; /* ALU */
rob->opcd = 7; /* MOVN, MOVZ, MOVK */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = i.mov.opc==0; /* MOVN */
rob->dbl = i.mov.sf; /* 0:add32, 1:add64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
{
Uint pos = i.mov.hw<<4;
Uint inzero;
switch (i.mov.opc) {
case 0: inzero=1; break; /* MOVN */
case 2: inzero=1; break; /* MOVZ */
case 3: inzero=0; break; /* MOVK */
default:
i_xxx(rob);
return (0);
}
rob->sr[0].t = inzero ? 1 : /* ZERO */
!t[tid].map[i.mov.rd].x ? 2 :
(c[cid].rob[t[tid].map[i.mov.rd].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = inzero ? 0 : /* ZERO */
t[tid].map[i.mov.rd].x; /* reg */
rob->sr[0].n = inzero ? 0 : /* ZERO */
!t[tid].map[i.mov.rd].x ? i.mov.rd : t[tid].map[i.mov.rd].rob;
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = (Ull)i.mov.imm16<<pos; /* POS 0,16,32,48 -> wmask in alu.c */
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
rob->sr[3].t = 1; /* immediate */
rob->sr[3].x = 0; /* renamig N.A. */
rob->sr[3].n = 0x000000000000FFFFLL<<pos; /* POS 0,16,32,48 -> wmask in alu.c */
}
/* dest */
if (i.mov.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.mov.rd;
t[tid].map[i.mov.rd].x = 1;
t[tid].map[i.mov.rd].rob = robid;
}
return (0);
}
else if (i.rev.op30_12==0x5ac00) { /* C6.6.147 RBIT, C6.6.149 REV, C6.6.150 REV16, C6.6.151 REV32 */
rob->type = 0; /* ALU */
rob->opcd =12; /* REV */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.rev.sf; /* 0:rev32, 1:rev64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = i.rev.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.rev.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.rev.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.rev.rn==31 ? 0 : /* ZERO */
t[tid].map[i.rev.rn].x; /* reg */
rob->sr[0].n = i.rev.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.rev.rn].x ? i.rev.rn : t[tid].map[i.rev.rn].rob;
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = i.rev.opc; /* 0:REV, 1:REV16, 2:REV32, 3:REV64 */
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
/* dest */
if (i.rev.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.rev.rd;
t[tid].map[i.rev.rd].x = 1;
t[tid].map[i.rev.rd].rob = robid;
}
return (0);
}
else if (i.cls.op30_11==0xb5802) { /* C6.6.39 CLS, C6.6.40 CLZ */
rob->type = 0; /* ALU */
rob->opcd =13; /* CLS/CLZ */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.cls.sf; /* 0:cls32, 1:cls64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = i.cls.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.cls.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.cls.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.cls.rn==31 ? 0 : /* ZERO */
t[tid].map[i.cls.rn].x; /* reg */
rob->sr[0].n = i.cls.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.cls.rn].x ? i.cls.rn : t[tid].map[i.cls.rn].rob;
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = i.cls.op; /* 0:CLZ, 1:CLS */
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
/* dest */
if (i.cls.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.cls.rd;
t[tid].map[i.cls.rd].x = 1;
t[tid].map[i.cls.rd].rob = robid;
}
return (0);
}
else if (i.add_sub_shifted.op28_24==0x0b && i.add_sub_shifted.op21==0) { /* C6.6.5 ADD(shifted register), C6.6.8 ADDS(shifted register), C6.6.43 CMN(shifted register), C6.6.46 CMP(shifted register), C6.6.135 NEG(shifted register), C6.6.136 NEGS(shifted register), C6.6.196 SUB(shifted register), C6.6.199 SUBS(shifted register) */
rob->type = 0; /* ALU */
rob->opcd = i.add_sub_shifted.op==0?4:2; /* ADD/SUB */
rob->sop = i.add_sub_shifted.shift; /* LSL/LSR/ASR/ROR */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.add_sub_shifted.sf; /* 0:add32, 1:add64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = i.add_sub_shifted.S; /* updtCC */
rob->sr[0].t = i.add_sub_shifted.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.add_sub_shifted.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.add_sub_shifted.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.add_sub_shifted.rn==31 ? 0 : /* ZERO */
t[tid].map[i.add_sub_shifted.rn].x; /* reg */
rob->sr[0].n = i.add_sub_shifted.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.add_sub_shifted.rn].x ? i.add_sub_shifted.rn : t[tid].map[i.add_sub_shifted.rn].rob;
rob->sr[1].t = i.add_sub_shifted.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.add_sub_shifted.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.add_sub_shifted.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.add_sub_shifted.rm==31 ? 0 : /* ZERO */
t[tid].map[i.add_sub_shifted.rm].x; /* reg */
rob->sr[1].n = i.add_sub_shifted.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.add_sub_shifted.rm].x ? i.add_sub_shifted.rm : t[tid].map[i.add_sub_shifted.rm].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = i.add_sub_shifted.imm6; /* LSL/LSR/ASR/ROR */
/* dest */
if (i.add_sub_shifted.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.add_sub_shifted.rd;
t[tid].map[i.add_sub_shifted.rd].x = 1;
t[tid].map[i.add_sub_shifted.rd].rob = robid;
}
if (i.add_sub_shifted.S) { /* updtCC */
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
}
return (0);
}
else if (i.add_sub_extreg.op28_24==0x0b && i.add_sub_extreg.op23_22==0 && i.add_sub_extreg.op21==1) { /* C6.6.3 ADD(extended register), C6.6.6 ADDS(extended register), C6.6.41 CMN(extended register), C6.6.44 CMP(extended register), C6.6.194 SUB(extended register), C6.6.197 SUBS(extended register) */
rob->type = 0; /* ALU */
rob->opcd = i.add_sub_extreg.op==0?4:2; /* ADD/SUB */
rob->sop = 8|i.add_sub_extreg.option; /* 0:uxtb, 1:uxth, 2:uxtw, 3:uxtx, 4:sxtb, 5:sxth, 6:sxtw, 7:sxtx */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.add_sub_extreg.sf; /* 0:add32, 1:add64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = i.add_sub_extreg.S; /* updtCC */
rob->sr[0].t = !t[tid].map[i.add_sub_extreg.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.add_sub_extreg.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = t[tid].map[i.add_sub_extreg.rn].x; /* reg */
rob->sr[0].n = !t[tid].map[i.add_sub_extreg.rn].x ? i.add_sub_extreg.rn : t[tid].map[i.add_sub_extreg.rn].rob;
rob->sr[1].t = i.add_sub_extreg.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.add_sub_extreg.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.add_sub_extreg.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.add_sub_extreg.rm==31 ? 0 : /* ZERO */
t[tid].map[i.add_sub_extreg.rm].x; /* reg */
rob->sr[1].n = i.add_sub_extreg.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.add_sub_extreg.rm].x ? i.add_sub_extreg.rm : t[tid].map[i.add_sub_extreg.rm].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = i.add_sub_extreg.imm3; /* extend_reg_shift(0,1,2,3,4) */
/* dest */
if (i.add_sub_extreg.rd!=31 || !i.add_sub_extreg.S) {
rob->dr[1].t = 1;
rob->dr[1].n = i.add_sub_extreg.rd;
t[tid].map[i.add_sub_extreg.rd].x = 1;
t[tid].map[i.add_sub_extreg.rd].rob = robid;
}
if (i.add_sub_extreg.S) { /* updtCC */
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
}
return (0);
}
else if (i.and_shifted.op28_24==0x0a) { /* C6.6.12 AND(shifted register), C6.6.14 ANDS(shifted register), C6.6.24 BIC(shifted register), C6.6.25 BICS(shifted register), C6.6.63 EON(shifted register), C6.6.65 EOR(shifted register), C6.6.125 MOV(register), C6.6.134 MVN(register), C6.6.140 ORN(shifted register), C6.6.142 ORR(shifted register), C6.6.210 TST(shifted register) */
rob->type = 0; /* ALU */
rob->opcd = i.and_shifted.opc==0?0:i.and_shifted.opc==1?3:i.and_shifted.opc==2?1:0; /* AND/ORR/EOR/ANDS */
rob->sop = i.and_shifted.shift; /* LSL/LSR/ASR/ROR */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = i.and_shifted.N; /* invert */
rob->oinv = 0; /* not used */
rob->dbl = i.and_shifted.sf; /* 0:and32, 1:and64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = i.and_shifted.opc==3; /* ANDS */
rob->sr[0].t = i.and_shifted.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.and_shifted.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.and_shifted.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.and_shifted.rn==31 ? 0 : /* ZERO */
t[tid].map[i.and_shifted.rn].x; /* reg */
rob->sr[0].n = i.and_shifted.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.and_shifted.rn].x ? i.and_shifted.rn : t[tid].map[i.and_shifted.rn].rob;
rob->sr[1].t = i.and_shifted.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.and_shifted.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.and_shifted.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.and_shifted.rm==31 ? 0 : /* ZERO */
t[tid].map[i.and_shifted.rm].x; /* reg */
rob->sr[1].n = i.and_shifted.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.and_shifted.rm].x ? i.and_shifted.rm : t[tid].map[i.and_shifted.rm].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = i.and_shifted.imm6; /* LSL/LSR/ASR/ROR */
/* dest */
if (i.and_shifted.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.and_shifted.rd;
t[tid].map[i.and_shifted.rd].x = 1;
t[tid].map[i.and_shifted.rd].rob = robid;
}
if (i.and_shifted.opc==3) { /* ANDS */
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
}
return (0);
}
else if (i.and_imm.op28_23==0x24) { /* C6.6.11 AND(immediate), C6.6.13 ANDS(immediate), C6.6.64 EOR(immediate), C6.6.124 MOV(bitmask immediate), C6.6.141 ORR(immediate), C6.6.209 TST(immediate) */
rob->type = 0; /* ALU */
rob->opcd = i.and_imm.opc==0?0:i.and_imm.opc==1?3:i.and_imm.opc==2?1:0; /* AND/ORR/EOR/ANDS */
rob->sop = 0; /* LSL */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0;
rob->oinv = 0; /* not used */
rob->dbl = i.and_imm.sf; /* 0:and32, 1:and64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = i.and_imm.opc==3; /* ANDS */
rob->sr[0].t = i.and_imm.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.and_imm.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.and_imm.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.and_imm.rn==31 ? 0 : /* ZERO */
t[tid].map[i.and_imm.rn].x; /* reg */
rob->sr[0].n = i.and_imm.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.and_imm.rn].x ? i.and_imm.rn : t[tid].map[i.and_imm.rn].rob;
{
int imm, len, levels, esize;
Uint S, R;
Ull welem, wmask;
imm = (i.and_imm.N<<6)|((~i.and_imm.imms)&0x3f);
for (len=6; len>=0; len--) {
if ((imm>>len)&1)
break;
}
if (len < 1) { /* reserved */
i_xxx(rob);
return (0);
}
/* len=1 len=2 len=3 len=4 len=5 len=6 */
levels = (Uint)((int)0x80000000>>(len-1))>>(32-len); /* 000001,000011,000111,001111,011111,111111 */
S = (Uint)(i.and_imm.imms & levels);
R = (Uint)(i.and_imm.immr & levels);
esize = 1 << len; /* 2..64 (len=1..6) */
welem = (Ull)((Sll)0x8000000000000000LL>>S)>>(63-S); /* width:esize-bits */
if (R>0) welem = (welem<<(esize-R))|(welem>>R);
wmask = welem;
for (len=0; len<64; len+=esize)
wmask = (wmask<<esize) | welem;
if (!i.and_imm.sf)
wmask &= 0x00000000ffffffffLL;
rob->sr[1].t = 1; /* immediate */
rob->sr[1].x = 0; /* renamig N.A. */
rob->sr[1].n = wmask;
}
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
/* dest */
if (i.and_imm.rd!=31 || i.and_imm.opc!=3) {
rob->dr[1].t = 1;
rob->dr[1].n = i.and_imm.rd;
t[tid].map[i.and_imm.rd].x = 1;
t[tid].map[i.and_imm.rd].rob = robid;
}
if (i.and_imm.opc==3) { /* ANDS */
rob->dr[3].t = 1; /* nzcv */
rob->dr[3].n = CPSREGTOP;
t[tid].map[CPSREGTOP].x = 3;
t[tid].map[CPSREGTOP].rob = robid;
}
return (0);
}
else if (i.sft_imm.op28_23==0x26) { /* C6.6.16 ASR(immediate), C6.6.21 BFI, C6.6.22 BFM, C6.6.23 BFXIL, C6.6.114 LSL(immediate), C6.6.117 LSR(immediate), C6.6.157 SBFIZ, C6.6.158 SBFM, C6.6.159 SBFX, C6.6.201 SXTB, C6.6.202 SXTH, C6.6.203 SXTW, C6.6.211 UBFIZ, C6.6.212 UBFM, C6.6.213 UBFX, C6.6.220 UXTB, C6.6.221 UXTH */
rob->type = 0; /* ALU */
rob->opcd = i.sft_imm.opc==0?8:9; /* 8:SBFM/9:BFM/UBFM */
rob->sop = 3; /* ROR */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0;
rob->oinv = 0; /* not used */
rob->dbl = i.sft_imm.sf; /* 0:sft32, 1:sft64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
{
int imm, len, levels, esize;
Uint S, R, d, inzero, extend;
Ull welem, wmask, telem, tmask;
imm = (i.sft_imm.N<<6)|((~i.sft_imm.imms)&0x3f);
for (len=6; len>=0; len--) {
if ((imm>>len)&1)
break;
}
if (len < 1) { /* reserved */
i_xxx(rob);
return (0);
}
/* len=1 len=2 len=3 len=4 len=5 len=6 */
levels = (Uint)((int)0x80000000>>(len-1))>>(32-len); /* 000001,000011,000111,001111,011111,111111 */
S = (Uint)(i.sft_imm.imms & levels);
R = (Uint)(i.sft_imm.immr & levels);
esize = 1 << len; /* 2..64 (len=1..6) */
/*welem = ZeroExtend(Ones(S + 1), esize);*/
/*wmask = Replicate(ROR(welem, R));*/
welem = (Ull)((Sll)0x8000000000000000LL>>S)>>(63-S); /* width:esize-bits */
if (R>0) welem = (welem<<(esize-R))|(welem>>R);
wmask = welem;
for (len=0; len<64; len+=esize)
wmask = (wmask<<esize) | welem;
if (!i.sft_imm.sf)
wmask &= 0x00000000ffffffffLL;
d = (S - R)&levels;
/*telem = ZeroExtend(Ones(d + 1), esize);*/
/*tmask = Replicate(telem);*/
telem = (Ull)((Sll)0x8000000000000000LL>>d)>>(63-d); /* width:esize-bits */
tmask = telem;
for (len=0; len<64; len+=esize)
tmask = (tmask<<esize) | telem;
if (!i.sft_imm.sf)
tmask &= 0x00000000ffffffffLL;
switch (i.sft_imm.opc) {
case 0: inzero=1; extend=1; break; /* SBFM */
case 1: inzero=0; extend=0; break; /* BFM */
case 2: inzero=1; extend=0; break; /* UBFM */
default:
i_xxx(rob);
return (0);
}
rob->sr[0].t = inzero ? 1 : /* ZERO */
!t[tid].map[i.sft_imm.rd].x ? 2 :
(c[cid].rob[t[tid].map[i.sft_imm.rd].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = inzero ? 0 : /* ZERO */
t[tid].map[i.sft_imm.rd].x; /* reg */
rob->sr[0].n = inzero ? 0 : /* ZERO */
!t[tid].map[i.sft_imm.rd].x ? i.sft_imm.rd : t[tid].map[i.sft_imm.rd].rob;
rob->sr[1].t = i.sft_imm.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.sft_imm.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.sft_imm.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.sft_imm.rn==31 ? 0 : /* ZERO */
t[tid].map[i.sft_imm.rn].x; /* reg */
rob->sr[1].n = i.sft_imm.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.sft_imm.rn].x ? i.sft_imm.rn : t[tid].map[i.sft_imm.rn].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = (S<<8)|R; /* S for sign_extention | R for ROR */
rob->sr[3].t = 1; /* immediate */
rob->sr[3].x = 0; /* renamig N.A. */
rob->sr[3].n = wmask;
rob->sr[4].t = 1; /* immediate */
rob->sr[4].x = 0; /* renamig N.A. */
rob->sr[4].n = tmask;
}
/* dest */
if (i.sft_imm.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.sft_imm.rd;
t[tid].map[i.sft_imm.rd].x = 1;
t[tid].map[i.sft_imm.rd].rob = robid;
}
return (0);
}
else if (i.ror_imm.op30_23==0x27 && i.ror_imm.op21==0) { /* C6.6.67 EXTR(immediate), C6.6.152 ROR(immediate) */
rob->type = 0; /* ALU */
rob->opcd =14; /* EXT */
rob->sop = 0; /* LSL 0 */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.ror_imm.sf; /* 0:ext32, 1:ext64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = i.ror_imm.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.ror_imm.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.ror_imm.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.ror_imm.rn==31 ? 0 : /* ZERO */
t[tid].map[i.ror_imm.rn].x; /* reg */
rob->sr[0].n = i.ror_imm.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.ror_imm.rn].x ? i.ror_imm.rn : t[tid].map[i.ror_imm.rn].rob;
rob->sr[1].t = i.ror_imm.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.ror_imm.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.ror_imm.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.ror_imm.rm==31 ? 0 : /* ZERO */
t[tid].map[i.ror_imm.rm].x; /* reg */
rob->sr[1].n = i.ror_imm.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.ror_imm.rm].x ? i.ror_imm.rm : t[tid].map[i.ror_imm.rm].rob;
rob->sr[2].t = 1; /* immediate */
rob->sr[2].x = 0; /* renamig N.A. */
rob->sr[2].n = 0; /* LSL 0 */
rob->sr[3].t = 1; /* immediate */
rob->sr[3].x = 0; /* renamig N.A. */
rob->sr[3].n = i.ror_imm.imms; /* ROR */
/* dest */
if (i.ror_imm.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.ror_imm.rd;
t[tid].map[i.ror_imm.rd].x = 1;
t[tid].map[i.ror_imm.rd].rob = robid;
}
return (0);
}
else if (i.sft_reg.op30_21==0x0d6 && i.sft_reg.op15_12==2) { /* C6.6.15 ASR, C6.6.17 ASRV, C6.6.113 LSL(register), C6.6.115 LSLV, C6.6.116 LSR(register), C6.6.118 LSRV */
rob->type = 0; /* ALU */
rob->opcd = 3; /* ORR */
rob->sop = i.sft_reg.op2; /* LSL/LSR/ASR/ROR */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.sft_reg.sf; /* 0:lsl32, 1:lsl64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = 1; /* immediate */
rob->sr[0].x = 0; /* renamig N.A. */
rob->sr[0].n = 0; /* ORR 0 */
rob->sr[1].t = i.sft_reg.rn==31 ? 1 : /* ZERO */
!t[tid].map[i.sft_reg.rn].x ? 2 :
(c[cid].rob[t[tid].map[i.sft_reg.rn].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[1].x = i.sft_reg.rn==31 ? 0 : /* ZERO */
t[tid].map[i.sft_reg.rn].x; /* reg */
rob->sr[1].n = i.sft_reg.rn==31 ? 0 : /* ZERO */
!t[tid].map[i.sft_reg.rn].x ? i.sft_reg.rn : t[tid].map[i.sft_reg.rn].rob;
rob->sr[2].t = i.sft_reg.rm==31 ? 1 : /* ZERO */
!t[tid].map[i.sft_reg.rm].x ? 2 :
(c[cid].rob[t[tid].map[i.sft_reg.rm].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[2].x = i.sft_reg.rm==31 ? 0 : /* ZERO */
t[tid].map[i.sft_reg.rm].x; /* reg */
rob->sr[2].n = i.sft_reg.rm==31 ? 0 : /* ZERO */
!t[tid].map[i.sft_reg.rm].x ? i.sft_reg.rm : t[tid].map[i.sft_reg.rm].rob;
/* dest */
if (i.sft_reg.rd!=31) {
rob->dr[1].t = 1;
rob->dr[1].n = i.sft_reg.rd;
t[tid].map[i.sft_reg.rd].x = 1;
t[tid].map[i.sft_reg.rd].rob = robid;
}
return (0);
}
else if (i.b_cond.op31_24==0x54 && i.b_cond.op4==0) { /* C6.6.19 B.cond */
rob->target = pc + ((Sll)((Ull)i.b_cond.imm19<<45)>>43);
if (i.b_cond.cond==14||i.b_cond.cond==15) /* unconditional */
rob->bpred = 1;
else if (i.b_cond.imm19&0x40000) /* conditional backward */
rob->bpred = 1;
rob->cond = i.b_cond.cond;
rob->type = 5; /* BRANCH */
rob->opcd = 0; /* B */
rob->sop = 0; /* not used */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = 0; /* not used */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
if (i.b_cond.cond!=14&&i.b_cond.cond!=15) { /* conditional exec */
rob->sr[5].t = !t[tid].map[CPSREGTOP].x ? 2 : (c[cid].rob[t[tid].map[CPSREGTOP].rob].stat>=ROB_COMPLETE)? 2 : 3; /* cpsr */
rob->sr[5].x = t[tid].map[CPSREGTOP].x; /* cpsr */
rob->sr[5].n = !t[tid].map[CPSREGTOP].x ? CPSREGTOP : t[tid].map[CPSREGTOP].rob;
}
return (0);
}
else if (i.bl.op30_26==0x05) { /* C6.6.20 B, C6.6.26 BL */
rob->target = pc + ((Sll)((Ull)i.bl.imm26<<38)>>36);
rob->bpred = 1;
rob->type = 5; /* BRANCH */
rob->opcd = i.bl.op; /* B/BL */
rob->sop = 0; /* not used */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = 0; /* not used */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
/* dest */
if (i.bl.op) { /* BL */
rob->dr[1].t = 1;
rob->dr[1].n = 30;
t[tid].map[30].x = 1;
t[tid].map[30].rob = robid;
}
return (0);
}
else if (i.cbz.op30_25==0x1a) { /* C6.6.30 CBNZ, C6.6.31 CBZ */
rob->target = pc + ((Sll)((Ull)i.cbz.imm19<<45)>>43);
if (i.cbz.imm19&0x40000) /* conditional backward */
rob->bpred = 1;
rob->type = 5; /* BRANCH */
rob->opcd = i.cbz.op==0?2:3; /* CBZ/CBNZ */
rob->sop = 0; /* not used */
rob->ptw = 0; /* not used */
rob->size = 0; /* not used */
rob->idx = 0; /* not used */
rob->rep = 0; /* not used */
rob->dir = 0; /* not used */
rob->iinv = 0; /* not used */
rob->oinv = 0; /* not used */
rob->dbl = i.cbz.sf; /* 0:cbz32, 1:cbz64 */
rob->plus = 0; /* not used */
rob->pre = 0; /* not used */
rob->wb = 0; /* not used */
rob->updt = 0; /* not used */
rob->sr[0].t = i.cbz.rt==31 ? 1 : /* ZERO */
!t[tid].map[i.cbz.rt].x ? 2 :
(c[cid].rob[t[tid].map[i.cbz.rt].rob].stat>=ROB_COMPLETE)? 2 : 3; /* reg */
rob->sr[0].x = i.cbz.rt==31 ? 0 : /* ZERO */
t[tid].map[i.cbz.rt].x; /* reg */
rob->sr[0].n = i.cbz.rt==31 ? 0 : /* ZERO */
!t[tid].map[i.cbz.rt].x ? i.cbz.rt : t[tid].map[i.cbz.rt].rob;
return (0);
}
else if (i.tbz.op30_25==0x1b) { /* C6.6.206 TBNZ, C6.6.207 TBZ */
rob->target = pc + ((Sll)((Ull)i.tbz.imm14<<50)>>48);