OTA flash operations blocks interrupt handler

[MTsimon]

Hi all,

I'm encountering an issue with interrupt handling during an OTA firmware update using a modem and UART on my NRF52840. Specifically, I'm missing some UART IRQs while the device is operating the flash, which is causing problems. The flash erase time is around 80ms per page, which is long enough to cause the CPU to miss interrupts.

I've read that it might be possible to move my IRQ handlers to RAM using linker script modifications, which would keep them active and avoid the interrupt miss issue. I’ve noticed some functions marked with __pinned_func, but I’m unclear on how the build system utilizes this or if this can help in my case.

Has anyone worked on a similar solution or can suggest any other approaches to ensure my interrupt handlers are accessible during flash operations?

Thank you!

[JarmouniA]

I've read that it might be possible to move my IRQ handlers to RAM using linker script modifications,

@MTsimon I guess you can put the IRQ handler in a separate file & use Zephyr's code relocation as done in this test

zephyr/tests/drivers/dma/chan_blen_transfer/CMakeLists.txt

Line 10 in 41b0bd1

if (CONFIG_DMA_LOOP_TRANSFER_RELOCATE_SECTION)

zephyr/tests/drivers/dma/chan_blen_transfer/Kconfig

Line 16 in 41b0bd1

config DMA_LOOP_TRANSFER_RELOCATE_SECTION

[MTsimon]

Thank you for the input! I actually came across this approach but ultimately decided on a different solution for my problem.

I opted to erase only the pages that are not already erased within the relevant OTA flash area during boot. This ensures the flash area is always ready for new writes.

The tradeoff is potentially longer boot times, but I can live with that. In practice, the longer boot times occur only if an OTA update fails midway or after a successful update. Since writing is much faster than erasing, this approach allows me to avoid missing any UART interrupts.