DIGITAL DESIGN WITH VERILOG :

1)-A brief overview about verilog :

Verilog is a hardware description language used to model digital circuits. Verilog supports three modelling styles that allow you to design different circuits with different philosophie(behavrioural, structural and dataflow). Verilog has similar C-syntax and Verilog is a concurrent language, different than a “procedural” language like C or Java(statements are executed in parallel).

2)-Tools and Simulators :

ModelSim and Quartus prime are used to test and verify and simulate HDL codes(they support systemVerilog, VHDL, systemC ...).