Skip to content

19801201/Verilog_CNN_Accelerator

 
 

Folders and files

NameName
Last commit message
Last commit date

Latest commit

 

History

15 Commits
 
 
 
 
 
 
 
 
 
 

Repository files navigation

Description:

This is a single accelerator solution.

Experimental environment:

Vivado 2020.2

Method of creating a project:

Step1:

Modify the Tcl script. Modify $(current_path) to your own path in vu9p_pcie_416.tcl.

Step2:

Open Vivado 2020.2

Step3:

Switch to $(current_path)/TJPU path in Tcl Console

Step4:

Execute the command:

source ./vu9p_pcie_416.tcl

About

No description, website, or topics provided.

Resources

License

Stars

Watchers

Forks

Releases

No releases published

Packages

No packages published

Languages

  • VHDL 80.9%
  • SystemVerilog 11.5%
  • Verilog 5.4%
  • V 2.0%
  • Tcl 0.2%