Fixes #6,

CPU bus request on interrupt independently of I
LLeny · Nov 8, 2024 · ce9550c · ce9550c
1 parent 0fb1455
commit ce9550c
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Showing 2 changed files with 10 additions and 3 deletions.
diff --git a/src/mikey/mod.rs b/src/mikey/mod.rs
@@ -39,7 +39,7 @@ pub enum MikeyInstruction {
 }
 
 #[derive(Clone, Copy, PartialEq, Serialize, Deserialize)]
-enum MikeyBusOwner {
+pub enum MikeyBusOwner {
     Video,
     Refresh,
     Cpu,
@@ -144,8 +144,10 @@ impl Mikey {
         if int != 0 {
             int |= self.registers.data(INTSET);
             trace!("INTSET -> {:02X}", int);
-            self.registers.set_data(INTSET, int);
-            if !self.cpu.flags().contains(M6502Flags::I) && !bus.grant() { // wake up the cpu            
+            if !self.cpu.flags().contains(M6502Flags::I) {
+                self.registers.set_data(INTSET, int);
+            }            
+            if !bus.grant() { // wake up the cpu
                 bus.set_request(true);
             }
         }
@@ -584,6 +586,10 @@ impl Mikey {
     pub(crate) fn comlynx_cable(&self) -> &ComlynxCable {
         self.uart.cable()
     }
+
+    pub fn bus_owner(&self) -> MikeyBusOwner {
+        self.bus_owner
+    }
 }
 
 impl Default for Mikey {

diff --git a/src/mikey/registers.rs b/src/mikey/registers.rs
@@ -128,6 +128,7 @@ impl MikeyRegisters {
         self.palette[pen_index as usize][2] = (bluered >> 4) * 16;
     }
 
+    #[inline]
     pub fn get_pen(&self, pen_index: u8) -> &[u8; 3] {
         &self.palette[pen_index as usize]
     }