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Add xilinx a72 and a78 #252
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Hi @arnopo the failed check is due to Xilinx BSP. The failures are present in other platforms too. We need the routines as part of enabling Xilinx BSP for these platforms. Thanks, |
I can see two issues in CI one is linked to the format of one of your patch, the second is linked to the Zephyr CI, that I just fixed.
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@arnopo ok i can update commit message due to warning was there anything else? |
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@arnopo fixed the commit message issue |
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@arnopo, I could argue that checking for CamelCase in the platform-specific code is wrong in that this code may have to call down into BSP-specific code that may have a very different set of coding conventions. |
I did not handle the exception, it could become difficult to manage. |
@tnmysh to be clear - is the only gap to fix right now the metal-io-mem-map() part? the cache part there is already convention of other platforms. if so i will work on updating Xilinx BSP and then update the PR with that accordingly. |
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@arnopo we have refactored Xilinx platform specific files and added new platform support accordingly in this PR. I think it's ready to be merged, we can have this one as part of this release. Do you have any extra comments? I see some failures with checkpatch. camelCasing can't be fixed. Other than that this PR looks good to me. |
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LGTM.
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Hi @arnopo i just pushed another version. i testd zynq, zynqmp-a53 and zynqmp-r5 for freertos and generic. all of these passed. That being said, if you will do not want the sys.c/sys.h xilinx common code consolidated i am fine with that. |
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Just a minor clean-up to address, else LGTM
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@arnopo I removed my ACK till Ben confirms this is working. |
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This patch removes almost 1000 lines (~400 line of code) from libmetal library and we can achieve same platform support.
Thanks @bentheredonethat for efforts. When your side testing is done please let us know.
This will be good addition to release.
im ok with testing on my side |
@bentheredonethat @tnmysh : then ok to merge? |
@arnopo i woke up sick today.. will try to do today. otherwise will hopefully do tomorrow |
Yes I am ok to merge. |
lib/utilities.h provided MB and GB macros so include from there instead of providing the definition again for a53 platforms. Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Move common code in Xilinx area to consolidated location to remove redundant code. Enable A72 and A78 build in Standalone BSP. lib: generic: Add support for a78 with System Device Tree flow System Device Tree workflow is AMD-Xilinx workflow whereby the BSP, libraries and applications in software are derived from a hardware-design. The hardware-design is used to generate a system device tree (SDT) that describes information for Linux and other processing environments. The xreg/xcpu files are not generated for SDT workflow. Because of this do not include if SDT symbol is present in BSP. Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
Move common code in Xilinx area to consolidated location to remove redundant code. Enable A72 and A78 build in BSP for FreeRTOS OS. Signed-off-by: Ben Levinsky <ben.levinsky@amd.com>
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@arnopo rebased off latest |
Add support for xilinx platforms cortex a72 on Versal, cortex a78 on versal-net
both of these have support for standalone and baremetal