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fix bert bug using trt6 when compile with CUDA_ARCH_NAME=All (#24574)
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test=develop

Co-authored-by: nhzlx <nhzlx.dragon@gmail.com>
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cryoco and NHZlX authored May 15, 2020
1 parent 9e4fabc commit ea1c05d
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Showing 3 changed files with 4 additions and 5 deletions.
Original file line number Diff line number Diff line change
Expand Up @@ -91,9 +91,9 @@ class EmbEltwiseLayerNormOpConverter : public OpConverter {
input_embs, bias, scale, emb_sizes, bias_size, scale_size, hidden,
eps);
#else
PADDLE_THROW(
platform::errors::Fatal("use EmbEltwiseLayernormPluginDynamic "
"FP16, but GPU doesn't have FP16."));
plugin = new plugin::EmbEltwiseLayernormPluginDynamic<float>(
input_embs, bias, scale, emb_sizes, bias_size, scale_size, hidden,
eps);
#endif
} else {
plugin = new plugin::EmbEltwiseLayernormPluginDynamic<float>(
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1 change: 0 additions & 1 deletion paddle/fluid/inference/tensorrt/op_teller.cc
Original file line number Diff line number Diff line change
Expand Up @@ -29,7 +29,6 @@ struct SimpleOpTypeSetTeller : public Teller {
teller_set.insert("fused_embedding_eltwise_layernorm");
teller_set.insert("multihead_matmul");
teller_set.insert("skip_layernorm");
teller_set.insert("slice");
#endif
}

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Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,7 @@ void trt_ernie(bool with_fp16, std::vector<float> result) {
if (with_fp16) {
precision = AnalysisConfig::Precision::kHalf;
}
config.EnableTensorRtEngine(1 << 30, 1, 1, precision, false, true);
config.EnableTensorRtEngine(1 << 30, 1, 5, precision, false, true);
config.SetTRTDynamicShapeInfo(min_input_shape, max_input_shape,
opt_input_shape);
std::vector<float> out_data;
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