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mediatek: Add support for GL.iNet X3000 (Spitz AX) and XE3000 (Puli AX)
The GL.iNet X3000 and XE3000 are Wi-Fi 6 5G cellular routers, based on MediaTek MT7981A SoC. The XE3000 is the same device as the X3000, except for an additional battery. Specifications: - SoC: Filogic 820 MT7981A (1.3GHz) - RAM: DDR4 512M - Flash: eMMC 8G, MicroSD card slot - WiFi: 2.4GHz and 5GHz with 6 antennas - Ethernet: - 1x LAN (10/100/1000M) - 1x WAN (10/100/1000/2500M) - 5G: Quectel RM520N-GL with two nano-SIM card slots - USB: 1x USB 2.0 port - UART: - 3.3V, TX, RX, GND / 115200 8N1 MAC addresses as verified by OEM firmware: vendor OpenWrt address source WAN eth0 label factory 0x0a (label) LAN eth1 label + 1 2g phy0-ap0 label + 2 factory 0x04 5g phy1-ap0 label + 3 Installation via U-Boot rescue: 1. Press and hold reset button while booting the device 2. Wait for the Internet led to blink 5 times 3. Release reset button 4. The rescue page is accessible via http://192.168.1.1 5. Select the OpenWrt sysupgrade image and start upgrade 6. Wait for the router to flash new firmware and reboot Revert to stock firmware: 1. Download the stock firmware from GL.iNet website 2. Use the method explained above to flash the stock firmware Switch the modem network port between PCIe and USB interfaces: 1. Connect to the AT commands (/dev/ttyUSB2) port using e.g. minicom: minicom -D /dev/ttyUSB2 2. Check the current modem mode with 'AT+QCFG="data_interface"': - 0,0 indicates that the network port uses the USB interface - 1,0 indicates that the network port uses the PCIe interface 3. Switch the active interface with: - 'AT+QCFG="data_interface",0,0' to use the USB interface - 'AT+QCFG="data_interface",1,0' to use the PCIe interface 4. Reboot Signed-off-by: Jean Thomas <jean.thomas@wifirst.fr>
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target/linux/mediatek/dts/mt7981a-glinet-gl-x3000-xe3000-common.dtsi
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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/dts-v1/; | ||
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#include "mt7981.dtsi" | ||
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/ { | ||
chosen { | ||
bootargs = "console=ttyS0,115200n8 root=PARTLABEL=rootfs rootwait"; | ||
}; | ||
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aliases { | ||
label-mac-device = &gmac0; | ||
led-boot = &led_power; | ||
led-failsafe = &led_power; | ||
led-running = &led_power; | ||
led-upgrade = &led_power; | ||
}; | ||
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reg_5v: regulator-5v { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "fixed-5V"; | ||
regulator-min-microvolt = <5000000>; | ||
regulator-max-microvolt = <5000000>; | ||
regulator-boot-on; | ||
regulator-always-on; | ||
}; | ||
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fan_5v: regulator-fan-5v { | ||
compatible = "regulator-fixed"; | ||
regulator-name = "fan"; | ||
regulator-min-microvolt = <5000000>; | ||
regulator-max-microvolt = <5000000>; | ||
gpio = <&pio 28 GPIO_ACTIVE_HIGH>; | ||
enable-active-high; | ||
}; | ||
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gpio-keys { | ||
compatible = "gpio-keys"; | ||
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reset { | ||
label = "reset"; | ||
linux,code = <KEY_RESTART>; | ||
gpios = <&pio 1 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
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gpio-export { | ||
compatible = "gpio-export"; | ||
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hub_power { | ||
gpio-export,name = "hub_power"; | ||
gpio-export,output = <1>; | ||
gpios = <&pio 5 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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5G_power { | ||
gpio-export,name = "5G_power"; | ||
gpio-export,output = <1>; | ||
gpios = <&pio 11 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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5G_control { | ||
gpio-export,name = "5G_control"; | ||
gpio-export,output = <1>; | ||
gpios = <&pio 9 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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5G_reset { | ||
gpio-export,name = "5G_reset"; | ||
gpio-export,output = <0>; | ||
gpios = <&pio 10 GPIO_ACTIVE_HIGH>; | ||
}; | ||
}; | ||
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leds { | ||
compatible = "gpio-leds"; | ||
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wifi2g { | ||
label = "green:wifi2g"; | ||
gpios = <&pio 30 GPIO_ACTIVE_LOW>; | ||
}; | ||
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wifi5g { | ||
label = "green:wifi5g"; | ||
gpios = <&pio 38 GPIO_ACTIVE_LOW>; | ||
}; | ||
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5g_led1 { | ||
label = "green:5g:led1"; | ||
gpios = <&pio 6 GPIO_ACTIVE_LOW>; | ||
}; | ||
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5g_led2 { | ||
label = "green:5g:led2"; | ||
gpios = <&pio 7 GPIO_ACTIVE_LOW>; | ||
}; | ||
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5g_led3 { | ||
label = "green:5g:led3"; | ||
gpios = <&pio 8 GPIO_ACTIVE_LOW>; | ||
}; | ||
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5g_led4 { | ||
label = "green:5g:led4"; | ||
gpios = <&pio 4 GPIO_ACTIVE_HIGH>; | ||
}; | ||
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led_power: power { | ||
label = "green:power"; | ||
gpios = <&pio 39 GPIO_ACTIVE_LOW>; | ||
}; | ||
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wan { | ||
label = "green:wan"; | ||
gpios = <&pio 31 GPIO_ACTIVE_LOW>; | ||
}; | ||
}; | ||
}; | ||
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&uart0 { | ||
status = "okay"; | ||
}; | ||
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&watchdog { | ||
status = "okay"; | ||
}; | ||
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&mmc0 { | ||
pinctrl-names = "default", "state_uhs"; | ||
pinctrl-0 = <&mmc0_pins_default>; | ||
pinctrl-1 = <&mmc0_pins_uhs>; | ||
bus-width = <8>; | ||
max-frequency = <52000000>; | ||
cap-mmc-highspeed; | ||
vmmc-supply = <®_3p3v>; | ||
non-removable; | ||
status = "okay"; | ||
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card@0 { | ||
compatible = "mmc-card"; | ||
reg = <0>; | ||
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block { | ||
compatible = "block-device"; | ||
partitions { | ||
block-partition-env { | ||
partname = "u-boot-env"; | ||
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nvmem-layout { | ||
compatible = "u-boot,env-layout"; | ||
}; | ||
}; | ||
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block-partition-factory { | ||
partname = "factory"; | ||
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nvmem-layout { | ||
compatible = "fixed-layout"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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eeprom_factory_0: eeprom@0 { | ||
reg = <0x0 0x1000>; | ||
}; | ||
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macaddr_factory_a: macaddr@a { | ||
compatible = "mac-base"; | ||
reg = <0xa 0x6>; | ||
#nvmem-cell-cells = <1>; | ||
}; | ||
}; | ||
}; | ||
}; | ||
}; | ||
}; | ||
}; | ||
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&mdio_bus { | ||
reset-gpios = <&pio 14 GPIO_ACTIVE_LOW>; | ||
reset-delay-us = <600>; | ||
reset-post-delay-us = <20000>; | ||
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phy5: ethernet-phy@5 { | ||
reg = <5>; | ||
compatible = "ethernet-phy-ieee802.3-c45"; | ||
}; | ||
}; | ||
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ð { | ||
status = "okay"; | ||
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gmac0: mac@0 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <0>; | ||
phy-mode = "2500base-x"; | ||
phy-handle = <&phy5>; | ||
nvmem-cells = <&macaddr_factory_a 0>; | ||
nvmem-cell-names = "mac-address"; | ||
}; | ||
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gmac1: mac@1 { | ||
compatible = "mediatek,eth-mac"; | ||
reg = <1>; | ||
phy-mode = "gmii"; | ||
phy-handle = <&int_gbe_phy>; | ||
nvmem-cells = <&macaddr_factory_a 1>; | ||
nvmem-cell-names = "mac-address"; | ||
}; | ||
}; | ||
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&pio { | ||
mmc0_pins_default: mmc0-pins-default { | ||
mux { | ||
function = "flash"; | ||
groups = "emmc_8"; | ||
}; | ||
}; | ||
mmc0_pins_uhs: mmc0-pins-uhs { | ||
mux { | ||
function = "flash"; | ||
groups = "emmc_8"; | ||
}; | ||
}; | ||
pcie_pins: pcie-pins { | ||
mux { | ||
function = "pcie"; | ||
groups = "pcie_pereset", "pcie_clk", "pcie_wake"; | ||
}; | ||
}; | ||
pwm0_pin: pwm0-pin-g0 { | ||
mux { | ||
function = "pwm"; | ||
groups = "pwm0_1"; | ||
}; | ||
}; | ||
}; | ||
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&xhci { | ||
phys = <&u2port0 PHY_TYPE_USB2>; | ||
vbus-supply = <®_5v>; | ||
mediatek,u3p-dis-msk = <0x01>; | ||
status = "okay"; | ||
}; | ||
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&usb_phy { | ||
status = "okay"; | ||
}; | ||
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&pcie { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pcie_pins>; | ||
status = "okay"; | ||
}; | ||
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&pwm { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&pwm0_pin>; | ||
}; | ||
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&wifi { | ||
nvmem-cells = <&eeprom_factory_0>; | ||
nvmem-cell-names = "eeprom"; | ||
status = "okay"; | ||
}; | ||
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&fan { | ||
pwms = <&pwm 0 40000 0>; | ||
fan-supply = <&fan_5v>; | ||
interrupt-parent = <&pio>; | ||
interrupts = <29 IRQ_TYPE_EDGE_RISING>; | ||
status = "okay"; | ||
}; |
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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#include "mt7981a-glinet-gl-x3000-xe3000-common.dtsi" | ||
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/ { | ||
model = "GL.iNet GL-X3000"; | ||
compatible = "glinet,gl-x3000", "mediatek,mt7981"; | ||
}; |
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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT | ||
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#include "mt7981a-glinet-gl-x3000-xe3000-common.dtsi" | ||
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/ { | ||
model = "GL.iNet GL-XE3000"; | ||
compatible = "glinet,gl-xe3000", "mediatek,mt7981"; | ||
}; | ||
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&uart1 { | ||
pinctrl-names = "default"; | ||
pinctrl-0 = <&uart1_pins>; | ||
status = "okay"; | ||
}; | ||
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&pio { | ||
uart1_pins: uart1-pins-g1 { | ||
mux { | ||
function = "uart"; | ||
groups = "uart1_3"; | ||
}; | ||
}; | ||
}; |
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