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pci alloc msi irq support new interface #13709

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@yezhonghui2024 yezhonghui2024 commented Sep 29, 2024

Summary

no real functionality change, code refactor only

Impact

pci msi

Testing

qemu pci/ep

Signed-off-by: yezhonghui <yezhonghui@xiaomi.com>
@github-actions github-actions bot added Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: x86_64 Issues related to the x86_64 architecture Area: PCI Size: S The size of the change in this PR is small labels Sep 29, 2024
@xiaoxiang781216 xiaoxiang781216 changed the title pci alloc mis irq support new interface pci alloc msi irq support new interface Sep 29, 2024
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nuttxpr commented Sep 29, 2024

[Experimental Bot, please feedback here]

No, this PR does not meet the NuttX Requirements.

Missing Information:

  • Summary:
    • Lacks specific details about the code refactor. What was refactored and why?
    • Needs a clear explanation of the change's purpose.
  • Impact:
    • "pci msi" is too vague. Explain the specific impact on PCI and MSI functionality.
    • Address all other impact categories (user, build, hardware, documentation, security, compatibility).
  • Testing:
    • Provide actual testing logs before and after the change.
    • Specify the host OS, CPU, compiler, target architecture, board, and configuration used for testing.

Recommendations:

  1. Expand the Summary: Clearly describe the refactoring goals and the specific code sections involved.
  2. Detail the Impact: Provide precise information for each impact category. If an area is not impacted, state "NO" explicitly.
  3. Include Complete Testing Information:
    • List all host and target environments used.
    • Paste relevant log snippets demonstrating the functionality before and after your changes.

A well-structured PR is crucial for reviewers to understand and evaluate your changes effectively.

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Arch: arm Issues related to ARM (32-bit) architecture Arch: arm64 Issues related to ARM64 (64-bit) architecture Arch: x86_64 Issues related to the x86_64 architecture Area: PCI Size: S The size of the change in this PR is small
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3 participants