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Merge pull request #552 from ckormanyos/trivial_syntax
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ckormanyos authored Sep 17, 2024
2 parents 49eeab4 + ecec7a7 commit 211f52f
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5 changes: 3 additions & 2 deletions ref_app/src/app/benchmark/readme.md
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Expand Up @@ -85,7 +85,7 @@ The benchmark used is a ${\sim}100$ decimal digit AGM $\pi$ calculation.
|--------------------|-----------------|------------|
| `am335x` | 1.5 | 1.0 |
| `stm32f446` | 5.1 | 3.4 |
| `rpi_pico2_rp2350` | 6.2 | 4.1 |
| `rpi_pico2_rp2350` | 6.3 | 4.2 |
| `wch_ch32v307` | 8.0 | 5.3 |
| `rpi_pico_rp2040` | 19 | 13 |
| `avr` | 420 | 280 |
Expand All @@ -111,4 +111,5 @@ Using only one core (core 1) on the $32$-bit ARM(R) Cortex(R) M0+
controller of the `rpi_pico_rp2040` board results in a calculation
time of $19~\text{ms}$. The next generation `rpi_pico2_rp2350`
with ARM(R) Cortex(R) M33 cores beats the previous one
with a time of $6.2~\text{ms}$, which is slightly more than $3~\text{ms}$ times faster.
with a time of $6.3~\text{ms}$, which is slightly more than $3~\text{ms}$ times faster
than its predecessor.
4 changes: 2 additions & 2 deletions ref_app/src/mcal/rpi_pico2_rp2350/mcal_reg.h
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@@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////////////
// Copyright Christopher Kormanyos 2007 - 2024.
// Copyright Christopher Kormanyos 2024.
// Distributed under the Boost Software License,
// Version 1.0. (See accompanying file LICENSE_1_0.txt
// or copy at http://www.boost.org/LICENSE_1_0.txt)
Expand All @@ -19,7 +19,7 @@
constexpr std::uint32_t nvic_base { scs_base + UINT32_C(0x00000100) };

// NVIC registers.
constexpr std::uint32_t nvic_icpr0 { nvic_base + UINT32_C(0x00000180) };
constexpr std::uint32_t nvic_icpr { nvic_base + UINT32_C(0x00000180) };

// SCnSCB registers.
constexpr std::uint32_t scnscb_reserved0 { scs_base + UINT32_C(0x00000000) };
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8 changes: 4 additions & 4 deletions ref_app/target/micros/rpi_pico2_rp2350/startup/crt0.cpp
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Expand Up @@ -5,14 +5,14 @@
// or copy at http://www.boost.org/LICENSE_1_0.txt)
//

// RaspberryPi RP2350 dual-core ARM(R) Cortex(R)-M33 startup code.

#include <mcal_cpu.h>
#include <mcal_cpu_rp2350.h>
#include <mcal_irq.h>
#include <mcal_reg.h>
#include <mcal_wdg.h>

#include <util/utility/util_time.h>

namespace crt
{
auto init_ram () -> void;
Expand Down Expand Up @@ -163,10 +163,10 @@ auto __main_core1() -> void

// Clear all pending interrupts on core 1.

// NVIC->ICPR[0] = (uint32_t)-1;
// NVIC->ICPR[0U] = static_cast<std::uint32_t>(UINT32_C(0xFFFFFFFF));
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::nvic_icpr0,
mcal::reg::nvic_icpr,
std::uint32_t { UINT32_C(0xFFFFFFFF) }>::reg_set();

// Synchronize with core 0.
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4 changes: 2 additions & 2 deletions ref_app/target/micros/rpi_pico_rp2040/startup/crt0.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////////////
// Copyright Christopher Kormanyos 2007 - 2024.
// Copyright Christopher Kormanyos 2024.
// Distributed under the Boost Software License,
// Version 1.0. (See accompanying file LICENSE_1_0.txt
// or copy at http://www.boost.org/LICENSE_1_0.txt)
Expand Down Expand Up @@ -131,7 +131,7 @@ auto __main_core1() -> void
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_fifo_st,
UINT32_C(0xFF)>::reg_set();
std::uint32_t { UINT32_C(0xFF) }>::reg_set();

asm volatile("dsb");

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