Skip to content

Commit

Permalink
More syntax unification
Browse files Browse the repository at this point in the history
  • Loading branch information
@ckormanyos
ckormanyos committed Sep 17, 2024
1 parent ecec7a7 commit 79ce9a2
Show file tree
Hide file tree
Showing 6 changed files with 58 additions and 76 deletions.
2 changes: 1 addition & 1 deletion ref_app/src/mcal/rpi_pico2_rp2350/mcal_gpt.cpp
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////////////
// Copyright Christopher Kormanyos 2007 - 2023.
// Copyright Christopher Kormanyos 2007 - 2024.
// Distributed under the Boost Software License,
// Version 1.0. (See accompanying file LICENSE_1_0.txt
// or copy at http://www.boost.org/LICENSE_1_0.txt)
Expand Down
3 changes: 2 additions & 1 deletion ref_app/src/mcal/rpi_pico2_rp2350/mcal_osc.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -200,7 +200,8 @@ void mcal::osc::init(const config_type*)
mcal::reg::hw_per_resets_reset,
std::uint32_t { UINT32_C(6) }>::bit_clr();

// Wait for reset on IO_BANK0 to be done.
// Wait for reset to be done.
// Release reset is done on IO_BANK0.
// while(HW_PER_RESETS->RESET_DONE.bit.IO_BANK0 != 1);
while(!mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
Expand Down
79 changes: 41 additions & 38 deletions ref_app/src/mcal/rpi_pico2_rp2350/mcal_reg.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -27,71 +27,74 @@
constexpr std::uint32_t scnscb_actlr { scs_base + UINT32_C(0x00000008) };
constexpr std::uint32_t scnscb_cppwr { scs_base + UINT32_C(0x0000000C) };

// Reset registers.
constexpr std::uint32_t hw_per_resets_resets_base { UINT32_C(0x40020000) };
constexpr std::uint32_t hw_per_resets_reset { hw_per_resets_resets_base + UINT32_C(0x00000000) };
constexpr std::uint32_t hw_per_resets_wdsel { hw_per_resets_resets_base + UINT32_C(0x00000004) };
constexpr std::uint32_t hw_per_resets_reset_done { hw_per_resets_resets_base + UINT32_C(0x00000008) };

// PLL registers.
constexpr std::uint32_t hw_per_pll_sys_base { UINT32_C(0x40050000) };
constexpr std::uint32_t hw_per_pll_sys_cs { hw_per_pll_sys_base + UINT32_C(0x00000000) };
constexpr std::uint32_t hw_per_pll_sys_pwr { hw_per_pll_sys_base + UINT32_C(0x00000004) };
constexpr std::uint32_t hw_per_pll_sys_fbdiv_int { hw_per_pll_sys_base + UINT32_C(0x00000008) };
constexpr std::uint32_t hw_per_pll_sys_prim { hw_per_pll_sys_base + UINT32_C(0x0000000C) };
constexpr std::uint32_t hw_per_pll_sys_intr { hw_per_pll_sys_base + UINT32_C(0x00000010) };
constexpr std::uint32_t hw_per_pll_sys_inte { hw_per_pll_sys_base + UINT32_C(0x00000014) };
constexpr std::uint32_t hw_per_pll_sys_intf { hw_per_pll_sys_base + UINT32_C(0x00000018) };
constexpr std::uint32_t hw_per_pll_sys_ints { hw_per_pll_sys_base + UINT32_C(0x0000001C) };

// Clock registers.
constexpr std::uint32_t hw_per_clocks_base { UINT32_C(0x40010000) };
constexpr std::uint32_t hw_per_clocks_clk_ref_ctrl { hw_per_clocks_base + UINT32_C(0x00000030) };
constexpr std::uint32_t hw_per_clocks_clk_ref_div { hw_per_clocks_base + UINT32_C(0x00000034) };
constexpr std::uint32_t hw_per_clocks_clk_ref_selected { hw_per_clocks_base + UINT32_C(0x00000038) };
constexpr std::uint32_t hw_per_clocks_clk_sys_ctrl { hw_per_clocks_base + UINT32_C(0x0000003C) };
constexpr std::uint32_t hw_per_clocks_clk_sys_div { hw_per_clocks_base + UINT32_C(0x00000040) };
constexpr std::uint32_t hw_per_clocks_clk_sys_selected { hw_per_clocks_base + UINT32_C(0x00000044) };
constexpr std::uint32_t hw_per_clocks_clk_peri_ctrl { hw_per_clocks_base + UINT32_C(0x00000048) };

// PSM registers.
constexpr std::uint32_t psm_base { UINT32_C(0x40018000) };
constexpr std::uint32_t psm_frce_on { psm_base + UINT32_C(0x00000000) };
constexpr std::uint32_t psm_frce_off { psm_base + UINT32_C(0x00000004) };
constexpr std::uint32_t psm_wdsel { psm_base + UINT32_C(0x00000008) };
constexpr std::uint32_t psm_done { psm_base + UINT32_C(0x0000000C) };

// Single-instruction registers.
constexpr std::uint32_t sio_base { UINT32_C(0xD0000000) };
constexpr std::uint32_t sio_cpuid { sio_base + UINT32_C(0x00000000) };
constexpr std::uint32_t sio_gpio_out_set { sio_base + UINT32_C(0x00000018) };
constexpr std::uint32_t sio_gpio_out_clr { sio_base + UINT32_C(0x00000020) };
constexpr std::uint32_t sio_gpio_out_xor { sio_base + UINT32_C(0x00000028) };
constexpr std::uint32_t sio_gpio_oe_set { sio_base + UINT32_C(0x00000038) };
constexpr std::uint32_t sio_gpio_oe_clr { sio_base + UINT32_C(0x00000040) };
constexpr std::uint32_t sio_fifo_st { sio_base + UINT32_C(0x00000050) };
constexpr std::uint32_t sio_fifo_wr { sio_base + UINT32_C(0x00000054) };
constexpr std::uint32_t sio_fifo_rd { sio_base + UINT32_C(0x00000058) };

constexpr std::uint32_t hw_per_sio_base { sio_base };
constexpr std::uint32_t pads_bank0_base { UINT32_C(0x40038000) };
constexpr std::uint32_t pads_bank0_gpio { UINT32_C(0x40038004) };

// I/O-Bank registers.
constexpr std::uint32_t io_bank0_base { UINT32_C(0x40028000) };
constexpr std::uint32_t io_bank0_status_base { io_bank0_base + UINT32_C(0x00000000) };

constexpr std::uint32_t pads_bank0_base { UINT32_C(0x40038000) };
constexpr std::uint32_t pads_bank0_gpio { UINT32_C(0x40038004) };

constexpr std::uint32_t hw_per_io_bank0 { io_bank0_base };

constexpr std::uint32_t hw_per_psm_base { UINT32_C(0x40018000) };

constexpr std::uint32_t hw_per_ppb_base { UINT32_C(0xE0000000) };
constexpr std::uint32_t hw_per_ppb_cpacr { hw_per_ppb_base + UINT32_C(0x0000ED88) };

constexpr std::uint32_t hw_per_resets_resets_base { UINT32_C(0x40020000) };
constexpr std::uint32_t hw_per_resets_reset { hw_per_resets_resets_base + UINT32_C(0x00000000) };
constexpr std::uint32_t hw_per_resets_wdsel { hw_per_resets_resets_base + UINT32_C(0x00000004) };
constexpr std::uint32_t hw_per_resets_reset_done { hw_per_resets_resets_base + UINT32_C(0x00000008) };

constexpr std::uint32_t hw_per_xosc_base { UINT32_C(0x40048000) };
constexpr std::uint32_t hw_per_xosc_control { UINT32_C(0x40048000) };
constexpr std::uint32_t hw_per_xosc_status { UINT32_C(0x40048004) };
constexpr std::uint32_t hw_per_xosc_dormant { UINT32_C(0x40048008) };
constexpr std::uint32_t hw_per_xosc_startup { UINT32_C(0x4004800C) };
constexpr std::uint32_t hw_per_xosc_count { UINT32_C(0x40048010) };

constexpr std::uint32_t hw_per_clocks_base { UINT32_C(0x40010000) };
constexpr std::uint32_t hw_per_clocks_clk_ref_ctrl { hw_per_clocks_base + UINT32_C(0x00000030) };
constexpr std::uint32_t hw_per_clocks_clk_ref_div { hw_per_clocks_base + UINT32_C(0x00000034) };
constexpr std::uint32_t hw_per_clocks_clk_ref_selected { hw_per_clocks_base + UINT32_C(0x00000038) };
constexpr std::uint32_t hw_per_clocks_clk_sys_ctrl { hw_per_clocks_base + UINT32_C(0x0000003C) };
constexpr std::uint32_t hw_per_clocks_clk_sys_div { hw_per_clocks_base + UINT32_C(0x00000040) };
constexpr std::uint32_t hw_per_clocks_clk_sys_selected { hw_per_clocks_base + UINT32_C(0x00000044) };
constexpr std::uint32_t hw_per_clocks_clk_peri_ctrl { hw_per_clocks_base + UINT32_C(0x00000048) };
// Single-instruction registers.
constexpr std::uint32_t sio_base { UINT32_C(0xD0000000) };
constexpr std::uint32_t sio_cpuid { sio_base + UINT32_C(0x00000000) };
constexpr std::uint32_t sio_gpio_out_set { sio_base + UINT32_C(0x00000018) };
constexpr std::uint32_t sio_gpio_out_clr { sio_base + UINT32_C(0x00000020) };
constexpr std::uint32_t sio_gpio_out_xor { sio_base + UINT32_C(0x00000028) };
constexpr std::uint32_t sio_gpio_oe_set { sio_base + UINT32_C(0x00000038) };
constexpr std::uint32_t sio_gpio_oe_clr { sio_base + UINT32_C(0x00000040) };
constexpr std::uint32_t sio_fifo_st { sio_base + UINT32_C(0x00000050) };
constexpr std::uint32_t sio_fifo_wr { sio_base + UINT32_C(0x00000054) };
constexpr std::uint32_t sio_fifo_rd { sio_base + UINT32_C(0x00000058) };

constexpr std::uint32_t hw_per_pll_sys_base { UINT32_C(0x40050000) };
constexpr std::uint32_t hw_per_pll_sys_cs { hw_per_pll_sys_base + UINT32_C(0x00000000) };
constexpr std::uint32_t hw_per_pll_sys_pwr { hw_per_pll_sys_base + UINT32_C(0x00000004) };
constexpr std::uint32_t hw_per_pll_sys_fbdiv_int { hw_per_pll_sys_base + UINT32_C(0x00000008) };
constexpr std::uint32_t hw_per_pll_sys_prim { hw_per_pll_sys_base + UINT32_C(0x0000000C) };
constexpr std::uint32_t hw_per_pll_sys_intr { hw_per_pll_sys_base + UINT32_C(0x00000010) };
constexpr std::uint32_t hw_per_pll_sys_inte { hw_per_pll_sys_base + UINT32_C(0x00000014) };
constexpr std::uint32_t hw_per_pll_sys_intf { hw_per_pll_sys_base + UINT32_C(0x00000018) };
constexpr std::uint32_t hw_per_pll_sys_ints { hw_per_pll_sys_base + UINT32_C(0x0000001C) };
constexpr std::uint32_t hw_per_sio_base { sio_base };
}
}

Expand Down
13 changes: 6 additions & 7 deletions ref_app/src/mcal/rpi_pico_rp2040/mcal_cpu.cpp
View file
Original file line number Diff line number Diff line change
Expand Up @@ -6,7 +6,6 @@
//

#include <mcal_cpu.h>
#include <mcal_cpu_rp2040.h>
#include <mcal_osc.h>
#include <mcal_port.h>
#include <mcal_reg.h>
Expand Down Expand Up @@ -49,15 +48,15 @@ auto init_core() -> void

// RESETS->RESET.bit.io_bank0 = 1U;
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::resets_reset,
UINT32_C(5)>::bit_set();
std::uint32_t,
mcal::reg::resets_reset,
UINT32_C(5)>::bit_set();

//RESETS->RESET.bit.pads_bank0 = 1U;
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::resets_reset,
UINT32_C(8)>::bit_set();
std::uint32_t,
mcal::reg::resets_reset,
UINT32_C(8)>::bit_set();

// while((RESETS->RESET_DONE.bit.io_bank0 == 1U) || (RESETS->RESET_DONE.bit.pads_bank0 == 1U));
while
Expand Down
2 changes: 1 addition & 1 deletion ref_app/src/mcal/rpi_pico_rp2040/mcal_osc.cpp
View file
Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
///////////////////////////////////////////////////////////////////////////////
// Copyright Christopher Kormanyos 2011 - 2024.
// Copyright Christopher Kormanyos 2024.
// Distributed under the Boost Software License,
// Version 1.0. (See accompanying file LICENSE_1_0.txt
// or copy at http://www.boost.org/LICENSE_1_0.txt)
Expand Down
35 changes: 7 additions & 28 deletions ref_app/src/mcal/rpi_pico_rp2040/mcal_port.h
View file
Original file line number Diff line number Diff line change
Expand Up @@ -33,28 +33,16 @@
static void set_direction_output()
{
// SIO->GPIO_OE_CLR.bit.GPIO_OE_CLR |= 1UL<<pin;
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_gpio_oe_clr,
port_index>::bit_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_gpio_oe_clr, port_index>::bit_set();

// SIO->GPIO_OUT_CLR.bit.GPIO_OUT_CLR |= 1UL<<pin;
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_gpio_out_clr,
port_index>::bit_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_gpio_out_clr, port_index>::bit_set();

// IO_BANK0->GPIO##pin##_CTRL.bit.FUNCSEL = sio_xx;
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
addr_io_bank0_gpio_pin_ctrl,
sio_xx << 0U>::template reg_msk<UINT32_C(0x1F) << 0U>();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, addr_io_bank0_gpio_pin_ctrl, sio_xx << 0U>::template reg_msk<UINT32_C(0x1F) << 0U>();

// SIO->GPIO_OE_SET.bit.GPIO_OE_SET |= 1UL<<pin
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_gpio_oe_set,
port_index>::bit_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_gpio_oe_set, port_index>::bit_set();
}

static void set_direction_input()
Expand All @@ -64,19 +52,13 @@
static void set_pin_high()
{
// SIO->GPIO_OUT_SET.bit.GPIO_OUT_SET |= 1UL<<pin
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_gpio_out_set,
port_index>::bit_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_gpio_out_set, port_index>::bit_set();
}

static void set_pin_low()
{
// SIO->GPIO_OUT_CLR.bit.GPIO_OUT_CLR |= 1UL<<pin
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_gpio_out_clr,
port_index>::bit_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_gpio_out_clr, port_index>::bit_set();
}

static bool read_input_value()
Expand All @@ -87,10 +69,7 @@
static void toggle_pin()
{
// SIO->GPIO_OUT_XOR.bit.GPIO_OUT_XOR |= 1UL<<pin
mcal::reg::reg_access_static<std::uint32_t,
std::uint32_t,
mcal::reg::sio_gpio_out_xor,
port_index>::bit_set();
mcal::reg::reg_access_static<std::uint32_t, std::uint32_t, mcal::reg::sio_gpio_out_xor, port_index>::bit_set();
}
};
}
Expand Down

0 comments on commit 79ce9a2

Please sign in to comment.