ipq806x: chromium: Support Chromium "crossystem" GPIO tooling

ChromiumOS's vboot_reference tooling [1] provides convenient access to
various firmware and hardware details via its `crossystem` tool.
crossystem currently:
(1) relies on the v1 GPIO cdev API to read GPIOs; and
(2) expects gpio-line-names properties.

Enable the kernel config, and document a few pins for OnHub devices.

I only go so far as to pull two relevant names out of the vendor device
tree. Others could perhaps be backfilled if the info is available and
useful.

[1] https://chromium.googlesource.com/chromiumos/platform/vboot_reference/+/HEAD/README

Signed-off-by: Brian Norris <computersforpeace@gmail.com>

target/linux/ipq806x/chromium/config-default

@@ -1,5 +1,6 @@
 # CONFIG_ARM_QCOM_SPM_CPUIDLE is not set
 CONFIG_BLK_DEV_SD=y
+CONFIG_GPIO_CDEV_V1=y
 CONFIG_LEDS_LP5523=y
 CONFIG_LEDS_LP55XX_COMMON=y
 CONFIG_PHY_QCOM_IPQ806X_USB=y

target/linux/ipq806x/files-6.6/arch/arm/boot/dts/qcom/qcom-ipq8064-tplink-onhub.dts

@@ -14,6 +14,27 @@
 };
 
 &qcom_pinmux {
+	gpio-line-names = "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  "",
+			  /* RECOVERY_SW_L is crossystem ABI. */
+			  "RECOVERY_SW_L", /* 16 */
+			  /* AP_FLASH_WP_L is crossystem ABI. */
+			  "AP_FLASH_WP_L" /* 17 */;
+
 	i2c7_pins: i2c7_pinmux {
 		mux {
 			pins = "gpio8", "gpio9";