feat: Fine delay for rear transition board

[hongran]

MRF has a new transition board that supports the delay tuning of daughter cards. With this new board, for a daughter card that has the delay-tuning feature (like the TTL-DLY and PECL-DLY modules), the delay of the transition board channel can be controlled by an register in the EVR board. The previous version of the TB does not support the fine delay tuning even if the daughter card has the delay tuning.

In this PR, I have 3 commits, for the EVR registers, API functions and EPICS records. The last commit makes the front panel UNIV channels share the same fine-delay tuning interface.

[jerzyjamroz]

@hongran , could you elaborate on why you cannot use the actual Univ Fine Dly output implementation in:

• file "mrmevrdlymodule.template"
• https://github.com/epics-modules/mrfioc2/blob/master/evrMrmApp/Db/mrmevrdlymodule.template

[hongran]

@hongran , could you elaborate on why you cannot use the actual Univ Fine Dly output implementation in:

• file "mrmevrdlymodule.template"
• https://github.com/epics-modules/mrfioc2/blob/master/evrMrmApp/Db/mrmevrdlymodule.template

These driver functions and records are designed specifically for the front-panel delay modules. They use the GPIO pins to configure the daughter boards. This does not support delay modules on the transition boards since there are no GPIO interfaces in the VME transition boards. Jukka then designed a new transition board and the corresponding EVR firmware to support daughter board with delay tuning, but the interface is quite different. The boards are always enabled and the delays are set by the registers he specified in the new firmware. Therefore, we do need a different set of driver functions and EPICS records to tune delays of daughter cards on the transition board.

[jerzyjamroz]

@hongran , please review: hongran#2

[hongran]

@jerzyjamroz After your MR, I added another commit to update the evr-vme-300 substitution file.

Ran Hong