connectfour

A connect-four game built using Verilog

Name		Name	Last commit message	Last commit date
Latest commit History 52 Commits
modelsim		modelsim
win_logic_modules		win_logic_modules
README.md		README.md
background.mif		background.mif
find_vga_row.v		find_vga_row.v
gameboard.v		gameboard.v
gamenoVGA.v		gamenoVGA.v
gamewithVGA.v		gamewithVGA.v
logicunit.v		logicunit.v
movevalidator.v		movevalidator.v
myfsm.v		myfsm.v
mylog.v		mylog.v
register_decoder.v		register_decoder.v
register_decoder_win.v		register_decoder_win.v
switchdecoder.v		switchdecoder.v
vga_top.v		vga_top.v
win_logic.v		win_logic.v

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