updated CELL_VOLTAGE_DIFF_TO_RESET_VOLTAGE_LIMIT default value

etc/dbus-serialbattery/config.default.ini

@@ -44,7 +44,9 @@ FLOAT_CELL_VOLTAGE = 3.35
 ; Specify cell voltage diff where CVL limit is kept until diff is equal or lower
 CELL_VOLTAGE_DIFF_KEEP_MAX_VOLTAGE_UNTIL = 0.010
 ; Specify cell voltage diff where CVL limit is reset to max voltage, if value get above
-CELL_VOLTAGE_DIFF_TO_RESET_VOLTAGE_LIMIT = 0.050
+; the cells are considered as imbalanced, if the cell diff exceeds 5% of the nominal cell voltage
+; e.g. 3.2 V * 5 / 100 = 0.160 V
+CELL_VOLTAGE_DIFF_TO_RESET_VOLTAGE_LIMIT = 0.080
 
 ; -- CVL reset based on SoC option (step mode)
 ; Specify how long the max voltage should be kept, if reached then switch to float voltage