Add support for some arm64 crypto extensions (#26)

Signed-off-by: Xilin Wu <wuxilin123@gmail.com>
nihui · Feb 22, 2024 · 4b5d00b · 4b5d00b
1 parent 1f41ad0
commit 4b5d00b
Show file tree

Hide file tree

Showing 3 changed files with 14 additions and 1 deletion.
diff --git a/README.md b/README.md
@@ -219,7 +219,7 @@ _`fma4` on zen1, ISA in hypervisor, etc._
 |:---:|---|
 |x86|`mmx` `sse` `sse2` `sse3` `ssse3` `sse41` `sse42` `sse4a` `xop` `avx` `f16c` `fma` `fma4` `avx2` `avx512f` `avx512bw` `avx512cd` `avx512dq` `avx512vl` `avx512vnni` `avx512bf16` `avx512ifma` `avx512vbmi` `avx512vbmi2` `avx512fp16` `avxvnni` `avxvnniint8` `avxifma`|
 |arm|`edsp` `neon` `vfpv4`|
-|aarch64|`neon` `vfpv4` `cpuid` `asimdhp` `asimddp` `asimdfhm` `bf16` `i8mm` `sve` `sve2` `svebf16` `svei8mm` `svef32mm`|
+|aarch64|`neon` `vfpv4` `cpuid` `asimdhp` `asimddp` `asimdfhm` `bf16` `i8mm` `sve` `sve2` `svebf16` `svei8mm` `svef32mm` `sha3` `sha512` `sm3` `sm4`|
 |mips|`msa`|
 |powerpc|`vsx`|
 |loongarch||

diff --git a/main.c b/main.c
@@ -59,6 +59,10 @@ int main()
     PRINT_ISA_SUPPORT(svebf16)
     PRINT_ISA_SUPPORT(svei8mm)
     PRINT_ISA_SUPPORT(svef32mm)
+    PRINT_ISA_SUPPORT(sha3)
+    PRINT_ISA_SUPPORT(sha512)
+    PRINT_ISA_SUPPORT(sm3)
+    PRINT_ISA_SUPPORT(sm4)
 
 #elif __arm__ || defined(_M_ARM)
     PRINT_ISA_SUPPORT(edsp)

diff --git a/ruapu.h b/ruapu.h
@@ -205,6 +205,11 @@ RUAPU_INSTCODE(sve2, 0x44405000) // smlslb z0.h,z0.b,z0.b
 RUAPU_INSTCODE(svebf16, 0x6460e400) // bfmmla z0.s,z0.h,z0.h
 RUAPU_INSTCODE(svei8mm, 0x45009800) // smmla z0.s,z0.b,z0.b
 RUAPU_INSTCODE(svef32mm, 0x64a0e400) // fmmla z0.s,z0.s,z0.s
+RUAPU_INSTCODE(sha3, 0xce000000) // eor3 v0.16b, v0.16b, v0.16b, v0.16b
+RUAPU_INSTCODE(sha512, 0xce608000) // sha512h q0, q0, v0.2d
+RUAPU_INSTCODE(sm3, 0xce60c000) // sm3partw1 v0.4s, v0.4s, v0.4s
+RUAPU_INSTCODE(sm4, 0xcec08400) // sm4e v0.4s, v0.4s
+
 
 #elif __arm__ || defined(_M_ARM)
 #if __thumb__
@@ -283,6 +288,10 @@ RUAPU_ISAENTRY(sve2)
 RUAPU_ISAENTRY(svebf16)
 RUAPU_ISAENTRY(svei8mm)
 RUAPU_ISAENTRY(svef32mm)
+RUAPU_ISAENTRY(sha3)
+RUAPU_ISAENTRY(sha512)
+RUAPU_ISAENTRY(sm3)
+RUAPU_ISAENTRY(sm4)
 
 #elif __arm__ || defined(_M_ARM)
 RUAPU_ISAENTRY(edsp)