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rejunity / tiny-atari-2600 Public

generated from TinyTapeout/tt09-verilog-template

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fpga

Merge branch 'macro_roms' #2

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Merge branch 'macro_roms'

Merge branch 'macro_roms' #2

Summary
Jobs
- fpga
Run details
- Usage
- Workflow file

Usage Workflow file

Annotations

1 error

FPGA bitstream for TT ASIC Sim (ICE40UP5K)

Process completed with exit code 1.

fpga

failed Nov 12, 2024 in 58s

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