Merge pull request #89 from eckhard-delfs-qualcomm/issue72-detailed-m…

…fence.vma-description

Updated MFENCE.VMA description

chapter3.adoc

@@ -188,8 +188,27 @@ respective sections in this specification.
 The `MFENCE.SPA` fence instruction is used to synchronize updates to supervisor
 domain access-permissions with current execution.
 `MFENCE.SPA` is only valid in M-mode. If operand rs1≠x0, it
-specifies a single physical address, and if rs2≠x0, it specifies
-a single SDID. Executing a `MFENCE.SPA` guarantees that any previous stores
+specifies a single physical address, and if rs2≠x0, it specifies a single SDID. 
+
+If rs1 corresponds to an `MTT_L1_DIR` mapping, the fence applies to
+a 4 KiB page. If rs1 corresponds to a `2M_PAGES` or `4M_PAGES` mapping,
+the fence applies to a 2 MiB or 4 MiB range. If rs1 corresponds to one
+of the 1G_* mappings, the fence applies to a 1 GiB range.
+
+The behavior of `MFENCE.SPA` depends on rs1 and rs2 as follows:
+
+* If rs1=x0 and rs2=x0, the fence orders all reads and writes to the MTT for 
+all supervisor domain address spaces.
+* If rs1=x0 and rs2≠x0, the fence orders all reads and writes to the MTT for
+the supervisor domain address space identified by the SDID in rs2.
+* If rs1≠x0 and rs2=x0, the fence orders all reads and writes made to the MTT
+that correspond to the physical address in rs1, for all supervisor domain
+address spaces.
+* If rs1≠x0 and rs2≠x0, the fence orders all reads and writes made to the MTT
+that correspond to the physical address in rs1, for the supervisor domain 
+address space identified by the SDID in rs2.
+
+Executing a `MFENCE.SPA` guarantees that any previous stores
 already visible to the current hart are ordered before all implicit reads by
 that hart done for supervisor domain access-permission structures for
 non-M-mode instructions that follow the `MFENCE.SPA`.