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Merge pull request #97 from riscv/issue/68
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minor clarification to modes
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rsahita authored Oct 15, 2024
2 parents 2ad0654 + 21ab338 commit 7c3066e
Showing 1 changed file with 3 additions and 3 deletions.
6 changes: 3 additions & 3 deletions chapter3.adoc
Original file line number Diff line number Diff line change
Expand Up @@ -78,7 +78,7 @@ may define different interpretations of the other fields in `mttp`.
protection scheme described in Section 3.7 of the RISC-V privileged architecture
specification cite:[ISA]

|1 |`Smmtt34` |Page-based supervisor domain protection for 34 bit physical
|1 |`Smmtt34` |Page-based supervisor domain protection for up to 34 bit physical
addresses with RWX permissions per page

|2-3 |- |`_Reserved_`
Expand All @@ -92,10 +92,10 @@ addresses with RWX permissions per page
protection scheme described in Section 3.7 of the RISC-V privileged architecture
specification cite:[ISA]

|1 |`Smmtt46` |Page-based supervisor domain protection for 46 bit physical
|1 |`Smmtt46` |Page-based supervisor domain protection for up to 46 bit physical
addresses with RWX permissions per page

|2 |`Smmtt56` |Page-based supervisor domain protection for 56 bit physical
|2 |`Smmtt56` |Page-based supervisor domain protection for up to 56 bit physical
addresses with RWX permissions per page

|3-15 |- |`_Reserved_`
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