Merge branch 'main' into issue/91

Signed-off-by: Ravi Sahita <ravi@rivosinc.com>

chapter4.adoc

@@ -336,7 +336,8 @@ translation, but excluding implicit MPT checker accesses to MPT structures. Data
 in M-mode when the MPRV bit in mstatus is set and the MPP field in mstatus contains S
 or U are subject to MPT checks. MPT checker accesses to MPT structures are to be
 treated as implicit M-mode accesses and are subject to PMP/Smepmp and
-IOPMP checks. The MPT checker indexes the MPT using the
+IOPMP checks. Implicit accesses to the MPT are governed by `mstatus.MBE` control
+for RV64 and `mstatush.MBE` control for RV32. The MPT checker indexes the MPT using the
 physical address of the access to lookup and enforce the access permissions.
 A mismatch of the access type and the access permissions specified in the
 MPT entry that applies to the accessed region is reported as a trap to the

intro.adoc

@@ -107,9 +107,10 @@ supervisor domain may be static (e.g. device assignment to a VM) or dynamic
 (e.g. scheduling a VM virtual cpu within a domain). The MPT for the supervisor
 domain active on the hart is programmed on the hart along with the supervisor
 domain identifier. The MPT does not perform any address translation; it simply
-provides access permissions for the physically addressed region/page (post any
-S-mode and/or G-stage address translation) to enforce the isolation properties
-per the use case requirements (see <<mpt-lookup>>).
+provides access permissions for the physically addressed regions/pages
+to enforce the isolation properties per the use case requirements (see
+<<mpt-lookup>> for a high-level illustration and section <<Smmpt>> for
+normative details).
 
 [caption="Figure {counter:image}: ", reftext="Figure {image}"]
 [title= "MPT lookup for Supervisor Domain Access", id=mpt-lookup]