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Make fence operations safe #180

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Feb 15, 2024
Merged

Make fence operations safe #180

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ab8cf78
Make fence operations safe
jsgf Feb 13, 2024
bb5ce67
Updated CHANGELOG
jsgf Feb 14, 2024
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4 changes: 4 additions & 0 deletions riscv/CHANGELOG.md
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Expand Up @@ -7,6 +7,10 @@ and this project adheres to [Semantic Versioning](http://semver.org/).

## [Unreleased]

### Changed

- Made `asm::fence`, `fence_i` and `sfence` safe (ie, removed `unsafe` from their definitions)

## [v0.11.0] - 2024-01-14

### Added
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6 changes: 3 additions & 3 deletions riscv/src/asm.rs
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Expand Up @@ -57,7 +57,7 @@ instruction!(
/// are ordinarily not ordered with respect to loads and stores in the instruction stream.
/// Executing an `SFENCE.VMA` instruction guarantees that any stores in the instruction stream prior to the
/// `SFENCE.VMA` are ordered before all implicit references subsequent to the `SFENCE.VMA`.
, unsafe sfence_vma_all, "sfence.vma");
, sfence_vma_all, "sfence.vma");
instruction!(
/// `FENCE` instruction wrapper
///
Expand All @@ -71,7 +71,7 @@ instruction!(
/// The FENCE instruction also orders memory reads and writes made by the hart as observed by
/// memory reads and writes made by an external device. However, FENCE does not order observations
/// of events made by an external device using any other signaling mechanism.
, unsafe fence, "fence");
, fence, "fence");
instruction!(
/// `FENCE.I` instruction wrapper
///
Expand All @@ -89,7 +89,7 @@ instruction!(
/// The unused fields in the FENCE.I instruction, imm\[11:0\], rs1, and rd, are reserved for
/// finer-grain fences in future extensions. For forward compatibility, base
/// implementations shall ignore these fields, and standard software shall zero these fields.
, unsafe fence_i, "fence.i");
, fence_i, "fence.i");

/// `SFENCE.VMA` instruction wrapper
///
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