Neander++ (Neander extended) implementation and testing in VHDL for Digital Systems' 2nd assignment.
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Updated
Mar 30, 2022 - VHDL
Neander++ (Neander extended) implementation and testing in VHDL for Digital Systems' 2nd assignment.
digital systems
Repositório com os projetos elaborados durante a disciplina de Sistemas Digitais I (PCS3115)
O objetivo do deste projeto foi modelar, programar e testar uma Unidade Lógica e Aritmética, de quatro operações, usando os conhecimentos adquiridos em Circuitos Lógicos e aplicados nas aulas práticas no laboratório de Sistemas Digitais.
Program the FPGA with mastermind game
some mini-projects, developed in my digital system's class, based on: combinational/sequential logic design, hardware description languages (VHDL), datapath components, register-transfer level (RTL) design and introduction to programmable processors, with a physical implementation in SSI IC's, ASIC's, FPGA's, PLD's.
We aim to design a 3-bit two’s complement add/sub logic circuit.
INE5406 - Digital Systems
Source code of my Digital Systems college subject project
VHDL Design for seven segment Displays number from 1-100
Coffee vending machine implementation designed for FPGAs (DE2-115 kit)
👾 My studies with Verilog and notions of digital systems.
Design a digital circuit that encodes and decodes strings with CRC-8 algorithm with an optimal delay and number of components
The purpose of this lab is to design a 4-bit counter using JK flip flops
A collection of useful material and personal projects from the Computer and Informatics Engineering Bachelor's degree program at the University of Aveiro.
The main objective of this project is to provide a pass code based security system having the provision to change the pass code by the authority only, using XOR Gates as bit comparators and NOR Gates as controlled inverters. This proposed system will provide a user friendly security system for organizations and homes. If the pass code entered is…
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