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Release 2.3.6 (#16)
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* dm bugfixed: stepi

Signed-off-by: Ruige <295054118@whut.edu.cn>

* update to scala2.13.10 chisel3.5.6

Signed-off-by: Ruige <295054118@whut.edu.cn>

* add scaladoc in frontend

Signed-off-by: Ruige <295054118@whut.edu.cn>

merge feature/vector into develop

Signed-off-by: Ruige <295054118@whut.edu.cn>

* merge enhancement/csrfiles into develop

Signed-off-by: Ruige <295054118@whut.edu.cn>

* feature: riscv-v load and store

Signed-off-by: Ruige <295054118@whut.edu.cn>

* merge bump/mill_chisel5 into develop
cannot generate code in one file
bug fixed
fpu is not default configuration now
readme fixed
only rift2330 and rift2370 are tested in ci
add vector test files

Signed-off-by: Ruige <295054118@whut.edu.cn>

* licence update 2024

Signed-off-by: Ruige <295054118@whut.edu.cn>

---------

Signed-off-by: Ruige <295054118@whut.edu.cn>
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whutddk authored Feb 6, 2024
1 parent 7609f40 commit 64b660f
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Showing 138 changed files with 9,094 additions and 4,008 deletions.
104 changes: 58 additions & 46 deletions .github/workflows/BuildAndTest.yml
Original file line number Diff line number Diff line change
Expand Up @@ -19,14 +19,19 @@ jobs:
runs-on: [self-hosted, Linux, X64]
name: chiselStage
container:
image: whutddk/rift2env:riscvtest
image: whutddk/rift2env:chisel5
# options: >-
# --memory 60g
# --oom-kill-disable
# --memory-swap -1

# needs: clean
# Steps represent a sequence of tasks that will be executed as part of the job
steps:
- name: set up apt
run: |
apt-get update
apt-get install -y wget git make
apt-get install -y wget git make curl
- uses: actions/checkout@v3.3.0
Expand All @@ -41,8 +46,11 @@ jobs:
- name: Compile
run: |
echo ${GITHUB_WORKSPACE}
sbt "test:runMain test.testAll"
sbt doc
rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
mill -i rift2Core[chisel].test.runMain test.testAll
mill --no-server show rift2Core[chisel].docJar
unzip -d ScalaDoc/ out/rift2Core/chisel/docJar.dest/out.jar
echo $GITHUB_REF_NAME
Expand All @@ -53,19 +61,19 @@ jobs:
cp ${GITHUB_WORKSPACE}/LICENSE.Apache ${GITHUB_WORKSPACE}/../
cp ${GITHUB_WORKSPACE}/LICENSE.NPL ${GITHUB_WORKSPACE}/../
cp -R target/scala-2.12/api ${GITHUB_WORKSPACE}/../ScalaDoc/$GITHUB_REF_NAME
cd ${GITHUB_WORKSPACE}/generated/Release/
tar -cvf Rift2300-Release.tar Rift2300/*
tar -cvf Rift2310-Release.tar Rift2310/*
tar -cvf Rift2320-Release.tar Rift2320/*
tar -cvf Rift2330-Release.tar Rift2330/*
tar -cvf Rift2340-Release.tar Rift2340/*
tar -cvf Rift2350-Release.tar Rift2350/*
tar -cvf Rift2360-Release.tar Rift2360/*
tar -cvf Rift2370-Release.tar Rift2370/*
tar -cvf Rift2380-Release.tar Rift2380/*
tar -cvf Rift2390-Release.tar Rift2390/*
cp -R ScalaDoc/* ${GITHUB_WORKSPACE}/../ScalaDoc/$GITHUB_REF_NAME
# cd ${GITHUB_WORKSPACE}/generated/Release/
# tar -cvf Rift2300-Release.tar Rift2300/*
# tar -cvf Rift2310-Release.tar Rift2310/*
# tar -cvf Rift2320-Release.tar Rift2320/*
# tar -cvf Rift2330-Release.tar Rift2330/*
# tar -cvf Rift2340-Release.tar Rift2340/*
# tar -cvf Rift2350-Release.tar Rift2350/*
# tar -cvf Rift2360-Release.tar Rift2360/*
# tar -cvf Rift2370-Release.tar Rift2370/*
# tar -cvf Rift2380-Release.tar Rift2380/*
# tar -cvf Rift2390-Release.tar Rift2390/*
cd ${GITHUB_WORKSPACE}/generated/Debug/
tar -cvf Rift2300-Debug.tar Rift2300/*
Expand All @@ -89,7 +97,7 @@ jobs:
git checkout gh_pages
rm -rf ${GITHUB_WORKSPACE}/ScalaDoc/$GITHUB_REF_NAME
cp -R ${GITHUB_WORKSPACE}/../ScalaDoc/$GITHUB_REF_NAME ${GITHUB_WORKSPACE}/ScalaDoc/$GITHUB_REF_NAME
cp -R ${GITHUB_WORKSPACE}/../ScalaDoc/* ${GITHUB_WORKSPACE}/ScalaDoc/
cp ${GITHUB_WORKSPACE}/../LICENSE.Apache ${GITHUB_WORKSPACE}/
cp ${GITHUB_WORKSPACE}/../LICENSE.NPL ${GITHUB_WORKSPACE}/
Expand Down Expand Up @@ -124,25 +132,25 @@ jobs:
prerelease: true
target_commitish: ${{github.ref_name}}
files: |
./generated/Release/Rift2300-Release.tar
# ./generated/Release/Rift2300-Release.tar
./generated/Debug/Rift2300-Debug.tar
./generated/Release/Rift2310-Release.tar
# ./generated/Release/Rift2310-Release.tar
./generated/Debug/Rift2310-Debug.tar
./generated/Release/Rift2320-Release.tar
# ./generated/Release/Rift2320-Release.tar
./generated/Debug/Rift2320-Debug.tar
./generated/Release/Rift2330-Release.tar
# ./generated/Release/Rift2330-Release.tar
./generated/Debug/Rift2330-Debug.tar
./generated/Release/Rift2340-Release.tar
# ./generated/Release/Rift2340-Release.tar
./generated/Debug/Rift2340-Debug.tar
./generated/Release/Rift2350-Release.tar
# ./generated/Release/Rift2350-Release.tar
./generated/Debug/Rift2350-Debug.tar
./generated/Release/Rift2360-Release.tar
# ./generated/Release/Rift2360-Release.tar
./generated/Debug/Rift2360-Debug.tar
./generated/Release/Rift2370-Release.tar
# ./generated/Release/Rift2370-Release.tar
./generated/Debug/Rift2370-Debug.tar
./generated/Release/Rift2380-Release.tar
# ./generated/Release/Rift2380-Release.tar
./generated/Debug/Rift2380-Debug.tar
./generated/Release/Rift2390-Release.tar
# ./generated/Release/Rift2390-Release.tar
./generated/Debug/Rift2390-Debug.tar
./LICENSE.Apache
./LICENSE.NPL
Expand All @@ -160,25 +168,25 @@ jobs:
prerelease: false
target_commitish: ${{github.ref_name}}
files: |
./generated/Release/Rift2300-Release.tar
# ./generated/Release/Rift2300-Release.tar
./generated/Debug/Rift2300-Debug.tar
./generated/Release/Rift2310-Release.tar
# ./generated/Release/Rift2310-Release.tar
./generated/Debug/Rift2310-Debug.tar
./generated/Release/Rift2320-Release.tar
# ./generated/Release/Rift2320-Release.tar
./generated/Debug/Rift2320-Debug.tar
./generated/Release/Rift2330-Release.tar
# ./generated/Release/Rift2330-Release.tar
./generated/Debug/Rift2330-Debug.tar
./generated/Release/Rift2340-Release.tar
# ./generated/Release/Rift2340-Release.tar
./generated/Debug/Rift2340-Debug.tar
./generated/Release/Rift2350-Release.tar
# ./generated/Release/Rift2350-Release.tar
./generated/Debug/Rift2350-Debug.tar
./generated/Release/Rift2360-Release.tar
# ./generated/Release/Rift2360-Release.tar
./generated/Debug/Rift2360-Debug.tar
./generated/Release/Rift2370-Release.tar
# ./generated/Release/Rift2370-Release.tar
./generated/Debug/Rift2370-Debug.tar
./generated/Release/Rift2380-Release.tar
# ./generated/Release/Rift2380-Release.tar
./generated/Debug/Rift2380-Debug.tar
./generated/Release/Rift2390-Release.tar
# ./generated/Release/Rift2390-Release.tar
./generated/Debug/Rift2390-Debug.tar
./LICENSE.Apache
./LICENSE.NPL
Expand All @@ -202,10 +210,14 @@ jobs:
strategy:
fail-fast: false
matrix:
version: [Rift2330, Rift2340, Rift2350, Rift2360, Rift2370, Rift2380, Rift2390]
version: [Rift2330, Rift2370]
runs-on: [self-hosted, Linux, X64]
container:
image: whutddk/rift2env:riscvtest
image: whutddk/rift2env:chisel5
# options: >-
# --memory 60g
# --oom-kill-disable
# --memory-swap -1


# services:
Expand Down Expand Up @@ -253,7 +265,7 @@ jobs:
cd /Rift2Core
wget https://github.com/whutddk/Rift2Core/releases/download/${{ steps.getrelease.outputs.tag_name }}/${{matrix.version}}-Debug.tar
wget https://github.com/whutddk/Rift2Core/releases/download/${{ steps.getrelease.outputs.tag_name }}/${{matrix.version}}-Release.tar
# wget https://github.com/whutddk/Rift2Core/releases/download/${{ steps.getrelease.outputs.tag_name }}/${{matrix.version}}-Release.tar
Expand All @@ -262,10 +274,10 @@ jobs:
cd /Rift2Core
mkdir -p ./generated/Debug
mkdir -p ./generated/Release
# mkdir -p ./generated/Release
tar -xvf ./${{matrix.version}}-Debug.tar -C ./generated/Debug
tar -xvf ./${{matrix.version}}-Release.tar -C ./generated/Release
# tar -xvf ./${{matrix.version}}-Release.tar -C ./generated/Release
Expand All @@ -276,7 +288,7 @@ jobs:
cp /test/* ./tb/ci
git restore -s ${{ github.ref_name }} -- ./tb
git restore -s ${{ github.ref_name }} -- ./Makefile
# git restore -s ${{ github.ref_name }} -- ./src/yosys/area.ys
# git restore -s ${{ github.ref_name }} -- ./src/yosys/area.ys
- name: isa, dhrystone, coremark, yosys
Expand All @@ -292,7 +304,7 @@ jobs:
# make area CONFIG=/Release/${{matrix.version}}/
# make area CONFIG=/Release/${{matrix.version}}/

- name: commit result
if: success() || failure()
Expand All @@ -304,7 +316,7 @@ jobs:
git add ./generated/Debug/${{matrix.version}}/*.json
git commit --no-gpg-sign --allow-empty -m "ci update ${{matrix.version}}"
# git add ./generated/Release/${{matrix.version}}/area.json
# git add ./generated/Release/${{matrix.version}}/area.json
- name: push
if: success() || failure()
Expand Down
2 changes: 2 additions & 0 deletions .gitignore
Original file line number Diff line number Diff line change
Expand Up @@ -366,3 +366,5 @@ tb/compile/env/
VSimTop
tb/sw/opensbi/fw_jump.dep
tb/sw/opensbi/fw_jump.elf.ld
mill
ScalaDoc/
26 changes: 12 additions & 14 deletions .gitmodules
Original file line number Diff line number Diff line change
@@ -1,15 +1,13 @@
[submodule "block-inclusivecache-sifive"]
path = block-inclusivecache-sifive
url = https://github.com/sifive/block-inclusivecache-sifive.git
[submodule "rocket-chip"]
path = rocket-chip
url = https://github.com/chipsalliance/rocket-chip.git
[submodule "sifive-blocks"]
path = sifive-blocks
url = https://github.com/sifive/sifive-blocks.git
[submodule "berkeley-hardfloat"]
path = berkeley-hardfloat
url = https://github.com/ucb-bar/berkeley-hardfloat.git
[submodule "constellation"]
path = constellation
[submodule "dependencies/rocket-chip"]
path = dependencies/rocket-chip
url = https://github.com/chipsalliance/rocket-chip.git
[submodule "dependencies/constellation"]
path = dependencies/constellation
url = https://github.com/ucb-bar/constellation.git
[submodule "dependencies/inclusivecache"]
path = dependencies/inclusivecache
url = https://github.com/chipsalliance/rocket-chip-inclusive-cache.git
[submodule "dependencies/blocks"]
path = dependencies/blocks
url = https://github.com/chipsalliance/rocket-chip-blocks.git

2 changes: 1 addition & 1 deletion LICENSE.NPL
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
Copyright (c) <2020 - 2023> Huazhong University of Sci. & Tech. <m201772520@hust.edu.cn>
Copyright (c) 2020 - 2024 Huazhong University of Sci. & Tech. <m201772520@hust.edu.cn>

"Anti 996" License Version 1.0 (Draft)

Expand Down
34 changes: 28 additions & 6 deletions Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -244,7 +244,11 @@ fpuisa += rv64uf-v-move
fpuisa += rv64uf-p-recoding
fpuisa += rv64uf-v-recoding

isa ?= $(aluisa) $(bruisa) $(lsuisa) $(privisa) $(mulisa) # $(fpuisa)
include ${R2}/tb/ci/vec/testList.mk



isa ?= $(aluisa) $(bruisa) $(lsuisa) $(privisa) $(mulisa)# $(fpuisa)
# isa ?= $(fpuisa)


Expand All @@ -256,7 +260,7 @@ isa ?= $(aluisa) $(bruisa) $(lsuisa) $(privisa) $(mulisa) # $(fpuisa)



.PHONY: compile clean VSimTop
.PHONY: compile clean VSimTop mill doc

module:
sbt "test:runMain test.testModule --target-dir generated --show-registrations --full-stacktrace -E verilog"
Expand All @@ -266,22 +270,35 @@ compile:
sbt "test:runMain test.testMain \
-e verilog"


#--gen-mem-verilog \
# --inline \

# --list-clocks \


mill:
rm -rf ./generated/Main/
rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
./mill --no-server clean
./mill -i rift2Core[chisel].test.runMain test.testMain

doc:
rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
./mill --no-server show rift2Core[chisel].docJar
unzip -d ScalaDoc/ out/rift2Core/chisel/docJar.dest/out.jar

noc:
rm -rf ./generated/Main/
sbt "test:runMain test.testNoC \
-e verilog"


line:
rm -f dependencies/rocket-chip/src/main/resources/META-INF/services/firrtl.options.RegisteredLibrary
rm -rf generated/Debug/
rm -rf generated/Release/
sbt "test:runMain test.testAll"
# rm -rf generated/Release/
./mill --no-server clean
./mill -i rift2Core[chisel].test.runMain test.testAll

CONFIG ?= /Main/

Expand All @@ -308,7 +325,7 @@ VSimTop:
${R2}/tb/verilator/sim_main.cpp \
${R2}/tb/verilator/diff.cpp \
-Mdir ./generated/build/$(CONFIG) \
-j 30
-j 1



Expand Down Expand Up @@ -348,6 +365,11 @@ area: yosys
echo "{\n \"schemaVersion\": 1, \n \"label\": \"\", \n \"message\": \""$(basename $(filter %.000000, $(shell cat $(R2)/generated/$(CONFIG)/stat.log) ))"\", \n \"color\": \"a6bf94\" \n}" >> $(R2)/generated/$(CONFIG)/area.json
# rm -f $(R2)/generated/$(CONFIG)/stat.log

singleV: VSimTop
${R2}/generated/build/$(CONFIG)/VSimTop -w -l -p -f ./tb/ci/vec/$(TESTFILE)

isaV:
$(foreach test, $(vecisa), ${R2}/generated/build/$(CONFIG)/VSimTop -l -f ./tb/ci/vec/$(test) || exit; )

# lineCfg += Rift2300
# lineCfg += Rift2310
Expand Down
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