Improve flash configs for i.MX RT targets

[MulattoKid]

This PR does two things:

1. Enable RAM_CODE=1 in all i.MX RT target example configs. When running XIP this is needed to ensure memcpy (which is used during hal_flash_write) is in RAM, and not flash as that could result in reading from flash while writing to flash.
2. Change both CPU_MIMXRT1061CVJ5B and CPU_MIMXRT1042XJM5B to define the USE_GET_CONFIG macro. This makes the flash configuration's LUT a lot smaller, and the MCU will instead query the various settings from the flash chip. Note that the CPU_MIMXRT1052DVJ6B target (RT1050 family) doesn't support this option.

Ref: #489

[dgarske]

Okay to test. Contributor agreement on file.

[bigbrett]

This looks good, but I'm troubled that you are still experiencing hangs. I'd like to hold off on merging this until I can test on more targets as well as figure out the root cause of the ROM API hanging

[MulattoKid]

My first test was to add RAMFUNCTION to the definition of hal_flash_init, and with that things seem to work. I'm not able to hit the hang. As mentioned in #493 I do believe adding a DSB barrier would still be an additional safety measure that could be added - it makes sense in my head that it's needed.

If it's OK I'll combine the these two PRs into one, as they're quite connected, and adding DSB would be needed in both.

[MulattoKid]

Moved to new PR: #495