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DMA SG delayed input #125

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DMA SG delayed input #125

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IstvanZsSzekely
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Tests functionality implemented in PR

Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
- Fixed parameter name after change
- Updated DDR address to use the defined variable
- Updated test harness DDR base address define

Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
Signed-off-by: Istvan-Zsolt Szekely <istvan.szekely@analog.com>
@IstvanZsSzekely IstvanZsSzekely added the new New testbench label Oct 21, 2024
@IstvanZsSzekely IstvanZsSzekely self-assigned this Oct 21, 2024
@IstvanZsSzekely IstvanZsSzekely marked this pull request as draft December 17, 2024 13:19
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