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179 initialize user mode #181
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98e413d
Add two new entries to GDT for user mode
dreamos82 b2c3776
Check if user flag should be added
dreamos82 349a00f
Add tss data structure
dreamos82 c623821
Merge branch 'master' into 179_initialize_user_mode
dreamos82 f3bac7a
Merge branch '179_initialize_user_mode' of github.com:dreamos82/Dream…
dreamos82 882b2f4
Add tss.c and initialize function
dreamos82 d350e0c
Initialize tss (not completed)
dreamos82 40990ea
Make gdt64 asm variable global
dreamos82 84af2fc
Add few defines for tss management
dreamos82 1a84b4a
Merge remote-tracking branch 'origin' into 179_initialize_user_mode
dreamos82 3ba5c0e
Add tss segment selector
dreamos82 da7fa3f
Add _load_task_register function
dreamos82 0fd942f
Fix kernel_tss struct and load_task_register function
dreamos82 8b231ac
Fix error in TSS_ENTRY_* defines
dreamos82 c2e19ab
move gdt64 into the data section
dreamos82 809f5ee
Add some comments
dreamos82 c1a88e3
Change requested
dreamos82 014d21f
Fix initialization
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Original file line number | Diff line number | Diff line change |
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@@ -0,0 +1,42 @@ | ||
#ifndef __TSS_H__ | ||
#define __TSS_H__ | ||
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#include <stdint.h> | ||
#include <stddef.h> | ||
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#define TSS_ENTRY_LOW 5 | ||
#define TSS_ENTRY_HIGH 6 | ||
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/** This structure is copied from OSDev Notes, Part 6: Userspace. | ||
* https://github.com/dreamos82/Osdev-Notes/blob/master/06_Userspace/03_Handling_Interrupts.md | ||
*/ | ||
typedef struct tss | ||
{ | ||
uint32_t reserved0; | ||
uint64_t rsp0; | ||
uint64_t rsp1; | ||
uint64_t rsp2; | ||
uint64_t reserved1; | ||
uint64_t reserved2; | ||
uint64_t ist1; | ||
uint64_t ist2; | ||
uint64_t ist3; | ||
uint64_t ist4; | ||
uint64_t ist5; | ||
uint64_t ist6; | ||
uint64_t ist7; | ||
uint64_t reserved3; | ||
uint16_t reserved4; | ||
uint16_t io_bitmap_offset; | ||
}__attribute__((__packed__)) tss_t; | ||
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//typedef struct tss tss_t; | ||
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extern tss_t kernel_tss; | ||
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extern void _load_task_register(); | ||
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void initialize_tss(); | ||
void load_tss(); | ||
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#endif |
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Original file line number | Diff line number | Diff line change |
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section .text | ||
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; This function just load the tss selecto in the task _load_task_register | ||
; it should be called only once during kernel initialization. | ||
global _load_task_register | ||
_load_task_register: | ||
mov rax, 0x28 | ||
ltr ax | ||
ret |
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#include <logging.h> | ||
#include <tss.h> | ||
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extern uint64_t gdt64[]; | ||
extern uint64_t stack[]; | ||
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tss_t kernel_tss; | ||
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void initialize_tss(){ | ||
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loglinef(Verbose, "(%s) Initializing tss", __FUNCTION__); | ||
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// These fields are reserved and must be set to 0 | ||
kernel_tss.reserved0 = 0x00; | ||
kernel_tss.reserved1 = 0x00; | ||
kernel_tss.reserved2 = 0x00; | ||
kernel_tss.reserved3 = 0x00; | ||
kernel_tss.reserved4 = 0x00; | ||
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// The rspX are used when there is a privilege change from a lower to a higher privilege | ||
// Rsp contain the stack for that privilege level. | ||
// We use only privilege level 0 and 3, so rsp1 and rsp2 can be left as 0 | ||
// Every thread will have it's own rsp0 pointer | ||
kernel_tss.rsp0 = (uint64_t)stack + 16384; | ||
kernel_tss.rsp1 = 0x0; | ||
kernel_tss.rsp2 = 0x0; | ||
// istX are the Interrup stack table, unless some specific cases they can be left as 0 | ||
// See intel manual chapter 5 | ||
kernel_tss.ist1 = 0x0; | ||
kernel_tss.ist2 = 0x0; | ||
kernel_tss.ist3 = 0x0; | ||
kernel_tss.ist4 = 0x0; | ||
kernel_tss.ist5 = 0x0; | ||
kernel_tss.ist6 = 0x0; | ||
kernel_tss.ist7 = 0x0; | ||
// Can be left as 0 for now | ||
kernel_tss.io_bitmap_offset = 0x0; | ||
} | ||
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void load_tss() { | ||
// Fields explanation (each entry is 64bit) | ||
// TYPE: 1001 (64Bit TSS Available) | ||
// BASE_ADDRESS: kernel_tss | ||
// LIMIT 16:19 0 DPL: 0 P: 1 G:0 | ||
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gdt64[TSS_ENTRY_LOW] = 0x00; | ||
gdt64[TSS_ENTRY_HIGH] = 0x00; | ||
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// TSS_ENTRY_LOW: | ||
uint16_t limit_low = (uint16_t) sizeof(kernel_tss); // 0:15 -> Limit (first 15 bits) should be 0xFFFF | ||
uint16_t tss_entry_base_1 = (((uint64_t)&kernel_tss & 0xFFFF)); // 16:31 -> First 16 bits of kernel_tss address | ||
uint8_t tss_entry_base_2 = (((uint64_t)&kernel_tss >> 16) & 0xFF); // 32:39 -> Next 8 bits of kernel_tss address | ||
uint8_t flags_1 = 0x89; // 40:47 -> Type 4 bits in our case is 1001, 0, DPL should be 0 , P = 1 | ||
uint8_t flags_2 = 0; // 48:55 -> Limit (last 4 bits) can be 0, AVL=available to OS we leave it as 0, 53:54 are 0, 55 G (Granularity) | ||
uint8_t tss_entry_base_3 = (((uint64_t)&kernel_tss >> 24) & 0xFF); // 55:63 -> Bits 25:31 of the kernel_tss base address | ||
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// TSS_ENTRY_HIGH | ||
uint32_t tss_entry_base_4 = (((uint64_t) &kernel_tss>>32)& 0xFFFFFFFF); // 0:31 -> kernel_tss bits 32:63 | ||
uint32_t reserved_part = 0; // 32:63 -> Reserved / 0 | ||
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uint64_t entry_low = (uint64_t) tss_entry_base_3 << 56 | (uint64_t) flags_2 << 48 | (uint64_t) flags_1 << 40 | (uint64_t) tss_entry_base_2 << 32| (uint64_t)tss_entry_base_1 << 16 | (uint64_t) limit_low; | ||
uint64_t entry_high = reserved_part | tss_entry_base_4; | ||
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gdt64[TSS_ENTRY_LOW] = entry_low; | ||
gdt64[TSS_ENTRY_HIGH] = entry_high; | ||
loglinef(Verbose, "(%s) Loading TSS Register", __FUNCTION__); | ||
loglinef(Verbose, "(%s) kernel_tss address = 0x%x", __FUNCTION__, &kernel_tss); | ||
loglinef(Verbose, "(%s) gdt64[4] = 0x%x", __FUNCTION__, (uint64_t)gdt64[TSS_ENTRY_LOW]); | ||
loglinef(Verbose, "(%s) gdt64[5] = 0x%x", __FUNCTION__, (uint64_t)gdt64[TSS_ENTRY_HIGH]); | ||
_load_task_register(); | ||
} |
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I like that this is all explicit, but it'd be more efficient to use
memset()
to zero the whole tss and then set the fields you want afterwards.There was a problem hiding this comment.
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yeah, i totally agree, but i haven't implemented memset yet XD