Update firmware for moteus r4.11

fw/bldc_servo_structs.h

@@ -422,11 +422,17 @@ struct BldcServoConfig {
       40000;
 
   float i_gain = 20.0f;  // should match csa_gain from drv8323
-  float current_sense_ohm = 0.0005;
+  float current_sense_ohm = 0.0005f;
 
   // PWM rise time compensation
-  float pwm_comp_off = (g_measured_hw_rev <= 6) ? 0.015 : 0.055;
-  float pwm_comp_mag = (g_measured_hw_rev <= 6) ? 0.005 : 0.005;
+  float pwm_comp_off =
+      (g_measured_hw_rev <= 6) ? 0.015f :
+      (g_measured_hw_rev <= 7) ? 0.055f :
+      0.027f;
+  float pwm_comp_mag =
+      (g_measured_hw_rev <= 6) ? 0.005f :
+      (g_measured_hw_rev <= 7) ? 0.005f :
+      0.005f;
   float pwm_scale = (g_measured_hw_rev <= 6 ) ? 1.0f : 1.0f;
 
   // We pick a default maximum voltage based on the board revision.

fw/drv8323.cc

@@ -172,9 +172,10 @@ class Drv8323::Impl {
       config_.idrivep_ls_ma = std::min<uint16_t>(config_.idrivep_ls_ma, 50);
       config_.idriven_ls_ma = std::min<uint16_t>(config_.idriven_ls_ma, 100);
     } else if (g_measured_hw_rev > 7) {
-      // If the gate drive strength issue has been resolved, then this
-      // restriction can be removed in later versions.
-      MJ_ASSERT(false);
+      // hw rev 8 (silk 4.10) has improved layout and an additional
+      // gate drive resistor, it will likely not be damaged at up to
+      // 100/200, and higher may be possible in some situations.
+      // Thus, the above limitation is now removed.
     }
 
     WriteConfig();

fw/drv8323.h

@@ -174,28 +174,48 @@ class Drv8323 : public MotorDriver {
 
     // hw rev 7 boards use a drv8353, which is sensitive to damage
     // ringing on the gate drives.  This version requires lower gate
-    // drive strength to avoid damage.
-    uint16_t idrivep_hs_ma = (g_measured_hw_rev <= 6) ? 370 : 50;
-    uint16_t idriven_hs_ma = (g_measured_hw_rev <= 6) ? 740 : 100;
+    // drive strength to avoid damage.  hw rev 8 boards have a better
+    // layout and an additional gate drive resistor which allows them
+    // to go higher.
+    uint16_t idrivep_hs_ma =
+        (g_measured_hw_rev <= 6) ? 370 :
+        (g_measured_hw_rev <= 7) ? 50 :
+        100;
+    uint16_t idriven_hs_ma =
+        (g_measured_hw_rev <= 6) ? 740 :
+        (g_measured_hw_rev <= 7) ? 100 :
+        200;
 
 
     // Gate Drive LS Register
     bool cbc = true;  // Cycle-by cycle operation.
     uint16_t tdrive_ns = 1000;  // peak gate-current drive time
-    uint16_t idrivep_ls_ma = (g_measured_hw_rev <= 6) ? 370 : 50;
-    uint16_t idriven_ls_ma = (g_measured_hw_rev <= 6) ? 740 : 100;
+    uint16_t idrivep_ls_ma =
+        (g_measured_hw_rev <= 6) ? 370 :
+        (g_measured_hw_rev <= 7) ? 50 :
+        100;
+    uint16_t idriven_ls_ma =
+        (g_measured_hw_rev <= 6) ? 740 :
+        (g_measured_hw_rev <= 7) ? 100 :
+        200;
 
 
     // OCP Control Register
     bool tretry = false;  // false = 4ms, true = 50us
-    uint16_t dead_time_ns = (g_measured_hw_rev <= 6) ? 50 : 200;
+    uint16_t dead_time_ns =
+        (g_measured_hw_rev <= 6) ? 50 :
+        (g_measured_hw_rev <= 7) ? 200 :
+        50;
     OcpMode ocp_mode = OcpMode::kLatchedFault;
     uint8_t ocp_deg_us = 4;  // valid options of 2, 4, 6, 8
 
     // hw rev 6 boards and later use a FET with roughly double the
     // Rdson.  We set a threshold that will trip only if we get well
     // over the rated 100A limit.
-    uint16_t vds_lvl_mv = (g_measured_hw_rev <= 5) ? 260 : 450;
+    uint16_t vds_lvl_mv =
+        (g_measured_hw_rev <= 5) ? 260 :
+        (g_measured_hw_rev <= 7) ? 450 :
+        700;
 
 
     // CSA Control Register

fw/moteus_hw.h

@@ -37,10 +37,14 @@ namespace moteus {
 // r4.5 silk
 // #define MOTEUS_HW_REV 6
 
+// r4.5b-r4.8 silk
+// #define MOTEUS_HW_REV 7
+
+
 // The most recent version of the HW.
 #ifndef MOTEUS_HW_REV
-// r4.5b-r4.8 silk
-#define MOTEUS_HW_REV 7
+// r4.11 silk
+#define MOTEUS_HW_REV 8
 #endif
 
 // The mapping between MOTEUS_HW_REV and the version pins on the
@@ -54,7 +58,8 @@ constexpr int kHardwareInterlock[] = {
   0,   // r4.2/r4.3 (unfortunately, indistinguishable from the interlock)
   1,   // r4.4
   2,   // r4.5
-  3,   // r4.5b
+  3,   // r4.5b-r4.8
+  4,   // r4.10
 };
 #else
 constexpr int kHardwareInterlock[] = {
@@ -66,6 +71,7 @@ constexpr int kHardwareInterlock[] = {
   -1,  // never printed for f4
   -1,  // never printed for f4
   -1,  // never printed for f4
+  -1,  // never printed for f4
 };
 #endif
 
@@ -74,7 +80,8 @@ constexpr int kCompatibleHwRev[] = {
   // 3 isn't compatible, but we forgot to rev the version pins
   3,
   4, 5,
-  6, 7
+  6, 7,
+  8
 };
 
 #define DRV8323_ENABLE PA_3