A Bit Error Rate Test and Error Correction Coding System based on Xilinx GTX Transceiver
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May 11, 2018 - VHDL
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high-speed-serial
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Jan 30, 2021 - VHDL
This spreadsheet calculates the PCB transmission line insertion loss versus frequency and temperature curves from the datasheet values of the dielectric constant and loss tangent, in addition to copper foil roughness parameters.
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Dec 17, 2024
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hardware-designs pcb-layout high-speed-serial power-integrity signal-integrity pcb-design asic-design rf-design
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Dec 14, 2024
Given a specified channel insertion loss, this spreadsheet calculates a precise first guess for the optimal filter coefficients for SerDes's continuous time linear equalizer (CTLE) and feedforward equalizer (FFE).
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Dec 17, 2024
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