Skip to content
View vmazashvili's full-sized avatar
😎
😎
  • Tbilisi, Georgia

Block or report vmazashvili

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse

Popular repositories Loading

  1. parallel-to-serial-serial-to-parallel parallel-to-serial-serial-to-parallel Public

    parallel to serial/ serial to parallel shift register in Verilog

    Verilog 1

  2. BookListRazor BookListRazor Public

    I made this project while taking ASP.NET Core 3.1 course on freecodecamp.org

    C# 1

  3. gif-library-tutorial-library gif-library-tutorial-library Public

    ASP.NET Core C# and Nuxtjs project

  4. shift-register shift-register Public

    Shift register with a depth of 3 programmed in Verilog on Altera V GX Starter Kit.

    Verilog

  5. HW4-Instr-Data HW4-Instr-Data Public

    Verilog

  6. Mealy-FSM Mealy-FSM Public

    simple Mealy FSM done in verilog for Altera Cylcone V GX Starter kit. the code is written using three always statements. verilog file containing code with two always block is also included

    Verilog