i#3544 RV64: Preserve vtype and vl vector registers #7110
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… vector extension. This patch was authored at the Computer Architecture and VLSI Laboratory, Institute of Computer Sciense, Foundation of Reasearch and Technology, Hellas. It emmits the necessary instructions that handle saving and restoring the vl and vtype during the context switches, when using the vector extension of the RISC-V ISA. This is required, in order to use the use the vector extension correctly.
Accidentally tabs were used somewhere, replaced with spaces
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Hi all this patch is absolutely essential for any meaningful rv64 vector code to work properly (otherwise it fails with illegal instruction). Can someone please review it? |
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Looks like the triager @xdje42 missed this. |
Please don't force-push on shared branches (documented at https://dynamorio.org/page_code_reviews.html#autotoc_md118 and in other places) |
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When you are done, please re-request another round of review from previous reviewers at the top-right of the Web UI. |
This patch was authored at the Computer Architecture and VLSI Laboratory, Institute of Computer Sciense, Foundation of Reasearch and Technology, Hellas. It emits the necessary instructions that handle saving and restoring the vl and vtype during the context switches, when using the vector extension of the RISC-V ISA. This is required, in order to use the vector extension correctly. Issue: #3544
mariospaok4
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Please reply to (typically "Done") and resolve all of the comments (unless there is something still there to discuss but make that clear in a reply) before re-requesting review (see https://dynamorio.org/page_code_reviews.html#autotoc_md118).
Fixxed issue about a comment Issue: #3544
Renamed VL and VTYPE to CSR_VL and CSR_VTYPE Issue: #3544
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Okay, this is ready to merge, merging. |
This patch was authored at the Computer Architecture and VLSI Laboratory, Institute of Computer Science, Foundation of Research and Technology, Hellas.
It emits the necessary instructions that handle saving and restoring the vl and vtype during the context switches, when using the vector extension of the RISC-V ISA. This is required, in order to use the vector extension correctly.
Also corrected the order of append_restore_xflags and append_restore_simd_reg (in emit_utils_shared.c ) in order to have the restoration happen in the reverse order of the saving. This specific code is not currently used for RISC-V, but it might in the future.
Issue: #3544