This repository contains all the necessary material to implement a YOLOv3 object detection algorithm on the PYNQ-Z2 FPGA. There is a step-by-step tutorial associated so everyone can do it.

Low Precision(quantized) Yolov5

Low-Precision YOLO on PYNQ with FINN

Simple examples for FPGA design using Vivado HLS for high level synthesis and Vivado for bitstream generation.

MNIST accelerator using binary qunatization on Xilinx pynq-z2

SEM (Soft Error Mitigation) IP adapted for PYNQ-Z2

RTL and python for using the ADAU1761 audio codec on the Pynq-Z2 board from TUL

FPGA Implementation of Image Processing for MNIST Dataset Based on Convolutional Neural Network Algorithm (CNN)

tensorflor 2.1 wheel for pynq z2 ( zynq 7000 xilinx SoC ), cross compiled with different compiler's flags using the script provided by tensorflow for building it for rasberry

A Verilog implementation of a hand-written digit recognition Neural Network

Some of my projects/mistakes on various FPGA boards

MSc Final Project

A fast and efficient implementation of a SHA256 cracker

Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis

Repository that contains some neural network inferences on PYNQ-Z2 board employing hls4ml

This project automates process of creating a PYNQ Z1/Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.

Hardware Accelerator for ML

Hands-on learning experience in IoT, edge computing, and embedded systems using a variety of platforms such as microcontrollers (nRF, STM32, ESP32), FPGAs (Xilinx), and SoCs (Raspberry Pi, Zynq).